Fall 2006 1 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Senior Design...

Fall 2006

Lillevik 480f06-l12 1University of Portland School of Engineering

CS-EE 480

Senior DesignLecture 12

Change control, Funding

Design Review Milestone

Fall 2006


CS-EE 480

Change control

• Team completes change form: description, reason, impact

• Submits it to CCB

• CCB reviews request

• CCB responds with approval (or not)

• Team responds to approval

Fall 2006


CS-EE 480

Change control assignments

CCB receives requests, approves changes

Month Member 1 Member 2

November Zigzag Bridgeport

December Enterprise Helix

January Pilot Rock Boring

February Beavermarsh Glide

March Sublimity Zigzag

April Enterprise Helix

Fall 2006


CS-EE 480

Change request form

Date

Title of Request

Description(What is it you want to

change?)

Reason(Why is it you want to

make a change?)

Impact(What is affected by the

proposed change and how?)

Fall 2006


CS-EE 480

Funding process

• Submit budget to instructor• Instructor/Dept. Head responds with

approval• Reimbursements

– Review policy– Advisor approves by initialing budget and

receipt– Submit budget/receipts to Debbie Speer

Fall 2006


CS-EE 480

Funding requests

• Requests for School funding due

Friday, November 10

• Complete spreadsheet and email to instructor, one-per-team

• Results available

Friday, November 17

Fall 2006


CS-EE 480

Funding Spreadsheet

Each project budgeted for $200

Line Item Qantity Description Unit Cost Cost1 $0.002 $0.003 $0.004 $0.005 $0.006 $0.007 $0.008 $0.009 $0.00

10 $0.0011 $0.0012 $0.00

TOTAL $0.00

Fall 2006


CS-EE 480

School policy on funding• Project becomes UP property

• Funding limit of $200

• Budget must be approved prior to any reimbursement

• Reimbursement requires the receipt and advisors approval

• Debbie Speer receives reimbursement request

Fall 2006


CS-EE 480

Design review milestone

• Final Fall semester deliverable• Design complete: discipline-specific meaning

• Checklist reviewed for completeness

• Some assurance that design will work

• Go/NoGo for detailed implementation

Fall 2006


CS-EE 480

DR process

• Collateral list and material prepared

• Checklist completed

• Checklist reviewed in an approval meeting• Design status: approved, conditionally

approved, not approved

• Follow-up: minutes, action items, re-schedule of meeting for conditional or not approved status

Fall 2006


CS-EE 480

DR approval status

• Approved: everything verified

• Conditionally approved– One or two minor items not verified (but easily

fixed)– Requires specific action item(s) to resolve

• Not approved– One major and/or several minor items not verified– Requires specific action item(s) to resolve

Fall 2006


CS-EE 480

DR checklist sections

• General requirements: already discussed

• Software systems

• Digital systems

• Integrated circuits

• Control systems

• Other technologies?

Each project is unique

Fall 2006


CS-EE 480

Software systems?

Fall 2006


CS-EE 480

Digital systems?

Fall 2006


CS-EE 480

Integrated circuits?

Fall 2006


CS-EE 480

Control systems?

Fall 2006


CS-EE 480

Fall 2006


CS-EE 480

Software systems

• E/R and UML diagrams complete

• User interface friendly

• Error handling defined

• Module interface defined

• List of constraints, req, inputs, outputs

• Initial conditions

• Check for size

Fall 2006


CS-EE 480

Software systems, continued.

• Program meets reqs

• Versions defined

• IDE defined

• Maintainable

• Security checks

• Schedule in place

Fall 2006


CS-EE 480

Digital systems

• Size and cost

• Power req

• Timing (AC)

• Pin count and definition

• Fan-out, fan-in

• Logic family compatibility

• Part availability and cost

Fall 2006


CS-EE 480

Digital systems, continued.

• Initial conditions, resets

• State diagram

• Excitation equations

• Buffering

• Block diagram, hierarchical

• HDL compatible

• Metastability checked

Fall 2006


CS-EE 480

Integrated circuits

• Initial conditions, reset

• Number of pins

• Min capacitance, inductance, resistance

• Timing analysis

• Floorplan OK

• Checking .tpr file

• Heat analysis

Fall 2006


CS-EE 480

Integrated circuits, continued.

• Manufacturability

• Design rule checks

• Power req

• Parasitic analysis

• Gate count

• ESD and static

• Technology

Fall 2006


CS-EE 480

Integrated circuits, continued.

• Package type

• Interface definitions

• EMC concerns

Fall 2006


CS-EE 480

Control systems

• Initial conditions

• Inputs, outputs defined

• Stability OK, damping

• Data integrity

• S/N ratio checked

• System block diagram

• Transfer function

Fall 2006


CS-EE 480

Control systems, continued.

• Response times

• Component transfer functions

• Avoid harmonics

• Sensor definitions, xfer functions

• Gain and phase margin

• Freq constraints

Fall 2006 1 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Senior Design...

Documents

Transcript of Fall 2006 1 CS-EE 480 Lillevik 480f06-l12 University of Portland School of Engineering Senior Design...