EURECA XEUS
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Transcript of EURECA XEUS
EURECA EURECA XEUS XEUS
EUREURopean-Japanopean-JapanEEse micro-se micro-CCalorimeter alorimeter AArrayrray
Piet de KortePiet de Korte
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EUREURopean-Japanopean-JapanEEse se CCalorimeter alorimeter AArray Projectrray Project
AIMSAIMS
• Design, build, and test of a Design, build, and test of a prototype X-ray Imaging prototype X-ray Imaging SpectrometerSpectrometer to demonstrate to demonstrate technical feasibility/readinesstechnical feasibility/readiness for for a cryogenic space instrument by a cryogenic space instrument by end 2007end 2007
• Use Use EURECAEURECA as a vehicle to establish a European/Japanese as a vehicle to establish a European/Japanese collaboration on micro-calorimeter arrayscollaboration on micro-calorimeter arrays
• Open up the potential to participate in future missions, like Open up the potential to participate in future missions, like ESA’s XEUS (>2020),ESA’s XEUS (>2020), NASA’s Con-X (>2020), future Japanese NASA’s Con-X (>2020), future Japanese missions like NEXT (2015) and DIOS (2012), Italian’s Estremo missions like NEXT (2015) and DIOS (2012), Italian’s Estremo (2015), Dutch NEW (2015), etc(2015), Dutch NEW (2015), etc
• Acquire development funding at (multi) national levelAcquire development funding at (multi) national level
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EURECA OverviewEURECA OverviewQualification of a DC-biased pixel in dry ADR at BESSYSeptember 2006
Start Integration 5 x 5 array + FDM-readout Autumn 2006
Initial testing (one channel)Begin 2007
Synchrotron testing (all channels)End 2007
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EURECAEURECA Project Project Contibutions/PartnersContibutions/PartnersADR CoolerADR Cooler
• Commercial ADR (Janis)Commercial ADR (Janis) PSI (Zürich)PSI (Zürich)• Flight type ADRFlight type ADR MSSL (London)MSSL (London)
DetectorsDetectors SRONSRON• Si-micromaching Si-micromaching MESA (UTwente)MESA (UTwente)• Development + tests Development + tests TMU (Tokyo),TMU (Tokyo), INFN(Genua), INAF( Rome), INFN(Genua), INAF( Rome),
KIP (Heidelberg)KIP (Heidelberg)• Mo-based bilayersMo-based bilayers IMM(Madrid), ICMA(Barcelona, IMM(Madrid), ICMA(Barcelona,
Zaragossa)Zaragossa)LC-filtersLC-filters SRONSRON
• Alternative routesAlternative routes INA + ICMA (Zaragossa)INA + ICMA (Zaragossa)SQUIDsSQUIDs
• Three routesThree routes PTB (Berlin), VTT (Helsinki), PTB (Berlin), VTT (Helsinki), SII (Japan)SII (Japan)ElectronicsElectronics SRONSRON
• LNA + FLLLNA + FLL VTT (Helsinki), VTT (Helsinki), TMU + ISAS (Tokyo)TMU + ISAS (Tokyo)• AC-BIAS + C&C AC-BIAS + C&C PSI (Zürich)PSI (Zürich)• Cold FLLCold FLL Alcatel Alenia Space (Milano)Alcatel Alenia Space (Milano)• Data Acquisition (BESSY)Data Acquisition (BESSY) X-ray Astronomy (Leicester)X-ray Astronomy (Leicester)
Data analysis softwareData analysis software• SystemSystem IFCA(Santander), MSSL(London),IFCA(Santander), MSSL(London),
Astr. Obs (Geneva)Astr. Obs (Geneva)• AlgorithmsAlgorithms X-ray Astronomy (Leicester)X-ray Astronomy (Leicester)
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EMC/GROUNDING/HARNESS/FILTERINGEMC/GROUNDING/HARNESS/FILTERING
• ΔP ≈ 1 fW eq to ΔE ≈ 1 eV
• Sensors + electronics inside faraday cage
• Faraday cage consists of:
• Cryoperm + SC Shield
• Harness shield (tube)
• FEE-box integrated on ADR
• Cable harness
• EMC electronics rack
• Single point ground in FEE-box
• Filters at entrance FEE-box and at 4 K interconnection box
• Differential electronics and twisted wire-pairs to reject common mode disturbances
• PC’s + external equipment coupled by optical links
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Cold head shield geometryCold head shield geometry
Cryoperm outer shield 1 mm @ 4K
Superconducting inner shield(Pb or SnPb plated OFHC copper) @ 500mK
OFHC Copper support/thermal link
for inner shield @ 500mK
Cold finger entranceFinger may be electrically coupled with superconductor to inner shield
to reduce noise
Superconducting harness shield(Pb plated OFHC copper) @ 4K
Radiation entrance window
Superconductor shielded loom interconnection & filter box @ 4K
(Pb plated OFHC copper)
Harness shield, ss304
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FREQUENCY-DOMAIN-MULTIPLEXINGFREQUENCY-DOMAIN-MULTIPLEXING
CRYOSTAT
1 column or row of pixel-array shown as example
FDM operation:
- TESs act as AM-modulators
- TESs AC-biased at frequencies f1, f2, f3, ….
-Each TES equipped with LC band pass filter around carrier frequency to block wide-band noise
- Summed signal read-out by one SQUID-amplifier per column
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FDM - ElectronicsFDM - Electronics
AC-bias generation + Bias Current Cancellation (BCC) by DDS chips
Filters consist of superconducting LC-filters at 50 mK
DEMUX by ADC + digital processing in FPGA (later ASIC)
Signal processing (energy extraction) in FPGA + DSP
DDS
chips
LC-filters
FPGA + DSP
ADC +
FPGA
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Summing TopologySumming Topology Cold Head LayoutCold Head Layout
TES-ARRAY LC-filters
SQUIDs
Current SummingBias Comb + capacitive couplingBCC at input
Japanese Ch. Flux Summing8-input SQUIDBCC via FB
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Status energy resolution on single pixelStatus energy resolution on single pixel
NIST (2005) demonstrated NIST (2005) demonstrated [email protected]@5.9keV for for pixels optimized with regard to excess noisepixels optimized with regard to excess noise
In set-up with proper shielding, filtering, and grounding we get reproducibly good energy resolution with as best value:
ΔE = 3.4 eV at 5.9 keV; τ =100 μs for pixel with Emax ≈ 10 keV
16 hours, analogue filter4 minutes, digital filter
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TES-array – 5x5 bulk-micromachining TES-array – 5x5 bulk-micromachining arrays operational with 5.3 eV arrays operational with 5.3 eV [email protected]@5.9 keV keV
TiAu Therm.
Cu-abs.(stem)
Absorber ontherm om eter
W iring
Si-nitridem em brane
BoxBoxSlots
Bulk-micromachining
Cu/Bi-absorbers
No mushroom yet
5.3 eV
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Recent 32 x 32 pixel ArrayRecent 32 x 32 pixel Array
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TES with Steepness/excess noise controlTES with Steepness/excess noise control
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NEW ABSORBER – TES COUPLINGNEW ABSORBER – TES COUPLING
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LC-filtersLC-filters
- Capacitors based on 20 nm thick Al- Capacitors based on 20 nm thick Al22OO33-dielectric with -dielectric with C = 4.3 nF/mm2 (expected Q = 10.000)
- Inductors on Nb-based washer coils- Inductors on Nb-based washer coils
Test-chip with LC-filters for 3,4,6,8 MHz with 100 nH coils
Q = 500 @ 7 MHz
Rs = 8.7 mΩ
Al-bond-wire (4K) and critical current limited (50 μA)
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TES READ-OUT BY SQUID AMPLIFIERTES READ-OUT BY SQUID AMPLIFIER
• SQUID requirements
• in < 6 nA/√Hz for Lin < few nH• Dyn.Range > 106 √Hz
• SQUID response highly a-linear
• feedback required for linearization and dynamic range improvement (flux-locked-loop/FLL)
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SUPERCONDUCTING SQUID AMPLIFIERSSUPERCONDUCTING SQUID AMPLIFIERS
VTT input SQUIDØN = 0.12 μØ0/√Hz @ 4K
Lin ≈ 1nH
In = 3.5 pA/√Hz
TN = 8 – 12 K (2nd SQUID-array required)
PTB 16-SQUID arrayØN = 0.12 μØ0/√Hz @ 0.3K
Lin ≈ 3 nHIN = 2.8 pA/√HzTN = 20 K (LNA just possible)
SII 8-input SQUID ØN
= 0.13 μØ0/√Hz @ 4.2K(2nd SII SQUID-array planned)
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Status laboratory confirmation of FDMStatus laboratory confirmation of FDM
Tests on TES as detector and mixer:Tests on TES as detector and mixer:• AC-bias experiment at 50 kHz AC-bias experiment at 50 kHz
with with 6.5 eV @ 5.9 keV6.5 eV @ 5.9 keV energy energy resolutionresolution
• At 250 kHz 4.8 eV baseline and At 250 kHz 4.8 eV baseline and 7.8 eV @ 5.9 keV7.8 eV @ 5.9 keV
• AC-bias I-V measurements at 500 AC-bias I-V measurements at 500 kHz to study potential switch-off kHz to study potential switch-off behavior. behavior. For low enough series For low enough series resistance resistance (LC-filters with high Q)(LC-filters with high Q) no switch off problems and good no switch off problems and good relation with DC-curvesrelation with DC-curves
• AC-coupling of bias (no shunt AC-coupling of bias (no shunt resistor) works fineresistor) works fine
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6920 6930 6940 6950 6960 6970 6980 6990
Fully analogue FDM electronics (AC-bias sources, Mixers and de-mixers, FLL-chain, etc)
- operational up to 500 kHz- electronic resolution of SQUID, FLL electronics, bias sources and mixers/de-mixers, for detector biased in normal state is 2 eV
7.8 eV @ 5.9 keV
New measurements going on in fully digital de-mux system and well shielded cryostat to prove that ΔEDC = ΔEAC
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AC-bias cardAC-bias card
• AC-bias fed per column
• 8 DDS-chips power 8 pixels
• 8 DDS-chips give BCC for 8 pixels
AC-bias DDS chips
BCCDDS chips
Backplane interface ACTEL FPGA HK
Baseband filter, amplifier
RS485
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Summary and ConclusionsSummary and Conclusions
• EURECA well under way with Preliminary Design Review in Jan. EURECA well under way with Preliminary Design Review in Jan. 2006. Start integration 12006. Start integration 1stst channel in ADR by end-2006 channel in ADR by end-2006
• Integration of single TES-pixel with DC-electronics in dry ADR Integration of single TES-pixel with DC-electronics in dry ADR started with aim to perform BESSY-calibrations in 2started with aim to perform BESSY-calibrations in 2ndnd week of week of September 2006September 2006
• 5 x 5 detector-arrays available with 5 x 5 detector-arrays available with ΔΔE = 5.3 eV @ 5.9 keV. E = 5.3 eV @ 5.9 keV. 32 x 32 x 32 arrays available as well32 arrays available as well
• FDM with standard FLL-electronics will only multiplex about 10 FDM with standard FLL-electronics will only multiplex about 10 pixels per SQUID-channel with XEUS requirements (Epixels per SQUID-channel with XEUS requirements (Emaxmax=10 keV, =10 keV, ΔΔE = 2 eV, and E = 2 eV, and ττ = 100 = 100 μμs) s) (30 with Con-X requirement)(30 with Con-X requirement)
• Coarse/Fine amplifier topology, Base-band feedback, or a Coarse/Fine amplifier topology, Base-band feedback, or a combinations should offer appreciably better performance. combinations should offer appreciably better performance. (about 4 x more pixels).(about 4 x more pixels). It is planned to start working on this by It is planned to start working on this by 2007 in parallel to mainstream EURECA2007 in parallel to mainstream EURECA
• SQUIDs close to the requirements are available. But further SQUIDs close to the requirements are available. But further optimization is still required/possibleoptimization is still required/possible
• ASIC developments for Space (power reduction) is startingASIC developments for Space (power reduction) is starting
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Coarse/Fine Amplifier Topology (Feed-forward)Coarse/Fine Amplifier Topology (Feed-forward)
• Fine amplifier measures noise, non-linearity of coarse amplifier + system offsets
• Factor 10 increase in Dyn. Range requires < 10% channel tuning.
•For 8 ns delay (ampl. + cable) this limits system to 2 MHz
• Cold feed-forward enables 10 MHz bandwidth (control gain of both channels!)
Will be studied in parallel with EURECA for XEUS