eSPOT8ds
description
Transcript of eSPOT8ds
Sun™ SPOTMain Board Technical DatasheetRev 8.0 Revision 8 manufactured after October 2010
Sun LabsOctober 2010
Oracle America, Inc.16 Network CircleMenlo Park, CA 94025Document Revision 2.0.1
Copyright © 2010, Sun Microsystems, Inc. All rights reserved.
Copyright © 2010, Oracle and/or its affiliates. All rights reserved.
This software and related documentation are provided under a license agreement containing restrictions on use and disclosure and are protected by intellectual
property laws. Except as expressly permitted in your license agreement or allowed by law, you may not use, copy, reproduce, translate, broadcast, modify,
license, transmit, distribute, exhibit, perform, publish, or display any part, in any form, or by any means. Reverse engineering,disassembly, or decompilation of
this software, unless required by law for interoperability, is prohibited.
The information contained herein is subject to change without notice and is not warranted to be error‐free. If you find any errors, please report them to us in
writing.
If this is software or related software documentation that is delivered to the U.S. Government or anyone licensing it on behalf of the U.S. Government, the
following notice is applicable:
U.S. GOVERNMENT RIGHTS. Programs, software, databases, and related documentation and technical data delivered to U.S. Government customers are
ʺcommercial computer softwareʺ or ʺcommercial technical dataʺ pursuant to the applicable Federal Acquisition Regulation and agency‐specific supplemental
regulations. As such, the use, duplication, disclosure, modification, and adaptation shall be subject to the restrictions and license terms set forth in the applicable
Government contract, and, to the extent applicable by the terms of the Government contract, the additional rights set forth in FAR 52.227‐19, Commercial
Computer Software License (December 2007). Oracle America, Inc., 500 Oracle Parkway, Redwood City, CA 94065.
This software or hardware is developed for general use in a variety of information management applications. It is not developed or intended for use in any
inherently dangerous applications, including applications which may create a risk of personal injury. If you use this software or hardware in dangerous
applications, then you shall be responsible to take all appropriate fail‐safe, backup, redundancy, and other measures to ensure its safe use. Oracle Corporation
and its affiliates disclaim any liability for any damages caused by use of this software or hardware in dangerous applications.
Oracle and Java are registered trademarks of Oracle and/or its affiliates. Other names may be trademarks of their respective owners.
AMD, Opteron, the AMD logo, and the AMD Opteron logo are trademarks or registered trademarks of Advanced Micro Devices. Intel and Intel Xeon are
trademarks or registered trademarks of Intel Corporation. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC
International, Inc. UNIX is a registered trademark licensed through X/Open Company, Ltd.
This software or hardware and documentation may provide access to or information on content, products, and services from third parties. Oracle Corporation
and its affiliates are not responsible for and expressly disclaim all warranties of any kind with respect to third‐party content, products, and services. Oracle
Corporation and its affiliates will not be responsible for any loss, costs, or damages incurred due to your access to or use of third‐party content, products, or
services.
______________________________________________________________________________________________________________________________________________
Copyright © 2010, Sun Microsystems, Inc. Tous droits réservés.
Copyright © 2010, Oracle et/ou ses affiliés. Tous droits réservés.
Ce logiciel et la documentation qui l’accompagne sont protégés par les lois sur la propriété intellectuelle. Ils sont concédés sous licence et soumis à des
restrictions d’utilisation et de divulgation. Sauf disposition de votre contrat de licence ou de la loi, vous ne pouvez pas copier, reproduire, traduire, diffuser,
modifier, breveter, transmettre, distribuer, exposer, exécuter, publier ou afficher le logiciel, même partiellement, sous quelque forme et par quelque procédé que
ce soit. Par ailleurs, il est interdit de procéder à toute ingénierie inverse du logiciel, de le désassembler ou de le décompiler, excepté à des fins d’interopérabilité
avec des logiciels tiers ou tel que prescrit par la loi.
Les informations fournies dans ce document sont susceptibles de modification sans préavis. Par ailleurs, Oracle Corporation ne garantit pas qu’elles soient
exemptes d’erreurs et vous invite, le cas échéant, à lui en faire part par écrit.
Si ce logiciel, ou la documentation qui l’accompagne, est concédé sous licence au Gouvernement des Etats‐Unis, ou à toute entité qui délivre la licence de ce
logiciel ou l’utilise pour le compte du Gouvernement des Etats‐Unis, la notice suivante s’applique :
U.S. GOVERNMENT RIGHTS. Programs, software, databases, and related documentation and technical data delivered to U.S. Government customers are
ʺcommercial computer softwareʺ or ʺcommercial technical dataʺ pursuant to the applicable Federal Acquisition Regulation and agency‐specific supplemental
regulations. As such, the use, duplication, disclosure, modification, and adaptation shall be subject to the restrictions and license terms set forth in the applicable
Government contract, and, to the extent applicable by the terms of the Government contract, the additional rights set forth in FAR 52.227‐19, Commercial
Computer Software License (December 2007). Oracle America, Inc., 500 Oracle Parkway, Redwood City, CA 94065.
Ce logiciel ou matériel a été développé pour un usage général dans le cadre d’applications de gestion des informations. Ce logiciel ou matériel n’est pas conçu nin’est destiné à être utilisé dans des applications à risque, notamment dans des applications pouvant causer des dommages corporels. Si vous utilisez ce logiciel
ou matériel dans le cadre d’applications dangereuses, il est de votre responsabilité de prendre toutes les mesures de secours, de sauvegarde, de redondance et
autres mesures nécessaires à son utilisation dans des conditions optimales de sécurité. Oracle Corporation et ses affiliés déclinent toute responsabilité quant aux
dommages causés par l’utilisation de ce logiciel ou matériel pour ce type d’applications.
Oracle et Java sont des marques déposées d’Oracle Corporation et/ou de ses affiliés.Tout autre nom mentionné peut correspondre à des marques appartenant à
d’autres propriétaires qu’Oracle.
AMD, Opteron, le logo AMD et le logo AMD Opteron sont des marques ou des marques déposées d’Advanced Micro Devices. Intel et Intel Xeon sont des
marques ou des marques déposées d’Intel Corporation. Toutes les marques SPARC sont utilisées sous licence et sont des marques ou des marques déposées de
SPARC International, Inc. UNIX est une marque déposée concédée sous licence par X/Open Company, Ltd.
Ce logiciel ou matériel et la documentation qui l’accompagne peuvent fournir des informations ou des liens donnant accès à des contenus, des produits et des
services émanant de tiers. Oracle Corporation et ses affiliés déclinent toute responsabilité ou garantie expresse quant aux contenus, produits ou services émanant
de tiers. En aucun cas, Oracle Corporation et ses affiliés ne sauraient être tenus pour responsables des pertes subies, des coéts occasionnés ou des dommages
causés par l’accès à des contenus, produits ou services tiers, ou à leur utilisation.
10/30/10 Oracle – SPOT Datasheet -2-
The Basestation and Free Range SPOT
Features• 400 MHz ARM 926ej-S Processor AT91SAM9G20• 8Mbytes Flash Memory (4M x 16)• 1Mbytes SRAM Memory (512K x 16)• 802.15.4 Radio Transceiver (CC2420)• USB 2.0 Full Speed• 770mAhr Li-Ion Rechargeable Battery
DescriptionThe Sun SPOT platform is the main processor board, eSPOT, running the Java “Squawk” VMand is an IEEE 802.15.4 wireless network node. An application board can be attached to theeSPOT main board
The eSPOT has flexible power management and can draw from the rechargeable battery orthe USB host, or be externally powered.
The Sun SPOT is designed to be a flexible development platform, capable of hosting widelydiffering application modules. The Sun SPOT development kit, as supplied, contains twodifferent configurations. One of the configurations includes a demonstration applicationmodule, the eDemo board.
The configurations supplied in the kit are:
● Basestation SPOT - The basestation has an eSPOT main board without a battery or anapplication board. Power is supplied by a USB connection to a host workstation. Thebasestation serves as a radio gateway between other Sun SPOTs (and theoretically other802.15.4 devices) and the host workstation.
● Free Range SPOT - This unit contains the main board with a rechargeable LI-IONprismatic battery and an example of an eSPOT daughterboard, the eDEMO board.
10/30/10 Oracle – SPOT Datasheet -3-
10/30/10 Oracle – SPOT Datasheet -4-
Block Diagram
Signal Description
J2 Hirose DF17 Receptacle
Pin Signal Name Signal Type Description
1,2 V_EXT Power +5V +/-5% at 500mA input power to the SPOT
3 USB_HOST_P Bidirectional USB Host Data Differential – Positive
4 MISO1 Input SPI MISO (Master In Slave Out) data Channel 1
5 USB_HOST_N
Bidirectional USB Host Data Differential – Negative
6 SCLK1 Output SPI SCLK (Clock) Channel 1
7 I2C_CLK Output I2C SCK (Clock)
8 MOSI1 Output SPI MOSI (Master Out Slave In) data Channel 1
9 I2C_DATA Bidirectional I2C SDA (Data)
10 EXT_INn Input External Interrupt (Active low)
11 VSTBY Power +3V at 35ma output power from the SPOT (always on)
12 CS_A0 Output SPI Address A0. Address range 0 to 7. Must be stable
10/30/10 Oracle – SPOT Datasheet -5-
3.7V 770mAh Li-ion battery
16.000MHz ChipconCC24202.4GHz
Transceiver
AtmelATmega168V
Power Controller
TITPS797303.0V LDO
AtmelAT91SAM9G20
18.432MHz
NumonyxM29W640GB704M x 16 Flash
AnalogADG819Switch
Top Connector
ESDProtectionUSB
Mini-B
SPI 0
BALUN
Vstby
USB Host
I2C
I2S
USART
GPIO
3.0V
VstbyVext
3.0V
Vstby
VusbVext
3.0V
32.000KHz
PowerIndicator
Status LED
Attention
1.0V
SPI 1
Alliance MemoryAS6C8016-55
512K x 16 SRAM
USB Device
SPI 1
US
B C
ontr
olP
ower
Con
trol
LinearLTC2487
16-bit ADC
TIREF30252.5V Ref
LinearLTC3455
Charger/Reg
I2C
Adr, Data, RW, CS
Cur
rent
Sen
se
Bat
tery
Vol
tage
3.0V 1.0V
0.1
IRQ1
Pin Signal Name Signal Type Description
prior to BD_SELx.
13 P13 Multifunction Can be programmed as GPIO (PB4), UART (TXD0) orEthernet (EMDIO).
14 CS_A1 Output SPI Address A1. Address range 0 to 7. Must be stableprior to BD_SELx.
15 P15 Multifunction Can be programmed as GPIO (PB5), UART (RXD0).
16 CS_A2 Output SPI Address A2. Address range 0 to 7. Must be stableprior to BD_SELx.
17 VCC Power +3V at 400mA output power from the SPOT (on whenrunning, pulled to 0V during deep sleep)
18 BD_SEL1n Output SPI board select 1 active low.
19 P19 Multifunction Can be programmed as GPIO (PB30), UART (PCK0),Ethernet (EMDC or SSC (PCK0).
20 BD_SEL2n Output SPI board select 2 active low.
21 P21 Multifunction Can be programmed as GPIO (PA18), UART (TXD2),Ethernet (ERXER) or Timer (TCLK0)
22 P22 Multifunction Can be programmed as GPIO (PA19), UART (SCK0),Ethernet (ETXCK), Timer (TIOA0) or SSC (TF0)
23 P23 Multifunction Can be programmed as GPIO (PA15), UART (RXD2),Ethernet (ERX1), SD Card (MCCK) or SSC (RF0)
24 P24 Multifunction Can be programmed as GPIO (PA16), UART (SCK2),Ethernet (ETXEN), SD Card (MCCDA), Timer (TIOB0)or SSC (TK0)
25 P25 Multifunction Can be programmed as GPIO (PA14), UART (TXD3),Ethernet (ERX0), SD Card (MCDA3) or SSC (RK0)
26 P26 Multifunction Can be programmed as GPIO (PA12), UART (SCK3),Ethernet (ETX0), SD Card (MCDA0) or SSC (TD0)
27 P27 Multifunction Can be programmed as GPIO (PA17), UART (RXD3),Ethernet (ERXDV) or SC Card (MCDA2)
28 P28 Multifunction Can be programmed as GPIO (PA13), UART (PCK1),Ethernet (ETX1), SC Card (MCDA1) or SSC (RD0)
29,30 GND Power Ground Return
Pin numbers are for the Hirose DF17 interboard connector on the SPOT main board andconnects to an application board like the eDEMO. The pin numbering for the signals ismirrored from the main board to the bottom mating connector of the application board.
10/30/10 Oracle – SPOT Datasheet -6-
Theory of Operation
The eSPOT main board is host to a 32bit 400MHz ARM9 processor running a Java VM,2.4GHz network radio transceiver and power management circuitry. The PC board measures1.5" wide and 2.5" high. It is an eight layer 47mil thick FR4 board built to RoHS-6 compliance.It contains 244 components, 91 on top and 153 on bottom.
Main Processor The main processor is the Atmel AT91SAM9G20 in a 247 pin fine pitch ball grid array. Theprocessor is an ARM926ej-s and its package is 10mm x 10mm with 0.5mm ball pitch. TheARM9 processor core voltage is 1V and I/O voltage is 3V. It has 64K internal ROM which isnot used and two internal 16K SRAM that are used. Peripherals actively used are USB 2.0device, dual USART, three timer/counters, dual SPI interface, TWI (I2C) interface, JTAG TAPcontroller and external bus interface (EBI). The 133MHz EBI connects over a 16 bit data busto an 8 megabyte Flash memory (4M x 16) and a 1 megabyte SRAM (512K x 16). TheEthernet MAC, USB 2.0 host, 10 bit ADC (3 channels) and SD/MMC interface are connectedbut not used. The SDRAM controller, image sensor controller, and watchdog timer are notused nor are all GPIO, ADC, or UART pins used. Two GPIO lines control a user-definable bi-color LED nearest to the USB connector. Green LED is controlled by Port A bit 27 (PA27) andRed LED is controlled by Port C bit 7 (PC7). Power is removed from the ARM9 during deepsleep and does not use the battery back up/real time clock portion of the internal powermanagement module.
The 8Mbyte Flash memory is Numonyx M29W640GB70 organized as 4M x 16 bits with70nsec access time and 30nsec page access time (4 word pages). It is in a 6mm x 8mm 48pin fine pitch ball grid array package. It is powered with 3V and shut down during deep sleepmode. The first 64KBytes are write protected externally from the power controller. There are128 bytes of customer lockable extended block (one time writable) which is programmed withthe 64-bit IEEE extended unique identifier by the factory. The IEEE EUI is read-only and is aconcatenation of a 24-bit company code (OUI) with a 40-bit extension unique for each SPOT.
The 1Mbyte SRAM is an Alliance Memory AS6C8016 with 55nsec access time. The SRAM isin 6mm x 8mm 48 pin fine pitch ball grid array package. It is powered by 3V at all times andwill retain all memory contents during deep sleep.
The basic memory map for the ARM9 is :
Start End Description
0x00200000 0x00203FFF 16Kbyte Internal SRAM1
0x00300000 0x00303FFF 16Kbyte Internal SRAM2
0x10000000 0x107FFFFF 8Mbyte External Flash (CS0)
0x20000000 0x200FFFFF 1Mbyte External SRAM (CS1)
0xF0000000 0xFFFFFFFF Internal Peripheral IO
10/30/10 Oracle – SPOT Datasheet -7-
Power CircuitryThe SPOT can be powered by a rechargeable battery, USB power or externally connected 5Vsupply. USB power and/or externally connected power can charge the battery and run the restof the SPOT. Most of the circuitry can be shut down for long periods of time to preservebattery (deep sleep). During deep sleep, the SRAM is kept powered to retain state so theSPOT can be woken up quickly and resume where the program left off.
The SPOT uses a Linear Technology LTC3455 integrated battery charger and dual switcherin a 4mm x 4mm 24 pin quad flat package(QFN). The current mode step down switchers runinternally at 1.5MHz and output 3.0V at 500mA max current (USBHP enabled) and the 1Vcore voltage at 200mA max current. The 3V switching regulator is similar to the LTC3406switcher and the 1V core voltage switcher similar to the LTC3405 switcher. The 3V switchercan be turned off with the ON2 signal and the 1V switcher can be turned off using an externalMOSFET connected to the switcher 1 feedback line through a 43.2K resistor and Vstby. TheSPOT can go into deep sleep shutting off the switchers while still powered through USB tocharge the battery.
A low quiescent current (1.2uA) low dropout regulator (LDO), TI TPS79730 regulates thebattery voltage to 3V for the always-on standby power, Vstby. An Analog Devices ADG819SPDT solid state SPDT switch switches between the high current 3V switcher during run timeand the 3V low current standby power from the LDO during deep sleep. The LDO has a powergood line which goes low if the output voltage drops below 2.7V. Power good deasserted willhold the power controller in reset to prevent it from malfunctioning at low voltages.
The SPOT battery is an external prismatic lithium-ion Sanyo LP523436D battery with 770mAhcapacity and a nominal voltage output of 3.7V. It measures 38.5mm wide x 41.5mm high and6.9mm thick. The battery is equipped with a Nexcon RPOPJ800 protection circuit and protectsfor over voltage (4.275V), over current (3A), and under voltage (2.3V). The battery connectsthrough a Molex 51021-0200 two pin inline connector to a pigtail. The battery positive terminalis the red wire and negative terminal is the black wire. The black wire is not ground ratherpasses through a low side current sense resistor to ground. The mating battery connector isMolex 51047-0200.
The power is managed by the power controller, an 8-bit 8MHz Atmel ATmega168microcomputer powered by 3V standby voltage (Vstby). The power controller has a 32KHzcrystal for real time clock providing date and time at millisecond accuracy (64bit Javamillisecond time). The power controller communicates with the ARM9 over a SPI interface,SPI1 which is shared with the external SPI connection. This SPI interface is buffered by74LVC3G34 which isolates the ARM9 from the active circuitry during deep sleep. Theinterrupt button connects to the power controller and is used to shutdown, wake-up andinterrupt the ARM9. A bicolor LED (red/green) indicates power state of the ARM9. The powercontroller internal analog to digital converter (ADC) monitors switcher voltages, externalvoltage and USB voltage. It indicates a fault condition if they are more than 5% out of range.
A Linear Technology LTC2487, an external 16-bit 4 channel ADC, is used to monitor batteryvoltage, current and ambient temperature. The ADC has a TI REF3025 as an external 2.5Vreference with 0.2% accuracy. The reference and battery voltage divider can be switched off
10/30/10 Oracle – SPOT Datasheet -8-
(REF_EN) by the power controller to minimize current. The LTC2487 interfaces to the powercontroller over I2C (TWI) and sleeps when I2C is inactive. The ADC uses a low side currentsense resistor to measure the current into and out of the battery. The power controllermonitors the health and state of the battery using this ADC. The battery ADC is read every200ms cycling between current, voltage and temperature measurements. Voltage andtemperature measurements are taken every 1.6 seconds and current measurements taken forall other 200ms intervals.
The power controller sets the USB suspend (USB_ENn) and USB high power (USBHP) on theLTC3455 through instructions from the ARM9.
The power controller must sequence power for the ARM9 on wake-up and shutdown. Duringdeep sleep state, the power controller goes to sleep except for the real time clock counter. It iswaken up by external interrupts like the pushbutton and every 256 milliseconds for updatingthe real time clock. On wake-up, the power controller temporarily delays external interrupts,turns on the switchers and watches 3V switcher (VCC) to become stable. Once VCC is stable,it enables back up voltage to the ARM9 and that causes the ARM9 to issue a power oninternal reset. The external reset on the ARM9 is not used. Once power is stable and theinternal ARM9 reset is active, the power controller enables its own SPI channel and externalinterrupts.
On power off, the power controller notifies the ARM and waits a period of time so it can teardown any peripheral before shutting down. The tear-down time can be extended up to 32seconds or terminated immediately. There is no tear-down for deep sleep. After tear-down,the backup voltage and switchers are shut off, and signals which might cause sneak paths,like FIQ, are shut down.
The power controller manages a 32bit watchdog counter with 256ms ticks. The watchdog canbe set between 256ms and about 34 years. If the watchdog is not reset at a regular intervalfrom the ARM9, it will shutdown the ARM9, wait 150ms and restart it as a cold boot. Thepower controller does self test and fault analysis. While running, it continually scans voltageand current for out of range values.
10/30/10 Oracle – SPOT Datasheet -9-
Symbol Target Error states
VCC 3.0V ±10% < 2.7V or > 3.3V power fault
Vcore 1.8V ±10% < 1.62V or > 1.98V power fault
Vusb 5.0V ±10% < 4.5V or > 5.5V power fault
Vext 5.0V ±10% < 4.5V or > 5.5V power fault
Idischarge < 500ma > 500ma power fault
Vbatt > 3.25V < 3.25V indicates low battery
Vbatt > 3.05V < 3.05V indicates dead battery
Icharge < 5ma > 5ma indicates charging
Network RadioThe wireless network communications uses an integrated radio transceiver, the TI CC2420(formerly ChipCon). The CC2420 is IEEE 802.15.4 compliant and operates in the 2.4GHz to2.4835GHz ISM unlicensed bands. Regulations for these bands are covered by FCC CFR47part 15 (USA), ETSI EN 300 328 and EN 300 440 class 2 device (Europe) and ARIB STD-T66(Japan). Please check with country statutes for appropriate operation.
The IC contains a 2.4GHz RF transmitter/receiver with digital direct sequence spreadspectrum (DSSS) baseband modem with MAC support. Other features include separate TXand RX 128 byte FIFOs, AES encryption (currently not supported), received signal strengthindication (RSSI) with 100dB sensitivity and transmit output power setting from -24dBm to0dBm. Effective bit rate is 250kbps and chip rate is 2000kChips/s. Receive sensitivity is-90dBm.
The digital control and data communications with the CC2420 use PIO port bits and the SPIchannel. The CC2420 is a slave SPI bidirectional device addressed when RF_CS (PCS2) isasserted active low. PIO ports reset the CC2420 (RF_RST), power it down (RF_PWDOWN),or check the status of the receive FIFO (FIFO and FIFOP), clear channel assessment (CCA)and start of frame (SFD).
There are 33 configuration and status registers, 15 command registers and two 8-bit registersfor the separate transmit and receive FIFOs. The first byte sent to the CC2420 is the addressmade up of 6-bit address, RAM/Register select (Bit 7) and Read/Write select (Bit 6). Followingbytes are data read from or written to the CC2420.
The CC2420 is housed in a 7mm x 7mm 48pin quad leadless package (QLP or QFN). It ispowered with +3.0V VCC supply. The CC2420 has an internal 1.8V low drop out regulator forpowering the internal RF and analog circuitry. It consumes 20ma during receive operation and18ma for 0dBm transmit. The frequency generation uses an accurate 16MHz crystal with±10ppm accuracy, ±10ppm stability and ±1ppm aging. The entire RF section is enclosed in anupper and lower RF shield and has modular FCC approval.
802.15.4 channel assignments are shown in the tables below.
10/30/10 Oracle – SPOT Datasheet -10-
Channel Center Frequency Channel Center Frequency
11 2405MHz 19 2445MHz
12 2410MHz 20 2450MHz
13 2415MHz 21 2455MHz
14 2420MHz 22 2460MHz
15 2425MHz 23 2465MHz
16 2430MHz 24 2470MHz
17 2435MHz 25 2475MHz
18 2440MHz 26 2480MHz
The output power can be adjusted by the PA_LEVEL register, a 6 bit field.
PA_Level and output power are shown in the tables below.
PA_LEVEL OutputPower
PA_LEVEL OutputPower
31 0dBm 15 -7dBm
27 -1dBm 11 -10dBm
23 -3dBm 7 -15dBm
19 -5dBm 3 -25dBm
For more information, see the CC2420 data sheet on the www.ti.com (RF/IF Components)The 802.15.4 standard can be retrieved from standards.ieee.org.
AntennaThe antenna is an inverted-F antenna printed on the top layer of the printed circuit board. It istuned to 2450MHz and has a characteristic input impedance of 115 unbalanced. This is afolded monopole 1/4 wave with reasonable omnidirectional radiation. The antenna is matchedto the balanced RF output of the CC2420 using a lumped-LC network. The RF output is alsobiased by the TXRX_SWITCH output of the CC2420 through a RF blocking filter.
The antenna section of the eSPOT should be kept away from all metal objects. If mounted ona motherboard, there should be no PCB traces or power planes under or around the antennasection. If possible, the eSPOT should be mounted so that the antenna is located on the edgeof the board.
The FCC certification does not allow an external antenna to be connected to the eSPOT.
10/30/10 Oracle – SPOT Datasheet -11-
MechanicaleSPOT main board 1.50” wide x 2.50” length x 0.325” deptheSPOT basestation 1.67” wide x 2.80” length x 0.71” deptheSPOT freerange 1.67” wide x 2.80” length x 0.92” deptheSPOT basestation weight: 30geSPOT freerange weight: 62g
Operating Characteristics
Absolute Maximum RatingsOperating Temperature with battery charging 0°C to 45°COperating Temperature with battery discharging -20°C to 60°COperating Temperature without battery -20°C to +75°CStorage Temperature with battery -20°C to +35°CStorage Temperature without battery -40°C to +85°CeSPOT DC Current per I/O pin 8.0maMaximum External/USB voltage 6.0V
DC CharacteristicsSymbol Description Condition Min Typ Max Units
Vext External Voltage 4.5 5.0 5.5 V
Vbatt Battery Voltage 3.1 3.7 4.2 V
Vusb USB Voltage 4.5 5.0 5.5 V
Iusb USB Current Limit Vusb = 5.0V, USBHP = '1' Vusb = 5.0V, USBHP = '0
44060
47580
500100
mAmA
Iext External Current Vext = 5.0V, no eDemo Vext = 5.0V, with eDemo
300
500
mAmA
Ibatt Battery Current - noattached board
Deep SleepIdle Normal
55
20
65TBD50
75
144
µA mAmA
Icharge Charge Current Vusb = 5.0V, USBHP = '1' Vusb = 5.0V, USBHP = '0' Vext = 5.0V 425
400 50 500
470 90 575
mA mA mA
Vlow_batt Low battery indication 3.25 V
Istby_max Externally availablestandby current
J2-11 Vstby = 3.0V 25 mA
ICC Attached board current VCC = 3.0V 380 mA
VOL Output low level voltage IOL= 0 to 8ma 0.2 0.3 0.4 V
VOH Output high level voltage IOH= 0 to 8ma 2.6 2.7 2.8 V
10/30/10 Oracle – SPOT Datasheet -12-
Symbol Description Condition Min Typ Max Units
VIL Input low level voltage -0.3 0.8 V
VIH Input high level voltage 2.0 2.7 V
AC Characteristics
Module Min Nom Max Units
SPI0 1000 Kbps
SPI1 to LED Controller 500 Kbps
SPI1 to external/power controller 263 Kbps
TWI 100 Kbps
USART 127 115200 8332800 Baud
Flash Memory (tcycle) 75 nsec
SRAM (tcycle) 60 nsec
USB 4.09 Mbps
The AC characteristics are measured values from the SPOT running default software. Forspecific AC characteristics, please consult the individual component datasheets.
10/30/10 Oracle – SPOT Datasheet -13-
BATTERY WARNING
Do not short-circuit battery. A short-circuit may cause fire, explosion, and/or severe damage tothe battery.
Do not drop, hit or otherwise abuse the battery as this may result in the exposure of the cellcontents, which are corrosive.
Do not expose the battery to moisture or rain. Keep battery away from fire or other sources ofextreme heat. Do not incinerate.
Exposure of battery to extreme heat may result in an explosion.
No other battery substitutions or different chemistry batteries should be used.
Do not bypass the battery protection circuit.
Dispose of batteries properly. Do NOT throw these batteries in the trash. Recycle yourbatteries, if possible.
10/30/10 Oracle – SPOT Datasheet -14-
Federal Communications Commission ComplianceNOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to providereasonable protection against harmful interference in a residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed andused in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particularinstallation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouragedto try and correct the interference by one or more of the following measures: Reorient or locate the receiving antenna. Increase the separation between the equipment and receiver.Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help.
The Sun SPOTs are supplied with a shielded USB cable. Operation with a nonshielded cable could cause the Sun SPOTs to not be in compliance with the FCC approval for thisequipment. The antenna used with this transmitter must not be colocated or operated in conjunction with any other antenna or transmitter; to do so could cause the Sun SPOTs to not be incompliance with the FCC approval for this equipment. Any modifications to the Sun SPOTs themselves, unless expressly approved, could void your authority to operate this equipment.
FCC Declaration of Compliance:Responsible Party: Oracle America, Inc., 500 Oracle Parkway, Redwood Shores, CA 94065; Phone: US +1.650.506.7000; International +1.650.506.7000FCC IDENTIFIER: UDM3011This device complies with Part 15 of the FCC Rules. Operation is subject to the following conditions: this device may not cause harmful interference and this device must accept anyinterference received, including interference that may cause undesired operation.
This device can be used as is (stand-alone) or as a module (part of a final host product). If the device will be used a module these rules must be followed:Caution: Exposure to Radio Frequency Radiation.To comply with FCC RF exposure compliance requirements, a separation distance of at least 20 cm must be maintained between the antenna of this device and all persons. This device must notbe co-located or operating in conjunction with any other antenna or transmitter.Module 3011 and antenna tested with must be integrated in the end product in such a way that the end user cannot access the either the module, cables or antennas.The installer of this radio equipment must ensure that the antenna is located or pointed such that it does not emit RF field in excess of Health Canada limits for the general population;consult Safety Code 6, obtainable from Health Canada's website www.hc-sc.gc.ca/rpb.
Integrator must place a label outside their product similar to the example show below:
OEM Manufacturer name
Contains transmitter moduleFCC ID: UDM3011UPN: 1894B-3011Model: 3011
10/30/10 Oracle – SPOT Datasheet -15-
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
1
16 Network CircleMenlo Park, CA 94025
8
Sunspot Wireless Network Processor Project
8.2.2
9/16/2010 1:41:41 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
Micro / Memory
Micro_Memory.SchDoc
Radio Chip
Radio.SchDoc
Power Supply
Power_Supply.SchDoc
I/O Connector
IO_Connector.SchDoc
eSPOT
Rev 8.2.2
ATMega
ATMega.SchDoc
USB
USB.SchDoc
Micro / Power
Micro_Power.SchDoc
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
2
16 Network CircleMenlo Park, CA 94025
8
Micro / Memory
8.2.2
9/16/2010 1:41:41 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
R48
10K
C390.1uF
1000mA
FB8
600 C401.0uF
C410.1uF 1000mA
FB9
600 C421.0uF
VCC
VSRAM
R36 10K
R43 10KJTAGSEL
R39 10KVCC TMS
R40 10KVCC TCK
R41 10KVCC TDO
R42 10KVCC TDI
R58 10KVCC MISO1
R57 10KVCC BD_SEL1
R56 10KVCC BD_SEL2
R53 10KRF_PDOWN
R52 10KVCC RF_CS
R50
270
R49
270VCC
LED1
LED2
A
C1
C2
RG
LED2
RED/GRN LED
R71 100K
R38 NL
R74 NL
R75 NLBD_REV0
BD_REV1
BD_REV2
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21
WE
OE
CS_ROM
VDDBU_EN
A22
WP
D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15
VCC
A7D4
LBA1
WEG5
A8H2
A11H5
A3B3
A6C4
UBB2
CEB5
A12G3
A15F4
A2A5
A5C3
A18H1
A9H3
A13G4
A1A4
A4B4
A17D3
A10H4
A14F3
A0A3
VSS D1
DQ1C5
DQ6 F6
A16E4
OEA2
DQ9 C1
DQ3 D5DQ4 E5
DQ13 F2
DQ15G1
DQ0 B6
DQ10 C2
VCC D6
VCC E1
DQ12 E2
DQ7 G6
VSS E6
DQ8 B1
DQ2 C6
DQ11 D2
DQ5 F5
DQ14 F1
U12 512K x 16 SRAM
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19
WE
OE
BS0
BS1
D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15
C1090.1uF
CS_RAM
VDDBU_ENVSRAM
VCCBUSY BUSY
C1120.1uF
VDDBU_EN = LOW -> Y = HIGH
VDDBU_EN = HIGH -> Y = CS_RAMIN11
IN26
GND 2
VCC 5
IN03 Y 4
U11
74AUP1G57
M29W640GB70
AS6C8016 55ns
VCC_FLASH
VCC_SRAM
C1181.0uF
C1171.0uF
D0D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15
BS1
BS0
WEOE
CS_ROMCS_RAM
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21
TRSTTMSTCKTDOTDI
JTAGSEL
USB_DEV_PUSB_DEV_NUSB_HOST_PUSB_HOST_N
SCLK0MOSI0MISO0
I2C_CLKI2C_DATA
CS_A0CS_A1CS_A2
BD_SEL1
RF_RSTRF_PDOWNFIFO
FIFOP
CCA
SFD
RF_CS
BD_SEL2
ARM_FIQ
VCC
BD_REV3
BD_REV1BD_REV0
A22
PC24 / D24 K1PC25 / D25 L3PC26 / D26 L2PC27 / D27 N4PC28 / D28 P4PC29 / D29 R3PC30 / D30
P3PC31 / D31 M2
PC8 / CFCS0 / CS4 B16PC9 / CFCS1/ CS5 C11PC13 / FIQ / CS6 B13PC12 / IRQ0 / CS7 C12PC15 / IRQ1 / WAIT G1
PC0 / AD0 T3PC1 / AD1 T4PC2 / AD2 U3PC3 / SPI_CS3 / AD3 U4
PC7 B11
PC6 A16
PA0 / SPI0_MISOR10 PA1 / SPI0_MOSIP11 PA2 / SPI0_SCLKT9PA3 / SPI0_CS0P12 PA4 / RTS2R11 PA5 / CTS2R12 PA6 / MCDA0T10 PA7 / MCCDA
P13 PA8 / MCCKT11 PA9 / MCDA1P14 PA10 / ETX2 / MCDA2R13 PA11 / ETX3 / MCDA3T12PA12 / ETX0U9 PA13 / ETX1U10 PA14 / ERX0U11 PA15 / ERX1U12 PA16 / ETXENU15PA17 / ERXDVU14 PA18 / ERXERU16 PA19 / ETXCKU13 PA20 / EMDCT14 PA21 / EMDIO
R14 PA22 / ETXER / ADTRGT16 PA23 / TWDR15 PA24 / TWCKR16 PA25 / TCLK0P16PA26 / TIOA0P15 PA27 / TIOA1T17 PA28 / TIOA2L14 PA29 / SCK1R17 PA30 / RXD4 / SCK2N15PA31 / TXD4 / SCK0N14
PB0 / SPI1_MISON16 PB1 / SPI1_MOSIM14 PB2 / SPI1_SCLKM15 PB3 / SPI_CS0M16 PB4 / TXD0K14 PB5 / RXD0P17 PB6 / TXD1N17
PB7 / RXD1M17 PB8 / TXD2L16 PB9 / RXD2L15 PB10 / TXD3T5 PB11 / RXD3P5PB12 / TXD5R5 PB13 / RXD5P6 PB14 / DRXDL17 PB15 / DTXDK17 PB16 / TK0
J17 PB17 / TF0K15 PB18 / TD0H17 PB19 / RD0J15 PB20 / RK0U5PB21 / RF0U6 PB22 / DSR0T6
JTAGSELF16
TDIJ16 TDOJ14 TCKH15 TMSG17TRSTH16
RSTG15
PB23 / DCD0R6 PB24 / DTR0P7 PB25 / RI0U7PB26 / RTS0R8 PB27 / CTS0U8 PB28 / RTS1R9 PB29 / CTS1T8
HDMAE15 HDPAE14 DDMD13 DDPC13
BS0 / A0 A2WR2 / BS2 / A1 A3A2 C4A3 B5A4 C5A5 D5A6 A4A7 B6A8 A5A9 C6A10 D7
SDA10B4
A11A6A12 B7A13 A7A14 C7A15 B8
BA0 / A16 A8BA1 / A17 C8A18 A9A19 C9A20 B9A21 A10A22 A11SPI1_CS2 / PC4 / A23 A17SPI1_CS1 / PC5 / A24 A15CFW / PC10/ A25
B12
CS0 A14SDCS / CS1 B3PC11 / CS2 B14PC14 / NANDCS / CS3 B15
CFOE / RDA13CFWE / WE / WR0 A12CFIOR / BS1 / WR1 B2CFIOW / BS3 / WR3 A1
SDCKB1SDCKEG3
RASD3 CASC3 SDWEF2
D0 D4D1 C2D2 D2D3E3D4 E4D5 E2D6 F3D7 G2
D8 C1D9 D1D10 E1D11 H4D12 H3D13 F1D14 H2D15 K3
SPI0_CS2 / PC16 / D16J4SPI0_CS3 / PC17 / D17 J2SPI1_CS1 / PC18 / D18 H1SPI1_CS2 / PC19 / D19 J1SPI1_CS3 / PC20 / D20 K2
PC21 / D21 K4PC22 / D22 M4PC23 / D23 N3
HDPBD14
HDMBC14
PB30 / PCK0P9 PB31 / PCK1P10
NANDWE B10
RTCKG16
NANDOE C10
WKUP B17
SHDN C17
U7A
AT91SAM9G20
ARM_MISOARM_MOSIARM_SCLK
P13P15TXD1RXD1
AVR_CS
P13P19
P21P22
P22
P23
P23
P24
P24
P24
P24
P25
P25
P25
P26
P26
P26
P27
P27
P27
P28
P28
P28
P26
LED1
LED2
BD_REV2
P19P28
P22P23
P21
P22
P23
P24
P25P27
R61 0BD_REV3 R65
10K
WP
A3A1
A7A2
READY / BUSY A3
WEA4
A9A5
A13A6
A4B1
A17B2
VPP / WPB3
RESETB4
A8B5
A12B6
A2C1
A6C2
A18C3
A21C4
A10C5
A14C6
A1D1
A5D2
A20D3
A19D4
A11D5
A15D6
A0E1 DQ0 E2
DQ2 E3
DQ5 E4
DQ7 E5
A16E6
VSS H1
CEF1
DQ8 F2
DQ10 F3
DQ12 F4
DQ14 F5
OEG1
DQ9 G2
DQ11 G3
VCC G4
DQ13G5
DQ15 G6
VSS H6
DQ1 H2
DQ3 H3DQ4 H4
DQ6 H5
BYTE F6
U8
4M x 16 FLASH
RTCK
(IRQ0)
17
U13ASN74LVC3G34
35
U13BSN74LVC3G34
6 2
U13CSN74LVC3G34
VCC
MISO1
MOSI1
SCLK1 ARM_SCLK
ARM_MOSI
ARM_MISO
SCLK1
MOSI1
MISO1
C810.1uF
ARM_RST
TP
TP
SPARE1
R68 10KVCC TRST
(RESET)
(RESET)
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
3
16 Network CircleMenlo Park, CA 94025
8
Chipcon CC2420 Transceiver
8.2.2
9/16/2010 1:41:41 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
C5 22pF
C6 22pF
C15
0.01uF
C2
0.5pF
L15.6nH
C40.5pF
VC
O_G
UA
RD
1
AV
DD
_V
CO
2
AV
DD
_P
RE
3
AV
DD
_R
F1
4
GND5
RF_P 6
TXRX_SWITCH 7
RF_N 8
GND9
AV
DD
_S
W10
AV
DD
_R
F2
14
AV
DD
_IF
215
AV
DD
_A
DC
17
DV
DD
_AD
C18
DGND_GUARD19
DG
UA
RD
20
RESET21
DGND22
DSUB_PADS23
DSUB_CORE24
DV
DD
3.3
25
DV
DD
1.8
26
SFD27 CCA28 FIFOP29 FIFO30
CS31
SCLK32 SI33 SO34
DV
DD
_RA
M35
AV
DD
_X
OS
C37
XOSC16_Q2 38
XOSC16_Q1 39
DIE_PAD49
VREG_EN41
VR
EG
_OU
T42
VR
EG
_IN
43
AV
DD
_IF
144
R_BIAS45
ATEST246 ATEST147
AV
DD
_C
HP
48
U1CC2420
C16
10uF
100mA
FB3
600 C7
0.01uF
C8
0.01uF
C9
0.01uF
100mA
FB2
600
C10
0.01uF
C11
0.01uF
C12
0.01uF
C13
0.01uF
C14
0.01uF1%
R22
C18
10uF
C17
0.01uF
100mA
FB1
600
L27.5nH
C1
5.6pF
L3
7.5nH
C3
5.6pF
1%
R1
43.2K
VCC
16 MHz +/- 10 ppmY1
TSX-3225
ANT1
F ANT
RF_PDOWN
RF_CSRF_RST
SCLK0MOSI0MISO0
SFDCCA
FIFOPFIFO
RF_PDOWN
RF_RSTRF_CS
FIFOFIFOPCCASFD
MISO0MOSI0SCLK0 GND
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
4
16 Network CircleMenlo Park, CA 94025
8
USB Device
8.2.2
9/16/2010 1:41:41 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
C88
10uFC89
0.1uF
USB_DEV_P
USB_DEV_N
USB_DEV_P
USB_DEV_N
USB_PWR_MON
V_USB
1%
R66
3.32K
12345
J3
USB Mini Type B
16
25
4 3
U9
STF202
1%
R673.32K
USB_PWR_MON
R55
1
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
5
16 Network CircleMenlo Park, CA 94025
8
USB
8,2.2
9/16/2010 1:41:41 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
J2
DF17-30-R
TOP CONNECTOR
VSTBY
VCC
V_EXT V_EXT
USB_HOST_N
USB_HOST_P
I2C_CLK
I2C_DATA
TDO
TCK
TDI
TMS
AVR_RES
TRST
TXD1
RXD1
TXD1
RXD1
I2C_CLK
I2C_DATA
USB_HOST_P
USB_HOST_N
VCC
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
PAD8
PAD9
PAD10
PAD11
PAD12
PAD13
PAD14
PAD15
TCK
TDI
TDO
TMS
V_EXT
TS1SMF5.0
PAD16
PAD17
V_EXT
V_USB
TRST
AVR_RES
FID1Fiducial
FID2Fiducial
FID3Fiducial
FID4Fiducial
FID1
FID2
FID3
FID4
P15
P27
P13
P19
P23
P25
P21
P27
P25
P23
P21
P19
P13
P15
SCLK1
MOSI1
MISO1
EXT_INT
CS_A0
CS_A1
CS_A2
P24
P26
P28
BD_SEL1
P22
BD_SEL2
P22
P24
P26
P28
MISO1
MOSI1
SCLK1
EXT_INT
CS_A0
CS_A1
CS_A2
BD_SEL2
BD_SEL1
SCLK1
MOSI1
MISO1 MISO1
MOSI1
SCLK1
SCL PAD19SCL
PAD18SDA SDA
SPARE_PAD1
SPARE_PAD2
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
6
16 Network CircleMenlo Park, CA 94025
8
ATmega
8.2.2
9/16/2010 1:41:42 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
R25
270
C350.1uF
C360.1uF 100mA
FB7600
VSTBY
AVR_CS
PWRON
100mA
FB6600
C340.1uF
AVR_RES
EXT_INT
SDA
SCL
C31
0.1uF
C30 22pF
C32 22pF
Active High
AVR_CS
3.0V 10mA
V_IN4
GND2 PG 1
V_OUT 5U6
TPS79730
C370.1uF
C381.0uF
BATT
VSTBY
R28 1K
ARM_FIQ
VCORE
EXT_PWR_MON
R22
270VSTBY
R2310K
VSTBY
VSTBY
VCC
VSRAM
R26100K
C3310uF
USB_PWR_MON
(3.0V)
EN_SWITCHERS
Normally Low
Y232.000 KHz
VCC
1%
R321.00K
1%
R343.32K
A
C1
C2
RG
LED1
RED/GRN LED
S28
D 1
S12
GND 3
VDD 4
IN6
U10
ADG819
C910.1uF
C900.1uF
ARM_FIQ
R29
100K
EXT_INT
IN=0: S1 -> DIN=1: S2 -> D
AVR_RES
SW1EVQ-P7C01K
VCC_MON
USB_PWR_MON
EXT_PWR_MON
PWRON
EN_SWITCHERS
R45
10KVSTBY
R51 NLVSTBY
D2
BAT43W
V_MAX
D3
BAT43W
C9810uF
LDO_PWR
AVR_RES
(BATT_MON_EN)
HIGH = ONLOW = OFF
(TEMP)
(I_CHRG)
(I_DSCHRG)
(V_BATT)
(3V = 2.306V)
SDA
SCL
USB_EN
USB_HP
USB_EN
USB_HP
V = 0.7685*Vcc
VSTBY
SCLK1
MOSI1
MISO1
MOSI1
MISO1
SCLK1 VDDBU_ENVDDBU_EN
(SLUG) GND 0
INT1 / PD3 1
T0 / XCK / PD4 2
GND 3
VCC 4
GND 5
VCC 6
PB6 / XTAL17
PB7 / XTAL28
T1 / PD5 9
AIN0 / PD6 10
AIN1 / PD7 11
PB0 / ICP112
PB1 / OC1A13
PB2 / SS14
PB3 / MOSI / ISP_SDI15
PB4 / MISO / ISP_SDO16
PB5 / SCK / ISP_CLK17
AVCC 18
ADC619
AREF 20
GND 21
ADC722
PC0 / ADC023
PC1 / ADC124
PC2 / ADC225
PC3 / ADC326
PC4 / ADC4 / SDA27
PC5 / ADC5 / SCL28
PC6 / RESET29
RXD / PD0 30
TXD / PD1 31
INT0 / PD2 32
U5
ATmega168V
AT91SAM9G20 Startup Sequence:
Set PWRON = HighSet EN_SWITCHERS = High
Wait 150 us for RC clock to startSet VDDBU_EN = HighWait for 1.0V and 3.0V to stabilize
VDDBU_EN
REF_ENREF_EN
WP WP
Active High
Active High
C821000pF
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
7
16 Network CircleMenlo Park, CA 94025
8
AT91RM9200 Power
8.2.2
9/16/2010 1:41:42 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
R69
10K
C670.1uF
100mA
FB15600 VCC
VCC
1000mA
FB10600 VCORE
C760.1uF
1000mA
FB16600
C690.1uF
C720.1uF
C660.1uF
C520.1uF
C550.1uF
C580.1uF
C560.1uF
C590.1uF
VCC
1000mA
FB11600
C8633pF
C8733pF
Y318.432 MHz
C620.1uF
C600.1uF
VDD_IOM
VDD_IOP
VDD_CORE
C7710uF
C5110uF
C5310uF
VDD_IOMD11
GNDD6
VDD_CORE D9
GNDD8
VDD_IOMG4
GNDF4
VDD_PLL N2
GND_PLL T2
XO
UT
P1
XIN
N1
GND_ANAR2
XO
UT
32E
17
XIN
32D
17
VDD_PLL P2
GND_PLL U1
VDD_IOPP8
GNDG14
VDD_IOPU17
GNDH8
VDD_CORE M1
GNDH9
GNDH10
GNDJ8
GNDJ9
TST F17
VDD_CORE T13
GNDJ10
GNDK8
VDD_IOMJ3
GNDK9
GNDK10
VDD_CORE H14
GNDK16
GNDL1
GNDM3
GNDR7
GNDT7
GNDT15
GND_BUE16
GND_USB D10
GND_USB D12
VDD_BUD16
VDD_ANAR4
AD_VREFU2
VDD_OSC L4
NC C15
NC D15
NC R1
NC T1
VDD_USB C16
BMS F15
OSCSEL F14
U7B AT91SAM9G20
BMS
C610.1uF
C650.1uF
R761
C744.7uF
C710.01uF
C790.1uF
100mA
FB14600
R701
C734.7uF
C700.01uF
C780.1uF
C630.1uF
C640.1uF
100mA
FB12600VCC
R621
C544.7uF
C570.01uF
C500.1uF
R64
10K
C480.1uF
C490.1uF
C800.1uF
VCORE
VDDBU_EN
Q4BSS138
1000mA
FB13600
C6810uF
C750.1uF
VCC
R63
10K
R54
10K
VCOREVDD_PLL
XO
UT
32
XIN
32
TP TP
1
1
2
2
3
3
4
4
5
5
6
6
D D
C C
B B
A A
8
16 Network CircleMenlo Park, CA 94025
8
Power Supply / Battery Charger
8.2.2
9/16/2010 1:41:42 PM
Title
Size: Number:
Date:
Revision:
Sheet ofTime:
B
(C) 2010 Oracle Corporation
C2010uF
USB8
SUSPEND6
USBHP5
V_MAX 10
MODE 21
ON2 19
CHRG 4
WALLFB11
TIMER3
GND (SLUG)25
PROG2
AO 17
SW1 7
FB1 1
HSI 13
SW2 12
FB2 18
HSO 14
HSON 15
PBSTAT 23
ON24
RST 20
PWRON22
VBAT9
AI16
U2
LTC3455
C2410uF1%
R14226K
C2210pF
1%
R1580.6K
C2810uF1%
R1825.5K
C2710pF
1%
R21102K
R1010K
1%
R12
2.49K
C23
0.1uF
C2110uF
R81
V_USB
R2010K
C2610uF
USB_EN
USB_HP
VCC
C2910uF
1000mA
FB5
600
VCORE
PWRON
C2510uF
1000mA
FB4
600
V_USB
R11
10K
USB_HP
USB_EN
R910K
VCC
C1910uF
R51
V_EXT
V_EXT
1%
R33.32K
1%
R61.24K
EXT_PWR_MON
D1MBR130
1.0V 200mA
3.0V 500mA
3.0V = 512mA
1%
R43.32K
1%
R73.32K
R7210K
R44NL
V_MAX
R3543.2KQ1
IRLML6402
VSTBY
EN_SWITCHERS
EN_SWITCHERS
HIGH = ONLOW = OFF
BATT
R171K
L4
4.7uH
L5
4.7uH
1
3
J1
eSPOT PWR
BATT
Q2IRLML6402
Q32N7002
R33100K
R37100K
1%
R4610.2K
1%
R473.4K
Fo 1
CA1 3
CA0 2
SCL 4
SDA 5
GN
D6
COM7
CH08
CH19
CH210
CH311
Vcc
12
RE
F+
13
RE
F-
14
SLU
G15
IN+
IN-
Temp
Sensor
4 Ch
Mux16 BIT ADC
U4LTC2487
SDA
SCL
1% 100ppm
R160.1
C4610uF
C470.1uF
Battery +
Battery -
BATT
VBATT
VBATT
BATT_RET
VBATT
SDA
SCL
R5910K
R6010K
R24 1K
2.5V 0.15%
V_IN1
GND3
V_OUT 2U3
REF3025
C430.1uF
C441.0uF
C450.1uF
R30 1K
V_REF
R27 1K
10.2K/3.4K is 4:1 ratio (0.25*Vbatt)FS = 1.25V FS Battery = 5V
REF_EN
R31 1K
Differential Input Range: (Vref / Gain) * 0.5Vref = 2.5Gain = 16Input Range = 0.07813VIma = ADC_value * 781.3 / 65535
CHRG
VSTBY
PAD20
PAD21
ORACLE
LOGO1
PCB LOGO