Escape Routing of Mixed-Pattern Signals Based on Staggered-Pin-Array PCBs

K. Wang, H. Wang and S. Dong

Department of Computer Science & Technology, Tsinghua University, China

ISPD 2013

Outline

Introduction Preliminaries Problem Formulation The Mixed-Pattern Escape Routing Algorithm Experimental Results Conclusion

Introduction

High speed PCB routing has become more and more difficult for manual design due to increased pin count and dwindling routing resource.

Pin array Grid pin array (GPA) Staggered pin array (SPA)

SPA can increase pin density greatly under the same area.

Introduction

GPA

Single-pattern escape routing

SPA

Single-pattern escape routing

SPA

Mixed-pattern escape routing

Introduction

Solve differential-pair routing and single-signal routing separately

Optimize both differential-pair and single-signal routing

Preliminaries

Tile network

Staggered pin array Tile network

Problem Formulation

Given An mxn staggered pin array Differential pairs and single signals to be routed to the bou

ndary Design rules including wire length matching of differential

pairs, non-crossing rules Capacity constraints

Objective Escape all marked pins to the array boundary with minimiz

ed total wire length. No design rule is violated.

The mixed-pattern escape routing algorithm

Differential Pair Pre-conditioning

Different from single signals, the pins of differential pairs have more constraints

The routing of differential pairs should satisfy the length-matching rule.

Differential pair protection constraint: In order to avoid signal crosstalk, before the two wires from the two pins of differential pair meet with each other, no other signal is allowed to be close to.

Differential Pair Pre-conditioning

illegal legal

Median point searching algorithm

Case 1:

ya=yb

Case 2:

xa=xb

|ya-yb| is not

multiple of 4

Case 3:

xa=xb

|ya-yb| is multi

ple of 4

Median point searching algorithm

Median point searching algorithm

Simultaneously median point and shortest pin-median-point path determination

The differential pairs can be classified into K groups according to the crossing possibility of path candidates.

Routing Network

S0

SS

SD

Median point

St

1

1|TD|

|PS|

|TD|+|PS|

|TD|+|PS|

1

ILP formulation

Source constraint

Sink constraint

ILP formulationDP flow conservation constraint

Single signals flow conservation constraint

Capacity constraint

DP protection constraint

Slice-based MPER Algorithm

Slice-based MPER Algorithm

Partition into apartNum regions

DPs and single signals are classified into each region

Generate routing network for each region and solve the ILP

Failed signals will be redistributed into nearby region which has the most routing resource

Experimental Results

Experimental Results

Conclusion

This paper proposed an algorithm for escape routing of simultaneously differential pairs and single signals on staggered pin array based PCB.

Experimental results show that the proposed method can solve both single-pattern and mixed-pattern effectively.