Enterprise Systems Architecture/390 IBM Principles of Operation SA22-7201-08 Enterprise Systems Architecture/390 IBMPrinciples of Operation SA22-7201-08 Note: Before using this information and the product it supports, be sure to read the general information under Notices on page xvii. Softcopy Note:Thereadershouldbeawareofthefactthatthispublicationcontainsmanysymbols,suchassuperscripts,thatmaynotdisplaycorrectly with any given hardware or software. The definitive version of this publication is the hardcopy version.Ninth Edition (June, 2003)This edition obsoletes and replaces Enterprise Systems Architecture/390 Principles of Operation, SA22-7201-07.ThispublicationisprovidedforuseinconjunctionwithotherrelevantIBMpublications,andIBMmakesnowarranty,expressorimplied,aboutitscompletenessoraccuracy. Theinformationinthispublicationiscurrentasofitspublicationdatebutissubjecttochange without notice.Publicationsarenotstockedattheaddressgivenbelow. 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All rights reserved.US Government Users Restricted Rights Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. ContentsNotices...................... xviiTrademarks ................... xviiPreface....................... xixSize and Number Notation . . . . . . . . . .xxiBytes, Characters, and Codes . . . . . . . .xxiOther Publications ............... xxi| Summary of Changes in Ninth Edition . . . .xxiiSummary of Changes in Eighth Edition . . .xxiiiSummary of Changes in Seventh Edition . .xxvSummary of Changes in Sixth Edition . . . .xxviSummary of Changes in Fifth Edition . . . . .xxviiSummary of Changes in Fourth Edition . .xxviiiSummary of Changes in Third Edition . . .xxviiiSummary of Changes in Second Edition . . .xxxChapter 1. Introduction ........... 1-1Highlights of ESA/390 . . . . . . . . . . . . .1-1The ESA/370 and 370-XA Base . . . . . . 1-10System Program................. 1-12Compatibility ................... 1-12Compatibility among ESA/390 Systems . . 1-12Compatibility among ESA/390, ESA/370,370-XA, and System/370 . . . . . . . .1-13Control-Program Compatibility...... 1-13Problem-State Compatibility ....... 1-13Availability .................... 1-14Chapter 2. Organization ........... 2-1Main Storage................... 2-2Expanded Storage ............... 2-2CPU........................ 2-2PSW ...................... 2-3General Registers .............. 2-3Floating-Point Registers ........... 2-3Floating-Point-Control (FPC) Register . . .2-4Control Registers............... 2-4Access Registers............... 2-4Vector Facility................. 2-6Cryptographic Facility ............ 2-6External Time Reference . . . . . . . . . . . .2-6I/O......................... 2-6Channel Subsystem ............. 2-6Channel Paths ................ 2-6I/O Devices and Control Units . . . . . . .2-7Operator Facilities................ 2-7Chapter 3. Storage .............. 3-1Storage Addressing ............... 3-2Information Formats ............. 3-2Integral Boundaries ............. 3-3Address Types and Formats . . . . . . . . . .3-3Address Types ................ 3-3Absolute Address ............. 3-4Real Address ............... 3-4Virtual Address .............. 3-4Primary Virtual Address . . . . . . . . .3-4Secondary Virtual Address . . . . . . . .3-4AR-Specified Virtual Address . . . . . .3-4Home Virtual Address . . . . . . . . . .3-4Logical Address .............. 3-4Instruction Address ............ 3-5Effective Address ............. 3-5Address Size and Wraparound . . . . . . .3-5Address Wraparound ........... 3-5Storage Key ................... 3-8Protection..................... 3-8Key-Controlled Protection .......... 3-9Storage-Protection-Override Control .. 3-10Fetch-Protection-Override Control ... 3-11Access-List-Controlled Protection ..... 3-11Page Protection ............... 3-11Low-Address Protection ........... 3-12Suppression on Protection . . . . . . . . . 3-12Reference Recording .............. 3-14Change Recording ............... 3-14Prefixing ..................... 3-15Address Spaces ................. 3-16Changing to Different Address Spaces . 3-17Address-Space Number ......... 3-17ASN Translation ................. 3-18ASN-Translation Controls .......... 3-18Control Register 14 . . . . . . . . . . . . 3-18Control Register 0 . . . . . . . . . . . . . 3-19ASN-Translation Tables ........... 3-19ASN-First-Table Entries ......... 3-19ASN-Second-Table Entries ....... 3-19ASN-Translation Process .......... 3-21ASN-First-Table Lookup ......... 3-21ASN-Second-Table Lookup ....... 3-22Recognition of Exceptions during ASNTranslation ............... 3-23ASN Authorization................ 3-23ASN-Authorization Controls......... 3-23Control Register 4 . . . . . . . . . . . . . 3-24ASN-Second-Table Entry ........ 3-24Authority-Table Entries ........... 3-24ASN-Authorization Process ......... 3-24Authority-Table Lookup.......... 3-25 Copyright IBM Corp. 1990-2003iii Recognition of Exceptions during ASNAuthorization ............. 3-26Dynamic Address Translation . . . . . . . . . 3-26Translation Control .............. 3-27Translation Modes ............ 3-28Control Register 0 . . . . . . . . . . . . . 3-28Control Register 1 . . . . . . . . . . . . . 3-28Control Register 7 . . . . . . . . . . . . . 3-29Control Register 13 . . . . . . . . . . . . 3-29Translation Tables .............. 3-30Segment-Table Entries .......... 3-30Page-Table Entries ............ 3-30Summary of Segment-Table andPage-Table Sizes ........... 3-31Translation Process ............. 3-31Effective Segment-Table Designation . 3-32Inspection of Control Register 0 . . . . 3-34Segment-Table Lookup ......... 3-34Page-Table Lookup............ 3-35Formation of the Real Address . . . . . 3-35Recognition of Exceptions duringTranslation ............... 3-35Translation-Lookaside Buffer ........ 3-35TLB Structure ............... 3-36Formation of TLB Entries . . . . . . . . 3-36Use of TLB Entries . . . . . . . . . . . . 3-37Modification of Translation Tables . . . 3-38Address Summary................ 3-40Addresses Translated ............ 3-40Handling of Addresses . . . . . . . . . . . 3-40Assigned Storage Locations . . . . . . . . . . 3-43Chapter 4. Control .............. 4-1Stopped, Operating, Load, and Check-StopStates ...................... 4-1Stopped State ................ 4-2Operating State................ 4-2Load State .................. 4-2Check-Stop State .............. 4-3Program-Status Word.............. 4-3Program-Status-Word Format ....... 4-5Control Registers ................ 4-6Tracing ...................... 4-10Control-Register Allocation ......... 4-10Trace Entries ................. 4-11Operation ................... 4-14Program-Event Recording ........... 4-14Control-Register Allocation andSegment-Table Designation ...... 4-15Operation ................... 4-16Identification of Cause . . . . . . . . . . 4-17Priority of Indication . . . . . . . . . . . . 4-20Storage-Area Designation.......... 4-21PER Events .................. 4-22Successful Branching........... 4-22Instruction Fetching............ 4-22Storage Alteration............. 4-22General-Register Alteration ....... 4-23Store Using Real Address . . . . . . . . 4-24Indication of PER Events Concurrentlywith Other Interruption Conditions . . .4-24Timing....................... 4-29Time-of-Day Clock .............. 4-29Format ................... 4-29States.................... 4-30Changes in Clock State . . . . . . . . . 4-31Setting and Inspecting the Clock . . . . 4-31TOD Programmable Register . . . . . . 4-32TOD-Clock Synchronization......... 4-34Clock Comparator .............. 4-35CPU Timer .................. 4-35Externally Initiated Functions . . . . . . . . . 4-37Resets ..................... 4-37CPU Reset ................. 4-40Initial CPU Reset . . . . . . . . . . . . . 4-41Subsystem Reset ............. 4-41Clear Reset ................ 4-42Power-On Reset ............. 4-42Initial Program Loading . . . . . . . . . . . 4-43Store Status.................. 4-43Multiprocessing ................. 4-44Shared Main Storage . . . . . . . . . . . . 4-44CPU-Address Identification ......... 4-45CPU Signaling and Response . . . . . . . . . 4-45Signal-Processor Orders .......... 4-45Conditions Determining Response . . . . . 4-50Conditions Precluding Interpretation ofthe Order Code . . . . . . . . . . . .4-50Status Bits ................. 4-51Chapter 5. Program Execution ....... 5-1Instructions .................... 5-2Operands ................... 5-3Instruction Formats.............. 5-3Register Operands ............ 5-6Immediate Operands ........... 5-6Storage Operands ............ 5-6Address Generation............... 5-7Bimodal Addressing ............. 5-7Sequential Instruction-Address Generation . 5-7Operand-Address Generation ....... 5-8Formation of the Intermediate Value . .5-8Formation of the Operand Address . . .5-8Branch-Address Generation ........ 5-9Formation of the Intermediate Value . .5-9Formation of the Branch Address . . . .5-9Instruction Execution and Sequencing . . . .5-9Decision Making ............... 5-10iv ESA/390 Principles of Operation Loop Control ................. 5-10Subroutine Linkage without the LinkageStack ................... 5-10Interruptions.................. 5-16Types of Instruction Ending . . . . . . . . . 5-16Completion................. 5-16Suppression ................ 5-16Nullification................. 5-17Termination ................ 5-17Interruptible Instructions ........... 5-17Point of Interruption . . . . . . . . . . . . 5-17Unit of Operation . . . . . . . . . . . . . 5-17Execution of Interruptible Instructions . 5-17Condition-Code Alternative toInterruptibility ............. 5-19Exceptions to Nullification andSuppression ............... 5-19Storage Change and Restoration forDAT-Associated Access Exceptions5-20Modification of DAT-Table Entries . . . 5-20Trial Execution for Editing Instructionsand Translate Instruction . . . . . .5-21Authorization Mechanisms ........... 5-21Mode Requirements ........... 5-21Extraction-Authority Control ....... 5-22PSW-Key Mask .............. 5-22Secondary-Space Control ........ 5-22Subsystem-Linkage Control ....... 5-22ASN-Translation Control ......... 5-22Authorization Index ............ 5-23Program-Call-Fast Control ........ 5-23Access-Register and Linkage-StackMechanisms .............. 5-23PC-Number Translation............. 5-27PC-Number Translation Control . . . . . . 5-27Control Register 0 . . . . . . . . . . . . . 5-27Control Register 5 . . . . . . . . . . . . . 5-27PC-Number Translation Tables . . . . . . . 5-28Linkage-Table Entries .......... 5-28Entry-Table Entries ............ 5-28PC-Number-Translation Process ...... 5-30Obtaining the Linkage-TableDesignation .............. 5-31Linkage-Table Lookup .......... 5-32Entry-Table Lookup............ 5-32Recognition of Exceptions duringPC-Number Translation ....... 5-32Home Address Space . . . . . . . . . . . . . 5-33Access-Register Introduction.......... 5-33Summary ................... 5-34Access-Register Functions ......... 5-34Access-Register-Specified AddressSpaces ................. 5-34Access-Register Instructions ...... 5-41Access-Register Translation .......... 5-42Access-Register-Translation Control.... 5-42Address-Space-Function Control .... 5-42Control Register 2 . . . . . . . . . . . . . 5-43Control Register 5 . . . . . . . . . . . . . 5-43Control Register 8 . . . . . . . . . . . . . 5-43Access Registers............... 5-43Access-Register-Translation Tables .... 5-44Dispatchable-Unit-Control Table andAccess-List Designations ...... 5-44Access-List Entries ............ 5-46Extended ASN-Second-Table Entries . 5-47Access-Register-Translation Process ... 5-48Selecting the Access-List-Entry Token . 5-51Obtaining the Primary or SecondarySegment-Table Designation ..... 5-51Checking the First Byte of the ALET . . 5-51Obtaining the Effective Access-ListDesignation .............. 5-51Access-List Lookup ............ 5-51Locating the ASN-Second-Table Entry . 5-52Authorizing the Use of the Access-ListEntry .................. 5-52Checking for Access-List-ControlledProtection ............... 5-53Obtaining the Segment-TableDesignation from theASN-Second-Table Entry ...... 5-53Recognition of Exceptions duringAccess-Register Translation .... 5-53ART-Lookaside Buffer ............ 5-53ALB Structure ............... 5-53Formation of ALB Entries . . . . . . . . 5-54Use of ALB Entries . . . . . . . . . . . . 5-54Modification of ART Tables . . . . . . . 5-55Subspace Groups ................ 5-55Subspace-Group Tables .......... 5-56Subspace-Group Dispatchable-UnitControl Table ............. 5-56Subspace-Group ASN-Second-TableEntries ................. 5-57Subspace-Replacement Operations .... 5-59Linkage-Stack Introduction ........... 5-60Summary ................... 5-60Linkage-Stack Functions .......... 5-61Transferring Program Control . . . . . . 5-61Branching Using the Linkage Stack . . 5-62Adding and Retrieving Information . . . 5-63Testing Authorization ........... 5-63Program-Problem Analysis........ 5-64Extended Entry-Table Entries . . . . . . . . . 5-64Linkage-Stack Operations ........... 5-66Linkage-Stack-Operations Control ..... 5-68Control Register 0 . . . . . . . . . . . . . 5-68Contentsv Control Register 15 . . . . . . . . . . . . 5-68Linkage Stack................. 5-68Entry Descriptors ............. 5-69Header Entries .............. 5-70Trailer Entries ............... 5-70State Entries................ 5-71Stacking Process............... 5-73Locating Space for a New Entry . . . . 5-73Forming the New Entry . . . . . . . . . . 5-74Updating the Current Entry . . . . . . . 5-75Updating Control Register 15 . . . . . . 5-75Recognition of Exceptions during theStacking Process ........... 5-75Unstacking Process ............. 5-75Locating the Current Entry andProcessing a Header Entry . . . . .5-76Checking for a State Entry . . . . . . . . 5-77Restoring Information........... 5-77Updating the Preceding Entry . . . . . . 5-77Updating Control Register 15 . . . . . . 5-77Recognition of Exceptions during theUnstacking Process ......... 5-78Sequence of Storage References . . . . . . . 5-78Conceptual Sequence .......... 5-78Overlapped Operation of InstructionExecution ............... 5-79Divisible Instruction Execution . . . . . . 5-79Interlocks for Virtual-Storage References . 5-79Interlocks between Instructions . . . . . 5-80Interlocks within a Single Instruction . . 5-80Instruction Fetching ............. 5-82ART-Table and DAT-Table Fetches . . . . 5-83Storage-Key Accesses ........... 5-84Storage-Operand References ....... 5-85Storage-Operand Fetch References . . 5-85Storage-Operand Store References . . 5-85Storage-Operand Update References . 5-86Storage-Operand Consistency ....... 5-87Single-Access References ........ 5-87Multiple-Access References ....... 5-87Block-Concurrent References ...... 5-88Consistency Specification ........ 5-88Relation between Operand Accesses . . . 5-90Other Storage References . . . . . . . . . 5-90| Relation between Storage-Key Accesses . 5-90Serialization ................... 5-91CPU Serialization .............. 5-91Channel-Program Serialization ....... 5-92Chapter 6. Interruptions ........... 6-1Interruption Action................ 6-2Interruption Code............... 6-5Enabling and Disabling . . . . . . . . . . .6-6Handling of Floating Interruption Conditions6-6Instruction-Length Code........... 6-7Zero ILC .................. 6-7ILC on Instruction-Fetching Exceptions . 6-7Exceptions Associated with the PSW . . .6-9Early Exception Recognition . . . . . . .6-9Late Exception Recognition . . . . . . .6-9External Interruption............... 6-10Clock Comparator .............. 6-11CPU Timer .................. 6-11Emergency Signal .............. 6-11ETR ...................... 6-12External Call ................. 6-12Interrupt Key ................. 6-12Malfunction Alert ............... 6-12Service Signal ................ 6-12TOD-Clock Sync Check . . . . . . . . . . . 6-13I/O Interruption.................. 6-13Machine-Check Interruption .......... 6-14Program Interruption .............. 6-14Exception-Extension Code ......... 6-15Data-Exception Code (DXC) . . . . . . . . 6-15Priority of Program Interruptions forData Exceptions ........... 6-15Program-Interruption Conditions ...... 6-16Addressing Exception .......... 6-16AFX-Translation Exception........ 6-19ALEN-Translation Exception....... 6-19ALE-Sequence Exception ........ 6-19ALET-Specification Exception ...... 6-19ASN-Translation-SpecificationException ............... 6-19ASTE-Sequence Exception ....... 6-20ASTE-Validity Exception ......... 6-20ASX-Translation Exception ....... 6-21Crypto-Operation Exception ....... 6-21Data Exception .............. 6-21Decimal-Divide Exception ........ 6-22Decimal-Overflow Exception....... 6-22Execute Exception ............ 6-22EX-Translation Exception ........ 6-22Extended-Authority Exception ...... 6-22Fixed-Point-Divide Exception ...... 6-23Fixed-Point-Overflow Exception..... 6-23HFP-Divide Exception .......... 6-23HFP-Exponent-Overflow Exception ... 6-23HFP-Exponent-Underflow Exception .. 6-24HFP-Significance Exception ....... 6-24HFP-Square-Root Exception ...... 6-24LX-Translation Exception ........ 6-24Monitor Event ............... 6-24Operand Exception ............ 6-25Operation Exception ........... 6-25Page-Translation Exception ....... 6-26PC-Translation-Specification Exception6-27vi ESA/390 Principles of Operation PER Event ................. 6-27Primary-Authority Exception ....... 6-27Privileged-Operation Exception ..... 6-27Protection Exception ........... 6-28Secondary-Authority Exception ..... 6-29Segment-Translation Exception ..... 6-29Space-Switch Event ........... 6-29Special-Operation Exception ...... 6-30Specification Exception.......... 6-31Stack-Empty Exception.......... 6-33Stack-Full Exception ........... 6-33Stack-Operation Exception........ 6-33Stack-Specification Exception ...... 6-33Stack-Type Exception .......... 6-34Trace-Table Exception .......... 6-34Translation-Specification Exception... 6-34Unnormalized-Operand Exception ... 6-35Vector-Operation Exception ....... 6-35Collective Program-Interruption Names . . 6-35Recognition of Access Exceptions . . . . . 6-35Multiple Program-Interruption Conditions . 6-38Access Exceptions ............ 6-40ASN-Translation Exceptions ....... 6-45Subspace-Replacement Exceptions .. 6-45Trace Exceptions ............. 6-45Restart Interruption ............... 6-46Supervisor-Call Interruption .......... 6-46Priority of Interruptions . . . . . . . . . . . . . 6-46Chapter 7. General Instructions ...... 7-1Data Format ................... 7-2Binary-Integer Representation ......... 7-2Binary Arithmetic ................ 7-3Signed Binary Arithmetic . . . . . . . . . .7-3Addition and Subtraction . . . . . . . . .7-3Fixed-Point Overflow ........... 7-4Unsigned Binary Arithmetic . . . . . . . . .7-4Signed and Logical Comparison . . . . . . . .7-4Instructions .................... 7-5ADD ...................... 7-12ADD HALFWORD .............. 7-12ADD HALFWORD IMMEDIATE . . . . . . 7-12ADD LOGICAL ................ 7-13ADD LOGICAL WITH CARRY . . . . . . . 7-13AND ...................... 7-13BRANCH AND LINK . . . . . . . . . . . . . 7-14BRANCH AND SAVE . . . . . . . . . . . . 7-15BRANCH AND SAVE AND SET MODE . 7-16BRANCH AND SET MODE . . . . . . . . . 7-16BRANCH ON CONDITION . . . . . . . . . 7-17BRANCH ON COUNT . . . . . . . . . . . . 7-18BRANCH ON INDEX HIGH . . . . . . . . . 7-18BRANCH ON INDEX LOW OR EQUAL . . 7-18BRANCH RELATIVE AND SAVE . . . . . 7-19BRANCH RELATIVE AND SAVE LONG . 7-19BRANCH RELATIVE ON CONDITION . . 7-20BRANCH RELATIVE ON CONDITIONLONG ................... 7-20BRANCH RELATIVE ON COUNT . . . . . 7-21BRANCH RELATIVE ON INDEX HIGH . . 7-21BRANCH RELATIVE ON INDEX LOWOR EQUAL ................ 7-21CHECKSUM ................. 7-22| CIPHER MESSAGE (KM) . . . . . . . . . . 7-26| CIPHER MESSAGE WITH CHAINING| (KMC) ................... 7-26COMPARE .................. 7-35COMPARE AND FORM CODEWORD . . 7-36COMPARE AND SWAP . . . . . . . . . . . 7-40COMPARE DOUBLE AND SWAP . . . . . 7-40COMPARE HALFWORD .......... 7-42COMPARE HALFWORD IMMEDIATE . . 7-42COMPARE LOGICAL ............ 7-42COMPARE LOGICAL CHARACTERSUNDER MASK .............. 7-43COMPARE LOGICAL LONG . . . . . . . . 7-43COMPARE LOGICAL LONG EXTENDED7-45COMPARE LOGICAL LONG UNICODE . 7-47COMPARE LOGICAL STRING . . . . . . . 7-50COMPARE UNTIL SUBSTRING EQUAL . 7-51| COMPUTE INTERMEDIATE MESSAGE| DIGEST (KIMD) ............. 7-55| COMPUTE LAST MESSAGE DIGEST| (KLMD) .................. 7-55| COMPUTE MESSAGE| AUTHENTICATION CODE (KMAC) . .7-61CONVERT TO BINARY . . . . . . . . . . . 7-66CONVERT TO DECIMAL . . . . . . . . . . 7-67CONVERT UNICODE TO UTF-8 . . . . . 7-67CONVERT UTF-8 TO UNICODE . . . . . 7-70COPY ACCESS ............... 7-72DIVIDE .................... 7-73DIVIDE LOGICAL .............. 7-73EXCLUSIVE OR ............... 7-74EXECUTE................... 7-74EXTRACT ACCESS ............. 7-75EXTRACT PSW ............... 7-76INSERT CHARACTER ........... 7-76INSERT CHARACTERS UNDER MASK . 7-76INSERT PROGRAM MASK . . . . . . . . . 7-77LOAD ..................... 7-77LOAD ACCESS MULTIPLE . . . . . . . . . 7-77LOAD ADDRESS .............. 7-78LOAD ADDRESS EXTENDED . . . . . . . 7-78LOAD ADDRESS RELATIVE LONG . . . 7-79LOAD AND TEST . . . . . . . . . . . . . . 7-79LOAD COMPLEMENT............ 7-79LOAD HALFWORD ............. 7-80Contentsvii LOAD HALFWORD IMMEDIATE . . . . . 7-80LOAD MULTIPLE .............. 7-80LOAD NEGATIVE .............. 7-80LOAD POSITIVE............... 7-81LOAD REVERSED.............. 7-81MONITOR CALL ............... 7-82MOVE ..................... 7-83MOVE INVERSE............... 7-83MOVE LONG ................. 7-83MOVE LONG EXTENDED . . . . . . . . . 7-87MOVE LONG UNICODE . . . . . . . . . . 7-90MOVE NUMERICS.............. 7-93MOVE PAGE (Facility 1) . . . . . . . . . . 7-93MOVE STRING................ 7-95MOVE WITH OFFSET . . . . . . . . . . . . 7-97MOVE ZONES ................ 7-97MULTIPLY .................. 7-98MULTIPLY HALFWORD .......... 7-98MULTIPLY HALFWORD IMMEDIATE . . . 7-98MULTIPLY LOGICAL ............ 7-99MULTIPLY SINGLE ............. 7-99OR ...................... 7-100PACK .................... 7-100PACK ASCII ................ 7-101PACK UNICODE .............. 7-102PERFORM LOCKED OPERATION . . .7-103ROTATE LEFT SINGLE LOGICAL . . .7-116SEARCH STRING ............. 7-116SET ACCESS ............... 7-117SET ADDRESSING MODE . . . . . . . .7-117SET PROGRAM MASK . . . . . . . . . .7-118SHIFT LEFT DOUBLE . . . . . . . . . . .7-118SHIFT LEFT DOUBLE LOGICAL . . . .7-119SHIFT LEFT SINGLE . . . . . . . . . . .7-119SHIFT LEFT SINGLE LOGICAL . . . . .7-120SHIFT RIGHT DOUBLE . . . . . . . . . .7-120SHIFT RIGHT DOUBLE LOGICAL . . .7-121SHIFT RIGHT SINGLE . . . . . . . . . .7-121SHIFT RIGHT SINGLE LOGICAL . . . .7-121STORE ................... 7-122STORE ACCESS MULTIPLE . . . . . . .7-122STORE CHARACTER........... 7-122STORE CHARACTERS UNDER MASK .7-122STORE CLOCK .............. 7-123STORE CLOCK EXTENDED . . . . . . .7-124STORE HALFWORD ........... 7-126STORE MULTIPLE ............ 7-126STORE REVERSED............ 7-126SUBTRACT ................. 7-127SUBTRACT HALFWORD......... 7-127SUBTRACT LOGICAL........... 7-127SUBTRACT LOGICAL WITH BORROW .7-128SUPERVISOR CALL ........... 7-129TEST ADDRESSING MODE . . . . . . .7-129TEST AND SET . . . . . . . . . . . . . .7-129TEST UNDER MASK . . . . . . . . . . .7-130TEST UNDER MASK HIGH . . . . . . .7-130TEST UNDER MASK LOW . . . . . . . .7-130TRANSLATE ................ 7-131TRANSLATE AND TEST . . . . . . . . .7-132TRANSLATE EXTENDED ........ 7-132TRANSLATE ONE TO ONE . . . . . . .7-134TRANSLATE ONE TO TWO . . . . . . .7-135TRANSLATE TWO TO ONE . . . . . . .7-135TRANSLATE TWO TO TWO . . . . . . .7-135UNPACK .................. 7-139UNPACK ASCII .............. 7-139UNPACK UNICODE ............ 7-140UPDATE TREE............... 7-141Chapter 8. Decimal Instructions ...... 8-1Decimal-Number Formats ........... 8-1Zoned Format................. 8-1Packed Format ................ 8-1Decimal Codes ................ 8-2Decimal Operations ............... 8-2Decimal-Arithmetic Instructions....... 8-2Editing Instructions.............. 8-3Execution of Decimal Instructions . . . . .8-3Other Instructions for Decimal Operands .8-3Decimal-Operand Data Exception . . . . .8-4Instructions .................... 8-4ADD DECIMAL ................ 8-6COMPARE DECIMAL ............ 8-6DIVIDE DECIMAL .............. 8-7EDIT ...................... 8-7EDIT AND MARK . . . . . . . . . . . . . . 8-12MULTIPLY DECIMAL ............ 8-12SHIFT AND ROUND DECIMAL . . . . . . 8-13SUBTRACT DECIMAL ........... 8-14TEST DECIMAL ............... 8-14ZERO AND ADD . . . . . . . . . . . . . . . 8-14Chapter 9. Floating-Point Overview andSupport Instructions ............ 9-1Registers And Controls . . . . . . . . . . . . .9-2Floating-Point Registers ........... 9-2Additional Floating-Point (AFP)Registers ................ 9-2Valid Floating-Point-RegisterDesignations .............. 9-2Floating-Point-Control (FPC) Register . . .9-2AFP-Register-Control Bit .......... 9-3Explicit Rounding Methods . . . . . . . . .9-3Summary of Rounding Action . . . . . .9-3Comparison of BFP and HFP NumberRepresentations ................ 9-4BFP and HFP Number Ranges . . . . . .9-4viii ESA/390 Principles of Operation Equivalent BFP and HFP NumberRepresentations .............. 9-4Instructions .................... 9-6CONVERT BFP TO HFP . . . . . . . . . .9-8CONVERT HFP TO BFP . . . . . . . . . .9-9LOAD ..................... 9-10LOAD ZERO ................. 9-11STORE .................... 9-11Summary of All Floating-Point Instructions . . 9-11Chapter 10. Control Instructions...... 10-1BRANCH AND SET AUTHORITY . . . . . 10-7BRANCH AND STACK . . . . . . . . . .10-10BRANCH IN SUBSPACE GROUP . . . .10-13COMPARE AND SWAP AND PURGE .10-17DIAGNOSE ................. 10-19EXTRACT PRIMARY ASN . . . . . . . .10-19EXTRACT SECONDARY ASN . . . . . .10-20EXTRACT STACKED REGISTERS . . .10-20EXTRACT STACKED STATE . . . . . .10-22INSERT ADDRESS SPACE CONTROL .10-23INSERT PSW KEY . . . . . . . . . . . . .10-24INSERT STORAGE KEY EXTENDED .10-25INSERT VIRTUAL STORAGE KEY . . .10-25INVALIDATE PAGE TABLE ENTRY . . .10-26LOAD ADDRESS SPACEPARAMETERS ............. 10-28LOAD CONTROL ............. 10-37LOAD PSW................. 10-37LOAD REAL ADDRESS . . . . . . . . . .10-38LOAD USING REAL ADDRESS . . . . .10-40MODIFY STACKED STATE . . . . . . .10-40MOVE PAGE (Facility 2) . . . . . . . . .10-42MOVE TO PRIMARY . . . . . . . . . . .10-45MOVE TO SECONDARY . . . . . . . . .10-45MOVE WITH DESTINATION KEY . . . .10-47MOVE WITH KEY . . . . . . . . . . . . .10-47MOVE WITH SOURCE KEY . . . . . . .10-48PAGE IN .................. 10-50PAGE OUT ................. 10-51PROGRAM CALL ............. 10-52PROGRAM CALL FAST . . . . . . . . .10-63PROGRAM RETURN ........... 10-67PROGRAM TRANSFER.......... 10-70PURGE ALB ................ 10-76PURGE TLB ................ 10-76RESET REFERENCE BIT EXTENDED .10-76RESUME PROGRAM ........... 10-77SET ADDRESS SPACE CONTROL . . .10-79SET ADDRESS SPACE CONTROLFAST .................. 10-79SET CLOCK ................ 10-81SET CLOCK COMPARATOR . . . . . .10-82SET CLOCK PROGRAMMABLE FIELD .10-82SET CPU TIMER . . . . . . . . . . . . . .10-82SET PREFIX ................ 10-83SET PSW KEY FROM ADDRESS . . . .10-83SET SECONDARY ASN . . . . . . . . .10-84SET STORAGE KEY EXTENDED . . . .10-87SET SYSTEM MASK . . . . . . . . . . .10-87SIGNAL PROCESSOR .......... 10-88STORE CLOCK COMPARATOR . . . .10-89STORE CONTROL ............ 10-89STORE CPU ADDRESS . . . . . . . . .10-90STORE CPU ID . . . . . . . . . . . . . .10-90STORE CPU TIMER . . . . . . . . . . . .10-91STORE FACILITY LIST . . . . . . . . . .10-91STORE PREFIX .............. 10-92STORE SYSTEM INFORMATION . . . .10-92STORE THEN AND SYSTEM MASK .10-103STORE THEN OR SYSTEM MASK . .10-103STORE USING REAL ADDRESS . . .10-104TEST ACCESS.............. 10-104TEST BLOCK............... 10-107TEST PROTECTION .......... 10-109TRACE .................. 10-111TRAP ................... 10-112Chapter 11. Machine-Check Handling... 11-1Machine-Check Detection ........... 11-2Correction of Machine Malfunctions . . . . . . 11-2Error Checking and Correction . . . . . . . 11-2CPU Retry................... 11-2Effects of CPU Retry . . . . . . . . . . . 11-3Checkpoint Synchronization ....... 11-3Handling of Machine Checks duringCheckpoint Synchronization ..... 11-3Checkpoint-Synchronization Operations11-3Checkpoint-Synchronization Action ... 11-4Channel-Subsystem Recovery ....... 11-4Unit Deletion ................. 11-4Handling of Machine Checks . . . . . . . . . 11-5Validation ................... 11-5Invalid CBC in Storage . . . . . . . . . . . 11-6Programmed Validation of Storage . . . 11-7Invalid CBC in Storage Keys . . . . . . . . 11-7Invalid CBC in Registers . . . . . . . . .11-10Check-Stop State ............... 11-11System Check Stop . . . . . . . . . . .11-11Machine-Check Interruption ......... 11-11Exigent Conditions ............. 11-11Repressible Conditions .......... 11-12Interruption Action ............. 11-12Point of Interruption . . . . . . . . . . . .11-14Machine-Check-Interruption Code...... 11-15Subclass................... 11-16System Damage ............ 11-16Instruction-Processing Damage .... 11-17Contentsix System Recovery ............ 11-17Timing-Facility Damage ........ 11-17External Damage ............ 11-18Vector-Facility Failure ......... 11-18Degradation ............... 11-18Warning ................. 11-18Channel Report Pending . . . . . . . .11-18Service-Processor Damage ...... 11-19Channel-Subsystem Damage ..... 11-19Subclass Modifiers ............. 11-19Vector-Facility Source ......... 11-19Backed Up ................ 11-19Delayed Access Exception . . . . . . .11-19Ancillary Report ............. 11-19SynchronousMachine-Check-Interruption Conditions11-20Processing Backup ........... 11-20Processing Damage .......... 11-20Storage Errors ............... 11-20Storage Error Uncorrected . . . . . . .11-21Storage Error Corrected . . . . . . . .11-21Storage-Key Error Uncorrected . . . .11-21Storage Degradation .......... 11-21Indirect Storage Error . . . . . . . . . .11-21Machine-Check Interruption-CodeValidity Bits ............... 11-22PSW-MWP Validity ........... 11-22PSW Mask and Key Validity . . . . . .11-22PSW Program-Mask andCondition-Code Validity ...... 11-22PSW-Instruction-Address Validity ... 11-22Failing-Storage-Address Validity ... 11-22External-Damage-Code Validity .... 11-22Floating-Point-Register Validity .... 11-23General-Register Validity........ 11-23Control-Register Validity ........ 11-23Storage Logical Validity . . . . . . . .11-23Access-Register Validity ........ 11-23Extended-Floating-Point-RegisterValidity ................ 11-23CPU-Timer Validity ........... 11-23Clock-Comparator Validity ....... 11-23Machine-Check Extended InterruptionInformation ................. 11-24Register Save Areas . . . . . . . . . . . .11-24Machine-Check Extended Save Area . .11-24External-Damage Code .......... 11-24Failing-Storage Address.......... 11-25Handling of Machine-Check Conditions . .11-25Floating Interruption Conditions . . . . .11-25Floating Machine-Check-InterruptionConditions .............. 11-26Floating I/O Interruptions . . . . . . . .11-26Machine-Check Masking ........... 11-26Channel-Report-Pending SubclassMask ................. 11-26Recovery Subclass Mask . . . . . . .11-26Degradation Subclass Mask . . . . . .11-26External-Damage Subclass Mask . . .11-26Warning Subclass Mask . . . . . . . .11-26Machine-Check Logout ............ 11-27Summary of Machine-Check Masking . . .11-27Chapter 12. Operator Facilities....... 12-1Manual Operation ................ 12-1Basic Operator Facilities . . . . . . . . . . . . 12-1Address-Compare Controls ......... 12-1Alter-and-Display Controls ......... 12-2Architectural-Mode Indicator ........ 12-2Architectural-Mode-Selection Controls... 12-2Check-Stop Indicator ............ 12-2IML Controls ................. 12-3Interrupt Key ................. 12-3Load Indicator ................ 12-3Load-Clear Key................ 12-3Load-Normal Key............... 12-3Load-Unit-Address Controls......... 12-3Manual Indicator ............... 12-3Power Controls ................ 12-3Rate Control ................. 12-4Restart Key .................. 12-4Start Key ................... 12-4Stop Key ................... 12-4Store-Status Key ............... 12-4System-Reset-Clear Key .......... 12-5System-Reset-Normal Key ......... 12-5Test Indicator ................. 12-5TOD-Clock Control .............. 12-5Wait Indicator ................. 12-5Multiprocessing Configurations ........ 12-6Chapter 13. I/O Overview .......... 13-1Input/Output (I/O) ................ 13-1The Channel Subsystem . . . . . . . . . . . . 13-1Subchannels ................. 13-2Attachment of Input/Output Devices . . . . . 13-2Channel Paths ................ 13-2Control Units ................. 13-4I/O Devices .................. 13-4I/O Addressing.................. 13-5Channel-Path Identifier ........... 13-5Subchannel Number ............. 13-5Device Number ................ 13-5Device Identifier ............... 13-5Execution of I/O Operations . . . . . . . . . . 13-6Start-Function Initiation ........... 13-6Path Management .............. 13-6Channel-Program Execution ........ 13-7x ESA/390 Principles of Operation Conclusion of I/O Operations . . . . . . . . 13-8I/O Interruptions ............... 13-9Chapter 14. I/O Instructions......... 14-1I/O-Instruction Formats ............. 14-1I/O-Instruction Execution ............ 14-1Serialization.................. 14-1Operand Access ............... 14-1Condition Code................ 14-2Program Exceptions ............. 14-2Instructions .................... 14-2CANCEL SUBCHANNEL .......... 14-4CLEAR SUBCHANNEL ........... 14-5HALT SUBCHANNEL ............ 14-6MODIFY SUBCHANNEL .......... 14-7RESET CHANNEL PATH . . . . . . . . . . 14-9RESUME SUBCHANNEL ......... 14-10SET ADDRESS LIMIT . . . . . . . . . . .14-11SET CHANNEL MONITOR . . . . . . . .14-12START SUBCHANNEL .......... 14-14STORE CHANNEL PATH STATUS . . .14-16STORE CHANNEL REPORT WORD . .14-17STORE SUBCHANNEL .......... 14-17TEST PENDING INTERRUPTION . . . .14-18TEST SUBCHANNEL ........... 14-20Chapter 15. Basic I/O Functions . . . . . . 15-1Control of Basic I/O Functions . . . . . . . . . 15-1Subchannel-Information Block ....... 15-1Path-Management-Control Word .... 15-2Subchannel-Status Word......... 15-8| Model-Dependent Area/Measurement| Block Address ............. 15-8Summary of Modifiable Fields . . . . . . 15-9Channel-Path Allegiance ........... 15-11Working Allegiance............. 15-12Active Allegiance .............. 15-12Dedicated Allegiance ........... 15-12Channel-Path Availability ......... 15-13Control-Unit Type ............. 15-13Clear Function ................. 15-14Clear-Function Path Management . . . .15-14Clear-Function Subchannel Modification .15-14Clear-Function Signaling andCompletion ............... 15-15Halt Function.................. 15-15Halt-Function Path Management . . . . .15-16Halt-Function Signaling and Completion .15-16Start Function and Resume Function . . . .15-18Start-Function and Resume-FunctionPath Management ........... 15-19Execution of I/O Operations . . . . . . . . .15-21Blocking of Data . . . . . . . . . . . . . .15-22Operation-Request Block ......... 15-22Channel-Command Word ......... 15-27Command Code .............. 15-29Designation of Storage Area . . . . . . .15-30Chaining................... 15-31Data Chaining .............. 15-33Command Chaining........... 15-34Skipping ................... 15-35Program-Controlled Interruption ..... 15-35CCW Indirect Data Addressing . . . . . .15-36Suspension of Channel-ProgramExecution ................ 15-38Commands and Flags . . . . . . . . . . .15-40Branching in Channel Programs . . . . .15-41Transfer in Channel . . . . . . . . . . .15-41Command Retry .............. 15-42Concluding I/O Operations before Initiation .15-42Concluding I/O Operations during Initiation .15-42Immediate Conclusion of I/O Operations . .15-43Concluding I/O Operations during DataTransfer .................. 15-43Channel-Path-Reset Function ........ 15-45Channel-Path-Reset-Function Signaling .15-45Channel-Path-Reset-Function-Completion Signaling ......... 15-45Chapter 16. I/O Interruptions ........ 16-1Interruption Conditions ............. 16-2Intermediate Interruption Condition . . . . 16-4Primary Interruption Condition . . . . . . . 16-4Secondary Interruption Condition . . . . . 16-4Alert Interruption Condition . . . . . . . . . 16-4Priority of Interruptions . . . . . . . . . . . . . 16-4Interruption Action................ 16-5Interruption-Response Block .......... 16-6Subchannel-Status Word............ 16-6Subchannel Key.............. 16-8Suspend Control (S) . . . . . . . . . . . 16-8Extended-Status-Word Format (L) . . . 16-8Deferred Condition Code (CC) . . . . . 16-8Format (F) ................ 16-10Prefetch (P) ............... 16-10Initial-Status-Interruption Control (I) . .16-11Address-Limit-Checking Control (A) .16-11Suppress-Suspended Interruption (U) .16-11Subchannel-Control Field ......... 16-11Zero Condition Code (Z) . . . . . . . .16-11Extended Control (E) . . . . . . . . . .16-11Path Not Operational (N) . . . . . . . .16-12Function Control (FC) . . . . . . . . .16-12Activity Control (AC) . . . . . . . . . .16-13Status Control (SC) . . . . . . . . . . .16-16CCW-Address Field ............ 16-18Device-Status Field ............ 16-23Subchannel-Status Field ......... 16-23Contentsxi Program-Controlled Interruption.... 16-23Incorrect Length............. 16-23Program Check ............. 16-24Protection Check ............ 16-26Channel-Data Check .......... 16-26Channel-Control Check ........ 16-27Interface-Control Check ........ 16-28Chaining Check ............. 16-29Count Field ................. 16-29Extended-Status Word ............ 16-32Extended-Status Format 0 . . . . . . . .16-32Subchannel Logout ........... 16-32Extended-Report Word......... 16-36Failing-Storage Address ........ 16-37Secondary-CCW Address ....... 16-38Extended-Status Format 1 . . . . . . . .16-38Extended-Status Format 2 . . . . . . . .16-38Extended-Status Format 3 . . . . . . . .16-39Extended-Control Word............ 16-40| Extended-Measurement Word ........ 16-40Chapter 17. I/O Support Functions . . . . 17-1Channel-Subsystem Monitoring ........ 17-1Channel-Subsystem Timing......... 17-2Channel-Subsystem Timer........ 17-2Measurement-Block Update ........ 17-3Measurement Block............ 17-3| Measurement-Block Format ....... 17-7Measurement-Block Origin........ 17-7| Measurement-Block Address ...... 17-8Measurement-Block Key ......... 17-8Measurement-Block Index ........ 17-8Measurement-Block-Update Mode ... 17-8| Measurement-Block-Format Control .. 17-9Measurement-Block-Update Enable .. 17-9Control-Unit-Queuing Measurement .. 17-9Control-Unit-Defer Time ......... 17-9Device-Active-Only Measurement.... 17-9| Initial-Command-Response| Measurement ............ 17-10Time-Interval-Measurement Accuracy .17-10Device-Connect-Time Measurement... 17-10Device-Connect-Time-MeasurementMode ................. 17-10Device-Connect-Time-MeasurementEnable ................ 17-11| Extended Measurement Word . . . . . .17-11| Extended-Measurement-Word Enable17-11Signals and Resets . . . . . . . . . . . . . .17-12Signals.................... 17-12Halt Signal ................ 17-12Clear Signal ............... 17-12Reset Signal ............... 17-13Resets .................... 17-13Channel-Path Reset .......... 17-13I/O-System Reset ............ 17-13Externally Initiated Functions . . . . . . . .17-17Initial Program Loading . . . . . . . . . .17-17Reconfiguration of the I/O System . . . .17-20Status Verification ............... 17-20Address-Limit Checking ........... 17-20Configuration Alert .............. 17-21Incorrect-Length-Indication Suppression .. 17-21Concurrent Sense ............... 17-21Channel-Subsystem Recovery........ 17-21Channel Report............... 17-22Channel-Report Word ........... 17-23Channel-Subsystem-I/O-Priority Facility .. 17-25Number ofChannel-Subsystem-Priority Levels17-26Chapter 18. Hexadecimal-Floating-PointInstructions ................. 18-1HFP Arithmetic.................. 18-1HFP Number Representation . . . . . . . . 18-1Normalization ................. 18-3HFP Data Format . . . . . . . . . . . . . . 18-3Instructions .................... 18-4ADD NORMALIZED ............. 18-8ADD UNNORMALIZED .......... 18-10COMPARE ................. 18-10CONVERT FROM FIXED . . . . . . . . .18-11CONVERT TO FIXED . . . . . . . . . . .18-11DIVIDE ................... 18-12HALVE.................... 18-13LOAD AND TEST . . . . . . . . . . . . .18-14LOAD COMPLEMENT........... 18-15LOAD FP INTEGER . . . . . . . . . . . .18-15LOAD LENGTHENED ........... 18-16LOAD NEGATIVE ............. 18-16LOAD POSITIVE.............. 18-17LOAD ROUNDED ............. 18-18MULTIPLY ................. 18-18| MULTIPLY AND ADD . . . . . . . . . . .18-20| MULTIPLY AND SUBTRACT . . . . . . .18-20SQUARE ROOT .............. 18-21SUBTRACT NORMALIZED........ 18-23SUBTRACT UNNORMALIZED...... 18-23Chapter 19. Binary-Floating-PointInstructions ................. 19-1Binary-Floating-Point Facility.......... 19-1Floating-Point-Control (FPC) Register . . . 19-2IEEE Masks and Flags . . . . . . . . . . 19-3FPC DXC Byte . . . . . . . . . . . . . . 19-3Operations on the FPC Register . . . . 19-3BFP Arithmetic.................. 19-4BFP Data Formats . . . . . . . . . . . . . . 19-4xii ESA/390 Principles of Operation BFP Short Format . . . . . . . . . . . . . 19-4BFP Long Format . . . . . . . . . . . . . 19-4BFP Extended Format . . . . . . . . . . 19-4Biased Exponent ............. 19-4Significand ................. 19-4Values of Nonzero Numbers . . . . . . 19-4Classes of BFP Data . . . . . . . . . . . . 19-5Zeros .................... 19-6Denormalized Numbers ......... 19-6Normalized Numbers ........... 19-6Infinities .................. 19-6Signaling and Quiet NaNs . . . . . . . . 19-6BFP-Format Conversion........... 19-7BFP Rounding ................ 19-7Rounding Mode .............. 19-7Normalization and Denormalization . . . . 19-8BFP Comparison ............... 19-8Condition Codes for BFP Instructions . . . 19-9Remainder .................. 19-9IEEE Exception Conditions . . . . . . . .19-10IEEE Invalid Operation . . . . . . . . .19-10IEEE Division-By-Zero ......... 19-11IEEE Overflow.............. 19-11IEEE Underflow ............. 19-12IEEE Inexact............... 19-12Result Figures ................. 19-13Data-Exception Codes (DXC) andAbbreviations .............. 19-14Instructions ................... 19-15ADD ..................... 19-18COMPARE ................. 19-23COMPARE AND SIGNAL . . . . . . . . .19-24CONVERT FROM FIXED . . . . . . . . .19-26CONVERT TO FIXED . . . . . . . . . . .19-27DIVIDE ................... 19-29DIVIDE TO INTEGER . . . . . . . . . . .19-30EXTRACT FPC............... 19-34LOAD AND TEST . . . . . . . . . . . . .19-35LOAD COMPLEMENT........... 19-35LOAD FP INTEGER . . . . . . . . . . . .19-36LOAD FPC ................. 19-37LOAD LENGTHENED ........... 19-38LOAD NEGATIVE ............. 19-38LOAD POSITIVE.............. 19-39LOAD ROUNDED ............. 19-39MULTIPLY ................. 19-40MULTIPLY AND ADD . . . . . . . . . . .19-42MULTIPLY AND SUBTRACT . . . . . . .19-42SET FPC .................. 19-44SET ROUNDING MODE . . . . . . . . .19-44SQUARE ROOT .............. 19-45STORE FPC ................ 19-45SUBTRACT ................. 19-45TEST DATA CLASS . . . . . . . . . . . .19-46Appendix A. Number Representation andInstruction-Use Examples ......... A-1Number Representation ............ A-2Binary Integers ................ A-2Signed Binary Integers . . . . . . . . . .A-2Unsigned Binary Integers . . . . . . . .A-3Decimal Integers ............... A-4Hexadecimal-Floating-Point Numbers ... A-5Conversion Example............. A-6Instruction-Use Examples ........... A-6Machine Format ............... A-6Assembler-Language Format ........ A-7Addressing Mode in Examples . . . . .A-7General Instructions............... A-7ADD HALFWORD (AH) . . . . . . . . . . .A-7AND (N, NC, NI, NR) . . . . . . . . . . . .A-7NI Example ................ A-8Linkage Instructions (BAL, BALR, BAS,BASR, BASSM, BSM) . . . . . . . . . . .A-8Other BALR and BASR Examples . . .A-9BRANCH AND STACK (BAKR) . . . . . .A-9BAKR Example 1 . . . . . . . . . . . .A-10BAKR Example 2 . . . . . . . . . . . .A-10BAKR Example 3 . . . . . . . . . . . .A-11BRANCH ON CONDITION (BC, BCR) .A-11BRANCH ON COUNT (BCT, BCTR) . .A-12BRANCH ON INDEX HIGH (BXH) . . . .A-12BXH Example 1 . . . . . . . . . . . . .A-12BXH Example 2 . . . . . . . . . . . . .A-12BRANCH ON INDEX LOW OR EQUAL(BXLE) .................. A-13BXLE Example 1 . . . . . . . . . . . .A-13BXLE Example 2 . . . . . . . . . . . .A-14COMPARE AND FORM CODEWORD(CFC) ................... A-14COMPARE HALFWORD (CH) . . . . . .A-14COMPARE LOGICAL (CL, CLC, CLI,CLR) .................... A-14CLC Example .............. A-14CLI Example............... A-15CLR Example .............. A-15COMPARE LOGICAL CHARACTERSUNDER MASK (CLM) . . . . . . . . . .A-15COMPARE LOGICAL LONG (CLCL) . .A-16COMPARE LOGICAL STRING (CLST) .A-17CONVERT TO BINARY (CVB) . . . . . .A-18CONVERT TO DECIMAL (CVD) . . . . .A-18DIVIDE (D, DR) . . . . . . . . . . . . . . .A-19EXCLUSIVE OR (X, XC, XI, XR) . . . .A-19XC Example ............... A-19XI Example ............... A-20EXECUTE (EX)............... A-21Contentsxiii INSERT CHARACTERS UNDER MASK(ICM) ................... A-21LOAD (L, LR) . . . . . . . . . . . . . . . .A-22LOAD ADDRESS (LA) . . . . . . . . . . .A-22LOAD HALFWORD (LH) . . . . . . . . .A-23MOVE (MVC, MVI) . . . . . . . . . . . . .A-23MVC Example .............. A-23MVI Example .............. A-24MOVE INVERSE (MVCIN) . . . . . . . .A-24MOVE LONG (MVCL) . . . . . . . . . . .A-25MOVE NUMERICS (MVN) . . . . . . . .A-25MOVE STRING (MVST) . . . . . . . . . .A-26MOVE WITH OFFSET (MVO) . . . . . .A-26MOVE ZONES (MVZ) . . . . . . . . . . .A-27MULTIPLY (M, MR) . . . . . . . . . . . .A-27MULTIPLY HALFWORD (MH) . . . . . .A-27OR (O, OC, OI, OR) . . . . . . . . . . . .A-28OI Example ............... A-28PACK (PACK) ............... A-28SEARCH STRING (SRST) . . . . . . . .A-29SRST Example 1 . . . . . . . . . . . .A-29SRST Example 2 . . . . . . . . . . . .A-29SHIFT LEFT DOUBLE (SLDA) . . . . . .A-29SHIFT LEFT SINGLE (SLA) . . . . . . .A-30STORE CHARACTERS UNDER MASK(STCM) .................. A-30STORE MULTIPLE (STM) . . . . . . . .A-30TEST UNDER MASK (TM) . . . . . . . .A-31TRANSLATE (TR) ............. A-31TRANSLATE AND TEST (TRT) . . . . .A-32UNPACK (UNPK) ............. A-33UPDATE TREE (UPT) . . . . . . . . . . .A-34Decimal Instructions.............. A-34ADD DECIMAL (AP) . . . . . . . . . . . .A-34COMPARE DECIMAL (CP) . . . . . . . .A-34DIVIDE DECIMAL (DP) . . . . . . . . . .A-34EDIT (ED) .................. A-35EDIT AND MARK (EDMK) . . . . . . . .A-36MULTIPLY DECIMAL (MP) . . . . . . . .A-36SHIFT AND ROUND DECIMAL (SRP) .A-37Decimal Left Shift . . . . . . . . . . . .A-37Decimal Right Shift . . . . . . . . . . .A-37Decimal Right Shift and Round . . . .A-38Multiplying by a Variable Power of 10 . A-38ZERO AND ADD (ZAP) . . . . . . . . . .A-38Hexadecimal-Floating-Point Instructions .. A-39ADD NORMALIZED (AD, ADR, AE, AER,AXR) .................... A-39ADD UNNORMALIZED (AU, AUR, AW,AWR) ................... A-39COMPARE (CD, CDR, CE, CER) . . . .A-40DIVIDE (DD, DDR, DE, DER) . . . . . .A-40HALVE (HDR, HER) . . . . . . . . . . . .A-41MULTIPLY (MD, MDR, MDE, MDER,MXD, MXDR, MXR) . . . . . . . . . . .A-41Hexadecimal-Floating-Point-NumberConversion ................ A-42Fixed Point to Hexadecimal FloatingPoint .................. A-42Hexadecimal Floating Point to FixedPoint .................. A-42Multiprogramming and MultiprocessingExamples .................. A-43Example of a Program Failure Using ORImmediate ................ A-43Conditional Swapping Instructions (CS,CDS) ................... A-44Setting a Single Bit . . . . . . . . . . .A-44Updating Counters ........... A-45Bypassing Post and Wait . . . . . . . . .A-45Bypass Post Routine . . . . . . . . . .A-45Bypass Wait Routine . . . . . . . . . .A-46Lock/Unlock ................. A-46Lock/Unlock with LIFO Queuing forContentions .............. A-46Lock/Unlock with FIFO Queuing forContentions .............. A-47Free-Pool Manipulation .......... A-48PERFORM LOCKED OPERATION (PLO)A-50Sorting Instructions .............. A-51Tree Format................. A-51Example of Use of Sort Instructions . . .A-53Appendix B. Lists of Instructions . . . . .B-1Appendix C. Condition-Code Settings .. C-1Appendix D. Comparison betweenESA/370 and ESA/390 . . . . . . . . . . .D-1New Facilities in ESA/390 . . . . . . . . . . .D-1Access-List-Controlled Protection ..... D-1Additional Floating-Point .......... D-1Additional Input/Output ........... D-2Branch and Set Authority . . . . . . . . . .D-2Called-Space Identification ......... D-2Checksum................... D-2Compare and Move Extended . . . . . . .D-2Concurrent Sense .............. D-2Extended TOD Clock . . . . . . . . . . . .D-2Extended Translation 1 . . . . . . . . . . .D-3Extended Translation 2 . . . . . . . . . . .D-3Immediate and Relative Instruction . . . .D-3Move-Page Facility 2 . . . . . . . . . . . .D-3PER 2 ..................... D-4Perform Locked Operation . . . . . . . . .D-4Program Call Fast . . . . . . . . . . . . . .D-4Resume Program .............. D-4xiv ESA/390 Principles of Operation Set Address Space Control Fast . . . . . .D-5Square Root ................. D-5Storage-Protection Override ........ D-5Store System Information . . . . . . . . . .D-5String Instruction ............... D-5Subspace Group ............... D-5Suppression on Protection . . . . . . . . .D-6TOD-Clock-Control Override ........ D-6Trap ...................... D-6z/Architecture ................ D-6Comparison of Facilities . . . . . . . . . . . .D-7Appendix E. Comparison between 370-XAand ESA/370 ................. E-1New Facilities in ESA/370 . . . . . . . . . . .E-1Access Registers............... E-1Compare until Substring Equal . . . . . . .E-1Home Address Space . . . . . . . . . . . .E-1Linkage Stack................. E-2Load and Store Using Real Address . . .E-2Move Page Facility 1 . . . . . . . . . . . .E-2Move with Source or Destination Key . . .E-2Private Space................. E-2Comparison of Facilities . . . . . . . . . . . .E-2Summary of Changes . . . . . . . . . . . . . .E-2New Instructions Provided . . . . . . . . .E-2Comparison of PSW Formats . . . . . . .E-3New Control-Register Assignments . . . .E-3New Assigned Storage Locations . . . . .E-3New Exceptions ............... E-4Change to Secondary-Space Mode . . . .E-4Changes to ASN-Second-Table Entry andASN Translation .............. E-4Changes to Entry-Table Entry andPC-Number Translation .......... E-5Changes to PROGRAM CALL . . . . . . .E-5Changes to SET ADDRESS SPACECONTROL ................. E-5Effects in New Translation Modes . . . . . .E-5Effects on Interlocks for Virtual-StorageReferences ................. E-5Effect on INSERT ADDRESS SPACECONTROL ................. E-6Effect on LOAD REAL ADDRESS . . . . .E-6Effect on TEST PENDINGINTERRUPTION .............. E-6Effect on TEST PROTECTION ...... E-6Appendix F. Comparison betweenSystem/370 and 370-XA . . . . . . . . . .F-1New Facilities in 370-XA . . . . . . . . . . . .F-1Bimodal Addressing ............. F-131-Bit Logical Addressing . . . . . . . . . .F-131-Bit Real and Absolute Addressing . . .F-1Page Protection ............... F-2Tracing .................... F-2Incorrect-Length-Indication Suppression .F-2Status Verification .............. F-2Comparison of Facilities . . . . . . . . . . . .F-2Summary of Changes . . . . . . . . . . . . . .F-3Changes in Instructions Provided . . . . .F-3Input/Output Comparison .......... F-5Comparison of PSW Formats . . . . . . .F-5Changes in Control-Register Assignments . F-6Changes in Assigned Storage Locations .F-6Changes to SIGNAL PROCESSOR . . . .F-6Machine-Check Changes .......... F-7Changes to Addressing Wraparound . . .F-7Changes to LOAD REAL ADDRESS . . .F-7Changes to 31-Bit Real OperandAddresses ................. F-8Appendix G. Table of Powers of 2 . . . . .G-1Appendix H. Hexadecimal Tables ..... H-1Appendix I. EBCDIC and Other Codes . . .I-1Index ....................... X-1Contentsxv xvi ESA/390 Principles of Operation NoticesReferencesinthispublicationtoIBM*products,programsorservicesdonotimplythatIBMintendstomaketheseavailableinallcountriesinwhichIBMoperates. AnyreferencetoanIBMproduct,program,orserviceisnotintendedtostateorimplythatonlyIBM'sproduct,program,orservicemaybeused. Anyfunctionallyequivalentproduct,program,orservicethatdoesnotinfringeanyofIBM'sintellectualpropertyrightsmaybeusedinsteadoftheIBMproduct,program,orservice. Evaluation and verification of operation inconjunctionwithotherproducts,exceptthoseexpressly designated by IBM, is the user's respon-sibility.IBMmayhavepatentsorpendingpatentapplica-tionscoveringsubjectmatterinthisdocument.Thefurnishingofthisdocumentdoesnotgiveyouanylicensetothesepatents. Youcansendlicenseinquiries,inwriting,totheIBMDirectorofLicensing,IBMCorporation,500ColumbusAvenue, Thornwood, NY, 10594 USA. TrademarksThefollowingterms,denotedbyanasterisk(*)atthefirstormostprominentoccurrenceinthispub-lication,aretrademarksoftheInternationalBusi-ness Machines Corporation in the United States orother countries:AIX/ESABookMasterCICSDB2Enterprise Systems Architecture/370Enterprise Systems Architecture/390Enterprise Systems Connection ArchitectureESA/370ESA/390ESCONFICONIBMIBMLinkMVS/ESAOS/390Processor Resource/Systems ManagerPR/SMSysplex TimerSystem/370VM/ESAz/Architecturez/OS Copyright IBM Corp. 1990-2003xvii xviii ESA/390 Principles of Operation PrefaceThispublicationprovides,forreferencepurposes,adetailedEnterpriseSystemsArchitecture/390*(ESA/390*) description.ThepublicationappliesonlytosystemsoperatingasdefinedbyESA/390. ForsystemsoperatinginaccordancewiththeSystem/370*orSystem/370extended-architecture(370-XA)definitions,theIBMSystem/370PrinciplesofOperation,GA22-7000,ortheIBM370-XAPrinciplesofOperation,SA22-7085,shouldbeconsulted. ForsystemsoperatinginaccordancewiththeEnter-priseSystemsArchitecture/370*(ESA/370*)defi-nition,theIBMESA/370PrinciplesofOperation,SA22-7200,shouldbeconsulted. Forsystemsoperatinginaccordancewiththez/Architecture*definition,thez/ArchitecturePrinciplesofOpera-tion, SA22-7832, should be consulted.Thepublicationdescribeseachfunctionatthelevelofdetailneededtoprepareanassembler-languageprogramthatreliesonthatfunction. Itdoesnot,however,describethenotationandcon-ventionsthatmustbeemployedinpreparingsuchaprogram,forwhichtheusermustinsteadreferto the appropriate assembler-language publication.The information in this publication is provided prin-cipallyforusebyassembler-languageprogram-mers,althoughanyoneconcernedwiththefunc-tional details of ESA/390 will find it useful.Thispublicationiswrittenasareferenceandshould not be considered an introduction or a text-book. It assumes the user has a basic knowledgeof data-processing systems.Allfacilitiesdiscussedinthispublicationarenotnecessarilyavailableoneverymodel. Further-more, in some instances the definitions have beenstructuredtoallowforsomedegreeofextendibility, and therefore certain capabilities maybedescribedorimpliedthatarenotofferedonanymodel. Examplesofsuchcapabilitiesaretheuseofa16-bitfieldinthesubsystem-identificationwordtoidentifythesubchannelnumber,thesizeoftheCPUaddress,andthenumberofCPUssharingmainstorage. TheallowanceforthistypeofextendibilityshouldnotbeconstruedasimplyinganyintentionbyIBMtoprovidesuchcapabilities. Forinformationaboutthecharacter-isticsandavailabilityoffacilitiesonaspecificmodel,seethefunctionalcharacteristicspublica-tion for that model.Largelybecausethispublicationisarrangedforreference,certainwordsandphrasesappear,ofnecessity,earlierinthepublicationthantheprin-cipaldiscussionsexplainingthem. Thereaderwhoencountersaproblembecauseofthisarrangementshouldrefertotheindex,whichindi-cates the location of the key description.Theinformationpresentedinthispublicationisgrouped in 19 chapters and several appendixes:Chapter1,Introduction,highlightsthemajorfacili-ties of the ESA/390 architecture.Chapter2,Organization,describesthemajorgroupingswithinthesystem mainstorage,expandedstorage,thecentralprocessingunit(CPU),theexternaltimereference(ETR),andinput/output withsomeattentiongiventothecompositionandcharacteristicsofthosegroupings.Chapter3,Storage,explainstheinformationformats,theaddressingofstorage,andthefacili-tiesforstorageprotection. Italsodealswithdynamicaddresstranslation(DAT),which,coupledwithspecialprogrammingsupport,makesthe use of a virtual storage possible.Chapter4,Control,describesthefacilitiesfortheswitchingofsystemstatus,forspecialexternallyinitiatedoperations,fordebugging,andfortiming.ItdealsspecificallywithCPUstates,controlmodes,theprogram-statusword(PSW),controlregisters,tracing,program-eventrecording,timingfacilities,resets,storestatus,andinitialprogramloading.EnterpriseSystemsArchitecture/390,ESA/390,System/370,EnterpriseSystemsArchitecture/370,ESA/370,andz/Architectureare trademarks of the International Business Machines Corporation. Copyright IBM Corp. 1990-2003xix Chapter 5, Program Execution, explains the role ofinstructions in program execution, looks in detail atinstructionformats,anddescribesbrieflytheuseoftheprogram-statusword(PSW),ofbranching,andofinterruptions. Itcontainstheprincipaldescriptionoftheadvancedaddress-spacefacili-tiesthatwereintroducedinESA/370. ItalsodetailstheaspectsofprogramexecutionononeCPUasobservedbyotherCPUsandbychannelprograms.Chapter6,Interruptions,detailsthemechanismthatpermitstheCPUtochangeitsstateasaresultofconditionsexternaltothesystem,withinthesystem,orwithintheCPUitself. Sixclassesofinterruptionsareidentifiedanddescribed:machine-checkinterruptions,programinter-ruptions,supervisor-callinterruptions,externalinterruptions,input/outputinterruptions,andrestartinterruptions.Chapter7,GeneralInstructions,containsdetaileddescriptionsoflogicalandbinary-integerdataformatsandofallunprivilegedinstructionsexceptthe decimal and floating-point instructions.Chapter8,DecimalInstructions,describesindetaildecimaldataformatsandthedecimalinstructions.Chapter9,Floating-PointOverviewandSupportInstructions,includesanintroductiontothefloating-pointoperations,detaileddescriptionsofthoseinstructionscommontobothhexadecimal-floating-pointandbinary-floating-pointoperations,and summaries of all floating-point instructions.Chapter10,ControlInstructions,containsdetaileddescriptionsofallofthesemiprivilegedandprivi-leged instructions except for the I/O instructions.Chapter11,Machine-CheckHandling,describesthemechanismfordetecting,correcting,andreporting machine malfunctions.Chapter12,OperatorFacilities,describesthebasicmanualfunctionsandcontrolsavailableforoperating and controlling the system.Chapters13-17ofthispublicationprovideadetaileddefinitionofthefunctionsperformedbythechannelsubsystemandthelogicalinterfacebetween the CPU and the channel subsystem.Chapter13,I/OOverview,providesabriefdescription of the basic components and operationof the channel subsystem.Chapter14,I/OInstructions,containsthedescription of the I/O instructions.Chapter15,BasicI/OFunctions,describesthebasicI/Ofunctionsperformedbythechannelsub-system,includingtheinitiation,control,andcon-clusion of I/O operations.Chapter16,I/OInterruptions,coversI/Ointer-ruptions and interruption conditions.Chapter 17, I/O Support Functions, describes suchfunctionsaschannel-subsystemusagemonitoring,resets, initial-program loading, reconfiguration, andchannel-subsystem recovery.Chapter18,Hexadecimal-Floating-PointInstructions,containsdetaileddescriptionsofthehexadecimal-floating-point(HFP)dataformatsandthe HFP instructions.Chapter19,Binary-Floating-PointInstructions,containsdetaileddescriptionsofthebinary-floating-point(BFP)dataformatsandtheBFPinstructions.The Appendixes include:- Information about number representation- Instruction-use examples- Listsoftheinstructionsarrangedinseveralsequences- A summary of the condition-code settings- AsummaryofthedifferencesbetweenESA/370 and ESA/390- Asummaryofthedifferencesbetween370-XA and ESA/370- AsummaryofthedifferencesbetweenSystem/370 and 370-XA- A table of the powers of 2- Tabularinformationhelpfulindealingwithhexadecimal numbers- A table of EBCDIC and other codes.CertaininformationaboutcommandsthatisinChapters15and16oftheESA/370PrinciplesofOperationisnotinthispublication;insteaditisinthepublicationIBMEnterpriseSystemsArchitecture/390CommonI/O-DeviceCommandsand Self Description, SA22-7204.xx ESA/390 Principles of Operation Size and Number NotationInthispublication,thelettersK,M,G,andTdenotethemultipliers2,2,2,and2^,respectively. Althoughthelettersareborrowedfromthedecimalsystemandstandforkilo(10),mega(10),giga(10),andtera(10),theydonothavethedecimalmeaningbutinsteadrepre-sentthepowerof2closesttothecorrespondingpowerof10. Theirmeaninginthispublicationisas follows:SymboT VaTue K {k1To) 1.0?4 ? M {meua) 1.048.516 ? 0 {u1ua) 1.013.141.8?4 ? 1 {tera) 1.099.511.6?1.116 ?^ ThefollowingaresomeexamplesoftheuseofK,M, G, and T:2,048 is expressed as 2K.4,096 is expressed as 4K.65,536 is expressed as 64K (not 65K).2^ is expressed as 16M.2 is expressed as 2G.2^ is expressed as 4T.Whenthewordsthousandandmillionareused,nospecialpower-of-2meaningisassignedto them.Allnumbersinthispublicationareindecimalunlesstheyareexplicitlynotedasbeinginbinaryor hexadecimal (hex).Bytes, Characters, and CodesAlthoughtheSystem/360architecturewasori-ginallydesignedtosupporttheExtendedBinary-Coded-DecimalInterchangeCode(EBCDIC),theinstructionsanddataformatsofthearchitectureareforthemostpartindependentoftheexternalcodewhichistobeprocessedbythemachine.Formostinstructions,all256possiblecombina-tionsofbitpatternsforaparticularbytecanbeprocessed, independent of the character which thebitpatternisintendedtorepresent. Forinstructionswhichusethezonedformat,andforthosefewinstructionswhicharedependentonaparticularexternalcode,theinstructionTRANS-LATE may be used to convert data from one codetoanothercode. Thus,amachineoperatinginaccordancewithESA/390canprocessEBCDIC,ASCII,oranyothercodewhichcanberepres-ented in eight or fewer bits per character.Inthispublication,unlessotherwisespecified,thevaluegivenforabyteisthevalueobtainedbyconsideringthebitsofthebytetorepresentabinarycode. Thus,whenabyteissaidtocontainazero,thevalue00000000binary,or00hex,ismeant, and not the value for an EBCDIC character0, which would be F0 hex. Other PublicationsTheparallel-I/Ointerfaceisdescribedinthepubli-cationIBMSystem/360andSystem/370I/OInter-faceChanneltoControlUnitOriginalEquipmentManufacturers' Information, GA22-6974.Theparallel-I/Ochannel-to-channeladapterisdescribedinthepublicationIBMEnterpriseSystemsArchitecture/390Channel-to-ChannelAdapterfortheSystem/360andSystem/370I/OInterface, SA22-7091.TheEnterpriseSystemsConnectionArchitecture*(ESCON*) I/Ointerface,referredtointhispubli-cationalongwiththeFICONI/OinterfaceastheserialI/Ointerface,isdescribedinthepublicationIBMEnterpriseSystemsArchitecture/390ESCONI/O Interface, SA22-7202.TheFICONI/Ointerfaceisdescribedinthe| ANSIstandardsdocumentFibreChannel-Single-Byte Command Code Sets-2 (FC-SB-2).Thechannel-to-channeladapterfortheserial-I/Ointerface is described in the publication IBM Enter-priseSystemsArchitecture/390ESCONChannel-to-Channel-Adapter, SA22-7203.Thecommands,status,andsensedatathatarecommontoallI/OdevicesthatcomplywithEnterprise Systems Connection Architecture and ESCON are trademarks of the International Business Machines Corporation.| ANSI is a registered trademark of the American National Standards Institute.Prefacexxi ESA/390aredescribedinthepublicationIBMEnterpriseSystemsArchitecture/390CommonI/O-DeviceCommandsandSelfDescription,SA22-7204.VectoroperationsaredescribedinthepublicationIBMEnterpriseSystemsArchitecture/390VectorOperations, SA22-7207.Thecompressionfacilityisdescribedinthepubli-cationIBMEnterpriseSystemsArchitecture/390Data Compression, SA22-7208.Theinterpretive-executionfacilityisdescribedinthepublicationIBM370-XAInterpretiveExecution,SA22-7095.| Summary of Changes in Ninth| Edition| Thecurrent,nintheditionofthispublicationdiffers| fromthepreviouseditionprincipallybycontaining| thedefinitionsoftheHFP-multiply-add/subtract| facility and the message-security assist. The ninth| editioncontainsminorclarificationsandcor-| rectionsandalsothefollowingsignificantchanges| relative to the previous edition:| - In Chapter 3, Storage:| TheSTOREFACILITYLISTfacilitylistat| reallocations200-203isadded. Thisisa| correction to the eighth edition.| Theprimarysegment-tabledesignation| (STD)incontrolregister1attachesa| segment-tableentryevenwhentheCPU| is in the home-space mode, and the home| STDincontrolregister13attachesa| segment-tableentryevenwhentheCPU| is in the secondary-space mode.| - In Chapter 4, Control:| TherelationshipsbetweenETRtime| (TOD-clocktime),UTC,andInternational| AtomicTimearedescribedinaprogram-| ming note on page 4-32.| ThedescriptionoftheSIGNAL| PROCESSORstore-extended-status-at-| address order is corrected to state that the| addressoftheextendedsaveareamust| be zero.| Code0oftheSIGNALPROCESSORset-| architectureorder,andalsoaCPUreset| duetoactivationoftheloadnormalkey| whentheCPUisinthez/Architecture| architecturalmode,arechangedtosave| thecurrentz/ArchitecturePSWwhen| switchingtotheESA/390architectural| mode. Also, code 2 of the order is added,| andthisrestores,forCPUsotherthanthe| oneexecutingSIGNALPROCESSOR,the| savedPSWwhenswitchingtothe| z/Architecture architectural mode, provided| thatthesavedPSWhasnotbeensetto| all zeros by certain resets.| - In Chapter 5, Program Execution:| TheresultswhenaPERinstruction-| fetchingeventoccursalongwithcertain| exceptionsorexceptionconditionsare| clarified. SeeIndicationofPEREvents| ConcurrentlywithOtherInterruption| Conditions on page 4-24.| Thechangebitisnotnecessarilysetto| onecurrentlywiththerelatedstorageref-| erence,asobservedbyotherCPUs;it| maybesettoonebeforeoraftertheref-| erence,withincertainlimits. See| Storage-KeyAccessesonpage 5-84for| adetaileddescriptionofwhenthechange| bit is set.| Thefiveinstructionsofthemessage-| securityassistareaddedtothelistof| instructionshavingmultiple-accessrefer-| ences.| - InChapter6,Interruptions,thelistofcondi-| tionscausingaspecificationexceptiontobe| recognizedisextendedtoincludethose| causedbythemessage-securityassist| instructions.| - In Chapter 7, General Instructions:| ThedefinitionofEXTRACTPSWiscor-| rectedbystatingthatbit32ofthecurrent| PSWisplacedinbitposition0ofthe| secondoperand,andbits1-31ofthe| second operand are set to zeros.| Fiveinstructionsprovidedbythe| message-security assist are added.| - In Chapter 10, Control Instructions:| The definition of LOAD ADDRESS SPACE| PARAMETERS is clarified.xxii ESA/390 Principles of Operation | ThedescriptionofthebitssetbySTORE| FACILITYLISTisclarified,andnewbits| are assigned.| - In Chapter 14, I/O Instructions:| ThedefinitionofMODIFYSUBCHANNEL| is modified.| ThedefinitionofSETCHANNEL| MONITOR is modified.| - InChapter15,BasicI/OFunctions,thefol-| lowingchangesaremadetothesubchannel-| information-block (SCHIB):| Bit29ofword6ofthepath-| management-controlword(PMCW)is| definedasthemeasurement-block-format| control.| Bit30ofword6ofthePMCWisdefined| astheextended-measurement-word-mode| enablement bit.| Thedefinitionofwords10-11(words0-1| ofthemodel-dependentarea)are| changedtocontainameasurement-block| address,whenthe| extended-I/O-measurement-blockfacilityis| installed.| - InChapter16,I/OInterruptions,the| interruption-responseblock(IRB)isextended| to include the extended-measurement word.| - In Chapter 17, I/O Support Functions:| Therequirementthatthemeasurement| blockbeupdatedwhensecondarystatus| is accepted is clarified.| Theextended-measurement-blockfacility| is added.| Theextended-measurement-wordfacility| is added.| - InChapter18,Hexadecimal-Floating-Point| Instructions,theMULTIPLYANDADD(four| instructions)andMULTIPLYANDSUBTRACT| (fourinstructions)instructionsprovidedbythe| HFP-multiply-add/subtract facility are added.| Theabovechangesmayaffectotherchapters| besidestheoneslisted. Alltechnicalchangesto| thetextortoanillustrationareindicatedbyaver-| tical line to the left of the change.Summary of Changes in EighthEditionTheeightheditionofthispublicationdiffersfromthe previous edition principally by containing:- Definitionsofanumberofnewinstructionsintroducedinz/ArchitectureandalsoaddedtoESA/390. Theseinstructionsinclude,butarenotlimitedto,thoseoftheextended-translation facility 2.- Additionalindirect-data-addressingfunctionsintroducedinz/ArchitectureandalsoaddedtoESA/390. Theseareadoublewordformat-2IDAWandtheabilityofallformat-2IDAWsofa channel program to specify either 2K-byte or4K-byte data blocks.- Definitionsofnewinput/outfacilitiesplacedinz/ArchitectureandalsoaddedtoESA/390.ThesearetheFICON-channelfacility,theORB-extensionfacility,andthechannel-subsystem-I/O-priority facility.The eighth edition contains minor clarifications andcorrectionsandalsothefollowingsignificantchanges relative to the previous edition:- In Chapter 1, Introduction: Thenewz/Architectureinstructionsarehighlighted. Theabilitytosimulatetheinstructionsoftheextended-translationfacility2bymeansoftheMVSCSRUNICmacroinstruction is referenced. ThenewI/Ofacilitiesandfunctionsarehighlighted.- In Chapter 3, Storage: Thedescriptionofthetranslation-lookaside buffer (TLB) is improved. Ifz/Architectureisinstalled,LOADREALADDRESS may use the TLB whether DATisonoroff,butTLBentriesstillareformed only if DAT is on. Bit29ofthetranslation-exceptionidentifi-cation,reallocations144-147,andtheoperandaccessidentification,reallocation162,aredescribed. Thesearerelatedtoapage-translationexceptionrecognizedby the MOVE PAGE instruction.Prefacexxiii Thestore-statusandmachine-checkarchitectural-modeidentificationatrealand absolute locations 163 is added. TheI/O-interruption-identificationwordatreal locations 192-195 is described.- In Chapter 4, Control: Onamodelonwhichz/Architectureisinstalled,recognitionofastorage-alteration PER event causes no more than4Kbytestobestoredbeginningwiththebytethatcausedtheevent,andthismayresultinpartialcompletionofaninterrup-tible instruction. BRANCHRELATIVEANDSAVELONGand BRANCH RELATIVE ON CONDITIONLONG are added to those instructions thatcause a successful-branching PER event. Storingofthearchitectural-modeidentifi-cationduringthestore-statusoperationisdescribed. Theset-architectureorderoftheSIGNALPROCESSORinstructionisadded. Thiscanbeusedtosetthearchitecturalmodeof the configuration to z/Architecture.- In Chapter 5, Program Execution: TheRSE,RSL,andRILinstructionformatsareadded,andanM:fieldisdescribedasanalternativeintheRSformat. ThedescriptionoftheART-lookasidebuffer (ALB) is improved.- InChapter6,Interruptions,thecrypto-operation exception is added.- In Chapter 7, General Instructions: Thefollowingnewinstructionsthathavebeenplacedinbothz/ArchitectureandESA/390 are added:- ADD LOGICAL WITH CARRY- BRANCHRELATIVEANDSAVELONG- BRANCHRELATIVEONCONDITIONLONG- DIVIDE LOGICAL- EXTRACT PSW- LOAD ADDRESS RELATIVE LONG- LOAD REVERSED- MULTIPLY LOGICAL- ROTATE LEFT SINGLE LOGICAL- SET ADDRESSING MODE- STORE REVERSED- SUBTRACTLOGICALWITHBORROW- TEST ADDRESSING MODE Thefollowinginstructionsoftheextended-translation facility 2 are added:- COMPARELOGICALLONGUNICODE- MOVE LONG UNICODE- PACK ASCII- PACK UNICODE- TRANSLATE ONE TO ONE- TRANSLATE ONE TO TWO- TRANSLATE TWO TO ONE- TRANSLATE TWO TO TWO- UNPACK ASCII- UNPACK UNICODE ThedefinitionsofPACKASCII,PACKUNICODE, UNPACK ASCII, and UNPACKUNICODEareclarifiedascomparedtotheirdefinitionsinz/ArchitecturePrinciplesof Operation, SA22-7832-00. Itisclarifiedthatthefollowinginstructionsperform multiple-access references to theirstorage operands:- CHECKSUM- COMPARE AND FORM CODEWORD- CONVERT UNICODE TO UTF-8- CONVERT UTF-8 TO UNICODE Itisclarifiedthatthefollowinginstructionsdonotnecessarilyprocesstheirstorageoperands left to right as observed by otherCPUs:MOVELONG,MOVELONGEXTENDED, and MOVE LONG UNICODE(whichisnewinthecurrenteditionofthispublicationbutappearsinSA22-7832-00withoutthisclarification). SpecialpaddingcharactersofMOVELONGandMOVELONGEXTENDEDspecifywhetherleft-to-rightprocessingshouldbeperformed,asobservedbyotherCPUs,andwhetherthedatabeingmovedshouldorshouldnotbeplacedinthecacheforavailabilityfor subsequent processing. TheMOVEINVERSEinstructionisdescribedasbeingbasicinESA/390,asopposedtobeingprovidedbyamove-inverse facility.xxiv ESA/390 Principles of Operation - In Chapter 8, Decimal Instructions, the TESTDECIMALinstructionoftheextended-translation facility 2 is added.- In Chapter 10, Control Instructions: TheCOMPAREANDSWAPANDPURGE,PAGEIN,andPAGEOUTinstructions are described. TheSTOREFACILITYLISTinstructionofz/Architecture,whichhasbeenplacedalso in ESA/390, is added. Itisclarifiedthatthefollowinginstructionsperform multiple-access references to theirstorage operands:- LOADADDRESSSPACEPARAME-TERS- RESUME PROGRAM- STORE SYSTEM INFORMATION- InChapter11,Machine-CheckHandling,storingofthearchitectural-modeidentificationduringamachine-checkinterruptionisdescribed.- InChapter12,OperatorFacilities,thecon-tentsofthefloating-point-controlregistercanbe altered and displayed.- InChapter13,I/OOverview,FICONandFICON-convertedI/Ointerfacesandtheframe-multiplex mode are introduced.- In Chapter 14, I/O Instructions: TheCANCELSUBCHANNELinstructionis described. TESTPENDINGINTERRUPTION,whenthesecond-operandaddressiszero,storesathree-wordI/O-interruptioncodeatreallocations184-195. Thenewthirdwordcontainsaninterruption-identificationwordthatfurtheridentifiesthesourceofthe I/O interruption.- In Chapter 15, Basic I/O Functions: TheORBisextendedtoeightwordsandnewlycontainsastreaming-modecontrol,modificationcontrol,synchronizationcontrol,format-2-IDAWcontrol,2K-IDAWcontrol,ORB-extensioncontrol,channel-subsystempriority,andcontrol-unitpri-ority. Adoublewordformat-2IDAWand4K-bytedatablocksoptionallydesignatedbyformat-2 IDAWs are added.- In Chapter 16, I/O Interruptions: Asecondary-CCW-address-validitybitandfailing-storage-address-formatbitareadded to the extended-report word. Atwo-wordfailing-storageaddressandasecondary-CCWaddressareaddedtotheformat-0 extended-status word.- In Chapter 17, I/O Support Functions: Control-unit-defertimeisadded. Thishasaneffectonthedevice-connecttimeanddevice-disconnecttimeinthemeasure-ment block. Onamodelwithz/Architectureinstalled,referencestothemeasurementblockbythemeasurement-block-updatefacilityaresingle-access references and appear to beword concurrent as observed by CPUs. Device-active-onlytimeisaddedtothemeasurement block. Thechannel-subsystem-I/O-priorityfacility,providingchannel-subsystempriorityandcontrol-unit priority, is added.Summary of Changes in SeventhEditionTheseventheditionofthispublicationdiffersfromthepreviouseditionprincipallybycontainingthedefinitionsoftheextended-TOD-clock,TOD-clock-control-override,extended-translation,andstore-system-informationfacilities. Theseventheditioncontainsminorclarificationsandcorrectionsandalsothefollowingsignificantchanges relative to the previous edition:- In Chapter 4, Control: TheETRsubclassmask,bit27ofcontrolregister0,andtheTOD-clock-control-overridecontrol,bit10of control register 14, are added. AnextensiontotheTODclock,andtheTOD programmable register, are added. Leap second 22 is added.- In Chapter 6, Interruptions: The ETR external interruption is added.Prefacexxv TheTOD-clock-sync-checkexternalinter-ruptionisaffectedbytheextended-TOD-clock facility.- InChapter7,GeneralInstructions,theCONVERTUNICODETOUTF-8,CONVERTUTF-8TOUNICODE,STORECLOCKEXTENDED,andTRANSLATEEXTENDEDinstructions are added.- InChapter10,ControlInstructions,theSETCLOCKPROGRAMMABLEFIELDandSTORESYSTEMINFORMATIONinstructionsare added.Theabovechangesmayaffectotherchaptersbesides the ones listed.Summary of Changes in SixthEditionThe sixth edition of this publication differs from thepreviouseditionprincipallybycontainingthedefi-nitionsofthebasicfloating-point,floating-point-support,andhexadecimal-floating-point(HFP)extensionfacilitiesandthebinary-floating-point(BFP),program-call-fast,resume-program,andtrapfacilities. Thesixtheditioncon-tainsminorclarificationsandcorrectionsandalsothefollowingsignificantchangesrelativetotheprevious edition:- InChapter2,Introduction,12floating-pointregistersandthefloating-point-controlregisterare added.- In Chapter 3, Storage: InthesectionPrefixing,thetermprefixareaischangedtomeanthe4K-byteareadesignatedbytheprefixinsteadofreal locations 0-4095. This change is con-sistentwithhowthetermhasbeenusedinthedefinitionoftheSETPREFIXinstruction. AssignedstoragelocationsforthePCF-entry-tableorigin,data-exceptioncode,andmachine-checkandstore-statusextended-save-area address are added.- In Chapter 4, Control: Bits22and23ofthePSWarerenamedtheHFP-exponent-underflowmaskandthe HFP-significance mask, respectively. TheAFP-registercontrolandextended-save-areacontrolareaddedinthecontrolregisters.RESUMEPROGRAMandTRAPcausebranch trace entries to be made.RESUMEPROGRAMandTRAPcausesuccessful-branchingPEReventstooccurandavalidATMID(addressing-and-translation-modeidentification)tobestored. Theuseofanextendedsaveareaforsaving floating-point registers 0-15 and thefloating-point-controlregisterbythestore-status operation is added. The store-extended-status-at-addressSIGNAL PROCESSOR order is added.- In Chapter 5, Program Execution: TheRRF,RXE,andRXFinstructionformats are added. Atrap-control-blockaddressandTRAP-enabledbitareaddedtothedispatchable-unit control table.- In Chapter 6, Interruptions: The exception names exponent overflow,exponentunderflow,significance,floating-pointdivide,andsquarerootarechangedtoHFPexponentoverflow,HFPexponentunderflow,HFPsignif-icance,HFPdivide,andHFPsquareroot, respectively. The reasons for recognizing a data excep-tionareexpandedtoincludereasonsrelatedtothenewfloating-pointfacilities.Whenadataexceptionisrecognizedforanoldreasonrelatedtodecimaloper-ands,itiscalledadecimal-operanddataexception. Thedetaileddescriptionofthereasons for recognizing a decimal-operanddataexceptionismovedfromChapter6to Chapter 8, Decimal Instructions. Whenaprograminterruptionforadataexceptionoccurs,adata-exceptioncode(DXC)maybestoredatreallocation147andplacedinthefloating-point-control(FPC)registertoindicatethereasonforthe exception. Theinstructionendingforadataexcep-tionmaybesuppressionwhenpreviouslyxxvi ESA/390 Principles of Operation itwastermination,dependingonthemodel. Theendingmaybecompletioninnew cases related to floating point. ThefigurePriorityofAccessExceptionshas superscripts added indicating when anexception is not applicable when not in theaccess-register mode.- InChapter7,GeneralInstructions,additionaldetailsareaddedtothedefinitionofthePERFORM LOCKED OPERATION instruction.- InChapter8,DecimalInstructions,thereasonsforrecognizingadecimal-operanddataexceptionaredescribed(thedefinitionismoved to here from Chapter 6).- Chapter9,Floating-PointOverviewandSupportInstructions,replacesthepreviousChapter9,Floating-PointInstructions. ThenewChapter9introducestheBFPandHFPoperations,definesinstructionsthatarecommontoBFPandHFPorthatconvertbetweenBFPandHFPdataformats,andsummarizesallfloating-pointinstructions.OthercontentsoftheoldChapter9aremovedtoChapter18,Hexadecimal-Floating-Point Instructions.- In Chapter 10, Control Instructions: ThePROGRAMCALLFAST,RESUMEPROGRAM,andTRAPinstructionsareadded. ThemethodofdescriptionusedinthefigurePriorityofExecution:PROGRAMRETURNischanged. Thetechnicalcontent of the figure is not changed.- InChapter11,Machine-CheckHandling,thestoringof16floating-pointregistersandthefloating-point-controlregisterinanextendedsaveareaduringamachine-checkinterruptionis added.- Chapter18,Hexadecimal-Floating-PointInstructions,isnew. ItcontainsdefinitionsofoldandnewinstructionshavingoperandsintheHFPdataformat. Also,alternatemne-monicsareassignedtosomeformsoftheLOADROUNDEDandMULTIPLYinstructions.- Chapter19,Binary-Floating-Point(BFP)Instructions,isnew. ItcontainsdefinitionsofnewinstructionshavingoperandsintheBFPdata format.- InAppendixA,NumberRepresentationandInstruction-Use Examples: Thetermfloating-pointnumberischangedtohexadecimal-floating-pointnumber. AnexampleoftheuseofthePERFORMLOCKEDOPERATIONinstructionisadded.Theabovechangesmayaffectotherchaptersbesides the ones listed.Summary of Changes in FifthEditionThefiftheditionofthispublicationdiffersfromthepreviouseditionprincipallybycontainingthedefi-nitionsofthebranch-and-set-authorityfacilityandtheperform-locked-operationfacility. Thefiftheditioncontainsminorclarificationsandcor-rectionsandalsothefollowingsignificantchangesrelative to the previous edition:- InChapter3,Storage,inthesectionHan-dlingofAddresses,thedispatchable-unitandprimary-spaceaccess-listoriginsandtheauthority-tableoriginusedbyaccess-registertranslationareunpredictablyrealorabsoluteaddresses instead of real addresses.- In Chapter 4, Control: Leap second 21 is added. Theeffectsofclearresetandpower-onresetonthelocksusedbyPERFORMLOCKED OPERATION are described.- In Chapter 5, Program Execution: ThesectionSubroutineLinkagewithouttheLinkageStackisenhancedtodescribeacallinglinkagemadebythePROGRAMTRANSFERinstructionwhenthepurposeistoreduceauthority. TheBRANCHANDSETAUTHORITYinstruc-tion then is introduced. ThechangedescribedforChapter3appearsthroughoutthesectionAccess-Register Translation.- InChapter6,Interruptions,thedefinitionsoftheprivileged-operation,protection,special-operation,andspecificationexceptionsareadded to or corrected.Prefacexxvii - InChapter7,GeneralInstructions,thePERFORMLOCKEDOPERATIONinstructionis added.- InChapter10,ControlInstructions,theBRANCHANDSETAUTHORITYinstructionis added.Theabovechangesmayaffectotherchaptersbesides the ones listed.Summary of Changes in FourthEditionThefourtheditionofthispublicationdiffersfromthepreviouseditionprincipallybycontainingthedefinitionsofthefollowingfacilities:called-spaceidentification,checksum,compareandmoveextended,andimmediateandrelativeinstruction.The fourth edition also contains additional informa-tionaboutthePER-2facility,anditdescribestheancillary-reportbitincertainfields. Thefourtheditioncontainsminorclarificationsandcor-rectionsandalsothefollowingsignificantchangesrelative to the previous edition:- In Chapter 4, Control: DescriptionsofanadditionalbitinthePERcode,theaddressing-and-translation-modeidentification,andthe PER STD identification are added. Leap second 20 is added.- In Chapter 5, Program Execution: Instruction formats RI and RSI are added. Relative branching is added. ThesectionCondition-CodeAlternativetoInterruptibility is added. Thecalled-spaceidentificationinthelinkage-stackstateentryformedbythestackingPROGRAMCALLinstructionisadded. Itisclarifiedthatastorage-operandfetchreferenceforaninstructioncanprecedetheexecutionoftheinstructionbyanunlimited amount of time. A programming note showing effects whenCPUserializationisorisnotperformedisadded.- In Chapter 7, General Instructions: The CHECKSUM instruction is added. TheCOMPARELOGICALLONGEXTENDEDandMOVELONGEXTENDEDinstructionsofthecompare-and-move-extended facility are added. Theinstructionsoftheimmediate-and-relative-instructionfacilityareadded.These are:- ADD HALFWORD IMMEDIATE- BRANCH RELATIVE AND SAVE- BRANCH RELATIVE ON CONDITION- BRANCH RELATIVE ON COUNT- BRANCHRELATIVEONINDEXHIGH- BRANCHRELATIVEONINDEXLOWOR EQUAL- COMPARE HALFWORD IMMEDIATE- LOAD HALFWORD IMMEDIATE- MULTIPLY SINGLE (two instructions)- MULTIPLY HALFWORD IMMEDIATE- TEST UNDER MASK HIGH- TEST UNDER MASK LOW- InChapter10,ControlInstructions,intheSTORECPUIDdefinition,thetermmodelnumberischangedtomachine-typenumber,andprogrammingnotesabouttheversioncodeandCPUidentificationnumberare added.- InChapter11,Machine-CheckHandling,theancillary-reportbitinthemachine-check-interruption code is described.- InChapter16,I/OInterruptions,theancillary-reportbitinthesubchannellogoutisdescribed.- InChapter17,I/OSupportFunctions,theancillary-reportbitinthechannel-reportwordis described.Theabovechangesmayaffectotherchaptersbesides the ones listed.Summary of Changes in ThirdEditionThethirdeditionofthispublicationdiffersfromthepreviouseditionprincipallybycontainingthedefi-nitionofthesubspace-groupfacility. Thethirdeditioncontainsminorclarificationsandcor-rectionsandalsothefollowingsignificantchangesrelative to the previous edition:- In Chapter 3, Storage:xxviii ESA/390 Principles of Operation Thevirtual-addressenhancementofsup-pression on protection is added. Fieldsofthesubspace-groupfacilityareaddedtotheASN-second-tableentryandthe segment-table designation. ForCPUtableentriesthatareaddressedbyrealorabsoluteaddresses,itisunpre-dictablewhethertheaddresswrapsoranaddressing exception is recognized. Allzerosmaybestoredatreallocation160duringasubspace-replacementoper-ation.- In Chapter 4, Control: AtraceentryforBRANCHINSUBSPACEGROUP is added. Aninstruction-fetchingPEReventforaninterruptibleinstructionmaybediscardedundercertainconditionswhenaunitofoperationoftheinstructionremainstobeexecuted. Leap seconds 18 and 19 are added.- In Chapter 5, Program Execution: TheBRANCHINSUBSPACEGROUPinstructionisintroducedinSubroutineLinkagewithouttheLinkageStackonpage5-10. Fieldsforthesubspace-groupfacilityareaddedtothedispatchable-unitcontroltable and the ASN-second-table entry. Effectsofthesubspace-groupfacilityontheinstructionsPROGRAMCALL,PROGRAMTRANSFER,PROGRAMRETURN,SETSECONDARYASN,andLOADADDRESSSPACEPARAMETERSareintroducedinSubspace-ReplacementOperations on page 5-59.- In Chapter 6, Interruptions: Itisclarifiedthataninstructionisconsid-eredtobeexecutedevenifithasanoddinstructionaddressorcannotbefetchedbecause of an access exception. Subspace-replacementexceptions(acol-lective name) are added.- In Chapter 8, Decimal Instructions, for ZEROAND ADD when the operands overlap and therightmost byte of the first operand is to the leftof the rightmost byte of the second operand, adata exception may or may not be recognized.- In Chapter 10, Control Instructions: TheBRANCHINSUBSPACEGROUPinstructionisadded,andsubspace-replacementoperationsareaddedtothedefinitionsofPROGRAMCALL,PROGRAMRETURN,PROGRAMTRANSFER,SETSECONDARYASN,andLOADADDRESSSPACEPARAME-TERS. TheaddressplacedingeneralregisterR1whenLOADREALADDRESSsetsanonzeroconditioncodeisrealorabsoluteinaccordancewiththetypeofaddressused during the attempted translation. ForMOVEPAGE(facility2),whenthefirstoperandisvalidinmainstorageandthesecondoperandisvalidinanunavail-ableexpanded-storageblock,astorage-alterationPEReventmayberecognized,and the change bit may be set, for the firstoperandeventhoughthefirst-operandlocation remains unchanged.- InChapter12,OperatorFacilities,amodelmayhave,asanalternativetoawaitindi-cator,ameansofindicatingatime-averagedvalue of the PSW wait-state bit.- In Chapter 16, I/O Interruptions: Theinitialstatusthatcausesasequencecodeof010binarytobeplacedinthesubchannellogoutisdescribedinSequence Code (SC) on page 16-35. Anauthorization-checkbitisaddedtotheextended-reportwordinaformat-0extended-statusword. Thebitindicates,whenone,thatthestartorresumefunc-tionwasterminatedbecausethechannelsubsystem is in the isolated state.- In Chapter 17, I/O Support Functions: Additionalconditionsunderwhichthedevice-connect-timefieldinthemeasure-ment block is not updated are described inDevice-Connect Time on page 17-5. ItisclarifiedthatanIPLprogramshouldnotbeplacedinthelow512bytesofstorage because that area is reserved.Prefacexxix - InAppendixI,EBCDICandOtherCodes,achartshowingcontrolcodesanda94-characterEBCDICcharactersetisreplacedbyatableshowingcontrolcodes,variousEBCDICcharactersetsandcodepages,ASCII,ISO-8,andIBM-PCcodepages, and BookMaster* symbols.Theabovechangesmayaffectotherchaptersbesides the ones listed.Summary of Changes in SecondEditionThesecondeditionofthispublicationcontainsminorclarificationsandcorrectionsandalsothefollowingsignificantchangesrelativetothepre-vious edition with TNL SN22-5400:- In Chapter 3, Storage: Thesuppression-on-protectionfacilityisdefined. Thecheckingofbits28-31or26-31intheASN-first-tableentryandbits30,31,and60-63intheASN-second-tableentryismade optional.- In Chapter 4, Control: Itismadeunpredictablewhetheraninstruction-fetchingPEReventisindicatedfor the first halfword of an instruction whenanaccessexceptionisrecognizedforthefirst halfword. Thestandardepochforthetime-of-day(TOD) clock is described in terms of Coor-dinatedUniversalTimeinsteadofGreenwich Mean Time.- In Chapter 7, General Instructions: Theinstructionsofthestring-instructionfacility,COMPARELOGICALSTRING,MOVESTRING,andSEARCHSTRING,are added. TheCOMPAREUNTILSUBSTRINGEQUALinstructionisadded. Thisinstruc-tionwasintroducedinESA/370buthasnot previously been described.- InChapter10,ControlInstructions,theSETADDRESSSPACECONTROLFASTinstruc-tion is added.- InChapter12,OperatorFacilities,adefi-nitionoftheeffectofin