ES ZC261-L4
-
Upload
seshu-bollineni -
Category
Documents
-
view
39 -
download
2
Transcript of ES ZC261-L4
BITS PilaniPilani Campus
BITS Pilani presentation
Rekha.AFaculty
BITS Pilani, Pilani Campus
Binary addition
0+0 =0
0+1=0
1+1=10=0+carry of 1 to the next position
1+1+1=11=1+carry of 1 to the next position
Illustration:
1001 11.011
+ 1111 +10.110
------------------ -------------------
11000 110.001
---------------------- ---------------------
Digital Arithmetic
BITS Pilani, Pilani Campus
Ones complement representation
In a binary number if we replace each 1 by 0 and each 0 by 1, we
obtain binary number which is known as the ones complement.
Example: write the 1’s complement of the binary number 101011
1’s complement is 010100
BITS Pilani, Pilani Campus
Two’s complement Representation
If 1 is added to the 1’s complement of a binary number, the resulting
number is known as the two’s complement of the binary number.
Example: Find the two’s complement of the number 10111001
1’s complement of the number: 01000110
01000110
+ 1
-----------------------------------
01000111 2’s complement
---------------------------------
BITS Pilani, Pilani Campus
Subtraction of the Binary Numbers
• Binary subtraction can be performed by adding the two’s complement of the subtrahend to the minuend
• If a carry is generated discard the carry.
• If the final carry is 1, the answer is positive, i.e the minuend is greater than the subtrahend.
• If the final carry is 0, the answer is negative , i.e the minuend is smaller than the subtrahend and the answer is in the two’s complement form.
BITS Pilani, Pilani Campus
Perform Binary subtraction
(i) Subtract 7 from 5
Binary representation of 5: 0101
Binary representation of 7: 0111
1’s complement of 7 : 1000
2’s complement of 7: 1001
0101
+ 1001
--------------------
1110 Carry is 0, so result is a negative number
----------------- and is in two’s complement form.
BITS Pilani, Pilani Campus
Multiplication of Binary Numbers
The multiplication of binary numbers is done similar to the decimal number .
Multiplication for unsigned numbers
1001
x 1011
---------
1001
1001
0000
1001
------------------
1100011
BITS Pilani, Pilani Campus
Multiplication of signed numbers
• Case 1(when both numbers are negative)
When Two numbers are negative, they will be in the two’s complement form.
The two numbers are multiplied.
The product is kept a positive number and given the sign bit of 0.
• Case 2(when one is positive and other is negative)
The negative number is converted to its two’s complement form.
Multiply the numbers.
Since the product has to be negative , the product is changed to 2’s complement form and given the sign bit 1.
BITS Pilani, Pilani Campus
A combinational circuit consists of logic gates whose outputs at any time are determined from the present combination of the input.
A combinational logic gates react to the values of the signals at their inputs and produce the value of the output signal, transforming the binary information from the given input data to a required output data.
The block diagram of the combinational circuit
COMBINATIONAL LOGIC
BITS Pilani, Pilani Campus
• Sequential circuits employ storage elements in addition to the logic gates
• Their outputs are a function of the present inputs and the state of the storage elements and also on the past input.
• The state of the storage element is a function of previous inputs.
The block diagram of the sequential circuit
BITS Pilani, Pilani Campus
Two main types of sequential circuits
• Asynchronous sequential circuit
A sequential circuit whose behavior depends upon the sequence in which the input signals change is referred to as asynchronous sequential circuit.
The output will be affected whenever the input change.
BITS Pilani, Pilani Campus
• Synchronous sequential circuit
Sequential circuit whose behaviour can be defined from the knowledge of its signals at discrete instants of time is referred to as synchronous sequential circuit.
The memory elements are affected only at discrete instant of time.
The timing is achieved by a device called system clock which generates a periodic train of clock pulses.
BITS Pilani, Pilani Campus
Input
BITS Pilani, Pilani Campus
Analysis procedure
• The first step is to make sure that the given circuit is combinational circuit or sequential.
• Proceed to obtain the output Boolean function or truth table.
BITS Pilani, Pilani Campus
Design Procedure
• From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each.
• Derive the truth table that defines the required relationship between inputs and outputs.
• Obtain the simplified Boolean functions for each output as a function of the input variables.
• Draw the logic diagram and verify the correctness of the design(manually or by simulation)
BITS Pilani, Pilani Campus
Design a combinational circuit to output the 2’s complement of a 4 bit binary number.
BITS Pilani, Pilani Campus
The Minterm expressions are
BITS Pilani, Pilani Campus
The karnaugh maps can now be drawn
00
01
11
10
AB
BITS Pilani, Pilani Campus
Design a combinational circuit to convert BCD to Excess-3
The truth table for BCD to Excess-3
BITS Pilani, Pilani Campus
BITS Pilani, Pilani Campus
Implementation of BCD to Excess 3
BITS Pilani, Pilani Campus
• A binary adder- subtractor is a combinational circuit that performs the arithmetic operations of addition and subtraction of binary numbers
• A combinational circuits that performs the addition of two bits is called half adder.
• A combinational circuits that performs the addition of three bits is called full adder.
BINARY ADDER-SUBTRACTOR
BITS Pilani, Pilani Campus
HALF ADDER
Block Diagram of Half Adder Truth Table of Half Adder
BITS Pilani, Pilani Campus
Implementation of Half Adder
BITS Pilani, Pilani Campus
FULL ADDER
• A Full adder is a combinational circuit that performs the arithmetic sum of three bits.
• It Consists of three inputs and two outputs.
Block Diagram
BITS Pilani, Pilani Campus
Truth Table of Full Adder
S = x’y’z + x’yz’ + xy’z’ + xyzC = xy + xz + yz
BITS Pilani, Pilani Campus
K- Map for Full Adder
yz
x 00 01 11 10
0
1
S = x’y’z + x’yz’ + xy’z’ + xyz
m0 m1
1
m3 m2
1
m4
1
m5 m7
1
m6
BITS Pilani, Pilani Campus
K- map for Full Adder
yz
x 00 01 11 10
0
1
C = yz + xz + xy
1
1 1 1
BITS Pilani, Pilani Campus
Implementation of full adder in sum of product form
BITS Pilani, Pilani Campus
Implementation of full adder using 2 half adders
S
C
BITS Pilani, Pilani Campus
Four Bit Binary Ripple Adder
BITS Pilani, Pilani Campus
Half Subtractor
A Half subtractor has two inputs and two outputs.
Block diagram of half subtractor Truth table of half subtractor
BITS Pilani, Pilani Campus
Implementation of Half subtractor using gates