EPROM, PROM & ROM

24
1 EET 3350 Digital Systems Design Textbook: John Wakerly Chapter 9: 9.1 Memory Read-Only Memory: ROM, PROM, EPROM

description

Lec 20

Transcript of EPROM, PROM & ROM

Page 1: EPROM, PROM & ROM

1

EET 3350 Digital Systems Design

Textbook: John Wakerly Chapter 9: 9.1

Memory

Read-Only Memory: ROM, PROM, EPROM

Page 2: EPROM, PROM & ROM

Memory• Sequential circuits all depend upon the presence of

memory– A flip-flop can store one bit of information

– A register can store a single “word” • typically 32 or 64 bits

– Memory stores a large number of words

• Memory stores this large amounts of data using two primary device types– Read Only Memory (ROM, PROM, EPROM, EEPROM)

– Random Access Memory (RAM)• Static RAM (SRAM)• Dynamic RAM (DRAM)

2

Page 3: EPROM, PROM & ROM

Memory• You can think of memory as being

one big array (list) of data– The address serves as an array

index

– Each address refers to one word of data (e.g., 8-bits, 16-bits, etc.)

• You can read (or modify) the data at any given memory address, just like you can read (or modify) the contents of an array at any given index

3

Address Data 00000000 00000001 00000002

.

.

.

.

.

.

.

.

.

. FFFFFFFD FFFFFFFE FFFFFFFF

word

0110101100111101

1011111100100100

1001110011110111

0110101111010000

1100101000110001

0000101100001111

Page 4: EPROM, PROM & ROM

MemoryMemory signals fall into three groups:• Address bus - selects one of many memory locations• Data bus -

– Read (ROM/RAM): the selected location’s stored data is put on the data bus

– Write (RAM): The data on the data bus is stored into the selected location

• Control signals - specifies what the memory is to do– Control signals are usually active low

– Most common signals are:• CS: Chip Select; must be active to do anything• OE: Output Enable; active to read data• WR: Write; active to write data

4

Page 5: EPROM, PROM & ROM

Memory• Memory is not a single chip (device)

– Made up of many identical or similar devices

– A specific device (part of memory) is selected by control signals and the address lines (bus)

– All devices are connected to the same bus, and see the signals at the same time

5

Page 6: EPROM, PROM & ROM

Memory • Memory Connection to CPU

– RAM and ROM chips are connected to a CPU through the data and address buses

– The low-order lines in the address bus select the byte within the chips and other lines in the address bus select a particular chip through its chip select inputs

6

Page 7: EPROM, PROM & ROM

Memory • Location - the smallest selectable unit in memory

– Has 1 or more data bits per location

– All bits in location are read/written together

– Cannot manipulate single bits in a location

• For k address signals, there are 2k locations in a memory device

• Each location contains an n-bit word• Memory size is specified as

– #loc x bits per location • 224 x 16 RAM - 224 = 16M words, each 16 bits long• 24 address lines, 16 data lines

– #bits • The total storage capacity is 224 x 16 = 228 bits

7

Page 8: EPROM, PROM & ROM

Memory • Memory sizes are usually specified in numbers of

bytes (1 byte= 8 bits)• The 228-bit memory on the previous page translates

into:

228 bits / 8 bits per byte = 225 bytes

• With the abbreviations below, this is equivalent to 32 megabytes

8

Prefix Base 2 Base 10 K Kilo 210 = 1,024 103 = 1,000 M Mega 220 = 1,048,576 106 = 1,000,000 G Giga 230 = 1,073,741,824 109 = 1,000,000,000

Page 9: EPROM, PROM & ROM

Memory• Non-volatile

– If un-powered, its content is retained

• Read-only – normal operation cannot change

contents

• k-bit ADRS specifies the address or location to read from

• A Chip Select, CS, enables or disables the RAM/ROM

• An Output Enable, OE, turns on or off tri-state output buffers

• Data Out will be the n-bit value stored at ADRS

9

2k x n ROM

ADRS Data Out

kn

CS

OE

Δ

Page 10: EPROM, PROM & ROM

Memory • Content loading (programming) done many

ways depending on device type– ROM: mask programmed, loaded at the factory

• hardwired - can’t be changed• embedded mass-produced systems

– PROM: OTP (One Time Programmable), programmed by user, using an external programming device

– EPROM: reusable, erased by UV light, programmed by user, using an external programming device

– EEPROM: electrically erasable, clears entire blocks with single operation, programmed in-place (no need to remove from circuit board)

10

Page 11: EPROM, PROM & ROM

Read-Only Memories• Definition

– ROM consists of an array of semiconductor devices interconnected to store an array of memory data.

– Data can only be read, it cannot be changed under normal operating conditions.

• Types of ROM– Mask programmable ROM (at the factory)

– Field-Programmable ROM (PROM)

– UV-Erasable and re-Programmable ROM (EPROM)

– Electrically-Erasable and re-Programmable ROM (EEPROM)

– Flash

11

Page 12: EPROM, PROM & ROM

Read-Only Memories• The logic symbol below is used in circuit diagrams

– Focus is on the basic structure of a ROM

– A combinational logic circuit

12

Page 13: EPROM, PROM & ROM

Logic-in-ROM Example• As we discussed previously, a ROM is simply a

combinational circuit, basically a truth-table lookup– Can perform any combinational logic function

– Address inputs = function inputs

– Data outputs = function outputs

13

(address) (data)

Page 14: EPROM, PROM & ROM

Logic-in-ROM Example• Two alternative implementations for the 3-input, 4-output

logic function– 2-to-4 decoder with output polarity control

14

Page 15: EPROM, PROM & ROM

4x4 Multiplier Example• ROM implementation of a 4x4 unsigned binary multiplier

– Multiplier and multiplicand form the address– Product is pre-programmed into the storage location

15

Page 16: EPROM, PROM & ROM

4x4 Multiplier Example• ROM contents for the 4x4 unsigned binary multiplier

16

x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF

Page 17: EPROM, PROM & ROM

Internal ROM Structure• Typical implementation of “primitive” ROM

17

55

active lowactive low

data outputdata output

Diode means a Diode means a “1” is stored at “1” is stored at this locationthis location

Page 18: EPROM, PROM & ROM

ROM• Commercial ROM types

18

Page 19: EPROM, PROM & ROM

19

Typical Commercial EEPROMs• Logic symbols for representative EEPROMs

Page 20: EPROM, PROM & ROM

ROM Control and I/O Signals• n Address lines

– An-1 … A0

• b Data lines– Db-1 … D0

• Chip Select– One or more

– Active low

• Output Enable– Active low

• Tri-state output buffers

20

Page 21: EPROM, PROM & ROM

21

ROM Timing

• tAA (access time from address): propagation delay from stable address inputs to valid data output

• tACS ( access time from chip select): propagation delay from time CS is asserted until the valid data output

• tOE (output-enable time): propagation delay from time OE and CS are asserted until the tri-state drivers have left Hi-Z state

• tOZ (output-disable time): propagation delay from time OE and CS are negated until the tri-state drivers have entered Hi-Z state

• tOH (output-hold time): the length of time the outputs remain valid after a change in the address inputs, or after OE and CS are negated

Page 22: EPROM, PROM & ROM

22

ROM Timing

• tAA access time from address

• tACS access time from chip select

• tOE/tOZ output-enable/disable time

• tOH output-hold time

Page 23: EPROM, PROM & ROM

23

ROM -Advantages and Disadvantages

• Ease of speed and design• For moderately complex function a ROM-based circuit is

usually faster than a circuit using multiple SSI/MSI devices and PLDs

• The program that generates the ROM contents can easily be structured to handle unusual or undefined cases that would require additional hardware in any other design. e.g. the adder program easily handles out-of-range sums.

• A ROM’s function is easily modified just by changing the stored pattern, usually without changing any external connections

• The prices of ROMs are dropping and densities increasing making them more economical and expanding the scope with a single chip

Page 24: EPROM, PROM & ROM

24

ROM -Advantages and Disadvantages

• May consume more power• For functions with more inputs a ROM based circuit is

impractical because of the limit on ROM sizes that are available