MICROPROCESSOR

Elektor Electronics 1/2001

Emulator for 27C256 EPROM with RS232 control

Design by B. Legrand and D. Mautaulon

Going through ourarchives we discov-ered that it’s beenalmost ten yearssince we publishedan EPROM emula-tor. The version wepropose in this arti-cle should meettoday’s demands ofhobbyists wishing todebug microcon-troller systemsbased on anEPROM. We havechosen the 27C256because it is cheapand currently themost widely usedEPROM in thehobby area.

36

microcontroller is used. The main reason forchoosing this device is that it offers on-chipserial I/O as well as EPROM to store thefirmware that handles the code reception andcontrol of the emulator.

Practical circuit

By and large, the circuit diagram shown inFigure 2 follows the general structure of theblock diagram. In fact, all building blocks dis-cussed above are fairly easy to find back inthe schematic.

IC1, a MAX232, handles the classic func-tion of converting the ±10-V signal levels onthe RS232 lines to logic levels (+5 V/0 V), intwo directions. The MAX232 allows themicrocontroller in the circuit to communicatewith the PC via the RS232 port. Althoughmany PCs these days are capable of handlingserial signals with a swing of 5 V, simplyomitting the MAX232 would require the RxDand TxD signals to be inverted!

IC2 is the microcontroller type AT89C2051.It controls latches IC3 and IC4 as well asbuffers IC6, IC7 and IC8. These integrated cir-cuits ensure the correct interfacing with RAMIC5. In this context, ‘correct’ means that theRAM may be accessed by either the micro-controller or the external (i.e., target) circuit,but never at the same time.

The RAM in fact emulates (mimics) the(E)PROM which has been removed form thetarget circuit. When the target circuit hasaccess to the RAM, it will behave as if a sys-tem (E)PROM was installed, hence the term‘emulator’. To be able to pull off this trick, theRAM requires two peripheral devices. From

An EPROM emulator is a develop-ment tool designed to facilitate codedebugging and code writing jobs oncircuits incorporating an EPROM(electrically erasable read only mem-ory). An EPROM, as most of you willknow, can not be reprogrammedbefore its previous contents hasbeen erased through exposure to acertain amount of ultraviolet (UV)light. So, even for the smallest modi-fication to the code in your EPROM,you need to do a complete erase-and-reprogram cycle, which istedious and costly given the timelost and the price of an UV eraserbox.

An EPROM emulator obviatesthese problems by allowing you todebug, rewrite and download codeas many times as you like, until thedesired system operation isachieved, all without having to erasea single EPROM. Having extensivelytested the target program, you needto program an EPROM just once yetrest assured that it will work asplanned.

Meanwhile, in this day and age ofFlash reprogrammable and ISP (in-system programmable) devices, it isfair to reflect on the advantages, ifany, of an EPROM emulator. Also,one can not fail to recognise thetrend towards ever larger memorycapacities.

Despite the above trends, there isstill a fair number of circuits based

on microcontrollers running codefrom an external EPROM. These con-trollers include devices from the 8051series, the 68HC11 and 80C5xx. It isprecisely in this area where the pre-sent emulator will be highly valued.

Principle of operation

The block diagram shown in Fig-ure 1 is classic and typical for thistype of application.

The underlying principle of anEPROM emulator is that it replaces‘dead’ memory like ROM or EPROMby ‘live’ memory (RAM) with double(two-port) access. The RAM isflanked by two latches and sup-ported by a microcontroller.

As in any EPROM emulator that’sany good, the heart of the circuit is aRAM device (here, IC5) which essen-tially replaces the (E)PROM of thetarget (or ‘host’) system. The RAM issurrounded by latches (IC3 and IC4)and buffers (IC6, IC7 and IC8). Theexact function of these componentswill be discussed a bit further on.

The distinctive feature of the pre-sent EPROM emulator (as comparedwith traditional designs) is the pres-ence of a microcontroller (IC2). Thiscomponent looks after the control ofthe latches and the RAM, and alsohandles the correct reception (fromthe PC) and processing of the objectcode to be transferred to the targetsystem. Here, an Atmel 89AT2051

MICROPROCESSOR

371/2001 Elektor Electronics

Technicalfeatures– Emulates the most widely used

EPROM type 27C256

– RS232 controlled

– Employs HyperTerminal for data

transfer between PC and

EPROM simulator.

– Recognizes industry-standard

IntelHex format

– May be adapted to suit 27C64

and 27C128 by modifying circuit

around pins 26 and 27. Support

for 27C512 also possible with

some hardware and software

modifications.Figure 1. Block diagram of the 27C256 EPROM emulator, with the Atmel microcontrollerclearly at the hub of things.

RAMIC5

EPROMIC9

Buffer

IC7

Buffer

IC8

Buffer

IC6

Data

D0...D7

D0...D7

D0...D7

D0...D7

D0...D7

D0...D7

000153- 11

A8...A14

A8...A14

A0...A7

A8...A14

A0...A14

A0...A7

A0...A7

D0...D6

ProcessorIC2

LatchIC3

RS232IC1

LatchIC4

one side, the emulator electronics enables theobject code under test to be written into theRAM, while from the other side the external(host) system can access the RAM to readcode which the host microcontroller willeventually execute.

Latches IC3 and IC4 connect the host sys-tem address lines to the RAM. Depending oncommands received from the microcontroller,these ICs transfer the data on the internaldatabus, D0-D7. Each of the latch enableinputs is controlled by an individual I/O lineof the central processor. This configurationallows the processor to control the RAMaddress bus. Once the target program isstored in RAM, the two latches go into high-

impedance mode to avoid contentionproblems when the system switchesto emulation mode, i.e., with theRAM effectively connected into thetarget system.

Buffers IC6, IC7 and IC8 ensurethe quasi-connection of the RAMaddress and datalines to the exter-nal (host) circuit.

Power supply

The 27C256 EPROM emulator maybe powered in two ways. The first,which we will treat as the ‘standard’method, consists of powering the cir-

cuit by means of a mains adapter.The on-board power supply con-

sists of a three-pin voltage regulatortype 7805 (IC10) in a classic config-uration. This component providesthe +5-V regulated supply voltage tothe emulator circuitry. Because only100 mA or so of output current isrequired, the 7805 has an unde-manding job in this circuit. Diode D1protects the circuit against reversepolarised input voltages. LED D2acts as a power on/off indicator.

The second method consists ofpowering the emulator from the tar-get (host) system, which will be pos-

MICROPROCESSOR

38 Elektor Electronics 1/2001

AT89C2051

P3.2

P3.3

P1.0

P1.1P3.0

P3.1

P3.4

P3.5

IC2

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

P3.7

RST

X1 X2

20

10

12

13

14

15

16

17

18

19

11

5 4

2

3

1

6

7

8

9

62256

IC5

A10

A11

A12

RAM

A13

A14

10A0

A1

A2

A3

A4

A5

A6

A725

A824

A921

23

1422

OE

20CS

28

11D0

12D1

13D2

15D3

16D4

17D5

18D6

19D7

27

WR

26

9

8

7

6

5

4

3

2

1

X1

12MHzC11

33p

C12

33p

C2

10µ35V

C1

10µ35V

MAX232A

T1OUT

T2OUT

R1OUT

R2OUT

R1IN

IC1

T1IN

T2IN

R2IN

C1–

C1+

C2+

C2–

11

12

10

13

14

15

16V+

V-

7

8 9

3

1

4

5

2

6

K1

1

2

3

4

5

6

7

8

9

5V

D0

D1

D2

D3

D4

D5

D6

D7

D0

D1

D2

D3

D4

D5

D6

D7

D0

D1

D2

D3

D4

D5

D6

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

T1

BS170

R3

12

k

5V

74HCT573

IC3

12

13

14

15

16

17

18

19

EN

11C1

1D

2

3

4

7

8

9

5

6

1

74HCT573

IC4

12

13

14

15

16

17

18

19

EN

11C1

1D

2

3

4

7

8

9

5

6

1

T2

BS170

R7

12

k

5V

27C256

EPROM

IC9

A10

A11

A12

VPP

A13

A14

10A0

A1

A2

A3

A4

A5

A6

A725

A824

A921

23

14 22

OE

20

CS

28

11D0

12D1

13D2

15D3

16D4

17D5

18D6

19D7

26

27

9

8

7

6

5

4

3

2

1

74HCT541

IC6

11

12

13

14

15

16

17

18

19EN

2

3

4

7

8

9

5

6

&1

74HCT541

IC7

11

12

13

14

15

16

17

18

19EN

2

3

4

7

8

9

5

6

&1

74HCT541

IC8

11

12

13

14

15

16

17

18

19EN

2

3

4

7

8

9

5

6

&1

DE0

DE1

DE2

DE3

DE4

DE5

DE6

DE7

DE0

DE1

DE2

DE3

DE4

DE5

DE6

DE7

D0

D1

D2

D3

D4

D5

D6

D7

D0

D1

D2

D3

D4

D5

D6

D7

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

AE0

AE1

AE2

AE3

AE4

AE5

AE6

AE7

AE8

AE9

AE10

AE11

AE12

AE13

AE14

AE0

AE1

AE2

AE3

AE4

AE5

AE6

AE7

AE8

AE9

AE10

AE11

AE12

AE13

AE14

5V

5V

C5

100n

C17

10µ35V

C1610µ

35V

R2

1k

5

D3R4

10

k

S1

RESET

C14

100n

C8

100n

7805

IC10

C7

100n

C3

47µ

D1

1N4001

5V

R1

1k

5

D2

5V

8x 10k1

2 3 4 5 6 7 8 9

R8

5V

IC6

20

10

C15

100nIC7

20

10

C6

100nIC8

20

10

C4

100n

R5

4k7

R6

4k7

5V

IC3

20

10

C9

100nIC4

20

10

C13

100n

5V

5VTARGET

TARGET

RESET(H)

RESET(L)

C10

1µ

5V

16V

JP1 1

3

2

>9V100mA

35V

000153 - 12

Figure 2. Circuit diagram of the 27C256 EPROM emulator.

tor may be divided into two phases: (1) load-ing the RAM, and (2) simulating an (E)PROMin the target system.

For the first task, the PC transmits, via itsserial port, the hexadecimal code to be storedin the pseudo EPROM. For the second func-tion, if the target system is to gain access tothe code, it is necessary for the microcon-troller to pull its port line P3.2 logic Low toactuate 3-state drivers IC7 and IC8. TwoFETs, T1 and T2, keep the host system in thereset state.

Let’s see how this works in more detail. Atpower-on, the microcontroller, IC2, preparesall circuitry for data to be written into theRAM. This is done by pulling all lines of portP3 to logic High, with the exception of P3.5and P3.7.

For the microcontroller to get control overthe RAM it has to pull port line P3.2 to logicHigh.

sible in most cases because +5 voltswill be present for the digital cir-cuitry around the (E)PROM. If youenvisage using this method all thetime, you may omit componentsIC10, diode D1 and capacitor C3 fromthe emulator circuit.

Jumper JP1 (located near thevoltage regulator) allows you toselect between internal and externalpowering.

The serial link

The communication between the PCand the emulator consists of two-way traffic via the RS232 port, forwhich suitable circuitry and cablelines have to be present.

On the emulator board, the RS232interface consists of a MAX232 (IC1)

in its standard application circuitwith four pump capacitors. Sure, wecould have used the SMA version ofthe MAX232 and enclosed the com-plete serial interface in a sub-D con-nector case for easy connection thePC. However, to keep constructionas easy as possible we decided to fitall the parts that make up the inter-face on the emulator board. Thischoice also enables an off the shelfserial cable to be used.

A note about the RS232 link —this should consist of a standardRS232 cable, i.e., not one with‘crossed wires’ (also known asnull/zero-modem cable).

How it works

The operation of the EPROM emula-

MICROPROCESSOR

391/2001 Elektor Electronics

Figure 3a. Component mounting plan of the circuit board designed for the 27C256 EPROM emulator.

C1

C2

C3

C4

C5

C6

C7

C8

C9

C10C

11C

12

C13

C14

C15

C16

C17

D1

D2

D3

GA

T

GA

T1

GA

T2

GA

T3

HOEK1

HO

EK

2

HOEK3

HO

EK

4

IC1

IC2

IC3

IC4

IC5

IC6 IC7

IC8

IC9

IC10

JP1

K1

R1

R2

R3

R4

R5

R6

R7

R8

S1

T1

T2

X1

12

3

0

+

RESET

RESET

000153-1

COMPONENTS LIST

Resistors:R1,R2 = 1kΩ5R3,R7 = 12kΩR4 = 10kΩR5,R6 = 4kΩ7R8 = 10kΩ 8-way SIL array

Capacitors:C1,C2,C16,C17 = 10µF 35VC3 =47µF 35VC4-C9,C13-C15 =100nFC10 =1µF 16VC11,C12 =33pF

Semiconductors:D1 = 1N4001D2,D3 = high efficiency LEDT1,T2 = BS170IC1 = MAX232 (Maxim)IC2 = AT89C2051 (Atmel), programmed,

order code 000153-41IC3,IC4 = 74HCT573IC5 = 62256 (RAM)IC6,IC7,IC8 = 74HCT541IC9 = EPROM being emulatedIC10 = 7805

Miscellaneous:K1=9-way sub-D socket (female), PCB

mountPC1-PC4= solder pinJP1= 3-way SIL pinheader with jumperS1= pushbutton, 1 make contactX1=12MHz quartz crystalPCB, order code 000153-1 (see Readers

Services page)Disk, project software, order code 000153-

11 (see Readers Services page)

To be able to load the RAM, port P1 is sup-plied with the high address of the first data-byte. Next, the 3-state driver IC4 is openedand closed again by means of port line P3.5in order to block this address.

The above sequence is repeated for thelow address, this time with the aid of port lineP3.7 controlling another 3-state driver, IC3.

Port line P3.2 of the AT89S2015 microcon-troller is programmed to switch the outputs ofbuffers IC6, IC7 and IC8 to high-impedance(tri-state), which is necessary to ward off alldisturbances caused by the external electron-ics from the RAM during the write process.

The same signal is also inverted by thecombination T1-R3. The inverted control sig-nal serves to actuate IC3 and IC4 in such away that the RAM address lines are properlydriven. The control signal on P3.2 is put to thedisposal of the target circuit by a pair of sol-der pins, RESET(L) and RESET(H). One ofthese signals may be used to keep the target

system in the reset state while theRAM is being filed with object code.

Once the complete object codefile has landed in the RAM, themicrocontroller in the emulator pro-duces a message on the RS232 port.

The PC has to send the objectcode file in IntelHex format, via itsRS232 port. The processor on theemulator board looks after the correctreception of the file (LED D3 will lightwhile data is being received from thePC), and arranges for each databyteto be written into the RAM at theproper location. This is achieved byIC2 copying address lines A0-A7 onto port P1 and when done producinga pulse on P3.7. Latch IC3 copies thisword. The same process is repeatedwith address group A8-A13. Thedata transferred by these addressesare latched in IC4 when a pulse

appears on port line P3.5. Finally, theactual databyte is copied on to P1,followed by a Low pulse produced onport line P3.3. The latter drives thewrite (WR) input of the RAM. Whena falling pulse edge appears at thisinput, the RAM transfers the data-word on port P1 to the specifiedaddress.

The same procedure is followedfor the transfer of all datawords thatmake up the object code.

Once the complete IntelHex filehas been received, the centralprocessor switches the circuit tosimulation mode. More specifically,the RAM is switched to read modeby pulling port line P3.3 Low andenabling the RAM output drivers bypulling OE (output enable) Low. Thisis achieved by controlling P3.4.

Pulling P3.3 logic Low also

MICROPROCESSOR

40 Elektor Electronics 1/2001

Figure 3b. Copper track layout of the circuit board designed for the 27C256 EPROM emulator. This board is double-sided and through-plated.

(C) E

LEK

TOR

000153-1

Hexadecimal (a.k.a. IntelHex) which is awidely used format for object code file trans-fer between PCs and programmers. HyperT-erminal is part and parcel of Windows 95 and98 so everyone running Windows on his/herPC should have it (you’ll find it under Pro-grams → Accessories → Communications).The IntelHex file is transferred using theASCII transmission mode (and not, as youmay have expected, a protocol like Kermit or Z-modem).

The communication parameters are set to4800 bits/s, 8 Databits, No parity, 1 Stop bit(4800,N,8,1)

In HyperTerminal, select the function‘Send Textfile’.

It is also possible to use DOS for the com-munication between the PC and the emula-tor. DOS users may use this command line:

COPY INTEL.HEX COM1:

Linux users will typically employ

Cat INTEL.HEX \dev\xxx

Where xxx is the port to which the EPROMemulator is connected.

(000153-1)

For further reading:EPROM Emulator II, B.C. Zschocke and N. Breidohr, Elektor Electronics July/August and September 1992.

enables the outputs of buffers IC7and IC8, plus it switches the latchoutputs to high-Z (tri-state) bymeans of the EN (enable) inputs.

In addition to these importantfunctions, the P3.3 signal disablesthe two RESET outputs of the circuit.With one the two RESET outputssuitably connected to the target cir-cuit, this will be automatically heldin its reset state while the RAM isbeing loaded with the object codefile. Once the RAM is filled, the tar-get circuit is automatically re-ini-tialised (very handy if the target cir-cuit does not have a dedicated resetbutton or similar).

Port line P3.4 drives the RAM insuch a way that the memory chipconstantly places data on the inter-nal databus.

To prevent the RAM from supply-ing data on the external databus, thetwo enable inputs of buffer IC6 areconnected to OE (output enable )and CS (chip select) lines of theexternal electronics. This approachguarantees the correct transfer ofdata from the RAM to the externaldatabus whenever the target systemaddresses the EPROM simulator.

If new data has to be written intothe RAM, you have to press theRESET button to start the file load-ing process.

Building the EPROMEmulatorAs evidenced by the introductoryphotograph with this article, itwould have been possible to makethe emulator board even more com-pact, for example, by ‘moving’ theMAX232 serial interface to the serialconnector casing. As discussedabove, this option was not followedto ensure that everyone can buildthe present circuit from regular sizecomponents.

The copper track layout and com-ponent mounting plan of the emulatorboard are given in Figure 3. Fittingthe parts on the board should notcause problems and a spot-on work-ing construction, we feel, should bewithin the capacity of most of ourreaders. The board being double-sided and through-plated, it does nothave a single wire link, which other-wise is the most frequently forgotten‘component’!

As customary with this type ofproject, it is best to start with thelow-profile components like resis-tors, capacitors and transistors. Payattention to the orientation of SILresistor array R8, of which the pinwith the dot (indicating the commonconnection) should be at the edge ofthe board. To cut costs, you may fitonly three (high quality) IC sockets,one for the processor, one for theRAM and one for flatcable betweenthe emulator and the EPROM in thetarget circuit. Note that IC7 is fittedthe other way around as comparedwith the other ICs on the board(except IC1 and IC10).

Give the circuit a thorough check,including a supply voltage check onall ICs, before fitting the processorand the RAM into their sockets. LEDD2 will light to indicate the presenceof the supply voltage.

The software

The program stored in the Atmelmicrocontroller has been written toallow the Windows HyperTerminalcommunications utility to talk to theEPROM emulator.

The code transfer from the PC tothe emulator is via a serial connec-tion running at 4,800 bit/s.

The emulator recognises Intel

MICROPROCESSOR

411/2001 Elektor Electronics

Figure 4. Finished prototype of 27C256 EPROM emulator.