EMC Analysis for a PCB Mounted Switching regulator using ...

EMC Analysis for a PCB Mounted Switching regulator using Electromagnetic simulator

A Simple and Practical Measurement-based Modeling Method Proposal for Switching Regulator

A Simple PI Simulation Scheme Using the Model

Mitsuharu UmekawaDec. 1st , 2011

EDA Application EngineeringElectronic Measurement GroupAgilent Technologies

2011/12/1MWE2011-Workshop-04 Yokohama1

MWE2011, EMC Technology Considering RF Noise, Workshop #4Sponsored by IEICE APMC Japan National Committee

Contents

1. Introduction – SI/PI/EMC2. PDN modeling issue – VRM Measurement-based modeling3. Measurement-based DCDC Converter modeling• Evaluation board for VRM• Measurement• De-Embedding connector portion to extract DCDC converter behavior4. PI analysis using the VRM model• Evaluation board for other than VRM• Estimating SI/EMI by simulation using EM and VRM model• Comparison between simulation and measurement and validity discussion 5. Conclusion


SI/PI/EMC


Signal Integrity EMI/EMS

Power Integrity

0.2 0.4 0.6 0.8 1.0 1.2 1.40.0 1.6

0

20

40

60

80

100

120

-20

140

freq, GHz

Impe

danc

e (o

hm)

PDN Impedance

PDN Ripple causing Signal ripple

PDN（PWR/GND）causing EMI

Signal causing EMI(Normal Mode)

SSN(SSO)→PDN Ripple→Receiver wrong operation

PDN High-impedance forIC operation band

Anti-resonanceat specific frequency

OrganicallyInter-relatedand Interactive

Common Mode EMI for Differential line

Modification

DeCapoptimization

/Layout ModificationModification

DeCapoptimization

/Layout Modification

Modification

Common Mode Filter

/DeCapoptimization


Choking Beads

Protocol modification


Visualize problems using simulatorto find/predict root-cause,to estimate effectiveness of the measures

PDN modeling and issue


VRMIC

Input Impedance=Impedance seen from device

PDN= Power Line + VRM + GND Plane

Basic PDN Modeling Idea

Issue• VRM = DCDC Converter, Integrated Module, Non Adjustable • No easy to have VRM equivalent model

Idea• Measure VRM using VNA as a black box to extract AC characteristics• Simple and practical measurement-based modeling with EM

PWR

GND

EM or Measurement

?

Contents

1. Introduction – SI/PI/EMC

2. PDN modeling issue – VRM Measurement-based modeling

3. Measurement-based DCDC Converter modeling• Evaluation board for VRM• Measurement• De-Embedding connector portion to extract DCDC converter behavior4. PI analysis using the VRM model• Evaluation board for other than VRM• Estimating SI/EMI by simulation using EM and VRM model• Comparison between simulation and measurement and validity discussion 5. Conclusion


DCDC Converter Evaluation BoardSynchronous Buck type DCDC ConverterSimplified Schematic

Compensation Circuit

Output Filter

DeCap

DeCap

Vin VoutSwitching Control IC


(TI - TPS54310)

DCDC Converter Evaluation BoardConfigured to output 3.36V


67[mm]

30[m

m]

1:Buck Type DCDC converter IC [TI, TPS54310]

.1”x.1”, Connected to DCDC converter module

2:Output FilterComposed of a 1.5uF inductor and 180uF polymer capacitor

3:Output Decoupling Capacitor

1000pF ceramic

①

③

②④

⑤

⑥

⑦

⑧

4:Input Decoupling Capacitor10uF ceramic

5:Compensation circuits for feedback system6:Voltage Detection point to TPS54310 feedback pin7:Boardmount Socket

.100”x.100”, 16pins3.36V output, 3A Maximum

8:Power Terminal4-6V input

From DPS

Connection for measurement


From DPS(5.5[V] const., 2[A] compliance)

To SMUVNA Port1

VNA Port2

DCDC converter module

Shunt-Through measurement fixture and PCB mounting header for DCDC converter module

67[mm]

30[m

m]

From DPSMeasurementFixture

Test setups


①

② ③

④ ⑥⑤

⑦

1:Vectol Network Analyzer [Agilent Technologies, E5061B ]2:Gain/Phase Port

[5Hz-30Mhz]3:S-para Port

[ -3Ghz]

4:DC Power Supply/ Analyzer [Agilent Technologies, N6705 Mainframe]5:CH1 N6762A Precision DPS Module6:CH4 N6781A SMU Module

7:DUTDCDC module and shunt-through impedance measurement fixture

Measurement MethodShunt-Through Method

Shunt-through method has the advantage of measuring low impedance at low frequency.

Zdut = 50 x S21/(2 x (1-S21))where port impedance = 50Ohm


Where dynamic range adversely affects measurement result

Where trace noise adversely affects measurement result

DUT Examplelow impedanceat low frequency

ZO=50?dp1

ZO=50?dp2

C=3pFC1

L=240mHL1

Small residual

Calibration3 Standards are used;

LF impedance measurement• Response Through to improve transmission tracking and isolation

– Using this response cal, Inductance factor remains as residual error. For <30Mhz, now this error is thought to be small enough and ignored.

HF impedance measurement• Electrical Cal Module for 2 port full calibration to cable terminal

• 2-port Short for Auto Port extension from cable terminal to DUT

DC Blocking Capacitor


DCDC module measurement results


Measurement and DUT condition:DCDC module is turned on by DPS and SMU sinks current as electrical load.

• Various current condition shows small difference in impedance at very low frequency where a feed-back loop works.

• At higher than 10kHz frequency range, all measurements show identical response.

200mA600mA1400mA2200mAHF 30MHz-3GHz

Connector intersection

Output filter

Various impedance dependent on sunk current condition

Simplification to model a connector intersectionand EM simulation

bird’s-eye view for a connector intersection


EM(FEM)

AgilentADS-FEM

Validity check for EM result

Compensation Circuit

Output Filter

DeCap

DeCap

Vin VoutSwitching Control IC


(TI - TPS54310)

High-side SW

Low-sideSW

LDRV

HDRV

When DCDC control IC is turned off, output filter and DeCap are seen from Vout.

Turned off→High Impedance

Validity check for EM result


Measurement(Turned off)Filter+ConcectorFilter/DeCap Only(Reference)

• In condition that DCDC control IC is turned off, this shows good correlation between measurement and simulation.

• EM result is valid.

EM result

Filter/Decap

Impe

danc

e [O

hm]

DeEmbedding connector characteristics from DCDC evaluation board measurement result

• DeEmbedded result is about equal to output filter characteristics with DeCap.• Connector intersection is removed as expected generally.

• Measurement-based VRM model• Large reflection by the connector header/socket makes DeEmbedding difficult.

Impe

danc

e [O

hm]

Measurement(1A)DeEmbed resultFilter/DeCap Only(Turned off/Reference)


DeEmbedding

DCDC module’scharacteristics

Contents

1. Introduction – SI/PI/EMC2. PDN modeling issue – VRM Measurement-based modeling3. Measurement-based DCDC Converter modeling• Evaluation board for VRM• Measurement• De-Embedding connector portion to extract DCDC converter behavior4. PI analysis using the VRM model• Evaluation board for other than VRM• Estimating SI/EMI by simulation using EM and VRM model• Comparison between simulation and measurement and validity

discussion 5. Conclusion


Evaluation board conceptual diagram


50OhmTermination

DCDCConverter

DecouplingCapacitor

74LCX04FInverter IC

ExternalFunctionGenerator

ImpedanceFrom Inverter IC

WaveformObservation

Reference

Signal

DCDC converterevaluation board(discussed previously)

EMI

Evaluation board

SI/EMI evaluation board


100[mm]

58[mm

]

①

②

③

⑥

⑦

④

1:Boardmount Header2:74 logic 04 inverter [Toshiba, 74LCX04F]3:50 Ohm single-ended line with 50Ohm termination

130mm length4:DeCap mounting pads

⑤

5:Power Plane6:Signal input for the logic inverter IC7:Local Pattern Generation Circuits for the inverter IC

ConnectDCDC converter evaluation boardhere

Analogy and Ground/Power Plane Modeling


VRM

Parallel Flat Plane= Capacitor

PDN(Pwr/Gnd/VRM)= Inductance and Resistance

Dissipation of PCB Prepreg/Core= Resistance

Emission of Radiation= Resistance

IC

①

②

③

③

Note: This analogy is applied to PDN behavior at lower frequency than self-resonance point

DeCap④

Generated VRM model

Relationship between anti-resonance and reflection ratio


DeCouplingCapacitorPower-to-Ground model for PCB

① ② ③

④

Note: Term impedance is equal to input impedance to calculate S11 correctly.Z=50Ohm is just an example for the explanation.

PDN ParallelFlat Plane

Power Dissipation/Emission

Relationship between anti-resonance and reflection ratio

Impe

danc

e [O

hm]

S11

[dB

]

PCB OnlyWith DeCap


• This circuit model has anti-resonance frequency

• Putting DeCap moves anti-resonance frequency

• Reflection at Anti Resonance frequency is small,

• meaning power is consumed as real power.

Input Impedance and reflection simulationlinear(AC) analysis with DeCap optimization


①

②

③

④

1:DCDC converter module Frequency response

Measured impedance2:Terminated Resistor3:Current AC source and Voltage sense

50mA AC current4:DeCap for inverter IC

Measured dataas a power internal impedance

200mA case is usedfor VRM measured impedancefor this case.

DeCap

EM result(Method of Momentum)Agilent ADS-Momentum


Without DecapWith Optimized Decap

① ②

[MHz]10 100 1000

0

-6

-12

-18

-24

-30

2e3

1e-1

1

1e1

1e2

1e3

1e-2

Impe

danc

e [O

hm]

S11

[dB

]

70Mhz 240Mhz

Optimized DeCap1400pF SMD580pF SMDin parallel

①High impedance

- SI problemSmall reflection

- EMI problem

DeCap Optimization- Low impedance and small reflection- Current flows to low impedance path②Side effect of DeCap

installation

20Ohm

A Prediction/Estimation of SI/EMI problem from linear simulation resultsImpedance and reflection seen from IC power pin

Experimental proof of the estimationTest Setups


①

②

③

⑤

⑥

⑦

⑧

1:Spectrum Analyzer [Agilent Technologies, N9010A ]

9kHz to 26.5GHz2:Function Generator [Agilent Technologies, 81160A]3:EMI Scanner Probe Array[EMSCAN, EMxpert]

5kHz to 4GHz

④

4:Scanner Adapter [EMSCAN, EMxpert]5:EMI Scanner controller[EMSCAN, EMxpert software for PC]6:Osilloscope [Agilent Technologies, MSO7104B]7:DC Power Supply [Agilent Technologies, E3631A]

EMSCANEMxpertTM

Test Item No DeCap Opt. DeCap

Signal Shape at 70MHz Bad Better

EMI at 70MHz Bad Better

EMI at 240 MHz Worse

Experimental proof of the estimation for SIInverter output waveform at a termination without DeCap


10MHz CLK 25MHz CLK 50MHz CLK

60MHz CLK 66MHz CLK

70MHz CLK 75MHz CLK

Getting worse

Getting better again

Time-domain response analysis using IBIS


①②

③

1:IBIS for 74LCX04 output2:Trigger for CLK waveform generation3:Termination resistor and probe parasitics

8pF and 1nH

IC_GND

IC_PWR

IC_O

UT1

IC_O

UT2 Vout_Term

IC_PWR

IC_GND

IC_OUT1

IC_OUT2

DeCap

EM result(Method of Momentum)Agilent ADS-Momentum

Experimental proof of the estimation for SIInverter output waveform at a termination with/without DeCap66MHz CLK


Without DeCap With Optimized DeCap

IBIS SimulationMeasurement

IBIS SimulationMeasurement

Volta

ge a

t ter

min

atio

n[V

]

Volta

ge a

t ter

min

atio

n[V

]

• Installing DeCap improves the inverter output SI at a termination.• IBIS simulation result also shows a good correlation to

measurement result with/without DeCap.

Experimental proof of the estimation for EMI70MHz EMI Scan and Current density


Without DeCap With Optimized DeCap

Spe

ctru

mA

naly

zer

Sim

ulat

ion

Cur

rent

Den

sity

10[A/m]I

0.3[A/m]

10[A/m]I

0.3[A/m]

Installing DeCap suppresses the board-wide EMI at 70MHz

Experimental proof of the estimation for EMI240MHz EMI scan and Current density

without DeCap With optimized DeCap


10[A/m]I

0.3[A/m]

10[A/m]I

0.3[A/m]

Spe

ctru

mA

naly

zer

Sim

ulat

ion

Cur

rent

Den

sity

Installing DeCap causes anti-resonance around 240Mhz and affect the EMI

Summary and Conclusions

• Measurement-based simple and practical VRM modeling method is proposed.

• Reasonable correlation between simulation and SI/EMI measurement demonstrates validity of the VRM model and the simple linear PI simulation method.

Considerations for further study• Better connector selection to extract better VRM characteristics• Simpler VRM modeling for DeCap optimization around active devices• Case study for differential devices and evaluation of far field by common

mode change on a differential transmission line


Acknowledgements

I am deeply grateful to Etoh-san, Toyo Corporation (Toyo Technica), a representative of EMSCAN, about offering EMxpertlend-out for my experimental study.


EMC Analysis for a PCB Mounted Switching regulator using ...

Documents

Transcript of EMC Analysis for a PCB Mounted Switching regulator using ...