ELETRONIC~1
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EN2022: Laboratory Practice Electronic Laboratory Experiment: #1 Logic Families Post-Laboratory Exercise Group: T7 Name: Surendra K.H.A. Group Members: Admission No: 090511A Surendra K.H.A. Surasinghe S.A.H.B.
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ELETRONIC Lab report
Transcript of ELETRONIC~1
EN2022: Laboratory Practice
Electronic Laboratory Experiment: #1
Logic FamiliesPost-Laboratory Exercise
Group: T7 Name: Surendra K.H.A.
Group Members: Admission No: 090511A
Date of Experiment: 30/09/2010
Date of Submission: 14/10/2010
Surendra K.H.A.
Surasinghe S.A.H.B.
1. Diode Logic
1.1. Forward bias voltages of the diodes are 0.75 volts. Therefore the energy gap of the PN junction is 0.75 volts.
1.2. Two different logic low voltages can be observed.
Logic low voltage will keep increasing when adding more cascaded levels. Each cascade level will increase the logic low voltage by 0.75 volts.
1.3. Because of the above problem logic low voltage keeps increasing rapidly with level of cascading. Therefore the fan-out of the diode logic family is very low, which is a major disadvantage. i.e. if we considered logic low threshold to be 2.5 volts, only 3 cascade levels can be connected.
2. Resistor Transistor Logic
2.1.
Case 2.1
powerdissipation=5×0.0366=0.183W=183mW
Case 2.2
powerdissipation=5×0.0102=0.051W = 51mW
2.2. When values of the resistors are increased, current through gate is limited. Therefore total power dissipation is reduced.
2.3. When values of base resistors are increased transistors will prevent from being saturated. Therefore propagation delay will be lowered.
3. Diode Transistor Logic
3.1. When digital signals are propagated through the gates some noise is added to signal. Therefore, to determine the logic level we have to consider range of voltages. Two thresholds must be defined,
1. Minimum level of high logic
2. Maximum level of low logic
Those thresholds are defined as noise margins.
3.2.
powerdissipation=5×2.5×10−3=12.5mW
4. TTL Logic Family
4.1. When an input is supplied to a logic gate internal circuitry take some time to produce the output. This is referred as propagation delay of gates. When momentary input is given to gates some time is taken to propagate result through the gates. Because odd number of gates is connected in a circular manner, logic levels are continuously switched. This is seen as a alternating waveform in the oscilloscope.
4.2.
