electronic Questions

THE OPEN UNIVERSITY OF SRI LANKA

DIPLOMA IN TECHNOLOGY – LEVEL 3

ECX 3230 – ELECTRONICS 2013

Course coordinator: S.A.D.A.N Dissanayake

Contact Phone – ext. 272

Email – [email protected]

At registration the students are expected to collect the following.

1. Text: Book 1, Book 2 and Experimental Work Book

2. Assignment 01 ( use up to lesson 4 of Book 1 and up to lesson 4 of Book 2)

Assignment 02 ( use up to lesson 9 of Book 1 and up to lesson 6 of Book 2) and

Assignment 03 ( Book 1 and Book 2) will be posted to the moodle class room.

Course consists of –

1. Three assignments: To be submitted on or before the given dates in the activity diary.

Late submissions will not be accepted and will be given zero marks. 2. Continuous Assessment Tests: CAT#1 ( up to lesson 8 of Book 1 and up to lesson 4 of Book 2.

Open Book Test)

CAT#2 (Book 1 and Book 2B. Open Book Test )

3. Lab Work: A pre report must be prepared before coming to the lab classes. See

Experimental Work Book for details. Minimum mark of 40% for lab

work is compulsory to obtain eligibility in addition to the marks

obtained from other activites.

4. Final Examination on all lessons including lab work. (Closed Book Test )

Continuous Assessment Mark will be obtained by –

CA Mark = (0.3*AVTMA) + (0.3*BCAT) + ( 0.4*LAB) if LAB 40

CA Mark = 0 if LAB < 40

Where, AVTMA - the average of best two assignments submitted by the student (%)

BCAT - the best mark obtained out of the two CAT s (%)

LAB - the marks obtained for the lab classes (%)

Eligibility for the Final Examination : CA Mark 40

Answers to each assignment must be written clearly. They should be sent by post to the Course

Coordinator - ECX 3230 or should be placed in the relevant box provided in Block 12 of the

Colombo Regional Center on or before the due date.

Negative marks will be given for copying.

Direct reproduction of course material as answers will cause a reduction of marks.

Clear and brief answers with no unnecessary details will gain maximum marks.

ECX3230 –Electronics

Assignment no. 01 (Due date: see the activity diary)

Answer all the questions

1)

a) Draw the characteristic curve of a Germanium diode.

b) A Germanium diode when forward biased at 250C carries a 3mA current at 0.2V. Assume

VT is 25mV at 250C.

i) Calculate the diode current when this diode is reversed biased by 10V.

ii) Find the diode current when the diode is forward biased and at a temperature of 500C.(

=1 for Ge)

c) A certain PN junction was designed to use as a voltage controlled capacitor which is shown

in Figure 1.1. Ohmic resistance and reverse resistance of the diode is negligible.

PN

Vsinwt

_+

R

(2.2KW)

L

(30mH)

Figure 1.1

+

-

VC

Choke

20mH

-5-10-15 5 10 Voltage(V)

Figure 1.2

2

4

6

Capacitance Cj (pF)

i) Derive an expression for the resonant frequency of the circuit in Figure 1.1.

ii) Calculate the capacitance of the diode if the circuit resonates at 30 MHz.

iii) What is the required D.C voltage for this circuit to resonate at 30 MHz?

2)

a) Draw the output characteristic curve of a silicon transistor with respect to common emitter

configuration. Mark the regions of the transistor.

i) Calculate the output voltage of the circuit shown in Figure 2, when a 6V input is applied

at the input? (Assume the transistor current gain () = 20 and VBE = 0.7V and voltage of

the LED is 1V.)

VCC(10V)

R1

720W

R3

220W

R2

10KW

i/p

o/p

Figure 2

R4

100W

b) A unipolar transistor amplifier is shown in Figure 2.1. The drain current is 10mA at VGS = 0

and the pinch off voltage of the device is -3V. The circuit is to be designed so that the

quiescent point is at ID = 5mA and VDS = 5V.

V1

+VDD(25V)

R

Rd

VGG

S

G

D

Figure 4.2

i) Calculate the gate voltage and Rd resistance.

ii) Draw the small signal equivalent model for Figure 2.1.

iii) Derive an expression for the voltage gain of the amplifier and calculate it.

3)

a) Show the conversion of the following

i) 14.255310 to binary

ii) 11010.01012 to decimal

iii) 12.8568 to hexadecimal

iv) -63 in 1’s compliment

v) -96 in 2’s compliment

b) Simplify the following logic functions using Boolean algebra.

i) CAABCBAX 1

ii) CABABCCBACBABCAX 2

iii) )()(3 CBCBAX

c) Determine the output expression for the circuit shown below.

AB

CA

DB

4)

a) Write the truth tables for two input NAND gate and NOR gate.

b) Simplify the output functions using Karnaugh map.

)6,3,2,1,0(),,( CBAF

)15,11,10,9,7,3,2(),,,(1 DCBAF

c) The input to a combinational logic circuit is a 4 bit binary number ABCD. Where A is the

most significant bit. The output of the circuit will be high when the input satisfies the

following conditions ;

A+C = 1

Or

B×D =1.

i) Draw the truth table and the Karnaugh map for the output function.

ii) Minimize the logic function of the output using the Karnaugh map and implement it

using two input NAND gates.




1) A common emitter transistor amplifier is shown in Figure 1. Transistor is silicon and its current

gain is 60.

+Vcc (10V)

RC

(680W)RB

(10KW)

Figure 1

o/p

i/p

a) Draw the D.C load line.

b) Find the base current at Q point.

c) Mark the Q point on the load line.

d) What is the maximum possible value of the undistorted output signal?

e) Derive an expression for the stability factor for the circuit given in Figure 1.

f) Calculate the stability factor.

2) A regulated dc power supply is shown in Figure 2. The transistor and diodes are made of silicon

semiconductor. A minimum current of 0.5 mA is required to operate the zener diode and its

worst case power dissipation in this circuit is 25mW.

L

(150 mH)

C

(10 mF)

R1

(470W)RL

Vz

(5.6 V)

240V

r.m.s

12:1

Q X Y

P

Figure 2

Vou

t

a) Identify and name the main functional blocks.

b) Explain the operation of the each block.

c) Calculate, the

i) Voltages at P, Q, X, Y.

ii) Current range of the output, if current gain of the transistor is 40.

iii) Voltage regulation of the circuit (Figure 2) at full load.

d) What will be the effect if the stabilizing unit is replaced by a zener diode parallel to the filter

section?

3) An experiment is set up to observe the transient response of a capacitor.

R

(2.2KW)

E

(10V)C

(220mF)

Figure 3.1

a) Derive an expression for the circuit shown in figure 3.1.

b) Calculate the voltage of the capacitor at t = 0.5s

c) Battery is replaced by a sinusoidal voltage source with same voltage,

i) Explain the transient behaviour of the capacitor.

ii) Draw the output signal (voltage across capacitor) with reference to the input signal.

d) Now replace an inductor instead of the capacitor which is 33mH.

R

(2.2KW)

E

(10V)

L

(33mH)

Figure 3.2

i) Derive an expression for the circuit shown in figure 3.2.

ii) Calculate the voltage of the capacitor at t = 5ms

4)

a) Clipping and clamping circuits are shown in Figure 4.1 and 4.2.

i) Explain the behaviour of the circuit with help of equations.

ii) Draw the output waveform with reference to the input waveform.

AC

R1

(1kW)

R2

(22kW)

D1

5V

10V/

5kHz

Figure 4.1

AC

C

(0.1mF)

R

(10

0kW

)

D2

E

(3V

Figure 4.2

b) Uni junction transistor circuit is given in Figure 4.3

+VCC

10V

R1

8.2kW

C

R3

3.3kW

R4

680W

Figure 4.3

i) Derive an expression for the frequency of oscillation.

ii) Calculate the capacitance of the capacitor(C) to obtain a frequency oscillation of 25

KHz.




1) An impendence matching circuit is shown in Figure 1. For the transistor, hie and hfe are 2.2KW

and 50 respectively. Neglect the effect of hre and hoe.

C2(10mF) C3(10mF)

C1(10mF)

R1(10kW)

R2(1kW)

R1(5kW)

R3

(2.7kW)

+VCC(15V)

Figure 1

i/p o/p

a) Identify the configuration of the transistor.

b) Draw the hybrid parameter equivalent circuit.

c) Derive expressions for the

i) Voltage gain

ii) Current gain

iii) Input impedance

iv) Output impedance

d) Calculate the values of the quantities shown in (c).

2)

a) An Operational amplifier circuit is shown in Figure 2.

AC

-

+

R1

(1kW)

Rs

(2.7kW)

Rx

(3.3kW)

R4

(10kW)

R3

(2.2kW)

R2

(4.7kW)

Figure 2

o/p

i) Derive the voltage gain of this circuit.

ii) If the input voltage is 4sin1000t, find the output voltage.

iii) Sketch the output signal with reference to the input signal.

iv) State the function of this circuit.

3) Figure 3 shows a circuit containing four flip flops and two exclusive-or gates. The circuit has

two independent clock pulse signals, C and D, which have 20 kHz and 100 khz frequencies

respectively. The input signal, U, consists of pulse which operates at twice of the signal of C

and whose transitions occur slightly after the rising edge of C.

Complete the timing diagram, showing the waveforms of V, W, X, Y and Z.

Assume all signals are initially low.

U

C

D

D D D D

C1 C1 C1

Y

Z

X

W

V

Figure 3

C1

4) A multivibrator circuit is shown in Figure 4.

a) What is the type of this multivibrator?

b) Explain the operation in the multivibrator shown in figure 4.

c) Draw the waveforms at points A,B,D, E in a common time scale. Assume that at time t =0,

Tr1 is switched on.

R1 R2R3

R4

R5C2

C1

Q1 Q2

VCC

+VBEInput

Ou

t p

ut

Figure 4 -

T

V

0V

A B

D E

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