Electronic Product Sept. 2015

www.epdtonthenet.net September 2015

PCB cloning

• JTAG use in functional testers on the rise

• Unmanned robot for army and civil defence

• Six reasons to conduct early EMC testing

Also inside

14Usage shift leads to methodology shift

Smart analogue 22

Maximise ROI on complex systems

3973 - EPDT Sept15 Edn.indd 13973 - EPDT Sept15 Edn.indd 1 24/08/2015 10:4724/08/2015 10:47

Contents www.epdtonthenet.net | September 2015

Cover Story

Embedded Test

19 32

Six reasons to conductearly EMC testingTypically conducted at a specialist lab at the end of the project, EMC testing can lead to frustration when the tests fail.

Unmanned robot for army and civil defence In critical environments, military and civilian task forces often use unmanned robots in order to scout the terrain and eliminate hot spots.

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EPDT - ISSN 0263-1474Copyright in the contents of Electronic Product Design & Test, its websites and newsletters is the property of the publisher. The publisher and the sponsors of this magazine are not responsible for the results of any actions or omissions taken on the basis of information in this publication. In particular, no liability can be accepted in result ofany claim based on or in relation to material provided for inclusion.Electronic Product Design & Test is a controlled circulation journal, published monthly. Completed print or online registration forms will beconsidered for free supply of printed issues, website access and onlineservices. Annual subscriptions for non qualifying readers is UK £121.00 - £108.90, OC £212.00 - £190.80, and single copy price is £12.10 - £10.80

10,000 Average net

circulation Jan-Dec 2013

Circulation -

Tel: +44(0)1732 359990

Email: [email protected]

MANAGING EDITORAlistair Winning [email protected] EDITORPaige [email protected] MANAGERRichard Woodruff [email protected] Sykes [email protected] Goater [email protected]

DIRECTORNeil Whitaker [email protected] Rich Designwww.grahamrichdesign.co.ukHEAD OFFICEIML Group, Blair House,184/186 High Street,Tonbridge, Kent TN9 1BQTel: 01732 359990Fax: 01732 770049E-mail: [email protected]

Component obsolescence has always been a challenge across industries but with consumer markets rocketing, industry sectors risk being left behind.

25 PCB cloning techniques on complex systems41

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12Increase safety and reduce costs inHIL testing The use of rechargeable batteries in consumer products, business applications and industrial systems continues to grow substantially.

Digital modeling yields efficientPCB design processesProduct experiences are being driven by customer interaction with the physical, mechanical model.

Flip chips: Simultaneous multi-gate acoustic imaging Finding structural defects in a flip chip assembly means having a nondestructive view of the interior.

Usage shift leads to methodologyshift A usage shift in mobile computing devices warrants a methodology shift in the power analysis flow.

Smart analogueIndustrial automation is entering the fourth industrial revolution with the growth of M2M technology.

High precision spatial positioningComputed tomography is used to obtain volume information from sample types at micrometer resolution.

Unlocking your AOI and AXIsystem’s true potentialToday, most PCB assembly lines would be difficult to operate without an automated optical inspection (AOI) system.

Handling increased complexity inembedded devicesAdvances in the complexity of embedded software are creating implications for test and validation systems.

JTAG use in functional testers on the riseJTAG Technologies has invested in the development of integration options for a range of test platforms.

Design Data

Buyers Guide


Despite its numerous benefits, rigid-flex PCB

design presents significant challenges in

terms of effective, efficient execution. Among

the many variables that go into the rigid-flex

PCB design process, the greatest challenge

faced by designers is ensuring that all flexible

sections on the PCB fold in the correct way,

while maintaining flex-circuit stability and

product lifespan at the highest feasible

degree of quality.

The paper doll approachThe most common method deployed by

design teams to ensure that a rigid-flex PCB

design will fit in an enclosure is the “paper

doll” model of the PCB. These models,

created from paper, are cut into what’s

hoped to be an exact shape of the PCB

in concept.

While effective at modeling an approximate

shape of a rigid-flex PCB, the paper doll

approach has a number of inefficiencies and

problems in application, including:

• Imprecise thickness: The paper doll isn’t

the same thickness as the rigid and flexible

sections of the PCB. Therefore, it becomes

very difficult to simulate the bending of the

paper model because it will bend in its

final application. This makes it incredibly

challenging to get a clear idea about the

fatigue or natural folding properties of the

design.

• No 3D models: The paper doll doesn’t

include all of the 3D component models that

will appear in the final design. One must

wonder how the presence of these models

will change how the model folds and whether

a 3D model might interfere with the clearance

required for the rigid-flex sections to fold

properly.

• Costly 3D printing: To determine a correct

board fit with an enclosure, it might be

necessary to print the enclosure with a 3D

printer. Depending on the complexity of a

design, this can become a costly option to

implement—it adds a layer of unnecessary

expenses to a project that could have been

simulated entirely in software.

Despite its widespread use, the application

of paper doll models is both imprecise and

impractical. Designers who rely on this

method to ensure a correct PCB fit with the

mechanical enclosure risk the potential of

design revisions and expensive prototype

adjustments during the fabrication process.

Digital-modeling efficienciesRather than build an inaccurate paper doll

model, a more sensible approach is to

handle all of the modeling and simulations

directly in the digital software environment.

Not only will this approach save time and

money, it will also yield a more exact design

that doesn’t depend on the imprecision of

paper models.

In practice, there are currently two accepted

methods to execute this approach: using a

combination of mechanical computer-aided

design (MCAD) tools and electronic

Digital modeling yields efficient rigid-flex PCB design processesProduct experiences are being driven by customer interaction with the physical, mechanical model. The necessity to constantly satisfy the senses of the physical experience requires that printed-circuit-board (PCB) assemblies be smaller and denser to fit pre-conceptualised mechanical structures.

September 20154

The mechanical model becoming such an infl uential factor has turned fl exible electronics into anincreasingly common design objective. To gain this fl exibility, designers often opt for rigid-fl exPCBs, which combine both the rigid and fl exible substrates of a PCB into a single design element.

Benjamin Jordan,Altium

epdtonthenet.net

DesignFeature

Figure 1- To make this paper doll, the designer printed a 1:1 copy and then cut out the final shape.

Despite its numerous benefits, rigid-flex PCB design presents significant challenges in terms of effective, efficient execution.


computer-aided design (ECAD) tools, or

using an ECAD tool alone with built-in 3D

functionality.

MCAD/ECAD modeling:

This is commonly referred as the “sheet-

metal method” because of its inherent

similarity to designing a sheet-metal part.

While relatively straightforward, one must

be aware of the number of steps involved in

this process.

The initial MCAD model of the product is

designed alongside a sheet-metal component,

which forms part of the assembly. Once the

MCAD model is created, one or more fixed

tabs model the rigid sections of the design,

and stiffener is used for the flexible portions.

This method offers a precise way to discover

what area is available for the PCB substrate.

However, this shape still must get into the

PCB designer’s workspace. To complete the

final steps in this process, you could use the

“unbend” and “unfold” features in your

MCAD environment to generate the

necessary models. These could then be

imported to your chosen PCB editor.

The generated data, which can be exported to

a PCB editor as an IDF or DXF file, will provide

the outline of the rigid-flex section of the PCB

for further refinement in the ECAD environ-

ment. Once in the PCB editor, components

are placed and an IDF file is generated again.

Then the file is imported back to the MCAD

environment, where the mechanical designer

can refold the board substrate.

The process of positioning the board and

components as a folder circuit is time-con-

suming, rendering this approach somewhat

unidirectional from MCAD to ECAD. As a

result, it may still be iterative and require

close cooperation between MCAD and

ECAD designers.

While the MCAD/ECAD translation process

provides a more exact replication of a

rigid-flex PCB, it does require the tedious

process of translating design data back and

forth between each design environment.

ECAD modeling with 3D:

A more efficient way to design a rigid-flex

PCB is to use an ECAD tool with 3D

functionality. With 3D functionality built into

the ECAD environment, designing a

rigid-flex PCB requires fewer steps from

design to completion, greatly reducing the

amount of time invested in a design.

When using an ECAD tool with 3D

functionality, the PCB layout and mechanical

assembly are modeled together with the use

of 3D STEP models. This allows designers

to easily visualise the entire assembly,

including the necessary mechanical

enclosure and component models.

This process isn’t intended to replace a

dedicated MCAD system. Rather, it’s a

major step forward in improving workflows

and lessening the time wasted modeling

and simulating a completed product design.

The ability to model both the PCB and

associated mechanical enclosures and

components provides designers with a high

degree of precision when checking

mechanical clearances in real-time 3D,

ensuring that a board fits right the first time.

In addition to the above mechanical

modeling capabilities, the use of ECAD

software with 3D functionality provides

access to the PCB’s dielectric and copper

information. When utilising this information in

an MCAD environment, the mechanical

designer has access to more detailed

simulation options, including thermal and

electromagnetic analysis.

Feature

September 2015 5

Design

The ability to model both the PCB and associated mechanical enclosures and components provides designers with a high degree of precision.

epdtonthenet.net

Figure 2- This flattened “sheet-metal” shape can be exported to an ECAD environment as the PCB outline.

Figure 3- Shown is a typical workflow using ECAD software with 3D functionality.


Figure 3 illustrates a typical workflow using

ECAD software with 3D functionality. Once

the PCB outline is generated, the electrical

designer can define the needed layer stacks

for the rigid and flexible sections of the PCB,

and then assign these layers to appropriate

areas on the design.

After completing this step, the bending and

folding areas of the final product are defined,

and can be examined and simulated in detail

to ensure correct form. At this stage of the

design process, it’s easy to verify if the

flexible portions of a design are too short

or long and adjust them accordingly.

Once the modeling process is complete for

both the rigid and flexible parts of the PCB

design, engineers can then place the needed

components on the board, including

connectors, heat sinks, LEDs, light pipes,

and other mechanical models. During this

process, it’s beneficial to have a STEP model

of the final enclosure in the ECAD

environment.

With this data at hand, the designer can

actively check for clearances between the

board, components, and enclosures all in

real-time 3D, or perform a comprehensive

design-rule check to identify design errors.

With this integrated method, designers can

expect to see a 50% reduction in the amount

of time it takes to verify and validate the

shape and folds of a rigid-flex PCB (Fig. 4).

Upon completion of the modeling and

simulations in the ECAD environment,

designers can transfer this data back to

the MCAD software as a STEP model and

begin the final process of combining the

PCB with the completed mechanical design.

Compounding design efficienciesIn addition to delivering better boards, the

3D STEP models generated from the

rigid-flex design (including folded, unfolded,

and partially folded states) deliver more

accurate and detailed documentation.

Manufacturing engineers can use this

enhanced documentation to develop clear

assembly instructions for both the PCB

assembly and the final product.

If desired, manufacturing engineers can even

produce a video from the images generated

in the ECAD environment. These videos can

be used to train assembly personnel in the

exact process required to fold the flexible

circuitry. Implementing this process helps

significantly reduce assembly time and

errors, thus streamlining the entire design-

to-fabrication process.

Despite the benefits, it’s important to note

that like any other process driven by

incremental improvements in technology,

not even the most precise STEP models

provide a 100% accurate picture of design

intent. More advanced models and systems

for streamlining the rigid-flex design-

collaboration process between electrical

and mechanical design teams are certain

to appear down the road.

Ensuring that your board fits the mechanical

enclosure right the first time, while also

maximising the quality of your flexible

circuitry, requires a more advanced

workflow incorporating the use of 3D

functionality in an ECAD environment.

When it comes to remaining competitive

and productive, don’t leave your designs

up to chance. Use a digital modeling and

simulation system for the most efficient

rigid-flex design process.

When it comes to remaining competitive and productive, don’t leave your designs up to chance.

6

DesignFeature

epdtonthenet.net

Figure 4- ECAD software that incorporates 3D functionality helps streamline the process of designing rigid-flex PCBs, allowing designers to perform all necessary design-for-manufacturing (DFM) checks in the PCB design tool.


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High-frequency transducers, however, provide

high resolution only in the x and y axes. To

make an acoustic image of any sample, the

returning echoes are typically gated on a

depth of interest. The arrival time of an echo

is used to verify that the feature from which

the echo was returned lies within the depth

of interest - the gate. Echoes from features

beyond the gate are ignored, while defects

before the gate will cast shadows below.

In imaging flip chips, there are likely to be

features of interest at any depth between the

chip face and the substrate. Gating on the

whole depth of the underfill may image all of

these features, but it may be difficult to

determine the relative depth of a particular

feature. Because the air within the void does

not transmit ultrasound, the bottom side of

the void is not detected unless the bottom

side of the sample is scanned. If there are

multiple features of interest it makes sense

to use a narrower gate.

To gather more comprehensive depth data,

Sonoscan has developed a method that

collects echoes from multiple gates during a

single transducer scan. The image of a flip

chip typically is made up of millions of pixels,

each pixel representing the amplitude of the

echo from one of the x-y locations into which

a pulse was sent. Gap-type features return

the strongest echoes - essentially 100% of

the pulsed ultrasound. Bonded interfaces

return moderate-strength echoes, and

locations with no features return no echoes.

The new method permits the system operator

to enter the number of gates desired, as well

as the position and width of each gate. The

gates may all have the same width, or different

widths. They may be adjacent to each other,

separated, or overlapping. In any of these

configurations, software uses the echoes

collected from each gate, and then produces

a separate acoustic image. The scan time for

the flip chip, however, is not increased by

using this method.

How this method was used is shown in

Figure 1; six gates were set, of equal width,

extending from the back of the chip to the

top of the substrate. Adjacent gates overlap

slightly to ensure complete coverage in the

vertical dimension. In other words, the

underfill region of the flip chip was sliced

horizontally into six equally thick, slightly

overlapping layers in order to produce an

acoustic image of each layer.

Figure 2 is the acoustic image of gate #1,

just below the chip face. This flip chip

measured 14.9 x 11.0 x 0.8mm. The faint

horizontal and vertical lines are the result

of the traces on the chip face being just

within the gate. It is immediately evident

why this chip was selected for discussion:

the number and variety of defects. Red

identifies highly reflecting features that are

within gate one.

The large irregular red features, mostly in

the top half of the image, are regions of

more highly concentrated filler particles

caused by the non-homogeneous nature

of the underfill. In some instances the tip of

a particle group contains a tiny void. When

fluid underfill locally has too many filler

Feature

September 2015 9

Semiconductors

epdtonthenet.net

Finding structural defects and anomalies in a flip chip assembly means having a clear and nondestructive view of the interior. The design of flip chips gives a substantial advantage to acoustic micro imaging tools: with current ultrasound technology, silicon is an excellent medium through which sound travels with minimal detectable defects.

Tom Adams,Sonoscan Inc.

Flip chips: Simultaneous multi-gate acoustic imaging

This transparency means that ultrasonic transducers pulsingultrasound at high frequencies can be used to provide high resolution in the acoustic images. High resolution is

needed to evaluate the degree of risk of a particular anomaly.

Figure 1- Side-view diagram of the six gates.

Figure 2- Gate 1 reveals solder ball connections, large areas of filler particle concentration, and the shadows of voids in deeper gates.

Finding structural defects and anomalies in a flip chip assembly means having a clear and nondestructive view of the interior.


September 2015 10

SemiconductorsFeature

epdtonthenet.net

To gather more comprehensive depth data, Sonoscan has developed a method that collects echoes from multiple gates during a single transducer scan.

particles and too little resin, voids are likely

to form. A larger void, also associated with

particle clumping, is marked by a yellow

arrow. The void itself appears grey

because the peak of the void lies just

below gate #1. Two additional grey voids

are located near the bottom centre of

the chip. During scanning, ultrasound is

reflected from all depths. Ultrasound

reflected from lower interfaces in the

assembly is blocked by these voids,

which therefore appear in gate #1 as

dark acoustic shadows.

Near the bottom right corner of the flip

chip is a dark edge feature, outside of

gate #1 and possibly a surface feature,

chipout or crack. To its left, along the

bottom edge of the chip, are four edge

voids. There are two similar voids along

the top edge of the chip.

Figure 3 shows an area in gate #1 just to

the right of the grey void. This area

contains a resin-starved particle clump

(arrow) that may be a danger to long-term

reliability. The clump appears to be parallel

and in contact with the long vertical row of

solder bumps. Closer inspection shows

that it has surrounded a shorter vertical

row of three bumps and is in contact with

the longer row of bumps as well. Failure

can occur when the solder flows into the

spaces between the clumps until the

solder bump collapses and breaks its

connection. At the top centre of Figure 3

a particle clump has deposited excess

particles in the vicinity of solder bumps,

although the density of the particles is less.

Figure 4 is the acoustic image made at

gate #2, the second of the six gates.

Comparison to gate #1 shows that:

• Both gates catch a portion of the echo.

The pulse of one echo is wide enough to

be found in both slightly overlapping gates.

• The large circular void marked by an

arrow in Figure 2 is red in this image, rather

than grey. The top surface of the void

clearly lies within gate #2. The same is true

of the two additional voids near the bottom

centre of the chip.

These two grey-outlined voids are shown in

greater detail in Figure 5, which shows that

there are two smaller grey-ringed voids in

the groups of solder bumps at bottom, for a

total of four voids. Unlike the other voids in

the underfill of this flip chip, these four voids

are not associated with particle clumps, but

are probably the result of anomalies in the

flow of the fluid epoxy. All four voids are in

contact with solder bumps, and thus pose

a risk to future reliability.

The data from gate #3 is shown in Figure

6. The particle clumps have lost the red

colour indicating high amplitude reflection,

indicating that the chip to dense particle

interface lies above this gate. The three

largest voids or void areas are still red,

however. The edge feature near the lower

right corner displays, at this depth, a tiny

red area characteristic of a gap, which in

this case may be a void.

Figure 3- Magnified view shows filler particles surrounding bumps.

Figure 5- Details of voids in contact with bumps in gate 2.

Figure 4- In gate 2, the filler particle concentrations persist. Red colour of voids shows that their tops are in this gate.

Figure 6- Voids extend into gate 3, but particle concentrations do not.


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The battery modeling technique employed by

Maplesoft uses a partial differential equation

(PDE) discretisation technique to streamline

the model to a set of ordinary differential

equations (ODE) that can be readily solved by

system-level tools like MapleSim. The

advanced model optimisation features of

MapleSim also allow the resulting code to be

very fast and capable of running in real-time.

The resulting battery models can also be

employed in the prediction of charge/

discharge rates, state of charge (SoC), heat

generation and state of health (SoH) through a

wide range of loading cycles within complex,

multi-domain system models. This approach

provides the performance needed for

system-level studies with minimal loss in model

fidelity. The user can also allow for energy loss

through heat, making these models useful for

performing thermal studies to determine

component sizes in cooling systems to

manage battery temperature. Not carefully

controlling the temperature can lead to

reduced operational life or, in extreme cases,

destruction due to thermal runaway.

Model structure for this applicationFor the purpose of this ESS test system

development project, the key requirements for

the battery model were:

• Up to 144 Li-Ion polymer cells for testing

the BMS of the client’s ESS products.

• Ease of configuration for different

requirements (parallel/series networks).

• Several sensors per cell (current, voltage,

SoC, SoH).

• Variation of chemistry make-up due to

manufacturing tolerances.

• Fault-insertion on each cell (open-circuit,

shorting).

• Capacity to run in real-time (target

execution-time budget of 1ms).

In the case of energy storage systems, each

ESS battery is made of several “stacks” that,

in turn, contain several cells. The MapleSim

model follows this structure with each cell

being a shared, fully parameterised

subsystem. Each cell can also be switched to

open circuit using logical parameters.

The stack model is made of 18 cell subsys-

tems connected either in parallel or series,

depending on the requirement. Input signals

are provided for charge balancing from the

BMS. Output signals are provided back to the

BMS to monitor the condition of the stack.

Finally, the full ESS is made of several stacks

with IO signals fed to and from the BMS.

Model calibration and validationProject engineers determined that any

deviation in performance due to manufacturing

variations needed to be included in order to

test the charge-balancing capability of the

BMS. Instead of testing every cell, engineers

relied on random variants generated from the

statistical distribution determined by the

Increase safety and reduce costs and set-up time in HIL testing Monitoring and controlling larger cell arrays through Battery Management Systems (BMS) helps to minimise charge times and maximise efficiency and battery life. Design and testing of a sophisticated BMS can pose a challenge, that’s why Maplesoft and ControlWorks Inc. developed a Hardware-in-the-Loop (HIL) test system for the BMS in one of their large Energy Storage System (ESS) products.

September 201512

An attractive solution to these testing challenges is to use virtual batteries for early-AAstage testing of the BMS. Not only have these models proven to be highly accurate, they A are computationally effi cient and are able to achieve the execution required to deliverAreal-time performance for batteries containing hundreds of cells on real-time platforms.

Maplesoft

Monitoring and controlling larger cell arrays through Battery Management Systems (BMS) helps to minimise charge times and maximise efficiency and battery life.

epdtonthenet.net

PowerFeature

Figure 1- Simulation of thermal runaway using the Li-Ion model from the MapleSim Battery Library


charge/discharge test results on 48 cells. This

was applied to all 144 cells and then compared

with the real test results. The maximum

variance of the voltage from the experimental

data was 14mV, while from the simulation it

was 13mV, acceptable for the purpose of this

project.

Maplesoft and ControlWorks Inc. engineers also

determined the average cell response using the

parameter-estimation tool supplied with the

MapleSim Battery Library. This uses optimisa-

tion techniques to determine the values of

cell-response parameters that provide the

closest “fit” to the experimental results. This

response was then validated against response

data from other cells to ensure close estimation

of the resulting model.

SoH behavior was implemented as a look-up

table based on experimental results. The model

determines the capacity and internal resistance

based on the number of charge/discharge

cycles and depth of discharge (DOD) from

the lookup.

Finally, the model was converted to ANSI-C

through the MapleSim Connector, producing an

S-Function of the battery model that can be

tested for performance and accuracy with a

fixed-step solver on a desktop computer in

MATLAB/Simulink before moving it to a real-time

platform. The simplest solver was used and the

performance bench showed that the average

execution time was approximately 20 times faster

than real-time, occupying 5.5% of the real-time

system time budget. This shows that the battery

model can be easily scaled up, if required.

The end result was a battery model capable

of being configured to represent a stack of

up to 144 cells that can be connected in any

combination of parallel and series networks.

Fault modes were also built-in, such as

individual cells shorting or opening, as well

as incorporating variations in charge capacity

from cell to cell, and degradation of capacity

over the life of the cells.

The final BMS test station provides the client’s

engineers with the ability to configure the battery

model and apply a range of tests to it. The

engineer can go back to the MapleSim model

at any time to make changes to the model

configuration, and then generate the model

for use on the real-time platform. In this system,

the real-time software is National Instruments’

VeriStand, driving a PXI real-time system.

The MapleSim Connector for NI VeriStand

automates the model integration process,

allowing the engineer to produce the real-time

model quickly and reliably.

The ControlWorks Inc. system also integrates

real-time platform, signal processing,

fault-insertion tools and standard communica-

tions protocols (CANbus for automotive,

Modbus for industrial applications), allowing

the engineer to run the BMS through a range

of tests on the battery model.

The use of virtual battery technology in the

design of test systems can facilitate the

development of better products, reduce

project risks, and get products to market

faster.

The final BMS test station provides the client’s engineers with the ability to configure the battery model and apply a range of tests to it.

Feature

September 2015 13

Power

epdtonthenet.net

Figure 2- Cell stack model

Figure 4- SoH simulation showing effect on battery voltage

Figure 3- ESS battery model


If you look at existing flows for power

measurement, you realise that chip designers

are making lots of assumptions when it comes

to generating power numbers for SoCs.

Functional testbench vs. live applicationOver the last year, Mentor Graphics has

worked with leading fabless chip design

companies to establish an emulation flow to

generate accurate power numbers. They do

this by measuring power in a targeted

application environment while running actual

software applications. This includes booting

an OS and then running hundreds of millions

of cycles to locate areas of concern when it

comes to power. The Veloce emulation

system not only has capacity to handle very

large SoCs (up to 2 billion ASIC gates), but

also has the performance required to boot an

OS, run real applications and generate

switching data. In addition, Veloce provides

complete visibility of every design node, a

must-have capability for accurate power

analysis. When it comes to generating the

most accurate power number, it’s best to use

the platform and methodology that allows for

analysing power of a SoC in targeted

application environment at the system level.

Figure 2 illustrates the need for analysing

power while running live SW applications.

Traditional file-based flow For a traditional file-based flow, Veloce is

used to generate switching activity (SAIF)

over a long emulation run. The data is then

used as an input to power analysis tools

for generating average power numbers.

SAIF-based flows are quite common among

customers to do average power estimation;

however such flows do not have temporal

dependency information as they do not store

the full, time-based waveform for all design

states. This gap can impact the accuracy of

average power for memories or IP, where the

calculation is generally more complicated

than just considering cumulative switching.

To facilitate the capture of this conditional and

segmented switching, Veloce supports the

more elaborate version of SAIF known as

“Forward SAIF,” which can capture all the

interesting conditions for switching activity.

This is in principle a State and Path Depend-

ent (SDPD) SAIF file for all library cell ports in

addition to normal SAIF activity for all design

nodes, which improves the accuracy of the

average power. However, the accuracy still

Usage shift leads to methodology shiftPower exploration and accurate power calculation of SoCs in the target application environment is getting executive attention due to the fact that companies are missing market windows because of power issues.

September 201514

Power issues are caused because of a usage shiftin mobile computing

devices. These devices are now being used for playing games, watching moviesin addition to typical cell phone usage. This usage shift warrants a methodology shift in the power analysis fl ow.

Vijay Chobisa & Gaurav Saharawat,Mentor Graphics

Veloce Power Application is enabling a methodology shift in the way power measurements are done to address the new requirements due to usage shift.

epdtonthenet.net

PowerFeature

Figure 1- Dynamic power is still a big focus


depends upon the user-supplied Forward

SAIF, which is time consuming and difficult to

capture as it requires in-depth knowledge of

the design.

The best results come from waveforms that

give full timing information. FSDB or VCD files

are required at times for a variety of other

reasons as well, such as for certain power

tools that guide users about possible power

optimisations. However, using FSDB or VCD

files for emulation has not been an effective

solution given the files’ structure, large read/

write times, disk footprint and lengthy

generation times. The main reason the

FSDB-based flow is slow is because of the

way FSDB organises the data (signal-based

storage) and the way power tools access the

data (time-based access).

Veloce inherently processes and generates

data in a manner that is suitable for time-

based access and hence improves the scope

of performance and efficiency, and also allows

for a more direct, tighter integration with

power tools.

Ultimately there are several reasons the

traditional file-based power analysis flow

is very limited and restrictive for exploring

and analysing power at the SoC level. First,

power tools are not designed to handle large

files generated by emulation. Second, it takes

an unacceptably long time to generate

meaningful power numbers with this flow.

The time it would take to create and read

the file to do a detailed power analysis makes

file based power analysis flow impractical at

the SoC level.

FeaturePower

Veloce Activity Plot allows a power analysis team to run long test sequences and quickly isolate high switching regions over long emulation runs.

Figure 2- Benefit of running the live application

uk.rs-online.com

BEHIND EVERY GENUINE PARTTHERE’S A DISTRIBUTOR YOU CAN COUNT ON


Veloce’s Power Application software delivers

advanced methodology enabling chip

designers to identify power concerns while run-

ning system level tests and then seamlessly

capture detailed information for focused power

analysis.

Veloce activity plot Veloce Activity Plot, shown in Figure 5, is a

distinctive capability that allows a power

analysis team to run long test sequences and

quickly isolate high switching regions over long

emulation runs; these regions represent actual

power concerns. This enables customers to

run real software applications, identify areas

of interest when it comes to power and then

narrow down those application/logic blocks

causing peak switching. It’s possible to view

an Activity Plot of the full or partial design, and

thus to analyse the activity trends of the design

that are directly proportional to the power

consumption pattern. Veloce can produce an

Activity Plot faster compared to file-based

power charts. For an example, Veloce takes

15 minutes to generate an Activity Plot of a

100 million gate design for 75 million design

clock cycles. Power analysis tools will probably

take more than a week to generate similar

information and might not even be able to

handle such a large volume of data. Veloce

Activity Plot provides an activity view for the

entire design scope, including IPs and

sub-hierarchies, all within targeted time

windows of interest.

Once you identify high switching activity

regions at the top level of your design, then

you can analyse the various sub-blocks or

applications that are the main source of this

high switching. Now you can capture this time

zone information in a TZF (Time Zone File) file

and input this to Veloce to generate complete

data for the selected time windows for detailed

power analysis.

Dynamic read waveform API flow Mentor Graphics has worked on a custom-

ised integration with an industry power tool,

PowerArtist. The result is a flow where the

power analysis tool is fed with the switching

data live while emulation is running. The

Dynamic Read Waveform API (DRW-API)

approach enables accurate power calcula-

tion at the system level, where booting an OS

and running software applications is required.

This makes it practical to explore power

exploration at RTL for power budgeting and

tradeoffs, as well as more accurate power

analysis and signoff at the gate level in a

targeted application environment. The

dynamic API-based live streaming exchange

of switching data between emulation and

power analysis tools allows for all the

PowerFeature

September 201516 epdtonthenet.net

The main goal of Project P was to develop a generic, high-quality, framework for code generators that could be easily instantiated for multiple languages such as UML or Simulink.

Figure 3- File-based power analysis flow

Figure 4- Veloce forward SAIF flow

Figure 5- The Veloce Activity Plot identifies focus areas over long runs


operations to be run in parallel - emulating the SoC, capturing

switching data, reading of the switching data by the power

analysis tool and generating power numbers. This brings huge

improvement for time to power generation and also delivers

improved accuracy compared to SAIF based average flows as

conditional controls are incorporated automatically for switching.

The Dynamic API streaming enables the power analysis and

exploration possible at SoC level with long tests and scenarios

that are not possible with a file-based flow.

Designers can now meet and verify their power goals in the

most reliable and efficient manner by combining the power of

two best-in-class tools. There is a natural synergy between the

products. Veloce can boot the OS, run live software applica-

tions and execute verification cycles to collect design activity

over long runs compared to simulation. PowerArtist can

estimate power numbers using design activity captured over

long runs. This delivers more accurate power numbers

compared to simulation or other probabilistic static methods.

Veloce runtime performance and streaming integration with

PowerArtist makes it possible to collect power numbers for a

variety of test scenarios and functional modes in a reasonably

short span of time, and thus enables data-driven decisions

about power.

The new, tighter integration improves the time to power

productivity. Both tools work on the same data model, transfer

switching data in the most optimised method. In addition, it

aligns compile times of both tools as well as incorporates the

native CRITICAL SIGNAL LIST, which further improves

performance and ease-of-use.

A complete RTL exploration and gate-level power signoff flow By eliminating a file-based flow and providing the unique

dynamic read waveform API integration with power analysis

tools, Veloce offers a complete RTL power exploration and

accurate gate level power analysis flow. Customers can start

RTL level power exploration very early, thus allowing them to

do power tradeoffs and make architectural adjustments far

upstream in the design cycle. They then can continue to

use the flow as the design gets frozen and gate-level

representations are prepared for tapeout. At that point, users

can focus on more accurate power measurements and do

additional fine tuning before tapeout and power signoff.

Veloce Power Application is enabling a methodology shift in

the way power measurements are done to address the new

requirements due to usage shift. Chip designers do not need to

rely on functional test benches and extrapolation techniques to

come up with power numbers. The new flow enables booting

OS, running live applications and running different functional

use modes, scenario for generating accurate power data.

September 2015 17epdtonthenet.net

Power Feature

Designers can now meet and verify their power goals in the most reliable and efficient manner by combining the power of two best-in-class tools.

RFI /EMIshielding gaskets

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From the very beginning, the development

teams stressed the importance of an

ergonomic product design and human-

machine interfaces that conform to industrial

standards. It should be possible to integrate

the control units for the robots into any

networks with different nodes.

The search for a small heart with lots of powerAround three years ago, the developer team

headed by Mark Vaynberg was looking for a

small, flexible CPU that could easily be

integrated into the new ROCU-7 control unit.

After a short market analysis, they found the

COM Express mini module from Kontron.

Kontron developed the COM Express mini

module in order to implement power-saving

computer-on-modules with greater x 86

performances on a credit card-sized footprint

(55 x 84 mm).

“The ultra-compact module with COM Express

pin-out type 10 satisfied all the requirements

with regard to functionality and performance

that we expected from an ultra-small

embedded solution for our ROCU-7 control

unit,” Mark Vaynberg says. In addition, the

price-performance ratio and global customer

support at Kontron fit the bill. “Kontron always

Feature

September 2015 19

Embedded

epdtonthenet.net

In critical environments, military and civilian task forces often use unmanned robots in order to scout the terrain and eliminate hot spots. Roboteam has developed the ROCU-7, an intelligent controller that easily does its job even under the toughest conditions. The COM Express mini module from Kontron is a key element in this solution.

Kontron

Unmanned robot as A-team for army and civil defence

Based on their own military experience and intensive talks with users, the

company founders set clear priorities for the developmentof unmanned systems rightfrom the start. The solutions that Roboteam offers should be compact and light-weight, as well as easy to operate. In addition, the application areas for unmanned robotsalso demand 3D representation,video communication and the necessary ruggedness for hard use in the fi eld. Compliance withmilitary standards is mandatory.

From the very beginning, the development teams stressed the importance of an ergonomic product design and human-machine interfaces that conform to industrial standards.


works with the latest Intel processor

technologies, which naturally benefits us as

customers when it comes to speed and

energy efficiency.”

Kontron’s COM Express makes a significant

contribution to the ROCU-7’s flexibility and

broadly diversified deployment scenario,

because it supports widespread commercial

standards and also industrial standards. This

makes it possible to use the controller in this

especially critical setting. As a result, the

systems keep working even when subjected

to extreme temperature fluctuations and

challenging environmental conditions such as

extreme weather, severe dust formation or

almost impassable terrain.

Rugged handheld for tough jobsThe name ROCU-7 stands for Ruggedised

Operator Control Unit and classifies a

handheld with a 7-inch monitor. Roboteam

also offers a version with a 5-inch monitor.

An operator can control various unmanned

systems with just one of the rugged

handhelds from the ROCU-7 series, no

matter whether the device is a terrestrial

robot, an unmanned aerial vehicle (drone) or

a system for use in water.

The Windows-based handheld allows

continuous control of all the units that are

connected. This includes operation of the

unmanned robot as well as control of its

tactical mission. The rugged controller works

with Windows 7 and has numerous standard-

ised interfaces to various solutions. It is

possible to control the entire mission

management and carry out diverse independ-

ent actions.

Control with glove and joystick For even more convenient usability,

Roboteam equipped its rugged controller

with a number of control elements. This

includes joysticks, in addition to rugged

switches that can also be operated with

gloves. The unmanned units can conse-

quently be precisely controlled and

positioned at the site with pinpoint

accuracy. The open interfaces make it

possible to use the intuitive platform that

Roboteam developed, along with complex

external systems that users may be using.

The COM Express modules from Kontron

support this deployment scenario because

they have been specially developed for use

in multi-touch display systems and fulfill the

specifications for the embedded solution

that Roboteam was seeking for its

controller. Roboteam developed the

ROCU-7 control unit on the basis of military

standards in order to satisfy the require-

ments of ground troops around the world.

This allows dangerous missions to be easily

coordinated and carried out from a safe

distance. The solution can also be used

with unmanned air and water robots, in

order to coordinate and control critical

missions in real-time.

“We didn’t use any of the commercially

available standard rugged tablets for the

ROCU-7. Instead we developed our own

solution and used some of the best

components on the market, such as the

COM Express mini modules,” Mark

comments. “This allowed us to design

smaller and more rugged units and equip

them with exactly the control elements that

we had in mind.”

September 201520

EmbeddedFeature

epdtonthenet.net

The name ROCU-7 stands for Ruggedised Operator Control Unit and classifies a handheld with a 7-inch monitor.

EPDT App Qtr Page Hori Ad.indd 1 19/08/2015 15:283973 - EPDT Sept15 Edn.indd 203973 - EPDT Sept15 Edn.indd 20 24/08/2015 11:2524/08/2015 11:25

Convenient operation by day and night Individuality was also a key factor for the

Roboteam developers when it came to the

screen. The rugged controller’s monitor can

also be easily read in bright sunlight and it

even individually adapts to difficult lighting

conditions. Its light components also support

use at night. The unmanned unit that is to

be controlled can be clearly and precisely

identified on the highly specialised screen in

all light conditions. This allows a clear look

at the unmanned robot at all times in all

environments. So-called “starlight readable

screens” are an important tool, especially for

use in tunnels or for underground surveys.

The lightest possible field packAn important factor in Roboteam’s selection

of Kontron was the importance of light and

compact designs for the systems in order to

simplify use in the field. The unmanned robot

and ROCU-7 control unit together weigh a

total of only around 16kg. Task forces can

carry the complete system on their backs

across the terrain until they reach the point at

which the robot has to enter the danger zone.

This means that the soldiers do not have to go

directly to the site of use in order to do their

job. Instead, the munitions that are to be put

in place are laid in the robot’s gripper arm.

The robot then drives by remote control to the

site and deposits the munitions as required.

Once the robot has left the danger zone, the

munitions can be set off from a distance.

Consequently neither the soldiers nor the robot

are endangered. Conversely, this also makes it

possible to retrieve critical materials from

dangerous settings and securely decommis-

sion them in order to protect those involved.

The COM Express mini module from Kontron

has now been working in Roboteam

controllers for more than three years, they

are using the latest generation of the module,

but the older version also continues to work

reliably. This is also required, because as a

rule, the rugged unmanned robots have a

service life of ten or more years assuming

they are appropriately maintained.

FeatureEmbedded

The rugged controller’s monitor can also be easily read in bright sunlight and it even individually adapts to difficult lighting conditions.

Download the new EPD&T App today for free!

Putting the latest Electronic Product Design & Test news at your fi ngertips

EPDT App Qtr Page Hori Ad.indd 1 19/08/2015 15:28

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Looking closer into the intelligent sensor

system structure, the sensors (or transducers)

are connected to one or more microcontroller

unit (MCUs) that are at the core of embedded

systems. The sensor’s output goes to the

MCU’s input. The MCU processes that

incoming signal and executes control functions

accordingly. Depending on the application and

situation, the sensor’s signal might cause the

MCU to execute tasks predefined by the user.

When used together and properly interfaced,

these components function as “detect and

control” electronics, enabling greater

functionality, convenience, safety and efficiency

in embedded sensor systems.

However the transducers’ output signal

generated may be very weak, in a noisy

environment, or delivered in a format

incompatible with the one required by the

MCU. Almost all MCUs have built-in analogue-

to-digital converter functions (ADCs or A/Ds)

for translating analogue sensor signals into a

digital format. Those ADCs have restricted

capabilities; for instance, they generally accept

only a limited range of input voltages. To boost

these signals to the level required by the MCU,

or perform the necessary bridging (adaptation)

function to implement signal compatibility

between the transducer and the MCU, an

Analogue Front End (AFE) is necessary.

Furthermore, the transducers’ output may

contain too many unwanted frequencies. This

noise must be removed before the analogue

signal is converted to digital. The AFE solution

employs low-pass filter circuitry to block out

high-frequency noise and/or high-pass filter

circuits to remove lower-frequency noise.

Engineers in the fast developing industry are

looking for solutions enabling them to reduce

the development time of their analogue circuit,

and release their products faster to the market.

To answer the needs, a new type of AFE

design approach was needed, which is easy

to apply, flexible, quick and effective.

Renesas’ R&D labs have finalised proprietary

Smart Analogue circuitry and development

tools that can significantly reduce the time

and effort to develop new AFEs. Using the

programming side from the MCU, Smart

Analogue makes use of the MCU to control the

design of analogue circuits, adjust its structure

and its characteristics into a sensor application.

Smart Analogue circuits are designed at a

computer screen using configurable designed

operational amplifier circuits that greatly

reduces the design time.

As a sensor equipped system uses different

type of transducers, for many different

purposes, each of these sensors must have

September 201522

AnalogueFeature

epdtonthenet.net

The world of industrial automation is entering the fourth industrial revolution. A paradigm shift in which rising awareness of energy efficiency, environmental concerns and regulations, qualitative productivity and operational health and safety, contribute to the continued growth of machine to machine (M2M) technology. “Smart production” will become a norm in the manufacturing engineering sector, where intelligent machine systems, through networks interconnectivity will be capable of managing industrial production processes independently from human intervention, thereby making the “Internet of Things” a reality.

Bruno Nelta, Renesas ElectronicsEurope

The M2M communications are made possible withthe use of industrial

instrumentation comprising of intelligent sensors. These are capable of capturing eventsand relaying the data overa network to an application that translates the capturedevent into meaningful information that can be analysed and acted upon.

Engineers are looking for solutions enabling them to reduce the development time of their analogue circuit, and release their products faster.

Smart analogue

Figure 1- Customised examples of the configurable amp in the Smart Analogue IC


www.microchip.com/get/32-biteu

PIC32 Microcontroller Families

32-bit Microcontrollers

25% OFFSelected Dev Tools See Page 6

3973 - EPDT Sept15 Supp.indd 13973 - EPDT Sept15 Supp.indd 1 25/08/2015 11:2625/08/2015 11:26

Building on the heritage of Microchip Technology’s world-leading 8- and 16-bit PIC® microcontrollers, the PIC32 family delivers 32-bit performance and more memory to solve increasingly complex embedded system design challenges.

Broad PortfolioFrom simple USB device connectivity to RTOS-drivengraphical user interface applications with advancedaudio processing, there is a PIC32 device to meet your design challenges.

PIC32MZ Series: Up to 200 MHz/330 DMIPS, MIPS® microAptiv™ or M-Class core with DSP instructions

PIC32MX Series: Up to 120 MHz/150 DMIPS, MIPS M4K core

Floating Point Unit (FPU) for fast single- and double-precision math

Memory Management Unit (MMU) for optimum embedded OS execution

Fast interrupts and context switch Dual-panel Flash with live update 16 KB to 2 MB Flash 4 KB to 512 KB RAM for data and program execution Temperature range: −40 to 85ºC; −40 to 105ºC;

0 to 70ºC; −40 to 125ºC (planned) Low pin count devices with Peripheral Pin Select (PPS)

for pin remapping of most digital I/O

Industry-Leading CompatibilityCreate scalable products in a consistent environment.

Common MPLAB® X development tools Pin- and peripheral-compatible with 16-bit PIC MCUs Common software stacks across MCUs Common tools environment for over 1,100 PIC MCUs

Fast, Easy DevelopmentShorten your project design cycle.

Free MPLAB X Integrated Development Environment supporting all Microchip MCUs

Free MPLAB XC32/XC32++ Compiler MPLAB Harmony Software Framework to get you started

with communications, graphics, Bluetooth®, file system,audio and signal processing

Work in a familiar environment with a broad third party ecosystem of IDEs, RTOS and debuggers

Development kits starting at $34.95 with free C compiler

More Design OptionsSimplify your system design through integration.

Extensive analog and digital peripherals including 10/100 Ethernet MAC, I2C™, I2S, 10/12-bit ADCs with up to 48 analog channels, serial communications, SQI, EBI and Hi-Speed USB

Up to 26 DMA channels 8/16-bit parallel master port supporting graphic

interface and additional memory Capacitive touch for improved human interfaces with

capacitive buttons or slider control

Performance-Leading PIC32 Microcontrollers

PIC32 Software Solutions SupportGet the latest updates at www.microchip.com/harmony.yy

USB USB Host, Device, On-the-Go with Class Drivers

HMI

Microchip Graphics Library MPLAB® Harmony Graphics Composer (HGC) mTouch® Capacitive Touch Library Touch System Service Library

CAN CAN Driver and PLIB support for PIC32

Audio and Speech

Audio Library for PIC32MX: Speex, ADPCM and WAV ; MP3 ; AAC Decode and WMA Decode USB Audio 2.0 Device Class ; Sample Rate Conversion (SRC) Library; PIC32 Bluetooth Audio Software Suites ; Audio Equalizer Filter Library

ConnectivityMicrochip TCP/IP with SSL and BSD ; IrDA® Stack; Bluetooth® SPP Stack for PIC32 ; Wi-Fi® Software Library ; IEEE 802.15.4 and Sub-GHz MiWi™ Development Environment

Encryption Cryptographic Library

Basic LibrariesFile System Library ; Floating Point Math Library ; Peripheral Library ; EEPROM Emulation; IEC 60730 Class B Software; Fixed Point Math Library ; Fixed Point DSP Library

Boot Loader

Serial Port Boot Loader USB Host Boot Loader Ethernet Boot Loader

MPLAB Harmony Software Framework compatible. Additional software libraries listed in the table above are planned to be included in MPLAB Harmony.

2 32-bit Microcontrollers


Introduction

MPLAB Harmony is a flexible, abstracted, fully integrated firmware development environment for PIC32 microcontrollers. It enables robust framework developmentof interoperable RTOS-friendly libraries with quick andextensive Microchip support for third party software integration. MPLAB Harmony includes a set of peripherallibraries, drivers and system services that are readily accessible for application development. The code development format allows for maximum re-use and reduces time-to-market. It features the MPLAB Harmony Configurator (MHC) plug-in that provides a graphical way to select andconfigure all MPLAB Harmony components, includingmiddleware, system services and peripherals with ease.

Benefits Faster time-to-market Improved code interoperability Simplified support MPLAB Harmony Configurator (MHC) for enhanced

user experience Improved 32-bit scalability Enhanced third party software integration

MPLAB® Harmony for PIC32

MPLAB Harmony Block Diagram

Application(s)

RTOS(Third Party)

Common System Services

Middleware

Plug-In Plug-In Driver

OSALDriverMiddleware

DriverDriverDriverDriver Driver

PLIBPLIBPLIBPLIB PLIBSystem

ConfigurationRTOS

Configuration

Hardware

SoftwareFramework

MPL

AB

® H

arm

ony

Con

figur

ator

(MH

C)

Application Layer

Abstracted hardware access Allows for easy port across PIC32 parts

Common System Services

Provides common functionality to avoid duplication and conflicts

Eliminates complex interactions and interdependencies between modules

OSAL provides OS compatibility and interface Manages shared resources Supports low-level configuration and board

support package

Peripheral Libraries (PLIB) Layer

Provide functional interface for Microchip PIC32 scalability

Implements part-specific features

Middleware Layer

Implements complex libraries and protocols (USB, TCP/IP, file systems, graphics)

Provides a highly abstracted application program interface Libraries are thread-safe and RTOS-ready Built on drivers, PLIBS, system services Supports third party library integration

Device Driver Layer

Provides highly abstracted interface to peripheral Controls access to the peripheral Manages multiple hardware instances and software

clients with select drivers Manages peripheral state and multiple

peripheral instances Accesses hardware via PLIB Supports blocking or non-blocking code

PIC32 Software Development Tools Available with MPLAB Harmony

ApplicationsOperating System

Abstract Layer (OSAL)

Middleware/

Software LibrariesDevice Drivers

Development

Software

Third Party

Software

Graphics applications

TCP/IP applications and utilities

USB applications

OSAL interface with “basic” and “none” implementation

ThreadX embOS FreeRTOS OpenRTOS Micrium μC/OS-II Micrium μC/OS-III

Graphics TCP/IP USB Cryptographic

libraries File systems System services Bluetooth® DSP/Math

ADC Ethernet media access

controller Ethernet PHY interface Controllerless graphics Epson LCD controller Non-volatile memory SPI, UART, high-speed USB Timer, parallel master port

MPLAB® X IDE MPLAB XC32++ MPLAB Harmony

Configurator (MHC) Plug-In

MPLAB Harmony Graphics Composer (HGC)

Board SupportPackages (BSP)

DHCP DNS Networking Security Cloud services

Additional software components planned



Inside the MIPS® M4K Core PIC32 MCU

Note: Not all features are available on all PIC32 devices. Please see product family table for more information.

Rich integrated analog

and digital peripheral set,

compatible with 16-bit

PIC® microcontrollers

AnalogComparators

(3)I2S/SPI

(4)I2C™

(5)RTCCUART

(6)

CAN 2.0b(2)

Instruction Data

512 KBFlash

U-bit ALU

M4K 32-bit Core

128 KBSRAM

12 KFlas

51F

PrefetchBufferCache

PrefetchBuffff erC h

128 KBSRAM

GPIO(85)PIO85) VREG

Shadow SetShadow Set

32 CoreRegisters

JTAG

Trace

SRR32-bit

HWMul/Div

2-WireDebug

DMA8 Ch.

2-WireDebug

gtors I2C™

48 Ch.10-bitADC

AnaloCompara

16-bitParallel

Port

I2S/SPT

OutputComparePWM (5)

PI RTC

16-bitTimers

(5)

™ UARRT

InputCapture

(5)

8P8(

G(

InterruptController

nterruptontroller

10/100Ethernet

MACCUSB

OTG

2 Ch. DMA 4 Ch. DMA

MACM

2 Ch. DMA

CapacitiveTouch

Bus Matrix

Peripheral Bus

0/10010hernetEth

RMII/MII

120 MHz, 5 Stage Pipelin

, 1.65 DPipelin

M4 M4

JTAG

Trace 332-bitHWHW

Mul/DivM

®

32-bit MIPS M4K core,

Harvard architecture,

Single-cycle hardware

MAC fast interrupts and

context switch

Direct memory access

controller with integrated

CRC module operates

in idle mode

USB On-The-Go

controller with dedicated

DMA channels and

integrated transceivers

Single 2.3 to 3.6V

supply power-on

reset, brown-out

reset, low voltage

detection

High-throughput

Bus matrix with

high-speed

concurrent access

to memories,

peripherals and I/O

Flexible 1:1 to

1:8 ratio with

Bus matrix to suit

application needs

10/100 Ethernet

MAC with dedicated

DMA channels and

MII/RMII interfaces

MPLAB® X IDE,

MPLAB ICD 3

In-Circuit Debugger

and MPLAB

REAL ICE™

In-Circuit Emulator

compatible

CAN 2.0b, with

configurable buffers

and advanced filtering

512 KB, 128-

bit wide self-

programmable

Flash, predictive

instruction pre-fetch

256 byte Cache

16-bit Parallel master port with

programmable wait states.

Connects to SRAM, Flash, graphic

LCDs or other peripherals



Note: Not all features are available on all PIC32 devices. Please see product family table for more information.

Inside the MIPS32® microAptivTM Core PIC32 MCU

BORReset

I2S/SPI(6) RTCCIC

(9)

PORReset

BOR

WDT

I2S/SP(6)

OutputComparePWM (9)

RT

I2C™(5)

IC

Timer(9)

CAN 2.0b(2)

Instruction Data

t CPU + DSP + FPU

MIPS32 M-Class Core

512 KBSRAMPrefetchPrefetch 2 KB

RAM

12-bit ADC

PPS

DataCache

Instr ctioon

EJTAGEJTAG

Trace

BPSP

DCaCa

Inst.Cache

4-WireDebug

DMA8 Ch.

4-WiireDebuug

EthernetMAC

8 Ch.

CAN2.0b(2)

HighSpeedUSB (2)B8 Ch.DMA

HigSpeeUSB

SQIBh

MAADM

USB8 ChDMDMAADM

2 Ch.DMA

EBIBIEBPMP

De

12-bADC

Comparator(2)

SQI

h.AAA

CryptoEngine

2 ChMDMDMAAADMDM

g

2 Ch.DMA

(2)

4 Ch.DMA

2 Ch.DMA

High-Speed Bus Matrix

Peripheral Buses

512SR

2 MB FlashDual PanelLive Update

®

High-endurance,

flexible and secure

Flash with dual

Flash banks for

live update

MPLAB X

IDE, MPLAB

ICD 3 In-Circuit

Debugger and

MPLAB REAL ICE

In-Circuit Emulator

compatible

10/100 Ethernet

MAC with dedicated

DMA channels and

MII/RMII interfaces

CAN 2.0b, with

configurable

buffers and

advanced filtering

Hi-Speed USB

Device/Host/OTG

controller with

dedicated DMA

channels and

integrated

transceivers

Direct memory

access controller

with integrated CRC

module operates

in idle mode

High-performance,

real-time embedded MCU

core with DSP and FPU.

Offers up to 35% code

size reduction operating at

near-full rate.

Reduces software

overhead and actions

such as encryption,

decryption and

authentication

are executed

more quickly

A synchronous

serial interface

that provides

access to serial

Flash memories

and other serial

devices

Convenient

standard CODEC

interface for

high-quality audio

PMP/EBI provides

a high-speed

and convenient

interface to

external parallel

memory devices,

camera sensors

and LCDs



PIC32 Starter KitsGetting started is easy with any of the fully integrated PIC32 Starter Kits. They feature simple installation, a getting started tutorial and a PIC32 starter board which easily connects to your PC via USB. The starter kits include:

MPLAB X IDE and MPLAB XC32 C Compiler†

PIC32 starter board with integrated programmer and debugger Code examples, documentation, tutorials and sample projects; optional I/O

expansion board allows signal breakouts and connections for PICtail™ Plus daughter cards

†Free version has no code size limit and full optimizations. After 60 days some optimizations are disabled.

PIC32 Development Tools

Choose a Platform: Explorer 16 Platform OR Starter Kit Platform

Microchip is the only silicon vendor with a full 8-, 16- and 32-bit microcontroller portfolio supported by a unified development environment. The MPLAB® X IDE is free and easy to use.

Developing with the PIC32 Microcontroller

Explorer 16 Platform

MPLAB® ICD 3In-Circuit Debugger

(DV164035)

Explorer 16 Development Board

(DM240001)

Explorer 16 Development Board +

MPLAB REAL ICEIn-Circuit EmulationSystem (DV244005)

PIC32 Plug-in Modules(MA320001/2/3/11/12/14/15/18)

(MA320002-2)

AND OR

PIC32MX460F512L PIC32MX460F512L PIC32MX460F512L

PIC32MX1/2/5 Starter Kit

(DM320100)

PIC32 BluetoothStarter Kit

(DM320018)

PIC32 Audio Codec Daughter Board

(AC320100)

USE THE COUPON CODE (MX57MHZ8) at www.microchipdirect.com TODAY!*

SPECIAL OFFER ON SELECTED DEVELOPMENT TOOLS

25%%OFF

CAN Bus Analyzer(APGDT002)

*This Offer applies to purchases made before 31st December 2015

Note: “Plug-in board for PIC32 Bluetooth Starter Kit”.



Starter Kit Platform

PIC32 EthernetStarter Kit II

(DM320004-2)

OPTIONAL

PIC32 I/OExpansion Board

(DM320002)

MultimediaExpansion Board

(DM320005)

PIC32 Audio Codec Daughter Board

(AC320100)

PIC32 Audio DAC Daughter Board(AC320032-2)

PIC32 Starter Kit(DM320001)

PIC32 USBStarter Kit II

(DM320003-2)

PIC32MX1/2/5 Starter Kit

(DM320100)Microstick II

(DM330013-2)

PIC32 BluetoothStarter Kit

(DM320018)

PIC32 GUI Development Board with Projected Capacitive Touch

(DM320015)

PIC32 USBStarter Kit III

(DM320003-3)

Wi-Fi® G Demo Board(DV102412)

PIC32MZ Embedded Connectivity Starter Kit

(DM320006)

MultimediaExpansion Board II

(DM320005-2)

PIC32 Bluetooth® Audio Development Kit

(DV320032)

PIC32MZ Embedded Connectivity Starter Kit

with Crypto Engine(DM320006-C)


*Does not work with the Explorer 16 Development Board

PIC32 Plug-in Modules for Bluetooth Audio Development Kit

(MA320013/16/17/19)*

PIC32MZ with FPU Embedded Connectivity

Starter Kit(DM320007)

Crpyto Engine EmbeddedConnectivity Starter Kit

(DM320007-C)



Third Party Application Software and Hardware Support

MPLAB Harmony Software Framework compatible.For up-to-date information about our 32-bit portfolio, related development tools and technical support, visit: www.microchip.com/PIC32.

Ashling Microsystems AVIX-RT chipKIT.net CMX Systems Digilent Inc. E.E. Tools EasyCode EasyGUI efl ightworks ELNEC Express Logic

FreeRTOS Fubarino Green Hills Software Inc. HCC-Embedded Interniche Technologies Inc. Lauterbach Macraigor Systems Micriμm Micro/sys Inc. OLIMEX Ltd. OpenRTOS

Pumpkin PubNub RoweBots Research Inc. Schmalzhaus SEGGER Serious Integrated Softlog SparkFun Electronics TechToys Company Virtual Fab wolfSSL


PICtail™ Boards Common to Both Development Platforms

... and many more!

Daughter Board(AC320011)

MRF24WB0MA Wi-FiDaughter Board (AC164136-4)

MRF24J40MA PICtail Plus 2.4 GHz RF Card

(AC164134)

Graphics Daughter Board with 3.2" Display Kit

(AC164127-3)

CAN/LIN PICtail PlusDaughter Board(AC164130-2)

Low-Cost Controllerless (LCC) Graphics PICtail Plus Board

(AC164144)

PIC32MX CTMU Evaluation Board

(AC323027)

Graphics Controller PICtail Plus Epson S1D13517 Board

(AC164127-7)

Graphics Display Truly 7"800 × 480 (WVGA) PICtail Plus Board (AC164127-9)

PIC32 VGA Camera Sensor (VCS) PICtail Plus Board

(AC164150)



PIC32 Microcontroller Product Families

PIC32MX Devices

Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B (

Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C 1

Msps

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Tem

p.

Range (

°C)

PIC32MX110F016B 16 + 3 4 28

40

2/22

24/0 Y N N N 5/5/5

10

3 5/2 Y Y Y −40 to +105

PIC32MX110F016C 16 + 3 4 36 12

PIC32MX110F016D 16 + 3 4 44 13

PIC32MX120F032B 32 + 3 8 28

40/ 50

10

PIC32MX120F032C 32 + 3 8 36 12

PIC32MX120F032D 32 + 3 8 44 13

PIC32MX120F064H 64 + 3 8 64 3 4 28

PIC32MX130F064B 64 + 3 16 28

40 2/2

2

2

4/0 Y N N N 5/5/5

10

3 5/2 Y Y Y −40 to +105

PIC32MX130F064C 64 + 3 16 36 12

PIC32MX130F064D 64 + 3 16 44 13

PIC32MX130F128H 128 + 3 16 64

40/ 50

3 4 28

PIC32MX130F128L 128 + 3 16 100 4 5 48

PIC32MX130F256B 256 + 3 16 28 2

2

10

PIC32MX130F256D 256 + 3 16 44 2 13

PIC32MX150F128B 128 + 3 32 28

2/2

10

PIC32MX150F128C 128 + 3 32 36 12

PIC32MX150F128D 128 + 3 32 44 13

PIC32MX150F256H 256 + 3 32 64 3 4 28

PIC32MX150F256L 256 + 3 32 100 4 5 48

PIC32MX170F256B 256 + 3 64 282/2 2

10

PIC32MX170F256D 256 + 3 64 44 13

PIC32MX170F512H 512 + 3 64 64 3 4 28

PIC32MX170F512L 512 + 3 64 100 4 5 48

PIC32MX210F016B 16 + 3 4 28

40

2/2 2 2 4/2 Y FS N N 5/5/5

9

3 5/2 Y Y Y −40 to +105

PIC32MX210F016C 16 + 3 4 36 12

PIC32MX210F016D 16 + 3 4 44 13

PIC32MX220F032B 32 + 3 8 2840/ 50

9

PIC32MX220F032C 32 + 3 8 36 12

PIC32MX220F032D 32 + 3 8 44 13

PIC32MX230F064B 64 + 3 16 28

40 2/2

2

2

4/2 Y FS N N 5/5/5

9

3 5/2 Y Y Y −40 to +105

PIC32MX230F064C 64 + 3 16 36 12

PIC32MX230F064D 64 + 3 16 44 13

PIC32MX230F128H 128 + 3 16 64

40/ 50

3 4 28

PIC32MX230F128L 128 + 3 16 100 4 5 48

PIC32MX230F256B 256 + 3 16 28 2

2

9

PIC32MX230F256D 256 + 3 16 44 2 13

PIC32MX250F128B 128 + 3 32 28

2/2

9

PIC32MX250F128C 128 + 3 32 36 12

PIC32MX250F128D 128 + 3 32 44 13

PIC32MX250F256H 256 + 3 32 64 3 4 28

PIC32MX250F256L 256 + 3 32 100 4 5 48

PIC32MX270F256B 256 + 3 64 282/2 2

9

PIC32MX270F256D 256 + 3 64 44 13

PIC32MX270F512H 512 + 3 64 64 3 4 28

PIC32MX270F512L 512 + 3 64 100 4 5 48

AEC-Q100 qualified for grade 2 and 3. Check individual product pages on www.microchip.com for details.




Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B (

Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C 1

Msps

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Tem

p.

Range (

°C)

PIC32MX320F032H 32 + 12 8 64 40

2/2 2

2 0/0 N

N N N 5/5/5

16 ch

2 5/2 Y Y Y −40 to +105

PIC32MX320F064H64 + 12 16 64

40

PIC32MX320F064H 80

PIC32MX320F128H128 + 12 16

6480

PIC32MX320F128L 100

PIC32MX330F064H64 + 12 16

64100

44/0 Y 28

chPIC32MX330F064L 100 5

PIC32MX340F128H128 + 12 32

6480

2/2 2 2 4/0 N N N N 5/5/5 16 ch 2 5/2 Y Y Y −40 to

+105

PIC32MX340F128L 100

PIC32MX340F256H256 + 12 32

6480

PIC32MX360F256L 100

PIC32MX340F512H512 + 12 32

6480

PIC32MX360F512L 100

PIC32MX350F128H

128 + 12 3264

100 2/2 2

4

4/0 Y N N N 5/5/5 28 ch 2 5/2 Y Y Y −40 to

+105

PIC32MX350F128L100/ 124 5

PIC32MX350F526H

256 + 12 6464 4

PIC32MX350F526L100/ 124 5

PIC32MX370F512H

512 + 12 12864 4

PIC32MX370F512L100/ 124 5

PIC32MX420F032H 32 + 12 8 64 40 0/1

2

2 0/2 N

FS N N 5/5/5

16 ch

2 5/2 Y Y Y −40 to +105

PIC32MX430F064H64 + 12 16

64100

2/2 44/2 Y 28

chPIC32MX430F064L 100 2/2 5

PIC32MX440F128H128 + 12 32

6480

0/1

2

4/2

N 16 ch

PIC32MX440F128L 100 0/2

PIC32MX440F256H256 + 12 32

6480

0/1

PIC32MX460F256L 100 0/2

PIC32MX440F512H512 + 12 32

6480

0/1

PIC32MX460F512L 100 0/2

PIC32MX450F128H

128 + 12 3264

100

2/2

4

Y 28 ch

PIC32MX450F128L100/ 124 5

PIC32MX450F256H

256 + 12 6464

100/ 120

4

PIC32MX450F256L100/ 124 5

PIC32MX470F512H

512 + 12 12864 4

PIC32MX470F512L100/ 124 5

PIC32MX Devices (Continued)

Note: AEC-Q100 qualified for grade 2 and 3. Check individual product pages on www.microchip.com for details.



PIC32MX Devices (Continued)

Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B (

Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C 1

Msps

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Tem

p.

Range (

°C)

PIC32MX530F128H 128+3 16 64

40/ 50

3

2

4

4/4 Y FS N Y 5/5/5

28

3 5/2 Y Y Y −40 to +105

PIC32MX530F128L 128+3 16 100 4 5 48

PIC32MX570F512H 512+3 64 64 3 4 28

PIC32MX570F512L 512+3 64 100 4 5 48

PIC32MX570F512H 512+3 64 64 3 4 28

PIC32MX570F512L 512+3 64 100 4 5 48

PIC32MX534F064H

64 + 12

1664

800/3 4

6

4/4

N FS N 1 5/5/5 16 ch 2 5/2 Y Y Y −40 to

+105

PIC32MX534F064L 100 0/4 5

PIC32MX564F064H32

6480

0/3 4

PIC32MX564F064L 100 0/4 5

PIC32MX564F128H128 + 12 32

6480

0/3 4

PIC32MX564F128L 100 0/4 5

PIC32MX575F256H256 + 12 64

6480

0/3 4

8/4PIC32MX575F256L 100 0/4 5

PIC32MX575F512H512 + 12 64

6480

0/3 4

PIC32MX575F512L 100 0/4 5

PIC32MX664F064H64 + 12 32

6480

0/3 4

6

4/4

N FS Y N 5/5/5 16 ch 2 5/2 Y Y Y −40 to

+105

PIC32MX664F064L 100 0/4 5

PIC32MX664F128H128 + 12 32

6480

0/3 4

PIC32MX664F128L 100 0/4 5

PIC32MX675F256H256 + 12 64

6480

0/3 4

8/4

PIC32MX675F256L 100 0/4 5

PIC32MX675F512H

512 + 12

6464

800/3 4

PIC32MX675F512L 100 0/4 5

PIC32MX695F512H128

6480

0/3 4

PIC32MX695F512L 100 0/4 5

PIC32MX764F128H128 + 12 32

6480

0/3 4

6

4/6

N FS Y

1

5/5/5 16 ch 2 5/2 Y Y Y −40 to

+105

PIC32MX764F128L 100 0/4 5

PIC32MX775F256H256 + 12 64

6480

0/3 4

8/8 2

PIC32MX775F256L 100 0/4 5

PIC32MX775F512H

512 + 12

6464

800/3 4

PIC32MX775F512L 100 0/4 5

PIC32MX795F512H128

6480

0/3 4

PIC32MX795F512L 100 0/4 5


Note: AEC-Q100 qualified for grade 2 and 3. Check individual product pages on www.microchip.com for details.




PIC32MZ Devices

Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B

(Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C

AD

C S

/H

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

SQ

I

EB

I

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Cry

pto

Engin

e

Tem

p.

Range (

°C)

PIC32MZ2048ECG1442048 + 160

512 144 200 6 5 68/12

Y HS YN

9/9/9 48 ch 1 2 9/4 Y Y Y Y Y N −40 to

+85PIC32MZ2048ECH144

2048 + 160 8/16 2

PIC32MZ2048ECG1242048 + 160

512 124 200 6 5 68/12

Y HS YN

9/9/9 48 ch 1 2 9/4 Y Y Y Y Y N −40 to


2048 + 160 8/16 2

PIC32MZ2048ECG1002048 + 160

512 100 200 6 5 68/12

Y HS YN

9/9/9 40 ch 1 2 9/4 Y Y Y Y Y N −40 to


2048 + 160 8/16 2

PIC32MZ2048ECG0642048 + 160

512 64 200 4 4 68/12

Y HS YN

9/9/9 24 ch 1 2 9/4 Y Y N Y Y N −40 to


2048 + 160 8/16 2

PIC32MZ1024ECG1441024 + 160

512 144 200 6 5 68/12

Y HS YN

9/9/9 48 ch 1 2 9/4 Y Y Y Y Y N −40 to


1024 + 160 8/16 2

PIC32MZ1024ECG1241024 + 160

512 124 200 6 5 68/12

Y HS YN

9/9/9 48 ch 1 2 9/4 Y Y Y Y Y N −40 to


1024 + 160 8/16 2

PIC32MZ1024ECG1001024 + 160

512 100 200 6 5 68/12

Y HS YN

9/9/9 40 ch 1 2 9/4 Y Y Y Y Y N −40 to


1024 + 160 8/16 2

PIC32MZ1024ECG0641024 + 160

512 64 200 4 4 68/12

Y HS YN

9/9/9 24 ch 1 2 9/4 Y Y N Y Y N −40 to


1024 + 160 8/16 2

PIC32MZ2048ECM1442048 + 160

512 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 ch 1 2 9/4 Y Y Y Y Y Y −40 to

+85PIC32MZ2048ECM124

2048 + 160

PIC32MZ2048ECM1002048 + 160

512100

2006 5

6 8/18 Y HS Y 2 9/9/9

40 ch

1 2 9/4 Y YY

Y Y Y −40 to +85

PIC32MZ2048ECM0642048 + 160 64 4 4 24

ch N

PIC32MZ1024ECM1441024 + 160

512144

200 6 5 6 8/18 Y HS Y 2 9/9/9 48 ch 1 2 9/4 Y Y Y Y Y Y −40 to

+85PIC32MZ1024ECM124

1024 + 160 124

PIC32MZ1024ECM1001024 + 160

512100

2006 5

6 8/18 Y HS Y 2 9/9/9

40 ch

1 2 9/4 Y YY

Y Y Y −40 to +85

PIC32MZ1024ECM0641024 + 160 64 4 4 24

ch N




PIC32MZ Devices with Floating Point Unit (FPU)

Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B

(Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C

AD

C S

/H

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

SQ

I

EB

I

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Cry

pto

Engin

e

Tem

p.

Range (

°C)

PIC32MZ2048EFG1442048 + 160

512 144 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ2048EFH1442048 + 160 8/16 2

PIC32MZ2048EFG1242048 + 160

512 124 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ2048EFH1242048 + 160 8/16 2

PIC32MZ2048EFG1002048 + 160

512 100 200 6 5 68/12

Y HS Y–

9/9/9 40 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ2048EFH1002048 + 160 8/16 2

PIC32MZ2048EFG0642048 + 160

512 64 200 4 4 68/12

Y HS Y–

9/9/9 24 6 2 9/4 Y Y N Y Y N −40 to +85

PIC32MZ2048EFH0642048 + 160 8/16 2

PIC32MZ1024EFG1441024 + 160

512 144 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFH1441024 + 160 8/16 2

PIC32MZ1024EFG1241024 + 160

512 124 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFH1241024 + 160 8/16 2

PIC32MZ1024EFG1001024 + 160

512 100 200 6 5 68/12

Y HS Y–

9/9/9 40 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFH1001024 + 160 8/16 2

PIC32MZ1024EFG0641024 + 160

512 64 200 4 4 68/12

Y HS Y–

9/9/9 24 6 2 9/4 Y Y N Y Y N −40 to +85

PIC32MZ1024EFH0641024 + 160 8/16 2

PIC32MZ2048EFM1442048 + 160 512 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to

+85


+85


+85


+85


+85


+85


+85


+85

Note: AEC-Q100 qualified for grade 1, 2 and 3. Check individual product pages on www.microchip.com for details. Please contact your Microchip representative for availability.



Device

Fla

sh K

B +

Boot

Fla

sh (

KB

)

SR

AM

(K

B)

Pin

Count

Speed (

MH

z)

I2S

/S

PI

I2C

™

UA

RTs

DM

A C

hannels

Genera

l/D

edic

ate

d

PP

S

US

B

(Full/

Hi-S

peed)

10

/1

00

Eth

ern

et

CA

N 2

.0b

IC/

OC

/P

WM

10

-bit

AD

C

AD

C S

/H

Analo

g C

om

para

tor

Tim

ers

16

b/

32

b

RTC

C

SQ

I

EB

I

Para

llel M

aste

r Port

JTA

G P

rogra

m, D

ebug,

Boundary

Scan

Cry

pto

Engin

e

Tem

p.

Range (

°C)

PIC32MZ1024EFE1441024 + 160

256 144 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFF1441024 + 160 8/16 2

PIC32MZ1024EFE1241024 + 160

256 124 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFF1241024 + 160 8/16 2

PIC32MZ1024EFE1001024 + 160

256 100 200 6 5 68/12

Y HS Y–

9/9/9 40 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ1024EFF1001024 + 160 8/16 2

PIC32MZ1024EFE0641024 + 160

256 64 200 4 4 68/12

Y HS Y–

9/9/9 24 6 2 9/4 Y Y N Y Y N −40 to +85

PIC32MZ1024EFF0641024 + 160 8/16 2

PIC32MZ1024EFK1441024 + 160 256 144 200 6 5 6 8/18 Y HS Y 2 9/9/9 48 6 2 9/4 Y Y Y Y Y Y −40 to

+85


+85


+85

PIC32MZ1024EFK0641024 + 160 256 64 200 4 4 6 8/18 Y HS Y 2 9/9/9 24 6 2 9/4 Y Y N Y Y Y −40 to

+85

PIC32MZ0512EFE144512 + 160

128 144 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ0512EFF144512 + 160 8/16 2

PIC32MZ0512EFE124512 + 160

128 124 200 6 5 68/12

Y HS Y–

9/9/9 48 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ0512EFF124512 + 160 8/16 2

PIC32MZ0512EFE100512 + 160

128 100 200 6 5 68/12

Y HS Y–

9/9/9 40 6 2 9/4 Y Y Y Y Y N −40 to +85

PIC32MZ0512EFF100512 + 160 8/16 2

PIC32MZ0512EFE064512 + 160

128 64 200 4 4 68/12

Y HS Y–

9/9/9 24 6 2 9/4 Y Y N Y Y N −40 to +85

PIC32MZ0512EFF064512 + 160 8/16 2


+85


+85


+85

PIC32MZ0512EFK064512 + 160 128 64 200 4 4 6 8/18 Y HS Y 2 9/9/9 24 6 2 9/4 Y Y N Y Y Y −40 to

+85

PIC32MZ Devices with Floating Point Unit (FPU) (Continued)


Note: AEC-Q100 qualified for grade 1, 2 and 3. Check individual product pages on www.microchip.com for details. Please contact your Microchip representative for availability.



64-lead TQFP10 × 10 mm (PT)

64-lead QFN9 × 9 mm (MR)

100-lead TQFP12 × 12 mm (PT)

121-ball BGA10 × 10 mm (BG)

100-ball TFBGA*7 × 7 × 1.2 mm

100-lead TQFP14 × 14 mm (PF)

28-pin SSOP10.2 × 7.8 mm (SS)

28-pin QFN6 × 6 mm (ML)

28-pin SOIC17.9 × 10.3 mm (SO)

28-pin SPDIP36 × 7.5 mm (SP)

44-pin QFN8 × 8 mm (ML)

44-pin TQFP10 × 10 mm (PT)

36-pin VTLA5 × 5 mm (TL)

44-pin VTLA6 × 6 mm (TL)

124-lead VTLA (TL)9 × 9 mm

144-lead LQFP (PL)20 × 20 × 1.4 mm

144-lead TQFP (PH)16 × 16 × 1 mm

Package Options

*For availability please contact your local Microchip Sales Office.



Microchip Technology Inc.2355 W. Chandler Blvd.

Chandler, AZ 85224-6199

Support

in developing products faster and more efficiently. We maintain a worldwide network of field applicationsengineers and technical support ready to provide product and system assistance. In addition, the following service areas are available at www.microchip.com:

Support link provides a way to get questions answered fast: http://support.microchip.com

Sample link offers evaluation samples of any Microchip device: http://sample.microchip.com

Forum link provides access to knowledge base and peer help: http://forum.microchip.com

Buy link provides locations of Microchip Sales ChannelPartners: www.microchip.com/sales

TrainingIf additional training interests you, then Microchip can help. We continue to expand our technical training options, offering a growing list of courses and in-depth curriculum locally, as well as significant online resources – whenever you want to use them.

Technical Training Centers and Other Resources:www.microchip.com/training

MASTERs Conferences: www.microchip.com/masters

Worldwide Seminars: www.microchip.com/seminars

eLearning: www.microchip.com/webseminars

The Microchip name and logo, the Microchip logo, the PIC32 logo, MPLAB and PIC are registered trademarks and MiWi, PICtail and REAL ICE are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. mTouch is a registered trademark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ©2015, Microchip Technology Incorporated. All Rights Reserved. DS30009904Q. ML2159Eng07.15

www.microchip.com

Microchip authorised UK distributors and contact numbers:

Arrow Electronics

Tel: +44 1279 441144Fax: +44 1279 455466

Avnet-Memec

Tel: +44 1844 263600Tel: +44 1844 263601

Avnet-Silica

Tel: +44 1438 788 310Fax: +44 1438 788 250

Digi-Key Corporation

Tel: +1 800 344 4539Fax: +1 218 681 3380

Farnell

Fax: +44 8447 11 11 12

Future Electronics

Tel: +44 1784 275 000Fax: +44 1784 275 600

Micross

Tel: +44 1603 788 967Fax: +44 1603 788 920

Mouser Electronics

Tel: +44 1494 467 490Fax: +44 1494 467 499

RS Components Ltd

Tel: +44 8457 201 201Fax: +44 8458 509 911

Rutronik UK Ltd

Tel: +44 1204 602 200Fax: +44 1204 602 210


its own analogue circuit. Renesas Electronics

therefore designed a platform that enables the

user to design the most basic analogue circuit

to the more advanced Op-amp based

topologies, by selecting and combining appro-

priate types of Op-amp.

The AFE engineer is able to get his develop-

ment projects up and running quickly and

easily, with the powerful GUI-based sensor

configuration software tool that enables “on

the fly”, i.e. while system is operating,

configuration and simulation of the analogue

front-end. The designer can easily, via simple

mouse operation at the screen of a personal

computer or work station, select the wiring

and connections between the analogue

blocks, change gain values or do offset

tuning, and adjust other parameters. This

greatly simplifies sensors calibration or

debugging and can reduce the overall design

lead time between 3 to 8 months, significantly

lowering development costs.

The chip can be custom-configured to

implement a range of signal amplification

gains and it provides an adjustable span of

signal voltage offsets (see Figure 1). Addition-

ally, the single-channel general-purpose amp

in the AFE can be configured to implement a

single-channel high-impedance instrumenta-

tion amplifier. This type of differential amplifier

is essential for interfacing to high-impedance

sensors such as piezoelectric types (see

Figure 2).

Other elements found in the Smart Analogue

blocks portfolio are single-channel amp (with

sync detection), single-channel low-pass/high-

pass filter with variable cutoff frequency, high

precision 16 or 24-bit Delta-sigma A/D

converter with built-in AUTOSCAN sequencer

and programmable gain instrumentation

amplification.

Compared to the classical discrete approach,

component count can be reduced by a factor

of ten, allowing for a much smaller overall

footprint. Additionally, the power-on/off feature

of each block of Smart Analogue subsystem

yields significant savings in power consump-

tion, in some cases as much as 20 per cent.

The Smart Analogue platform approach is

particularly versatile and convenient. It can be

implemented in two ways. One method based

on a Smart Analogue IC, which is a single-

chip silicon die implementation of an AFE.

System engineers insert it into the embedded

control system to connect the transducer to

the MCU. The other one applies a Smart

Analogue MCU, a device that combines both

AFE and MCU chips into a single, integrated

package.

The Smart Analogue MCU combines a Smart

Analogue IC and an MCU into a space-saving,

single-package device simplifying the design

of sensor-based embedded control systems.

Its internal MCU can be used to optimise the

sensor compatibility of the AFE chip, as well

as to control that chip’s signal-interfacing

characteristics. Due to this unique combina-

tion of capabilities, the Smart Analogue MCU

is the only AFE solution that can handle the

different outputs from diverse types of voltage,

current and differential-output sensors. It

provides enough connection terminals to

accommodate all the sensors typically

needed, eliminating the traditional requirement

to have a separate AFE circuit for each sensor.

The Smart Analogue MCU helps shrink the

circuit board, while simultaneously decreasing

system component counts and costs.

The reconfigurable characteristics of Smart

Analogue, means that engineers now have a

field programmable solution which can be

used to plan sensor sensitivity loss over time.

Existing AFE design approaches make it

necessary during the manufacturing process

to perform manual trimming to compensate

for variations in sensor characteristics. By

contrast, a Smart Analogue MCU automates

this process with the implementation of

automatic self-correction features. Thereby

cutting system production and commission-

ing costs, while increasing the sensor-based

system’s operating lifetime.

Using the new Smart Analogue solutions,

engineers can readily select the configuration

and main features of the AFE they require

and, thereafter, change those selections as

often as necessary. This flexible design

capability significantly reduces the time that

otherwise would be necessary for component

selection, board design, and parts

procurement.

Smart Analogue technology represents a

new innovative platform for AFE design

contributing to the implementation of

enhanced features into intelligent sensors,

with the added values of downsized systems,

shortened design cycle and lowered system

cost. By saving cost and time, the new

customisable semiconductor devices enable

sensor manufacturers to create products that

otherwise might be too expensive to produce

or take too long to bring to market.

Feature

September 2015 23

Analogue

The Smart Analogue MCU combines a Smart Analogue IC and an MCU into a space-saving, single-package device simplifying the design of sensor-based embedded control systems.

epdtonthenet.net

Figure 2- High-impedance instrumentation amp built from the AFE chip’s 3-channel configurable amplifier


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EZ-Test Points: Surface Mount and Low Profile

Harwin’s SMT Test Points are fully auto-placeable to PCBs, minimizing installation costs. Available in three sizes:

• S1751-46R – largest size, suitable forstandard test clips and hooks

• S2751-46R – 2012 metric footprint (0805 imperial),suitable for micro test clips

• S2761-46R – 1608 metric footprint (0603 imperial),also suitable for micro test clips

These components are specific targets for test engineers to use,permitting a clip-on facility and allowing hands-free testing.

For technical specifications go to:

www.harwin.com/test-points

Eliminating damage & extra operations

with SMT Test Points

P I C K & P L A C E R E A D Y B Y D E S I G NP I C K & P L A C E R E A D Y B Y D E S I G N


Feature

September 2015 25

Manufacturing

epdtonthenet.net

Component obsolescence has always been a key challenge across industries but with consumer markets rocketing, industry sectors risk being left behind.

PCB cloning techniques to maximise ROI on complex systems

Before expanding on this, it is important to

define what is meant by obsolescence.

Obsolescence can range from perceived

obsolescence, in which perceived need

is the main driver as opposed to actual

redundancy, through to technical

obsolescence in which technological change

is the main issue. For the purpose of this

article, however, it simply means that the

item is discontinued and no longer being

manufactured.

Solutions to this type of obsolescence are

extremely inefficient when compared with

the fiscal return that is being achieved. The

easiest solution is to find a replacement of

the PCB (Printed Circuit Board) in question,

which serves the same function. The

problem that arises when the obsolete PCB

is no longer available for market reasons is

finding a ‘like for like’ functional replacement.

Additionally within mission critical systems,

this substitution is often not compliant with

procedures. Subsequently, solutions such as

partial or full redesign are considered, at

which point the solution to the problem

begins to get expensive.

PCB cloning provides the ability, in essence,

to remanufacture the PCB by creating a

The popularity of consumer electronics has led to a rapid change in the prospects presented by the industrial markets to electronics manufacturers. The business case

for keeping technically obsolete boards available to industrywhen there is an unlikely opportunity for further sales, is small.

The problem that arises when the obsolete PCB is no longer available for market reasons is finding a ‘like for like’ functional replacement. Additionally within mission critical systems, this substitution is often not compliant with procedures.

Spherea Test & Services LtdS i Ltd


The ability to optimise the cloning process for your specific situation and requirement is important when looking for a PCB cloning supplier. The process should be adaptable to fit your cost/ROI model

26

ManufacturingFeature

epdtonthenet.netSeptember 2015

complete design data pack using advanced

techniques and mapping the board digitally

using flying probe technology. Any modifica-

tions or changes can be easily made to the

board before the PCB is produced; in fact

as many as are needed.

This straightforward but sophisticated

process has the potential for substantial cost

savings by eliminating the need for redesign

and ensuring the system can remain

operational for many years beyond its

planned life.

The process differs from conventional reverse

engineering, a more manual and involved

process, in two aspects: accuracy and cost.

Reverse engineering a PCB is a labour

intensive process, requiring significantly

skilled resource and as a result the cost

increases. Furthermore, as with any

labour-intensive process there is risk created

by the prospect of error. In contrast, PCB

cloning is a highly automated process and

avoids potentially costly mistakes.

A case studyImagine you are the Maintenance Manager of

a control system for a nuclear power station;

your logistics manager informs you that you

have two spares available for each of the

three PCBs within the system. The cost of

replacing the system amounts to £3.5 million

with an estimated lifespan of 20 years but

making this investment is difficult due to

further large investments being made in new

stations and budgets for existing mainte-

nance being cut. Considering the planned

decommissioning date is in five years time,

a viable return on investment is impossible.

While a PCB redesign is possible, the lack of

manufacturing data has led to high quota-

tions (£100K for the three boards) and down

time of the system is required. In addition,

there are some tricky compliance hoops to

jump through which will increase down-time

and heighten cost.

You have been made aware of a third option;

offered by a test company called Spherea

Test & Services, who are able to clone the

boards where the cost to generate a

manufacturing data pack amounts to £60K

and importantly no system down time is

required. To ease the process further, the

PCB is fully tested and a certificate of

conformance is provided to ensure it is

functionally indistinguishable from the original

design. To many Maintenance Managers the

value of this solution is clear cut.

A scalable solutionThe ability to optimise the cloning process

for your specific situation and requirement is

important when looking for a PCB cloning

supplier. The process should be adaptable

to fit your cost/ROI model. Spherea Test &

Services’ solution offers optimal return on

investment for companies of all shapes and

sizes. Frequent customers include factories

and manufacturing for whom replacing high

cost equipment is not a viable option.

Furthermore, it is important to consider if

your supplier has the means to be able to

conduct accurate tests to prove the

replication has been successful right down

to component level. Without this there are

possibilities of intermittent faults or even

complete failure of the PCB.

To summarise, PCB cloning is an important

service with the ability to save a company a

significant amount of money. In order to

maximise this however, suppliers must be

carefully selected to ensure both conform-

ance and long term sustainability. It should

be considered as part of a wider sustainabil-

ity and counter obsolescence programme.


19” Cases • KM6 Subrack System • 19” Racks and Rack Cases • 19” Fan Trays • Pluggable PSU Backplanes and Extenders • Integrated Systems Standard Product Modifi cation and Custom Solution Design, Engineering, Manufacturing and Compliance ServicesT: +44 (0)23 8024 6900 • E: [email protected] • W: verotec.co.uk

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KM6 SUBRACKS• The most versatile subrack systems available• KM6-II subracks are fully compatible with DIN 41494 and IEC 60297; they are strong, versatile and easy to assemble with many accessories• KM6-RF subracks meet the requirements of IEEE 1101.10/11, which expand on IEC60297 to add functionality required for modern industrial computing applications such as cPCI , Open VPX and VME64x• KM6-HD subracks, primarily designed for military use, suit any rugged application where a resistance to shock and vibration is required• 3U, 4U, 6U, 7U and 9U heights• 180 to 420 mm depths• 24, 42, 60 and 84 HP widths• Backplane and DIN connector mountings• EMC options• Front and rear closing panels• Various top and bottom cover options• Extensive range of accessories including divider kits, guides, handles, front panels and modules

,

er kits, guides,

Making JTAG accessible.


Feature

September 2015 29

Test and measurement

epdtonthenet.net

Today, computed tomography (CT) is an established method with synchrotron radiation sources to obtain volume information from numerous sample types at micrometer resolution. However, it is a fact that the examination of extended flat microsystems or planar test objects is often unsatisfactory when the sample is considerably larger than the area of interest for examination.

Positioning solution for a new imaging method with synchrotron radiation

In a joint project, the ANKA (Angströmquelle

Karlsruhe) at the KIT (Karlsruhe Institute for

Technology, Germany), the Fraunhofer IZFP

(Institute for Non-destructive Testing)

Saarbrücken/Dresden, Germany, and the

ESRF (European Synchrotron Radiation

Facility), Grenoble, France, developed

synchrotron laminography, which allows

examining large-surface objects. Examples

for such object geometries are found in wind

energy or aerospace where the method can

be applied to detect damage in the inner

structure (e.g. during loading and failure) and

manufacturing faults. The instrument has

been in operation since 2007 at the

synchrotron radiation source ESRF at

the imaging beamline ID19. For example,

the instrument was able to depict three-

dimensionally a leg of a fossilised prehistoric

snake without damaging this unique find.

With the aid of so-called phase contrast

methods it was also possible to successfully

examine structures without absorption

contrast. At ANKA the new IMAGE beamline

will also provide interested users with the

same method of analysis.

Maximum positioning demands Using conventional CT it is often not possible

to perform reconstruction of volume

information of enlarged asymmetrical bodies

(such as plates, for example), since the

different long radiation paths in the sample

prevent reliable measurement of the

projection data. In laminography, the sample

is scanned under rotation around an axis

tilted with respect to the beam direction.

The considerable variationin X-ray transmissionduring a scan often creates

artefacts during reconstruction. This limitation was overcomeby introducing a new imagingmethod which now enablescalculating three-dimensionalrepresentations of fl at, widely extended objects. However, toobtain meaningful raw data, the sample and the detectorneed to be positioned withhigh precision and stability.This demanding task wassolved by employing apositioning system specifi callydeveloped for this task.

Using conventional CT it is often not possible to perform reconstruction of volume information of enlarged asymmetrical bodies, since the different long radiation paths in the sample prevent reliable measurement of the projection data.

Birgit Schulze, Physik Instrumente (PI)


September 201530 epdtonthenet.net

Test and measurementFeature

The volume data can be reconstructed from

the different projection. To this purpose, the

sample is positioned between the X-ray

source and the detector.

Maximum precision and stability are essential

during examination to allow subsequent

reconstruction of meaningful images. During

imaging, positional stability must be ensured

for both the detector and the sample. The

detector is rather heavy (approximately 100

kg) and not maintained at its center of gravity:

the challenge is therefore, to position this load

with a straightness of motion of less than 0,1

µrad or 100 nm resp. and a resolution of 50

nm, and eliminating leverage and torque at

the same time. When positioning the sample,

the angle at which the sample is exposed to

the synchrotron X-ray beam should be adjust-

able. The position of the sample itself should

be finely adjustable individually, securely and

repeatably. In addition, the entire instrument

should be maneuvered easily from the optical

path when not in use or during reference

measurements.

Practical solutionThanks to the close cooperation of the

customers with the engineers and developers

from PI (Physik Instrumente), this complex

task could be solved in a practice-oriented

manner. The aim of the team of specialists,

coordinated by PI miCos, is to develop

application-specific solutions that go beyond

offering individual components and include

system integration as well as the complete

instrumentation. This capability has again

been demonstrated with the instrument for

computed laminography.

In principle, the detector and sample

positioning consists of three cooperating

systems: a Z stage with granite base, a

detector stage moveable in three directions,

and sample positioning. The latter consist of

a six-axis positioning system and a rotation

and tilting stage on which the actual sample

carrier is held magnetically. The challenges lie

in the details, which illustrate the sophistica-

tion of this engineering feat.

Details When designing the Z stage, the large overall

weight of 2.5 tons proved to be a challenge

as it had to be lifted in parallel and with

precision. This was achieved using three-

point air bearing. This way the unit can be

shifted with a minimum of force and remains

stable as soon as the air supply is switched

off. Tilting of the granite base can be

readjusted. An absolute measuring linear

scale allows precise and repeatable alignment

to a few micrometers. The entire setup is

managed via a controller with positioning

display and joystick operation.

The design of the detector stage is equally

sophisticated. The overhanging load of the 50

kg heavy detectors must be moved over a

range of 850 mm x 300 mm x 500 mm. Here,

the absolute deviation must not exceed 100

nanometers and tilting is only tolerated up to

+/- 30 µrad. The longitudinal axis of the

detector stage was therefore integrated

directly into the granite base. Other guaran-

tees for high positioning precision include

precisely matched components, for example,

the drive via centrally arranged ball screws,

needle guidance and a very accurate optical

linear encoder. A high transmission ratio in a

zero-play drive provides self-locking of the

vertical axis.

Positioning samplesNow the requirement is for the samples to be

positioned just as accurately. This is where

the six-axis positioning system comes into

operation.

This SpaceFAB is designed symmetrically,

where three legs with a fixed length are each

mounted on an XY stage in a ball joint. The

platform of the SpaceFAB is mounted to the

legs via a cylindrical bearing in each case.

The lower stages of the XY combinations are

integrated into the granite base via guidings.

The samples can thus be positioned with six

degrees of freedom. Essential features are

the freely selectable pivot point of the

parallel-kinematic system and its high

stiffness. The linear travel ranges are 150 mm

× 150 mm × 50 mm, at 0.2 µm position

resolution, ±12.5° tilting is possible for the

axial angle, and ±5° for the other directions.

Precision is provided by optical linear

encoders and the high-precision mechanical

components which are driven by a combina-

tion of stepper motors and ball screws.

A combined rotation and tilting stage, which

supports the actual sample carrier, is

mounted on this parallel kinematic. The

rotating table enables 360° rotation at only

0.24 µm absolute flatness deviation. The

repeatability of sample positioning of the

SpaceFab has been specified and measured

at less than 0.5 µm following reference

measurement. Rotation eccentricity was less

than 0.5 µm. This is important so that the

various projection angles have the same

projected rotation center. At lower accuracy,

artefacts would occur during reconstruction.

The compact construction height allows

shallow tilting angles so that the synchrotron

beam does not penetrate through the

mechanical elements, thus making projection

recording impossible. An optical encoder ring

assures high angular resolution. In addition,

the angle of the sample to the X-ray beam

can be adjusted by up to 45° via the tilt stage

at a resolution of 0.001°. This design has a

self-locking rack and pinion drive and

remains stable during examination.

The actual sample holder, a very thin frame

carrier, is also an exemplary piece of

technology. It is supported by Teflon

cushions and is coupled magnetically. Two

linear stages angled at 90° in relation to the

rotating axis, which shift the sample holder

over 150 mm × 150 mm but do not touch

same during operation, serve to center the

sample holder. Magnetic retention can be

switched on and off, a flexure joint and air

cushion provide optimal parallelism.

The study results achievable today with

such a synchrotron laminography method

can benefit a host of fields, from industry-

oriented research to geology and life

sciences. A major contribution is provided by

the bespoke positioning solution created by

the specialists of the “Beamline Instrumenta-

tion”, which can even align large samples

and consequently rather high loads with

micrometer precision.

Maximum precision and stability are essential during examination to allow subsequent reconstruction of meaningful images. During imaging, positional stability must be ensured for both the detector and the sample.


Further information:

www.hbm.com/epdt-tm

HBM United Kingdom Ltd

[email protected] www.hbm.com

Strain gauges

Load cells, mounting aids and accessories

Force, pressure, torque and displacement transducers

Amplifier systems for test and process measurement technology

Precision measuring instruments

Software for acquisition, analysis and prediction

From sensor to software: The complete measurement chain from HBM The requirements placed on sensors, electronics and software in terms

of operation, acquisition and analysis are continuously increasing.

Optimal matching of all components in the entire measuring chain

is crucial.

We at HBM place special emphasis on this aspect. Worldwide, in all

branches of industry: Automotive, aerospace, mechanical engineering,

weighing technology and many more. For maximum quality and

precision.

Professional test and measurement technology

SEE THE HBM SOLUTIONFOR MORE EFFICIENTELECTRIC MOTORS AT SENSORS & INSTRUMENTATION EXHIBITION 2015

Stand: E26

HBM – a leader in the fi eld of test and

measurement – will be exhibiting its

powerful new solution for eDrive testing,

together with a range of data acquisition

systems and sensors, at this year’s

Sensors and Instrumentation Exhibition;

the exhibition for Test, Measurement

and Control on the 30th September and

1st October at the NEC Birmingham.

The new eDrive Test System from

HBM is a robust, integrated system

for measuring the performance and

effi ciency of electric motors and

inverters. The eDrive testing solution

combines HBM’s T12 or T40 Torque

Sensor, the most accurate torque

transducers in each respective class;

the GEN3i Data Acquisition System;

and, as an option, the QuantumX

1609B Temperature Satellite, to provide

synchronous, dynamic and continuous

acquisition of mechanical and electrical

signals from an electric drive system.

In addition to making temperature,

torque and rotational measurements,

the eDrive testing solution from HBM

can also make measurements from

as many as 18 current and voltage

channels at voltages up to 1,000 V,

at a sampling rate of up to 2 MS/s.

The system also incorporates an

intuitive eDrive software GUI which

has been developed exclusively

for electric motor and inverter

testing and for noise immunity.

In addition to providing raw data,

the new system from HBM also

provides real-time results, such as

true, reactive and apparent power

and effi ciency calculations.

“HBM’s new eDrive package is the only

completely integrated test solution on

the market that allows engineers to

record, verify and study both electrical

and mechanical parameters under

dynamic conditions”, comments Mike

Hoyer, HBM Applications Engineer.

Also showcasing at the Sensors

and Instrumentation exhibition will

be HBM’s range of data acquisition

systems and sensors, including its

range of force sensors, which are

used to measure static and dynamic

tensile and compressive loads –

with virtually no displacement.

HBM will be exhibiting its new

FIT7A digital Load Cell at the show.

Specifi cally designed to meet the

needs of demanding requirements of

weighing in modern manufacturing

lines, the FIT7A is suitable for use

in a wide range of production

environments which require dynamic

weighing, sorting, fi lling and dosing.

Based on the very latest HBM strain

gauge technology, the innovative

new sensor features class C4

accuracy per OIML R60 and a

maximum scale division Y of up to

25,000 and addresses the problem

of bottlenecks, which can often

slow down production rates.

In comparison to existing sensors

which are only able to handle up to 100

weighings per minute, sophisticated

new technology incorporated within

the FIT7A means that it is now possible

to perform 180 weighings per minute,

therefore dramatically increasing

production speed and reducing costs.

To illustrate its impressive test and

measurement capabilities, HBM will

be exhibiting a model truck fi tted with

HBM strain gauges and data acquisition

equipment at this year’s show.

Visitors are also invited to attend two

presentations at the Sensors and

Instrumentation Exhibition. For more

information on the new integrated

eDrive Test System for Electric Motor

and Inverter Analysis, Dick Eberlein,

HBM GmbH Product Manager for DAQ

Systems, will be looking at, “What drives

electrical machines and inverters: More

effi cient analysis with eDrive Testing

by HBM”. Mr Thomas Kleckers, HBM

GmbH Product Manager for Force

Sensors, will be discussing the main

infl uences of measurement uncertainty

in a force measurement chain and

the possibilities to optimise the

measurement chain, in his presentation,

“Key factors of measurement

uncertainty with force measurements

– what are the key factors?”

For further information, contact HBM

on +44 (0) 20 8515 6000 or via

email: [email protected] or visit thek

HBM website at www.hbm.com


Avoiding EMC failure often stems from

building pre-compliance testing into a project

from day one. In the software industry there

is a move to introduce testing earlier in the

product development cycle. Likewise, this

thinking is now evident in the hardware

industry; investigating emissions from a

device during each major development stage

is a sound approach.

There are a number of advantages of

pre-compliance testing:

1) Detect errors earlyThe earlier product deficiencies are identified

in the development process, the easier they

are to fix. Pre-compliance testing can be

used to focus on any areas identified as

potential causes for concern and enables

solutions to be found early.

The risk of a design failing is often relative

to the time taken to start testing, so

designers that leave testing to the project

end are completely reliant on the design

team’s skill and experience.

Early analysis can also drive system

decisions. EMC also encompasses the

system and mechanical changes that may

be required. These may include adding EMI

shields, coating boxes or adding EMC foam

to fill any leaks/gaps in an enclosure.

2) Test to compliance standardsUsing an anechoic testing chamber before

formal testing can determine whether or

not a design will meet relevant compliance

standards. The ability to test to EN55022,

EN61000 and EN61000-3-2, as well as

MIL-STD-461, for emissions provides

confidence in the design. Engineers that offer EMC pre-compliance testing as a service offering will be continuously on the lookout for areas of risk during product development.

32


Typically conducted at a specialist lab at the end of the project, EMC testing can lead to frustration when the tests fail. Unfortunately, many projects trip up at this last hurdle, with radiated emissions regularly cited as the top reason.

Dunstan Power, ByteSnap Design

Six reasons to conduct early EMC testing

The cost of testing is already high, but re-testing often stretches the planned budget and slows down the entire project. Upon failure,

engineers need to investigate the source of the problem, at a stage in the project when the integration of all the components can make this diffi cult.



A spectrum analyser and near field probe can be very useful for

finding the location of emitters, once they have been identified

as presenting radiation above the required limit, but less useful

before a calibrated scan at a required distance has been done.

What may appear to be a problem at close range with a probe,

can disappear in a chamber - and the reverse is also true. Testing

to a known standard early on focuses attention on real problems.

3) Integrate testing into developmentWhen testing is integrated into development, a testing chamber

and expert advice is available during the entire project lifecycle.

Design engineers that offer EMC pre-compliance testing as part

of their services will be continuously on the lookout for areas of

risk during product development.

4) De-risk your projectEarly EMC testing can de-risk a project by determining many,

if not all, non-compliance issues prior to submission for formal

testing. This is one of the ways the time taken on pre-testing

pays back over the course of the project. The end design is

much less likely to fail, saving the resulting costs and delays

associated with board re-spins and excess test house charges.

5) Eliminate over-designEarly EMC testing can reduce design costs by decreasing

over-engineering. Before a product is tested it is not known

where the problems might occur. This can lead to unnecessary

counter-measures being added; countermeasures that will be

present for the lifetime of the product.

In addition to a BOM cost impact, there is also a bearing on the

mechanical constraints. For a very tight design, it is crucial to

optimise EMC filtering, which can be large, at an early stage, as

adding filtering later on, once mechanical tooling is committed,

may prove impossible. This is particularly the case with power

line filtering using common mode chokes or Pi filters.

6) Other uses of pre-compliance equipmentAs well as EMC testing a product when it is first produced,

“look-sees” can be carried out as obsolete parts are replaced,

or board layout changes. As CE marking is a self-certification

process, this data can often be used to justify retention of the

CE mark by reference to comparative measurements on the

original unit. Clearly, this depends on the scope and type of the

change.

Similarly, tests can be carried out on comparative signal

strengths of antenna configurations.

ByteSnap Design has set up a testing chamber to support

radiated emissions scans of customer’s products. This provides

the ByteSnap team with additional ability to eliminate many of

the problems prior to formal testing by extending our scope for

agile design.

September 2015 33epdtonthenet.net

Test and measurement Feature

Early EMC testing can reduce design costs by decreasing over-engineering. Before a product is tested it is not known where the problems might occur.


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Some of this data is acted on immediately.

If a PCB component is wrong, missing, badly

positioned or poorly soldered, AOI will reveal

this, allowing the operator to capture the

faulty board before it can move on to become

an expensive field failure. However the AOI

system alone will not present the operator

or line manager with information to indicate

more strategic actions leading, for example,

to longer-term yield improvement – even

though the underlying data is being steadily

collected into the AOI system’s database.

Some plant operators consider that such

analysis and reporting would not be beneficial

in their circumstances, while others extract

the AOI data into a larger manufacturing

operations software environment, which

then generates user-friendly statistical

displays and reports.

Visibility of process trendsCupio’s VuData statistical process analyser

software package offers an alternative

approach, which is cost-effective and easy

to implement. Using data from any Nordson

Yestech AOI system’s database, VuData

generates detailed reports and live charts that

expose trends within the production process.

These can reveal, for example, if a reflow

solder oven’s temperature profile needs

adjusting, or that an operator would benefit

from further training.

Whereas the AOI user interface is focused on

issues related to the board currently under

inspection, VuData shows bar charts, pie

charts and reports for a volume of boards

over a period of time. The snapshot can

be a live, rolling record of production just

completed, or it could be a historical record

recalled for management review or customer

discussion. The bars can show faults per

board or by component reference ID. The

operator can focus on the fault levels that

really matter by setting a couple of thresholds.

Failure rates below the lower threshold will not

be displayed at all, while those below the

second threshold will be displayed in blue.

Attention is focused on rates above this – i.e.

those that merit closer review and action –

which are displayed in red (Fig1).

Feature

September 2015 35


epdtonthenet.net

Where an AOI system allows operators to isolate faulty PCBs as they leave the production line, Cupio’s VuData statistical process analyser software acts on AOI-generated databases to provide a bigger picture – giving operators and line management visibility of a process’s underlying trends and an opportunity to make corrections and improvements.

Unlocking your Nordson YESTECH AOI and AXI system’s true potential

Today, most PCB assembly lines would be diffi cult to operate without an automated optical inspection (AOI) system. Boards are typically too large, and too densely-populated with tiny components to allow effi cient manual inspection; in other

circumstances, the boards may be simpler, but manual inspection would simply take toolong. An AOI system operates far more effi ciently, reliably and quickly than any human inspector could – and it gathers large amounts of potentially useful data as it does so.

Using data from any Nordson Yestech AOI system’s database, VuData generates detailed reports and live charts that expose trends within the production process.

Ben Seviour, Cupio

Figure 1- ‘Parts failed by RefID’ chart, showing non-critical blue bars and critical red bars

Anz. HDO8000_205x283 ENG_PND.indd 1 21.01.15 15:35 3973 - EPDT Sept15 Edn.indd 353973 - EPDT Sept15 Edn.indd 35 24/08/2015 10:4824/08/2015 10:48

Within AOI systems a component state may

be regarded as defective not for an absolute

reason, but because the operator has

classified it as defective. For instance a

variation in component marking may indicate

a missing or wrong component, or it may

simply be due to the component manufac-

turer changing the font or size of their printed

label characters. Either way, the operator

uses his production environment knowledge

to make a defect classification decision;

efficiently capturing genuine defects while

tuning out false positives. These defect

classifications can be reviewed in VuData.

Additionally, VuData can show false calls per

board or by component, and times spent on

board review by each reviewer.

Showing data related to volumes of boards

reveals underlying trends and, critically,

indicates causes of failure as well as just the

failures themselves. For example, a

recurrence of a wrong component type in a

given position would indicate that a wrong

component reel has been loaded into a pick

and place machine within the assembly line.

Similarly, recurring poor solder joints could

indicate a wrong temperature setting on a

solder oven. If problems like these are

spotted on a live production line, action must

clearly be taken as soon as possible to stop

continued manufacturing of faulty boards.

Accordingly, VuData can be configured to

automatically email warning messages to

relevant staff, alerting them to take action as

required.

Variable depths of reporting detailVuData can also generate more detailed reports

as appropriate. For example, a report can be

configured and raised for a single board,

showing a bar chart of all possible defect types;

Marking, Lead and Solder. Reports have

navigational functionality, allowing users to drill

down to the details that interest them. Details

for each defect include its reference ID and the

affected part number. An image of the defect

can also be retrieved for examination. Statistical

information including yields and total opportuni-

ties for failure is available for further analysis.

Similarly, reports can be generated for complete

works orders or assemblies. They can be

customised for specific inspectors and

reviewers, and filtered by start and end dates.

Once generated, reports can be exported as

Excel files, PDFs, JPGs and other formats. This,

together with the ability to report on historical

as well as live information, renders them as a

valuable resource for customers as well as the

manufacturer’s management and operations

staff. Evidence of board production and quality

statistics can be regularly supplied as part of

the production delivery documentation, while

special reports can be raised as proof of

manufacturing quality in the event of any

product returns from customers.

Even more granularity is available for applica-

tions that require it, because VuData gives

users direct access to the raw data held in

the AOI system’s database, without need for

MS database access. Data can be ordered,

grouped and sorted, and suitable parameters

selected for export and external use.

While increased levels of detail and information

provide greater levels of insight into the

production process and its trends, in-depth

reviews can be time consuming and not always

necessary. VuData’s flexibility allows for this, as

the level of reporting detail can be varied as

appropriate for individual lines, machines,

dates, operators and other entities within the

overall manufacturing process.

Overall, VuData is a cost-effective, easy to set

up complement to the AOI inspection process.

The AOI system captures and records the

fundamental defect information, and allows

an operator to intervene immediately if the

production line presents a faulty board. VuData,

however, reveals the bigger picture; it provides

manufacturing operators and line management

with the opportunity to expose underlying

process trends and act accordingly to make

both short term and longer term improvements

to production yields. It also allows manufactur-

ers to take better control of their customer

relationships by providing quality evidence for

both regular production and warranty returns

issues. Its flexibility means that users can focus

entirely on areas of importance, profiling their

analytics effort closely to the needs of their

particular process.

September 201536


epdtonthenet.net

Cupio’s VuData statistical process analyser software package offers an alternative approach, which is cost-effective and easy to implement.

Figure 2- Example of a single board report


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This is particularly important within the

automotive, aerospace and defence industries

where the safety critical nature of systems

makes complete test coverage essential.

Manufacturers need to aim to completely

eliminate software bugs and make the

products as safe as possible. If we consider

that a typical modern automobile contains over

10 million lines of code, we can gain some

context of the scale this challenge presents.

During development there are typically 10-20

defects per 1,000 lines of code which equates

to over 100,000 defects that need to be found,

tested and rectified. Industry regulations have

been established to ensure the safety of

embedded software, and in order for

manufacturers to comply with these

regulations, thorough testing of embedded

software across an exhaustive range of real

world scenarios is required. The business

needs of companies are being stretched,

with a constant demand for a shorter

time-to-market. Flexible and reliable test

systems need to be utilised to allow the

introduction of the latest technology advances

faster than the competition.

When testing such large amounts of code,

relying solely on the traditional approach is

simply not feasible. Having the ability to scale

the testing using hardware-in-the-loop (HIL)

simulation becomes essential as organisations

can reduce spending on quality related

problems, and ensure customer safety.

HIL testing involves the dynamic simulation

of the world around a device through the use

of a closed-loop feedback controller. The

system is capable of putting the device through

a range of different testing cases to simulate

possible real world scenarios. As devices

become more complex, the number of test

cases increases, making HIL testing even more

essential. HIL testing resolves many of the

growing needs of a test system when

compared to physical or field testing.

Taking steps to bring down testing time and expense allows companies to become market leaders and deliver the latest technology to market faster.

38


This is the fourth article in a five part series delivered by National Instruments. This article takes a look at how advances in the use and complexity of embedded software are creating implications for test and validation systems.

Aaron Edgcumbe, National Instruments

Handling increased complexity in embedded devices

Modern devices rely heavily on embedded software,which is continually becoming more advanced to allow the constant incorporation of new features

and additional functionality. Companies are facing the prospect of being forced to drive innovation and creativitywhilst maintaining the constant reliability we expectfor the same cost. The degree to which companies can introduce innovative technology into their products isoften limited by the cost of development and testing. Taking steps to bring down this testing time and expense allows companies to become market leaders and deliver the latest technology to market faster.



Within the aerospace industry, HIL testing has

become an essential part of the development

process, where demanding tests are required

to drive innovation. Often the safety regulations

and standards make complete system testing

essential. One company who was facing this

challenge was EMBRAER, who recently

developed the Legacy 500 aircraft, the first

aircraft in its class designed with full fly-by-

wire controls. This new technology needed

complete validation before it could be released,

so EMBRAER developed a HIL system to

perform complete electronics integration and

validation testing. The system connected the

aircraft electrical system to a simulation of the

entire plane.

EMBRAER used 21 interconnected NI real-time

PXI systems to create an Iron Bird test facility.

Such systems allow for system integration

testing of the electronics within the aircraft

before a prototype has even been released.

It allows the system to be put through different

scenarios which are not possible using physical

testing, such as failure propagation test, engine

failure test as well as the system integration of

the landing gear, power plants, flight controls,

avionics and other flight systems. Early

detection of problems can be found at the

design and development stage before the first

test flight. The use of this system allowed for

more efficient and faster development, resulting

in the earlier release of the technology. The 21

systems provide over 1,000 analogue and

digital inputs and outputs delivering full stimulus

to the aircraft control system. The out-of-the-

box functionality provided by National

Instruments Veristand allowed the system to

be developed much faster whilst reducing the

ongoing system maintenance cost. Veristand

was used alongside National Instruments

LabVIEW and TestStand to allow further test

customisation and ability to add additional

functionality.

In the automotive industry manufacturers are

facing HIL simulation challenges in the

development of the latest generation of hybrid

vehicles. Hybrid electric vehicles require the

ability to manage the power control between an

internal combustion chamber and an electric

motor. This requires functionality to be added to

the code running on the electronic control units

(ECUs). When automotive manufacturer Subaru

were designing their first hybrid electric vehicle,

the Subaru XV Crosstrek, engineers needed to

implement a system for complete test

coverage.

Subaru faced a challenge: re-creating the

scenarios on the proving ground produced

inconsistent results, while traditional real-time

HIL processors could not accurately simulate

the fidelity and speed required by the new

electric motor model. This is a common

challenge faced by manufacturing companies

where HIL simulations are pushing the

capabilities of real-time processors. Using

FPGAs can accelerate processing, allowing

simulation loop rate requirements to be met.

Most simulation platforms have an average

control loop time of between 5 and 10 µs,

whereas to test the hybrid motor, a loop time of

1.2 µs or less is needed.

Implementing this technology at Subaru

allowed them to achieve a 20x reduction in test

time, ensuring they could bring their technology

to market whilst still maintaining the same high

quality and safe software. Subaru chose to

use NI FlexRIO FPGA modules, which are

PXI-based controllers with FPGA chips. The

modules executed a model representing the

simulated operation of the motors, with all

deployed programs using NI LabVIEW system

design software. Subaru found they were able

to run all test patterns in 118 hours compared

to an estimated 2,300 hours using the

traditional testing method. The ability to

program the module graphically using

LabVIEW FPGA allowed the development to

be undertaken in a very short time frame

without using a text-based language.

Test engineers are always under pressure to

lower the cost of test and maintain high quality

levels. Engineers are finding FPGA an enabling

technology, allowing them to improve their HIL

simulations to capture more quality issues

faster. Off-the-shelf instrumentation has typically

been fixed in its capability. Software-designed

instruments incorporate a user-programmable

FPGA directly into the instrument, providing a

more open and flexible approach to measure-

ments. This allows users to customise the

instruments to their own needs whilst providing

additional capabilities for inline signal process-

ing, closed-loop control and custom algorithm

deployment. The result allows manufacturers to

significantly reduce test time, provide more

accurate model simulations and reduce the

cost whilst maintaining quality and safety.

Feature

September 2015 39


Engineers are finding FPGA an enabling technology, allowing them to improve their HIL simulations to capture more quality issues faster.

epdtonthenet.net


JFT routines Originally developed to run under the

open-source Python scripting language, JFT

(JTAG Functional Test) routines offer simple

access to low-level control of a JTAG device’s

pins. Use JFT to set or toggle a single pin or

group them together as a bus that can be set

as a program variable. JFT makes it easy to

create test programs with loops, conditional

branching and limits testing. The module

approach also allows test engineers to create

re-usable code blocks that can be transferred

between test projects.

In 2013 the JFT concept was ported to a

number of other platforms including National

Instruments’ LabVIEW. By gaining access to

the pins of high-density FPGA, microproces-

sors and DSPs, test engineers are afforded

access to kernel of the design in a safe and

predictable manner. Figure 1 shows how

boundary-scan access to an FPGA can assist

in testing a D-A converter device, in conjunc-

tion with a DVM – a simple task with JFT/

LabVIEW and VISA driver for the DVM. The

alternative functional test mechanism would

involve writing specific test firmware that also

requires partial functioning and boot-up of the

UUT before the test can begin.

ATE Solutions’ Flex series ATEs are frequently

supplied with JTAG/boundary-scan add-ons

from JTAG Technologies. The company’s MD,

Steve Lees, states that many of the designs it

is asked to test, cry out for boundary-scan

as a low-cost method to achieve higher test

coverage.

In addition to software resources, JTAG

Technologies also offers high-integrity

connection systems compatible with ATE

connector vendors MAC Panel and Virginia

Panel. For use with PXI(e) format boundary-

scan controllers these connection systems

include active signal conditioning and

additional IO channels.

Gary Clayton of MAC Panel says that JTAG

usage is increasing rapidly with telecom and

mil-aero customers – MAC Panel co-operated

with JTAG Technologies in providing a solution

compatible with the SCOUT mass-intercon-

nect system.

At the Automated Test Summit, a program

of events is offered to bring ATE developers

and users up to date with the latest trends

and technologies. Jeremy Twaits a Senior

Marketing Engineer with NI Europe, claims the

annual ATS event allows NI to interact with

customers and partners, get new ideas and

feed those back to the developments teams.

Working with suppliers allows NI to expand

its commercial offering to the ATE market.

It’s great to see that software tools such as

TestStand and LabVIEW are so well supported

by JTAG/boundary-scan technology.

JTAG use in functional testers on the rise

JTAG Technologies has invested in the development of integration options for a range of ATE and functional test platforms. One of the most popular platforms is for National Instruments’ LabVIEW and is known as PIP/LV (Production Integration Package for LabVIEW).

September 201540

Using PIP/LV, functional test developers are able to harness all the automated test generation features of ProVision, a processing tool that will import the UUTs (Unit under Test) CAD-derived netlist(s) along with boundary-scan device (BSDL) model and proprietary models that describe

the function of non-boundary-scan parts, often referred to as clusters. The resulting test programs, once verifi ed inside ProVision, can be released to the functional tester platform and invoked through a series of LabVIEW VIs (Virtual Instrument icons) that form PIP/LV. In addition to board test code, Provision can generate applications to program fl ash devices (NOR, NAND and serial) and also handle the confi guration of nearly all programmable logic parts (CPLDs, FPGAs, confi g PROMs etc..)

JTAG Technologies

In addition to board test code, Provision can generate applications to program flash devices and also handle the configuration of nearly all programmable logic parts.

epdtonthenet.net



Lattice Releases World’s First superMHL Solutions for USB Type-C

Lattice Semiconductor Corporation, today announced the world’s fi rst superMHL products for USB Type-C to deliver 4K

60fps RGB/4:4:4 video with concurrent USB 3.1 Gen 1 or Gen 2 data. The SiI8630 and

SiI9396 are a low-power superMHL™

transmitter and receiver pair that can

deliver and receive 4K 60fps over a single

lane, enabling a PC experience with USB

Type-C devices.

USB Type-C products using these solutions will be able to connect to more than 750 million legacy MHL and future superMHL TVs, monitors, AVRs, Blu-

ray Disc™ players, projectors, set-top boxes and automotive products.

These superMHL transmitters and receivers offer the lowest power, quick time to market, and the only solution to offer concurrent USB 3.1 data with

4K60 UHD video to address the growing number of productivity applications for mobile devices.

www.latticesemi.comEmail: [email protected] Tel: 408-616-4017

Harwin simplifi es miniature EMC screening

Harwin, a leading hi-rel connector and SMT board hardware

manufacturer, has expanded its popular EZBoardware range

with the introduction of three new RFI Shield

Clips suitable for small and low profi le shield cans with wall

thicknesses of between 0.15 and 1.0mm. These additions include two clips of only 3.9mm

length, allowing users to fi x smaller sized cans to the PCB using this cost effective method. The range of clips now available

also includes the S0961-46R, specifi cally designed to provide signifi cantly higher retention forces on the shield can, typically up by 30%, ideal for those

users seeking to maximise retention of the shielding can to the board.

Supplied taped and reeled, EZShield Can Clips are designed to be automatically placed and surface mounted to the PCB.

www.harwin.co.uk Email: [email protected] Tel: +44-2392 314 532

News & ProductsThe products pages are the only pages you need to catch-up with the latest releases.

To contact us about getting your product on these pages, send an email to: [email protected]

New Pocket-Sized Intel Compute Stick with Linux

Mouser Electronics, Inc. is now shipping the Intel® Compute Stick

with Ubuntu Linux, a new generation of computer

from Intel Corp. The Compute Stick is a

revolutionary new device that enables any screen

with an HDMI interface to become a fully functional personal computer. The

Compute Stick comes pre-installed with the Ubuntu

14.04 LTS operating system. The Intel Compute

Stick is a fully functional computer in a package

similar to a large USB stick.

Powered by a 64 bit 1.33GHz Intel® AtomTM Z3735F Quad-Core processor with 2Mbytes cache, integrated Intel HD graphics,

and multi channel digital audio. The Compute Stick plugs into any display that has an HDMI 1.4a interface. Networking is achieved with

onboard IEEE 802.11 b/g/n WiFi.

http://www.mouser.de/Home.aspx Email: [email protected] Tel: (817) 804-3833

‘Plug & Play’ proximity switches, 35% thinner from Panasonic

Panasonic has introduced a new series of human detection proximity sensors. MA Motion series

sensors are 35 % thinner than previous versions and are simple to install thanks to their ‘plug

and play’ nature.

With feature built-in trigonometric background suppression, so they are unaffected by changing scenes or by people passing

by outside the detection range. Also, changing light conditions and bright daylight measuring up to 30k lux at the sensor’s surface will not affect the performance of

the sensor.

Thin MA Motion proximity switches feature a detection distance of 5 to 200cm and are available with NPN and

PNP output trans./versionsin PNP or NPN open collector

versions. They operate from 4.5 to 5.5VDC or in a wilder voltage

version from 5.5 to 27 VDC.

For further product information, please visit: http://eu.industrial.panasonic.com/

ew series of humanMA Motion series previous versions

ks to their ‘pluge.

etric background naffected by ople passing nge. Also,bright

5

September 2015 41

tor Corporation, today orldTypdeoen

e

B

p , y’s fi rst superMHL e-C to deliver 4K

o with concurrent2 data.

JTAG/Boundary-scan Board Test Workshops

Register now for ‘hands on’ training sessions

JTAG Technologies are currently accepting registrations for the next of their hands on training workshop based on the JTAGLive Studio low-cost board test and validation system.

Costing just £295, the workshop will allow users to discover the power of boundary-scan testing for board bring-up and production applications. Attendees will work with the JT 2156 training board and

learn how to use the Buzz interactive test tool, AutoBuzz interconnect test system and the Python-based Script tool to generate cluster tests and re-usable cluster test modules for non-JTAG logic such as

memories and I2C parts.

The workshop fee includes the cost of a JTAGLive controller and a six-month taster licence for the JTAGLive Studio system, together worth £650.

The event will be run close to the JTAG Technologies’ UK offi ce in Bedford, a central location that offers easy access from both the A1 and M1 motorway. The next event is scheduled for 17th September 2015 and will begin at 9:30 am.

To register your interest please contact [email protected] or call 01234 831212.

The anticipated audience will include electronics design engineers looking at JTAG for hardware validation, test engineers not yet familiar with JTAG, project managers, SME owners, production engineers and anyone with an interest in this rapidly growing embedded test technology.

Comments from previous workshop attendees: “Studio looks a great tool that can help to speed-up time to market”,“I now longer need to wait for fi rmware before I start board bring-up”,“We intend to deploy Studio for repair and rework in manufacturing”

ww.jtag.co.uk Email: [email protected] Tel: +44 (0)1234 931 212

EPDT Current Classified.indd 41EPDT Current Classified.indd 41 24/08/2015 10:5024/08/2015 10:50

September 201542

News & Products

PCE-PA 8000 Three-Phase Clamp Meter with 2 GB SD Card and Three Current Clamps

The PCE-PA 8000 measures and records the power in both single-phase and three-phase circuits. Its 3.7” display shows the measured current (up to 1200 A) and voltage (up to 600 V) as well as the frequency and the active, apparent and reactive

power/energy. The device can also determine the power factor and phase angle. Measurement

values are saved to the SD card in xls format so that they can be analysed on your computer. The sampling rate can be set from 2

to 7200 seconds. The clamps can be used for cables with a diameter of 50 mm. This instrument meets IEC

1010 and CAT III 600V standards.

For more information about this or other clamp meters, please visit

https://www.pce-instruments.com/english/measuring-instruments/test-meters/clamp-meter-kat_40102_1.htm

or call +44 ( 0 )2380 987030or send us an email: [email protected]

3 AAEON embedded Industrial boards from RDS

Review Display Systems Ltd (RDS) offers three embedded boards from AAEON based on Intel’s latest Baytrail range of

CPU platforms.

The boards have been developed in three different industrial formats to cover a

range of applications.

• The compact COM Express Type 6 format CPU module, the COM-BT, available in single, dual and quad core versions, based on the Intel® Atom™E3815 (single), E3827 (dual) and E3845 (quad) processors.

• The GENE-BT05 is a 3.5inch, feature rich industrial sub-compact motherboard and features Intel® Celeron N2930/ N2807 processors, with 204 pin SODIMM DDR3L, maximum 8GB of system memory, and twin Gigabit Ethernet.

• The EMB-BT1 thin Mini-ITX embedded motherboard is based on Intel® Atom™ E3845/E3825 processors, delivering 1.91GHz and 1.33GHz respectively.

www.review-displays.co.uk Tel: +44 (0)1959 563345

Dragonfl y miniature connectors can mix signal and power contacts

Astute Electronics can now deliver Positronic’s

comprehensive Dragonfl y range of reliable, miniature

connectors with power and/or signal contacts.

Confi gurable with size 16, 20 or 22 contacts,

Dragonfl y connectors can handle currents up to 20A per contact. Blind mating,

sequential mating, fl oat mount, panel mount and

cable options with an integral locking system are available.

Comments Gary Evans, E-Mech Divisional Manager, Astute Electronics: “Positronic’s Dragonfl y connectors are ideal for high density applications.

The integral locking mechanism with three changeable size 16 contacts that make devices a good fi t as power input connectors.”

Dragonfl y connectors are fi eld-proven to be reliable over many mating cycles. Solder PCB mount, crimp and press-fi t terminations are available; coplanar mountings are an option. The series includes a wide variety of accessories.

www.astute.co.uk Email: [email protected] Tel:+44-1920-897324

Würth Elektronik eiSos publishes online design tool:the world’s most precise AC loss calculation

With RED EXPERT, has published a

new online tool with which developers can simulate the power inductors. With just a few

clicks, the power inductors are

selected and the complete AC losses

calculated. The special feature: RED

EXPERT enables the world’s most precise loss calculation, because it is not based on the known Steinmetz models with sinusoidal excitation, but rather is derived and validated from

measurements of the power inductors in a switching controller set-up.

The losses determined are based on current and voltage waveforms typical in applications. Besides the core and winding losses, they also

include the losses arising from the specifi c geometries of the inductance, such as the air gap.

Freely available at www.we-online.com/redexpert

Medical-grade DC/DC Converters

RECOM announces the release of three new medical-

grade DC/DC converters with 250VAC/2MOPP

certifi cation. The REM3, REM6 and REM10 series

offer 3W, 6W or 10W output power, respectively in a DIP24 case. Despite this

compact case size, all series feature reinforced isolation rated at 250VAC working voltage, 5KVDC galvanic isolation, 8mm creepage

and clearance and low 2µA leakage currents.

The three series are available with 2:1 or 4:1 input voltage

ranges, single or dual outputs from 3.3V up to 24V.

The high effi ciency of 89% means that the operating temperature is from -40°C to 105°C. The REM series are IEC60601-1 and ANSI/AAMI 606061 CB

certifi ed and come with a 5-year warranty.

www.recom-international.com Tel: +49 (6102) 88381-0

GaN Systems signs Shenzhen-based Distribution Partner SZ APL

GaN Systems Inc., a leading developer of gallium nitride power

switching semiconductors, has appointed Shenzhen APL to

distribute its Island Technology® high-power GaN devices in

China and Taiwan.

The company has extensive experience in power electronics

components distribution to major Tier1 customers in the

automotive, industrial and enterprise segments.

Announcing the deal, Girvan Patterson, President, GaN Systems

said: “We are delighted to have signed SZ APL as a distributor,

as it has both signifi cant knowledge of power electronics

and strong relationships with Tier1 Chinese and Taiwanese

customers. Demand for our GaN power switching transistors is

growing very rapidly as manufacturers seek to design smaller,

lighter and more power-effi cient products in order to gain

competitive edge.”

www.gansystems.com Email: [email protected] Tel: +1 (613) 686-1996 ext. 149

The products pages are the only pages you need to catch-up with the latest releases.


ee Current Clamps

and records the power in both se circuits. Its sured current up to 600 V) d the ve anctorent

ard be he 2

can meterets IEC

andards.

out this ease visit


September 2015 43

For further information and details of advertising please call Richard Woodruff on 01732 359990Buyers Guide

Device Programming Services

Batteries & Chargers

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-- StSSSStStStSSSSSStSStStSSStSttaananndndndndnnndandandanandndanndandddnan ardardardardardrdardrdrdrdrdrdrdrddrdda ddddd anananannannnnnnannnnnnaaa d Cd Cd Cd Cd CCCCCCCCCCCCCCCCCCd CCd CCCCCCCCCCCCd CCCCd Cd CCCCCCCCdd Cuuuuuustsststtustuu omomomomm OEMOEMOEMOEMOEMOEMEMMEMMOEMMMMOEMOOEMMMMMEMEMEMEMEMEMEMOEEMMEMEOEEEEMMMOEMMEMMOEMEEMMEMEMEMMEEMOEMEMMO -- ExEExExExExExExExExExExterternalnal PoPPPoPoPPowwwwwewewereeeerrwerwererrwerrerrwerww SSSSSSSuuSSSuSSuSSSSuSS pplpplppplpplpplpplieseieieeeesesieieeseeieseeei seeeeAAAAANANANAANANANAANANANAANANANNAAAANAANANSMSMANANANNNNNNNN UKUKUUKUKKKKKKKKKUUKUKKKKKKKKKKKKKKK LLLLTDTDDDDDDD.Teleleelellelllellelellllllllellellelel:::::::::::::::::::::::::: 087087087870800080000000000000000 00 60 60 6660 609090090999 2222323333323223333333333 3 333333333 FaFaxaxaxaxa : 0: 0 0: 00: 00: 00000888887087087087087088878708 6060606609 299 29 223423444EmaEmamam il:ilil::: innininininnffo@fo@fo@@ansansmanmann.ccco.uo.uo uo.uuuuuuuuuuuuuuuuuuuuuo.uuuuuuuuuo uuuuuuuuuukkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkWWebWeb:: www.ansmannn.coo.co.ukk.u

Environmental Test Chambers

Weiss Technik UK Limited ¬ Tel +44 1495 305555

Industry leaders in the design, manufacture and servicing of customised and standard

Global Simulation Test Chambers

www.weiss-uk.com

Second User

Training

Contract Assembly

ELECTRONICS MANUFACTURING SERVICESPROCESS SYSTEMS

www.wps.co.uk 01424 722222 [email protected] ISO 9001

FM 14458

In-house processes including:Oversized PCB CapabilityAutomated SMT/Through-Hole AssemblyHand Assembly/Box BuildDesign For ManufactureEnvironmental Testing Wide Range of Coatings/Encapsulation Full Test Services IPC Certified Staff

Hill Farm, Church Lane, Ford End, Chelmsford, Essex CM3 1LH

C / , C/ 6 0 a d C 600IPC 7711/21, IPC/WHMA-A-620 and IPC-600

Tel: 01245 237083 www.rework.co.uk

Tape Reeling & Services

Your Reliable EMS PartnerSolutions Through

Sustainable

Partnership

Tel: 01383 822911 Email: [email protected] www.dynamic-ems.com

• Customer Focused Solutions• Flexible Supply Chain Solutions• NPI / Prototyping• SMT / PTH Assembly• Conformal Coating • Automated Optical inspection (AOI)• ICT / Flying Probe Test / Functional Test• Full Box Build & System Confi guration

IPC-A-610ECLASS 3

Dynamic EMS Buyers Guide Ad.indd 2 17/07/2015 09:27

For further

information

and details of

advertising

please call

Richard Woodruff

on

01732 359990

September 2015 35

For further information and details of advertising please call Richard Woodruff on 01732 359990

Buyers Guide

Device Programming Services

Batteries & Chargers

- BBBBBBBBBBBBBBaaaaaattattaataaattattaatttaaa eririerieeee ie eesesesesesess s aaaaandandandandndndndaanddndndnndnndandndndndndddd ChChChChChChChChChChChChChChChChChChChChChCChChCChChCCCChChChCCCCChChCCCCChCChChCChChCCChCCChaargargargargargrgrrrarrgargargraaarrgrggaararraaaaaargaaa erserserserserseersers

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-- StSSSStStStSSSSSStSStStSSStSttaananndndndndnnndandandanandndanndandddnan ardardardardardrdardrdrdrdrdrdrdrddrdda ddddd anananannannnnnnannnnnnaaa d Cd Cd Cd Cd CCCCCCCCCCCCCCCCCCd CCd CCCCCCCCCCCCd CCCCd Cd CCCCCCCCdd Cuuuuuustsststtustuu omomomomm OEMOEMOEMOEMOEMOEMEMMEMMOEMMMMOEMOOEMMMMMEMEMEMEMEMEMEMOEEMMEMEOEEEEMMMOEMMEMMOEMEEMMEMEMEMMEEMOEMEMMO

-- ExEExExExExExExExExExExterternalnal PoPPPoPoPPowwwwwewewereeeerrwerwererrwerrerrwerww SSSSSSSuuSSSuSSuSSSSuSS pplpplppplpplpplpp ieseieieeeesesieieeseeieseeei seeee

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Teleleelellelllellelellllllllellellelel:::::::::::::::::::::::::: 087087087870800080000000000000000 00 60 60 6660 609090090999 2222323333323223333333333 3 333333333

FaFaxaxaxaxa : 0: 00: 00: 00: 00000888887087087087087088878708 6060606609 299 29 223423444

EmaEmamam il:ilil::: innininininnffo@fo@fo@@ansansmanmann.ccco.uo.uo uo.uuuuuuuuuuuuuuuuuuuuuo.uuuuuuuuuo uuuuuuuuuukkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk

WWebWeb:: www.ansmannn.coo.co.ukk.u

Environmental Test Chambers

Weiss Technik UK Limited ¬ Tel +44 1495 305555

Industry leaders in the design, manufacture

and servicing of customised and standard

Global Simulation Test Chambers

www.weiss-uk.com

Second User

Training

Contract Assembly

ELECTRONICS MANUFACTURING SERVICESPROCESS SYSTEMS

www.wps.co.uk

01424 722222

[email protected] 9001

FM 14458

In-house processes including:

Oversized PCB Capability

Automated SMT/Through-Hole Assembly

Hand Assembly/Box Build

Design For Manufacture

Environmental Testing

Wide Range of Coatings/Encapsulation

Full Test Services

IPC Certified Staff

Hill Farm, Church Lane, Ford End,

Chelmsford, Essex CM3 1LH

C / , C/6 0 a d C 600

IPC 7711/21, IPC/WHMA-A-620 and IPC-600

Tel: 01245 237083 www.rework.co.uk

Tape Reeling & Services

For further

information

and details of

advertising

please call

Richard

Woodruff on

01732 359990

Your Reliable EMS Partner

Solutions

Through

Sustainable

Partnership

Tel: 01383 822911 Email: [email protected] www.dynamic-ems.com

• Customer Focused Solutions

• Flexible Supply Chain Solutions

• NPI / Prototyping

• SMT / PTH Assembly

• Conformal Coating

• Automated Optical inspection (AOI)

• ICT / Flying Probe Test / Functional Test

• Full Box Build & System Confi guration

IPC-A-610E

CLASS 3

Dynamic EMS Buyers Guide Ad.indd 2

17/07/2015 09:27

Lattice Releases World’s First superMHL Solutions for USB Type-C

Lattice Semiconductor Corporation, today

announced the world’s fi rst superMHL

products for USB Type-C to deliver 4K

60fps RGB/4:4:4 video with concurrent

USB 3.1 Gen 1 or Gen 2 data.

The SiI8630 and SiI9396 are a low-

power superMHL™ transmitter and

receiver pair that can deliver and receive

4K 60fps over a single lane, enabling a PC experience with USB

Type-C devices. USB Type-C products using these solutions will be able to connect to more

than 750 million legacy MHL and future superMHL TVs, monitors, AVRs, Blu-

ray Disc™ players, projectors, set-top boxes and automotive products.

These superMHL transmitters and receivers offer the lowest power, quick

time to market, and the only solution to offer concurrent USB 3.1 data with

4K60 UHD video to address the growing number of productivity applications

for mobile devices.www.latticesemi.com

Email: [email protected] Tel: 408-616-4017

Harwin simplifi es miniature EMC screening

Harwin, a leading hi-rel connector and

SMT board hardware manufacturer, has

expanded its popular EZBoardware range

with the introduction of three new RFI Shield

Clips suitable for small and low profi le shield cans with wall

thicknesses of between 0.15 and 1.0mm. These additions include two clips of only 3.9mm

length, allowing users to fi x smaller sized cans

to the PCB using this cost effective method. The range of clips now available

also includes the S0961-46R, specifi cally designed to provide signifi cantly

higher retention forces on the shield can, typically up by 30%, ideal for those

users seeking to maximise retention of the shielding can to the board.

Supplied taped and reeled, EZShield Can Clips are designed to be

automatically placed and surface mounted to the PCB.

www.harwin.co.uk Email: [email protected] Tel: +44-2392 314 532

News & Products

The products pages are the only pages you need to catch-up with the latest releases.


New Pocket-Sized Intel Compute Stick with Linux

Mouser Electronics, Inc. is now shipping the Intel® Compute Stick

with Ubuntu Linux, a new

generation of computer from Intel Corp. The Compute Stick is a

revolutionary new device

that enables any screen

with an HDMI interface to

become a fully functional

personal computer. The

Compute Stick comes pre-

installed with the Ubuntu 14.04 LTS operating

system. The Intel Compute

Stick is a fully functional

computer in a package similar to a large USB stick.

Powered by a 64 bit 1.33GHz Intel® AtomTM Z3735F Quad-Core

processor with 2Mbytes cache, integrated Intel HD graphics,

and multi channel digital audio. The Compute Stick plugs into any

display that has an HDMI 1.4a interface. Networking is achieved with

onboard IEEE 802.11 b/g/n WiFi.

http://www.mouser.de/Home.aspx Email: [email protected]

Tel: (817) 804-3833

‘Plug & Play’ proximity switches, 35% thinner from Panasonic

Panasonic has introduced a new series of human

detection proximity sensors. MA Motion series

sensors are 35 % thinner than previous versions

and are simple to install thanks to their ‘plug

and play’ nature. With feature built-in trigonometric background

suppression, so they are unaffected by

changing scenes or by people passing

by outside the detection range. Also,

changing light conditions and bright

daylight measuring up to 30k

lux at the sensor’s surface will

not affect the performance of the sensor.Thin MA Motion proximity

switches feature a detection

distance of 5 to 200cm and

are available with NPN and

PNP output trans./versionsin

PNP or NPN open collector

versions. They operate from 4.5

to 5.5VDC or in a wilder voltage

version from 5.5 to 27 VDC.For further product information, please visit: http://eu.industrial.panasonic.com/

ew series of humanMA Motion series previous versions

ks to their ‘pluge.

etric background naffected by ople passing nge. Also,bright

5

September 2015 33

tor Corporation, today orldTypdeoen

e

B

p,

y’s fi rst superMHL

e-C to deliver 4K o with concurrent2 data.

JTAG/Boundary-scan Board Test Workshops

Register now for ‘hands on’ training sessions

JTAG Technologies are currently accepting registrations for the next of their hands on training workshop

based on the JTAGLive Studio low-cost board test and validation system.

Costing just £295, the workshop will allow users to discover the power of boundary-scan testing for

board bring-up and production applications. Attendees will work with the JT 2156 training board and

learn how to use the Buzz interactive test tool, AutoBuzz interconnect test system and the Python-based

Script tool to generate cluster tests and re-usable cluster test modules for non-JTAG logic such as

memories and I2C parts.

The workshop fee includes the cost of a JTAGLive controller and a six-month taster licence for the

JTAGLive Studio system, together worth £650.

The event will be run close to the JTAG Technologies’ UK offi ce in Bedford, a central location that offers

easy access from both the A1 and M1 motorway. The next event is scheduled for 17th September 2015 and will begin at 9:30 am.

To register your interest please contact [email protected] or call 01234 831212.

The anticipated audience will include electronics design engineers looking at JTAG for hardware validation, test engineers not yet familiar with JTAG,

project managers, SME owners, production engineers and anyone with an interest in this rapidly growing embedded test technology.

Comments from previous workshop attendees: “Studio looks a great tool that can help to speed-up time to market”,

“I now longer need to wait for fi rmware before I start board bring-up”,

“We intend to deploy Studio for repair and rework in manufacturing”

ww.jtag.co.uk Email: [email protected] Tel: +44 (0)1234 931 212

er

artner

sou

aai

Pa

ic


www.rapidonline.com

120,000 lines and counting!


Electronic Product Sept. 2015

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Transcript of Electronic Product Sept. 2015