Effect of source inductance in 3-Ø fully controlled converter

By13MPE0031

CIRCUIT DIAGRAM

OPERATION

 A phase to B phase, when T3 is fired and T1 is supposed to go OFF. This causes 3 devices to conduct simultaneously for a short-while; i.e., T1, T2 and T3 –all three conduct simultaneously causing the forward current to be shared between A and B phases (T1 and T3) and the return current being carried by T2 or C phase. This causes a reduction in the output voltage. If 1 and 2 were conducting, the output would have been VAC. If 2 and 3 are only conducting, the output would have been VBC. Because all three of them are conducting the output Dc voltage will be an average of these two line to line voltages i.e.,(VBC+VAC)/2

WAVE FORMS

MATLAB CIRCUIT

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

100

200

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-5

0

5

10

15

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-500

0

500<Thyristor voltage>

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

5

10

15

Time

<Thyristor current>

R-LOAD

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-50

0

50

100

150

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-5

0

5

10

15

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-500

0

500<Thyristor voltage>

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

5

10

15

Time

<Thyristor current>

RL-LOAD

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

50

100

150

200

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-5

0

5

10

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08-400

-200

0

200

400<Thyristor voltage>

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.080

5

10

Time

<Thyristor current>

RLE-LOAD

R RL RLERESULTS

COMPARISON

Theoretical

Practical