EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter [email protected] .

35
EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter [email protected] http://www.uta.edu/ronc

Transcript of EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter [email protected] .

Page 1: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

EE 5340Semiconductor Device TheoryLecture 26 - Fall 2010

Professor Ronald L. [email protected]

http://www.uta.edu/ronc

Page 2: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Table 8.4 (p. 398 M&K 3rd edition) Charge Conditions in the MOS System

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Page 3: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Figure 8.11 (p. 399 M&K 3rd edition)General behavior of C-V curves of an ideal MOS system under different dc

bias and ac small-signal conditions. The low-frequency (LF) C-V curve corresponding to the simplified model is shown as a dashed line.

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Page 4: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Figure 8.12 (p. 401 M&K 3rd edition) MOS C-V measurement system. The voltmeter and ammeter measure both the magnitude and phase of the voltage across the diode and the

current through it.L26 24Nov2010 4

Page 5: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Figure 8.14a & b (p. 404 M&K 3rd edition) The effects of a fixed oxide-charge density Qox on the MOS system. (a)

Charge configuration at zero bias: Qox = Qs + QG; (b) charge at flat band: Qox = QG.

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Page 6: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Figure 8.15 (p. 405 M&K 3rd edition) Fixed charge in the oxide causes the capacitance-voltage curve to

translate along the VG axis without distortion (dashed curve); charge that is influenced by the gate voltage causes distortion (dotted curve).L26 24Nov2010 6

Page 7: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

Figure 8.16 (p. 406 M&K 3rd edition)(a) Four categories of oxide charge in the MOS system. The symbols for the charge densities Q (C cm-2), and state densities N (states cm-2) or D (states cm-2 eV-1) have been standardized [4]. (b) Energy levels at the oxide-silicon

interface. The interface trapping levels are distributed with density Dit (states cm-2 eV-1) within the forbidden-gap energies.

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Page 8: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Effect of Q’ss onthe C-V relationshipFig 10.29*

Page 9: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Fully biased n-MOScapacitor

0y

L

VG

Vsub=VB

EOx,x> 0

Acceptors

Depl Reg

e- e- e- e- e- e- n+

n+

VS VD

p-substrate

Channel if VG > VT

Page 10: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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MOS energy bands atSi surface for n-channel

Fig 8.10**

Page 11: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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n-substrate inversion(p-channel)Fig 10.7*

Page 12: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Computing the D.R. W and Q at O.S.I.

Ex

Emax

x

aSi

x Nq

dxdE

a

SBpSid qN

VVx

)(22,max

)(2 SBp VVarea

,maxda,maxd xqNQ

Page 13: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Q’d,max and xd,max forbiased MOS capacitor

Fig 8.11**

xd,max

(m) )2-

d,max

(cm

q

Q'

Page 14: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Fully biased n-channel VT calc

0V ,

qN

VV22x

,xNqQ' ,0Nn

lnV

VV'C

'Q2VVV

VV :substratep

a

CBpd,max

d,maxad,maxa

itp

FBOx

,maxdpFBCT

Tthreshold at ,G

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n-channel VT forVC = VB = 0

Fig 10.20*

Page 16: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Fully biased p-channel VT calc

0V ,

qNVV22

x

,xNqQ' ,0nN

lnV

VV'C

'Q2VVV

VV :substraten

d

BCnd,max

d,maxdd,maxi

dtn

FBOx

,maxdnFBCT

Tthreshold at ,G

Page 17: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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p-channel VT forVC = VB = 0

Fig 10.21*

Page 18: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Equations forVT calculation

substr-n for 0 substr,- p for 0V

qN

22x ,xNqQ'

0nN

V 0Nn

V

C

Q2VV substrnp

da

npd,maxd,maxa,dd,max

i

dtn

a

itp

Ox

dnpFBT

,

,

',max

,

,ln,ln

':,

Page 19: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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n-channel enhancementMOSFET in ohmic region

0< VT< VG

VB < 0

EOx,x> 0

Acceptors

Depl Reg

VS = 0 0< VD<

VDS,sate-e- e- e- e- n+

n+

p-substrate

Channel

Page 20: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Conductance ofinverted channel• Q’n = - C’Ox(VGC-VT)

• n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)

• The conductivity n = (n’s/t) q n

• G = n(Wt/L) = n’s q n (W/L) = 1/R, so

• I = V/R = dV/dR, dR = dL/(n’sqnW) WdV VVV'CdLI nTCG

L

0

V

VOx

D

S

Page 21: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Basic I-V relationfor MOS channel

2TGOxn

satDD

TGsatDSDS

satDSDD

nTGsatDSDS

TGDS2

DSDSTGOxn

D

VVL2CW

II

so VVVV for

,VI by given be I let so

Sat0LyQ' VVVV At

VVV VVVV2L2CW

I

'

.,

,'

,

,

,

,

Page 22: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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I-V relation for n-MOS (ohmic reg)

2TGSOxn

sat,D

sat,DSDS

Lys,sat,DS

sat,DSTGDS

2DSDSTG

OxnD

VVLW

2'C

I

VV for const is

curr. channel that assume

0n' ,V At

physical.-non is result

,VVVV

for Note .VVVV2LW

2'C

I

ID

VDSVDS,sat

ID,sat

ohmic

non-physical

saturated

Page 23: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Universal draincharacteristic

9ID1

ID

4ID1

ID1

VGS=VT+1V

VGS=VT+2V

VGS=VT+3V

2DS

Oxnsat,D V

LW

2'C

I

VDS

2Oxn1D V1

LW

2'C

I

saturated, VDS>VGS-VTohmic

Page 24: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Characterizing then-ch MOSFET

VD

IDD

SG B

2TGSOxn

sat,D

TGSDS

TGSDS

VVLW

2'C

I

so , VVV

0V , VV

VGSVT

DI

LW

2'C

slope

Oxn

Page 25: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Substrate bias effect on VT (body-effect)

pSBpOx

aSiSBT

SBTTa

SBpmaxd,

Ox

maxd,apFBST

T

2V2'C

Nq20VV

VVV so , qN

V22x

where , 'C

xNq2VVV

Source to relative be ncalculatio V Letting

Page 26: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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Body effect dataFig 9.9**

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Low field ohmiccharacteristics

DSVVVGS

D

OxnDSTGS

DSTGSOxnD

TGDS

2DSDSTGS

OxnD

VLW

KPdVdI

'C KP , VVVLW

KP

VVVLW

'CI

that so ,VVV

let e,Furthermor region. ohmic for

, VVVV2LW

2'C

I

TGDS

Page 28: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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MOSFET circuitparameters

region ohmic ,VVL

'CWg

saturation ,VL

'CWg

VI

g

cetancTranscondu

TGSOxn

mL

DSOxn

ms

VGS

Dm

DS

Page 29: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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MOSFET circuitparameters (cont)

ohmic ,VVVL

'CWg

saturation ,0g

VI

g

econductanc drain or Output

DSTGSOxn

dL

ds

VDS

Dd

GS

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OxOxOxgdOxgs 'WLCC ,C31

C ,C32

C

Fig 10.51*

MOSFET equivalentcircuit elements

Page 31: EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu .

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MOS small-signal equivalent circuitFig 10.52*

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MOS channel-length modulationFig 11.5*

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Analysis of channellength modulation

DD

sat,DSDSDS

sat,DSp

DSsat,DSpa

Si

ILL

L'I

VVV

V2

VV2qN2

L

mod length the as same the

is change DR the Assume

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Channel length mod-ulated drain charFig 11.6*

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References

* Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997.

**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986