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Transcript of Edc 2
LAB-MANUAL
II Year III SEM ECE
3EC-09
Electronics Lab I
ACERC/Department of ECE/EDC lab/1
DEPARTMENT OF ELECTRONICS & COMMUNICATION
ENGINEERING
ACERC/Department of ECE/EDC lab/2
INDEXS. No. Content Page
No.1. RTU syllabus2. Do’s and Don’ts
3. Instructions to the Students4. Lab PEO5. Lab Plan
Experiment as per RTU Syllabus
1.
1. Exp-1 Study the following devices:(a) Analog & digital multimeters(b) Function/ Signal generators(c) Regulated d. c. power supplies (constant voltage and constant current operations)(d) Study of analog CRO, measurement of time period, amplitude, frequency & phase angle using Lissajous figures.
2. Exp-2 Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse Saturation current and static & dynamic resistances.
3.Exp-3 Plot V-I characteristic of zener diode and study of zener diode as voltage regulator. Observe the effect of load changes and determine load limits of the voltage regulator.
4. Exp-4 Plot frequency response curve for single stage amplifier and to determine gain bandwidth product.
5. Exp-5 Plot drain current - drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp.
6. Exp-6 Application of Diode as clipper & clamper.
7.Exp-7 Plot gain- frequency characteristic of two stages RC coupled amplifier & calculate its bandwidth and compare it with theoretical value.
8. Exp-8 Plot gain- frequency characteristic of emitter follower & find out its input and output resistances.
9.Exp-9 Plot input and output characteristics of BJT in CB, CC and CE configurations. Find their h- parameters.
10. Exp-10 Study half wave rectifier and effect of filters on wave. Also calculate theoretical & practical ripple factor.
11. Exp-11 Study bridge rectifier and measure the effect of filter network on D.C. voltage output & ripple.
Experiment Beyond Syllabus
ACERC/Department of ECE/EDC lab/3
1. Exp-1 To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter.
2. Exp-2 To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η).
3. Exp-3 To draw the V-I Characteristics of SCR
RTU Detailed Syllabus
ACERC/Department of ECE/EDC lab/4
Class: III Sem. B. Tech. EvaluationBranch: ECESchedule per WeekPractical Hrs : 3
Examination Time = Three (4) HoursMaximum Marks = 100[ Sessional (60) & End-term (40)]
S. No.
List of Experiments
1 2. Study the following devices:(a) Analog & digital multimeters(b) Function/ Signal generators(c) Regulated d. c. power supplies (constant voltage and constant current operations)(d) Study of analog CRO, measurement of time period, amplitude, frequency & phase angle using Lissajous figures.
2 Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse Saturation current and static & dynamic resistances.
3 Plot V-I characteristic of zener diode and study of zener diode as voltage regulator. Observe the effect of load changes and determine load limits of the voltage regulator
4 Plot frequency response curve for single stage amplifier and to determine gain bandwidth product
5 Plot drain current - drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp.
6 Application of Diode as clipper & clamper.
7 Plot gain- frequency characteristic of two stages RC coupled amplifier & calculate its bandwidth and compare it with theoretical value.
8 Plot gain- frequency characteristic of emitter follower & find out its input and output resistances.
9 Plot input and output characteristics of BJT in CB, CC and CE configurations. Find their h- parameters.
10 Study half wave rectifier and effect of filters on wave. Also calculate theoretical & practical ripple factor.
11 Study bridge rectifier and measure the effect of filter network on D.C. voltage output & ripple.
ACERC/Department of ECE/EDC lab/5
DO’S AND DON’T’S
DO’S
1. Student should get the record of previous experiment checked before starting the
new experiment.
2. Read the manual carefully before starting the experiment.
3. Before starting the experiment, get circuit diagram checked by the teacher.
4. Before switching on the power supply, get the circuit connections checked.
5. Get your readings checked by the teacher.
6. Apparatus must be handled carefully.
7. Maintain strict discipline.
8. Keep your mobile phone switched off or in vibration mode.
9. Students should get the experiment allotted for next turn, before leaving the lab.
DON’TS
1. Do not touch or attempt to touch the mains power supply Wire with bare hands.
2. Do not overcrowd the tables.
3. Do not tamper with equipments.
4. Do not leave the without permission from the teacher
ACERC/Department of ECE/EDC lab/6
INSTRUCTIONS TO THE STUDENTS
GENERAL INSTRUCTIONS
Maintain separate observation copy for each laboratory.
Observations or readings should be taken only in the observation copy.
Get the readings counter signed by the faculty after the completion of the experiment.
Maintain Index column in the observation copy and get the signature of the faculty
before leaving the lab.
BEFORE ENTERING THE LAB
The previous experiment should have been written in the practical file, without
which the students will not be allowed to enter the lab.
The students should have written the experiment in the observation copy that they
are supposed to perform in the lab.
The experiment written in the observation copy should have aim, apparatus
required, circuit diagram/algorithm, blank observation table (if any), formula (if
any), programmed (if any), model graph (if any) and space for result.
WHEN WORKING IN THE LAB
Necessary equipments/apparatus should be taken only from the lab assistant by
making an issuing slip, which would contain name of the experiment, names of
batch members and apparatus or components required.
Never switch on the power supply before getting the permission from the faculty.
BEFORE LEAVING THE LAB
The equipments/components should be returned back to the lab assistant in good
condition after the completion of the experiment.
The students should get the signature from the faculty in the observation copy.
They should also check whether their file is checked and counter signed in the
index.
Program Educational Objectives: ACERC/Department of ECE/EDC lab/7
1. EDC Lab is an important Lab for all the students as they make different circuits on breadboard which includes various devices such as Transistors, Diodes, and Amplifiers etc. It is important to understand the basics and working of these devices.
2. It is the basic Lab of all the branches… Knowledge and concept of electrons and holes, Diode, semiconductors, Amplifiers are necessary in each and every subject. Of Electronics. Which is useful for understanding the behavior of different electronics devices?
3. This Lab helps in understanding various other Labs, of electronics, real life application.
4. In industries the practical application uses the basic Knowledge of EDC. During Training, the student see a lot of equipment having devices like Diode, Capacitor, Transistor, MOSFET, PCB Designing , Testing , so the basic Knowledge about them lead to easy understanding of their working.
5. This Lab helps to understand the important of Electronics in Social life. Device Miniaturization is become of EDC only.. Use of LED, LCD, Sensor and Various Opto electronics devices can be easily understood because of Electronics only.
3. Program Outcomes:
A) Graduate will have the basic knowledge of Electronics, device and circuits.
B) Graduate will have an ability to identify the various devices, working Principle, Characteristics and their applications.
C) Graduate will have an ability to design various Projects, PCB design and working of daily Use Equipment (Like: LED, sensors, Opto electronics devices).
D) The knowledge Of EDC Lab will help the student to perform various Experiments in Laboratories which will help in understanding theory more clearly.
E) Graduate will have the Knowledge and use of Modern Upcoming technologies Like Mobile, 3G, 4G Technologies which will help in complete development of student.
F) The Knowledge of EDC Lab will help in getting Success in Research and Development.
G) Graduate will develop confidence for getting higher education and ability of Life Long learning.
H) Graduate will show the understanding of impact of Engineering Solution on the society and also will be aware of Contemporary issue.
I) This Lab help in Preparing student for various industries purpose such as Knowledge of PCB designing, Testing and Circuit Forming.
ACERC/Department of ECE/EDC lab/8
J) The Lab knowledge helps in professional and developing Ethical responsibilities.
K) This Lab will help in understanding of various other subjects of Engineering Stream such as Digital Electronics, Microprocessor and Analog Electronics.
3. Mapping of course objective with course Outcomes
Program Objectives/Outcomes
A B C D E F G H I J K
I Yes Yes Yes Yes Yes Yes Yes
II Yes Yes Yes Yes Yes Yes
III Yes Yes Yes Yes Yes Yes Yes
IV Yes Yes Yes Yes Yes Yes
V Yes Yes Yes Yes Yes
4. Important Topics Covered:
Study of CRO and Function Generators etc
Semiconductor Physics and PN Diode I/p and O/p Characteristics..
Zener Diode Characteristics
Clipper and Clamper
Rectifier (Half Wave and Full Wave)
BJT Transistor I/p and O/p Characteristics..
Single Stage Amplifier
Emitter Follower
RC Couple Amplifier
FET I/p and O/p Characteristics..
5. Topics beyond the Syllabus:
1) Foundation Topics:
Introduction of Conductors, Semiconductor and Insulators
Diode, Transistors Operation and applications
ACERC/Department of ECE/EDC lab/9
FET, MOSFET Operation and applications
2) Advanced Topics:
Zener and Avalanche Breakdown
Feedback Concepts
Rectifiers
Study of CRO and Function Generators etc
3) Contemporary Issues/Trends
Advancement in the designing of Electronics Circuits on Printed Circuit Board.
4) New Application Oriented Topics
Feedback Topology
Oscillators
6. Text Book/Reference Book
S.No Title Author Publication
1 Electronics Device and Circuits
Milliman Hallkias Tata McGraw hill Publications
2 Electronics Device and Circuits
Robert Bolystead Pearson Prentice Hall
3 Electronics Device and Circuits
Sanjeev Gupta Dhanpat Rai Publications
4 Electronics Device and Circuits
J.B.Gupta S.K. Kataria & Sons
LAB PLAN-
ACERC/Department of ECE/EDC lab/10
DATE/EXP. No. 1 2 3 4 5 6 7 8 9 10
Experiment no. 1 G1 G2 G3 G4 G5
Experiment no. 2 G5 G1 G2 G3 G4
Experiment no. 3 G4 G5 G1 G2 G3
Experiment no. 4 G3 G4 G5 G1 G2
Experiment no. 5 G2 G3 G4 G5 G1
Experiment no. 6 G1 G2 G3 G4 G5
Experiment no. 7 G5 G1 G2 G3 G4
Experiment no. 8 G4 G5 G1 G2 G3
Experiment no. 9 G3 G4 G5 G1 G2
Experiment no. 10 G2 G3 G4 G5 G1
ACERC/Department of ECE/EDC lab/11
1. STUDY OF DEVICES
AIM: - Study the following devices:
(a) Analog & digital multimeters(b) Function/ Signal generators(c) Regulated d. c. power supplies (constant voltage and constant current operations)(d) Study of analog CRO, measurement of time period, amplitude, frequency & phase angle using Lissajous figures.
APPARATUS:-
CROAnalog and digital multimeterFunction / Signal GeneratorRegulated DC Power SupplyCRO Probes
THEORY:-
(a) ANALOG AND DIGITAL MULTIMETER
A multimeter or a multitester, also known as a VOM (Volt-Ohm meter), is an electronic
measuring that combines several measurement functions in one unit. A typical multimeter may
include features such as the ability to measure voltage, current and resistance. Multimeters may
use analog or digital circuits—analog multimeters (AMM) and digital multimeters (often
abbreviated DMM or DVOM.) Analog instruments are usually based on a micro ammeter whose
pointer moves over a scale calibrated for all the different measurements that can be made; digital
instruments usually display digits, but may display a bar of a length proportional to the quantity
being measured.
A multimeter can be a hand-held device useful for basic fault finding and field service work or
a bench instrument which can measure to a very high degree of accuracy. They can be used to
troubleshoot electrical problems in a wide array of industrial and household devices such
as electronic equipment, motor controls, domestic appliances, power supplies, and wiring systems
ACERC/Department of ECE/EDC lab/12
Fig. DIGITAL MULTIMETER
OPERATION
A multimeter is a combination of a multirange DC voltmeter, multirange AC voltmeter,
multirange ammeter, and multirange ohmmeter. An un-amplified analog multimeter combines a
meter movement, range resistors and switches.
For an analog meter movement, DC voltage is measured with a series resistor connected between
the meter movement and the circuit under test. A set of switches allows greater resistance to be
inserted for higher voltage ranges. The product of the basic full-scale deflection current of the
movement, and the sum of the series resistance and the movement's own resistance, gives the full-
scale voltage of the range. As an example, a meter movement that required 1 milliamp for full
scale deflection, with an internal resistance of 500 ohms, would, on a 10-volt range of the
multimeter, has 9,500 ohms of series resistance. For analog current ranges, low-resistance shunts
are connected in parallel with the meter movement to divert most of the current around the coil.
Again for the case of a hypothetical 1 mA, 500 ohm movement on a 1 Ampere range, the shunt
resistance would be just over 0.5 ohms.
Moving coil instruments respond only to the average value of the current through them. To
measure alternating current, a rectifier diode is inserted in the circuit so that the average value of
current is non-zero. Since the average value and the root-mean-square value of a waveform need
not be the same, simple rectifier-type circuits may only be accurate for sinusoidal waveforms.
Other wave shapes require a different calibration factor to relate RMS and average value. Since
practical rectifiers have non-zero voltage drop, accuracy and sensitivity is poor at low values.
ACERC/Department of ECE/EDC lab/13
To measure resistance, a small dry cell within the instrument passes a current through the device
under test and the meter coil. Since the current available depends on the state of charge of the dry
cell, a multimeter usually has an adjustment for the ohms scale to zero it. In the usual circuit
found in analog multimeters, the meter deflection is inversely proportional to the resistance; so
full-scale is 0 ohms, and high resistance corresponds to smaller deflections. The ohms scale is
compressed, so resolution is better at lower resistance values.
Amplified instruments simplify the design of the series and shunt resistor networks. The internal
resistance of the coil is decoupled from the selection of the series and shunt range resistors; the
series network becomes a voltage divider. Where AC measurements are required, the rectifier can
be placed after the amplifier stage, improving precision at low range.
Digital instruments, which necessarily incorporate amplifiers, use the same principles as analog
instruments for range resistors. For resistance measurements, usually a small constant current is
passed through the device under test and the digital multimeter reads the resultant voltage drop;
this eliminates the scale compression found in analog meters, but requires a source of significant
current. An auto ranging digital multimeter can automatically adjust the scaling network so that
the measurement uses the full precision of the A/D converter.
In all types of multimeters, the quality of the switching elements is critical to stable and accurate
measurements. Stability of the resistors is a limiting factor in the long-term accuracy and
precision of the instrument.
(b) FUNCTION GENERATOR
Fig. FUNCTION GENERATOR
The function generator is used to generate a wide range of alternating-current (AC) signals.
The front panel is divided into six major control groups:
1) Frequency Selection Group;
ACERC/Department of ECE/EDC lab/14
2) Sweep Group;
3) Amplitude Modulation Group;
4) DC Offset Group;
5) Function, or Waveform Group; and
6) Output Group.
• The power switch is on the upper left-hand corner of the unit. The green LED will indicate that
the unit is on.
• The three most important groups for this lab are the frequency, function, and output groups. The
remaining three groups, (sweep, amplitude modulation, and DC offset) will be briefly covered in
the lab setup procedures. Should you desire more detailed descriptions of these groups; the Leader
Function Generator manual is available in the lab.
Frequency Selection Group:
These controls are used to select the operating frequency of the function generator. This group
consists of the frequency control knob and the eight frequency multiplier selection buttons. For
example, to set the function generator to an operating frequency of 2000 Hz (2 kHz):
• Rotate the frequency control knob to 2.
• Select the 1 kHz frequency multiplier button.
With the result that: 2.0 * 1 kHz = 2.0 kHz.
To set the function generator to an operating frequency of 5.5 kHz:
• Rotate the frequency control knob to 0.55.
• Select the 10 kHz frequency multiplier button.
With the result that: 0.55 * 10 kHz = 5.5 kHz.
Output Group: ACERC/Department of ECE/EDC lab/15
1. These controls are used to adjust the amplitude of the generator's
output signal. The group consists of the amplitude-control knob, the three attenuation buttons and
the fused 50 ohm BNC connector. Although the amplitude knob is not indexed, the amplitude
ranges from a few millivolts to approximately 20 volts. We will set the amplitude levels by
aligning the white line on the amplitude knob to the three o'clock position (90 degrees right), the
nine o'clock position (90 degrees left), or the twelve o'clock position (straight up). Notice that
rotating the knob fully to the left does not result in a zero amplitude signal.
• The attenuation buttons are used to attenuate (decrease) the amplitude of the signal by a factor
measured in decibels. The following relationship will assist in working with the attenuation
buttons:
(dB) = -10 * log10 (Pout/ Pin) (if power is the unit of measurement) or
(dB) = -20 * log10 (Vout / Vin) (if voltage is the unit of measurement)
Note: The attenuation buttons are additive. In other words, if the 10 dB and the 20 dB buttons are
both pressed in, the combined attenuation of the input signal is 30 dB.
Function/Waveform Selection Group:
This group is used to select the shape of the generated waveform. The group is made up of the six
wave-selector buttons. The six waveforms that the function generator can produce are the sine
wave, the square wave, the triangle wave, two sawtooth waves, and the variable-width pulse
wave.
© Regulated d. c. power supplies (constant voltage and constant current operations)A power supply is a device that supplies electric power to an electrical load. The term is most
commonly applied to devices that convert one form of electrical energy to another, though it may
also refer to devices that convert another form of energy (mechanical, chemical, solar) to
electrical energy. A regulated power supply is one that controls the output voltage or current to a
specific value; the controlled value is held nearly constant despite variations in either load current
or the voltage supplied by the power supply's energy source.
ACERC/Department of ECE/EDC lab/16
Every power supply must obtain the energy it supplies to its load, as well as any energy it
consumes while performing that task, from an energy source. Depending on its design, a power
supply may obtain energy from:
Electrical energy transmission systems. Common examples of this include power supplies
that convert AC line voltage to DC voltage.
Energy storage devices such as batteries and fuel cells.
Electromechanical systems such as generators and alternators.
Solar power.
A power supply may be implemented as a discrete, stand-alone device or as an integral device
that is hardwired to its load. Examples of the latter case include the low voltage DC power
supplies that are part of desktop computers and consumer electronics devices.
Commonly specified power supply attributes include:
The amount of voltage and current it can supply to its load.
How stable its output voltage or current is under varying line and load conditions.
How long it can supply energy without refueling or recharging (applies to power supplies
that employ portable energy sources).
DC power supplyAn AC powered unregulated power supply usually uses a transformer to convert the voltage from
the wall outlet (mains) to a different, nowadays usually lower, voltage. If it is used to
produce DC, rectifier is used to convert alternating voltage to a pulsating direct voltage, followed
by a filter, comprising one or more capacitors, resistors, and sometimes inductors, to filter out
(smooth) most of the pulsation. A small remaining unwanted alternating voltage component at
mains or twice mains power frequency (depending upon whether half- or full-wave rectification is
used)—ripple—is unavoidably superimposed on the direct output voltage.
For purposes such as charging batteries the ripple is not a problem, and the simplest unregulated
mains-powered DC power supply circuit consists of a transformer driving a single diode in series
with a resistor.
ACERC/Department of ECE/EDC lab/17
Before the introduction of solid-state electronics, equipment used valves (vacuum tubes) which
required high voltages; power supplies used step-up transformers, rectifiers, and filters to generate
one or more direct voltages of some hundreds of volts, and a low alternating voltage for filaments.
Only the most advanced equipment used expensive and bulky regulated power supplies.
AC power supplyAn AC power supply typically takes the voltage from a wall outlet (mains supply) and lowers it to
the desired voltage. Some filtering may take place as well.
(d) ANALOG CRO
Technical Specifications Operating Modes:
OPERATING MODES
CH 1, CH 2, CH 1&11 Alt / Chopped,
(Approx. 350 KHz), X-Y operation: 1:1
Vertical Deflection: (Both Channels)
Bandwidth: DC 20 MHz (-3dB)
Rise time: 17.5 ns (approximately)
Deflection Coefficients: 12 steps
5mV/cm - 20V/cm (1-2-5 sequence)
Accuracy: ± 3%
Input Impedance: 1M Ω ||30pF
Input coupling: DC-AC Gnd
Max. Input: 350V (DC+ peak AC)
Time Base:
Time coefficients: 18 steps, 0.5 µs/ cm0.2s/ cm
(1-2-5 sequence) with MagX5 to 100 ns/cm.
With variable to 40ns/cm
Accuracy: ±3 % (In cal position)
Sweep Output: Approximately 5V(peak to peak)
Trigger System:
Modes: Auto or variable
Source: CH 1 or CH 2, external
Slope: Positive or Negative
Coupling: AC, TV frame
ACERC/Department of ECE/EDC lab/18
Sensitivity: Internal 0.5cm External0.8V
Trigger Bandwidth: 40 MHz
HORIZONTAL DEFLECTION
Bandwidth: DC- 2 MHz (-3dB)
XY mode: Phase shift < 5° 60 KHz
Deflection coefficients: 12 calibrated
Steps 5 mV /cm-20V /cm
Input Impedance: 1MΩ || 30 pF
Component Tester:
Test Voltage: Max. 8.6 Vrms
Test Current: Max. 8 mArms
Test Frequency: 50 HZ Test circuit
Ground to chassis
Miscellaneous:
Fault Simulation: Total of 15 faults
Can be simulated. Detailed
Troubleshooting Procedure included.
Cathode ray tube: 140 mm Rectangular
Tube with internal graticule,
(P-31) phosphor
Accelerating potential: 2000 VDC
Display: 8x10 cm
Trace rotation: Adjustable
Calibrator: Square wave 1KHz(approx.) 0.2V +1%
Z Modulation: TTL level
Mains Voltage: 230V ±10% 50Hz
Power Consumption: 36 VA(approximately)
Weight: 7.3 Kg (Approximately)
Dimensions (mm): W450 x H145 x D42
Front Panel Controls
ACERC/Department of ECE/EDC lab/19
(1) Power ‘On/Off’: Turns ‘On’ & ‘Off’ (on in open cover condition only.) LED indicates power
‘On’. Use position& Int/Focus controls to get the beam. All push buttons.
(2) Time / Div: Rotary Switch for TB speed control.
(3) Trigger Input: For feeding External trigger signal.
(4) Volts/Div: For sensitivity selection of CH 1 & CH 2.
(5) DC-AC-Gnd: Switch provided for Input coupling. BNC inputs provided for connecting the
Input signal.
(6) Component Tester: Switch when pressed converts scope into Component Tester mode.
(7) CT: Input & Gnd terminals to be used for CT.
Controls on PCB
(1) Intensity: Controls the brightness
(2) Focus: Controls the sharpness
(3) Trace Rotation: Controls the horizontal alignment of the trace.
(4) X Pos: Controls the horizontal position
(5) Y Pos I & II: Controls vertical position of the trace.
(6) X Y: When pressed cuts-off internal TB & connects external horizontal signal via. CH II
(7) X 5: When pressed gives 5 times magnification.
(8) External: When pressed allows ext. trigger.
(9) TV: When pressed allows TV frame to be synchronized.
(10) Cal Variable: Controls the time speed in between the steps.
ACERC/Department of ECE/EDC lab/20
(11) Auto/ Norm: In AT gives display of trace & auto trigger. When pressed becomes normal &
gives variable level trigger.
(12) Level: Controls the trigger level from positive peak to negative peak.
(13) + / - : Selects the slope of triggering.
(14) Trig 1/ Trig 2: When out trigger CH I and when pressed triggers CH II
(15) CH I Alt/: When out selects CH I and when pressed selects
CH II Chop CH II. When dual switch also pressed this selects Alt or Chop modes.
(16) Mono / Dual: When out, selects CH I only. When pressed selects both.
Amplitude Measurements
In general electrical engineering, alternating voltage data normally refers to effective values (rms =
root-mean-square value). However, for signal magnitudes and voltage designations in Oscilloscope
measurements, the peak-to-peak voltage (Vpp) value misapplied. The latter corresponds to the real
potential difference between the most positive and most negative points of a signal waveform. If a
sinusoidal waveform, displayed on the Oscilloscope screen, is to be converted into an effective
(rms) value, the resulting peak-to-peak value must be divided by 2 x√2 = 2.83. Conversely, it
should be observed that sinusoidal voltages indicated in Vrms (Veff) have 2.83 times the potential.
The maximum signal voltage required at the vertical amplifier input for a display of 1cm is
approximately 5mVpp. This is achieved with the attenuator control set at5mV/cm, however smaller
signals than this may also be displayed. The deflection coefficients on the input attenuators are
indicated in mV/cm or V/cm (peak-to-peak value).The magnitude of the applied voltage is
ascertained by multiplying the selected deflection coefficient by the vertical display height in cm. If
an attenuator probe X10is used, a further multiplication by a factor of 10 is required to ascertain the
correct voltage value.
Time Measurements :
As a rule, most signals to be displayed are periodically repeating processes, also called periods.
The number of periods per second is the repetition frequency Depending on the time base setting
of the Time/Div. switch, one or several signal periods or only a part of a period can be displayed.
The time coefficients are stated ins/cm, ms/cm and µs/cm on three fields. There are 18 time
coefficient ranges of the ST2001E, from 0.5s/cm to 0.2s/cm.The duration of a signal period or a
part of it is determined by multiplying the relevant time (horizontal distance in cm) by the time
ACERC/Department of ECE/EDC lab/21
coefficient set on the Time/Div. switch. The variable time control (identified with an arrow knob
cap) must be in its calibrated position Cal. (arrow pointing horizontally to the left).
Operating Modes :
The required operating modes are selected with push buttons in the vertical amplifier section. For
'Mono' operation with channel I only, all push buttons should be out. For' Mono' operation with
channel 2, only, the 'Alt/Chop' button must be pressed. For internal triggering with the signal from
channel 2, the Trig 1/2 button has to be pressed in addition. On pressing the button marked
'Mono/Dual', dual trace operation is selected. In this condition both traces are displayed
consecutively (alternate sweep).This mode is not suitable for the display of very low frequency
signals as the display will flicker or appear to jump. This can be overcome by pressing the
'Alt/Chop' button. Both channels then share the trace during each sweep period (chopped
mode).For display with a higher repetition rate, the type of channel switching is less important but
the alternate mode is normally suggested. For XY operation the XY button must be pressed. The
X signal is connected via the input of channel 2. The sensitivity of the horizontal amplifier during
X-Y operation is selected by the CH II attenuator switch. The sensitivity and input impedance for
both the X & Y axes are equal. Note that the frequency limit of the X axis is approximately2 MHz
(-3 dB). Therefore, an increase in phase difference is noticeable at higher frequencies. The phase
shift is 3° approximately at 60 KHz. Lissajous figures can be displayed in the X- Y mode for
certain measuring tasks.
• Comparing two signals of different frequency or bringing one frequency up to the frequency of
the other signal. This also applies for whole number multiples or fractions of the one signal frequency.
• Phase comparison between two signals of the same frequency
RESULT: - We successfully studied about analog and digital multimeter, Function generator,
Regulated DC power supply and analog CRO
ACERC/Department of ECE/EDC lab/22
1. P-N JUNCTION DIODE CHARACTERISTICS
AIM: - Plot V-I characteristic of P-N junction diode & calculate cut-in voltage, reverse Saturation current and static & dynamic resistances.
APPARATUS:-
P-N Diode IN4007. Regulated Power supply (0-30v) Resistor 1KΩ Ammeters (0-200 mA, 0-500mA) Voltmeter (0-20 V) Bread board Connecting wires
THEORY:-
A p-n junction diode conducts only in one direction. The V-I characteristics of the diode are curve
between voltage across the diode and current through the diode. When external voltage is zero,
circuit is open and the potential barrier does not allow the current to flow. Therefore, the circuit
current is zero. When P-type (Anode is connected to positive terminal and n- type (cathode) is
connected to negative terminal of the supply voltage, is known as forward bias. The potential
barrier is reduced when diode is in the forward biased condition. At some forward voltage, the
potential barrier altogether eliminated and current starts flowing through the diode and also in
the circuit. The diode is said to be in ON state. The current increases with increasing forward
voltage.
When N-type (cathode) is connected to positive terminal and P-type (Anode) is connected
negative terminal of the supply voltage is known as reverse bias and the potential barrier across
the junction increases. Therefore, the junction resistance becomes very high and a very small
current (reverse saturation current) flows in the circuit. The diode is said to be in OFF state. The
reverse bias current produces due to minority charge carriers.
ACERC/Department of ECE/EDC lab/23
CIRCUIT DIAGRAM:-
FORWARD BIAS:-
REVERSE BIAS:-
ACERC/Department of ECE/EDC lab/24
MODEL WAVEFORM:-
PROCEDURE:-
FORWARD BIAS:-
1. Connections are made as per the circuit diagram.
2. For forward bias, the RPS positive is connected to the anode of the diode and RPS negative is
connected to the cathode of the diode.
3. Switch on the power supply and increases the input voltage (supply voltage) in steps.
4. Note down the corresponding current flowing through the diode and voltage across the diode
for each and every step of the input voltage.
ACERC/Department of ECE/EDC lab/25
5. The reading of voltage and current are tabulated.
6. Graph is plotted between voltage and current.
OBSERVATION:-
S.NO APPLIED VOLTAGE (V) VOLTAGE ACROSS
DIODE(V)
CURRENT
THROUGH
DIODE(mA)
PROCEDURE:-
REVERSE BIAS:-
1. Connections are made as per the circuit diagram
2. For reverse bias, the RPS positive is connected to the cathode of the diode and RPS negative is
connected to the anode of the diode.
3. Switch on the power supply and increase the input voltage (supply voltage) in Steps
4. Note down the corresponding current flowing through the diode voltage across the diode for
each and every step of the input voltage.
5. The readings of voltage and current are tabulated.
6. Graph is plotted between voltage and current.
OBSEVATION:-
S.NO APPLIEDVOLTAGE
ACROSSDIODE(V)
VOLTAGE
ACROSS DIODE(V)
CURRENT
THROUGH
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DIODE(mA)
PRECAUTIONS:-
1. All the connections should be correct.
2. Parallax error should be avoided while taking the readings from the Analog meters.
RESULT: - Forward and Reverse Bias characteristics for a p-n diode is observed
VIVA QESTIONS:-
1. Define depletion region of a diode?
2. What is meant by transition & space charge capacitance of a diode?
3. Is the V-I relationship of a diode Linear or Exponential?
4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?
5. What are the applications of a p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
7. What is the diode equation?
8. What is PIV?
9. What is the break down voltage?
10. What is the effect of temperature on PN junction diodes?
ACERC/Department of ECE/EDC lab/27
2. ZENER DIODE CHARACTERISTICS
AIM: Plot V-I characteristic of zener diode and study of zener diode as voltage regulator.
Observe the effect of load changes and determine load limits of the voltage regulator.
APPARATUS: -
Zener diode. Regulated Power Supply (0-30V). Voltmeter (0-20V) Ammeter (0-100mA) Resistor (1KOhm) Bread Board Connecting wires
CIRCUIT DIAGRAM:-
STATIC CHARACTERISTICS:-
ACERC/Department of ECE/EDC lab/28
ACERC/Department of ECE/EDC lab/29
REGULATION CHARACTERISTICS :-
Theory:-
A zener diode is heavily doped p-n junction diode, specially made to operate in the break down
region. A p-n junction diode normally does not conduct when reverse biased. But if the reverse
bias is increased, at a particular voltage it starts conducting heavily. This voltage is called Break
down Voltage. High current through the diode can permanently damage the device
To avoid high current, we connect a resistor in series with zener diode. Once the diode starts
conducting it maintains almost constant voltage across the terminals whatever may be the
current through it, i.e., it has very low dynamic resistance. It is used in voltage regulators.
PROCEDURE:-
Static characteristics:-
1. Connections are made as per the circuit diagram.
2. The Regulated power supply voltage is increased in steps.
3. The zener current (lz), and the zener voltage (Vz) are observed and then noted in the tabular
form.
4. A graph is plotted between zener current (Iz) and zener voltage (Vz).
Regulation characteristics:-
ACERC/Department of ECE/EDC lab/30
1. The voltage regulation of any device is usually expressed as percentage regulation
2. The percentage regulation is given by the formula
((VNL-VFL)/VFL)X100
VNL=Voltage across the diode, when no load is connected.
VFL=Voltage across the diode, when load is connected.
3. Connection are made as per the circuit diagram
4. The load is placed in full load condition and the zener voltage (V z), Zener current (lz), load
current (IL) are measured.
5. The above step is repeated by decreasing the value of the load in steps.
6. All the readings are tabulated.
7. The percentage regulation is calculated using the above formula
OBSERVATIONS:-
Static characteristics:-
S.NO ZENER
VOLTAGE(VZ)
ZENER CURRENT(IZ)
ACERC/Department of ECE/EDC lab/31
Regulation characteristics:-
S.N0
VNL(VOLTS) VFL
(VOLTS)RL
(KΏ)% REGULATION
MODEL WAVEFORMS:-
PRECAUTIONS:-
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
ACERC/Department of ECE/EDC lab/32
3. Should be ensured that the applied voltages & currents do not exceed the ratings of the
diode.
RESULT:-
a) Static characteristics of zener diode are obtained and drawn.
b) Percentage regulation of zener diode is calculated.
VIVAQUESTIONS:-
1. What type of temp? Coefficient does the zener diode have?
2. If the impurity concentration is increased, how the depletion width effected?
3. Does the dynamic impendence of a zener diode vary?
4. Explain briefly about avalanche and zener breakdowns?
5. Draw the zener equivalent circuit?
6. Differentiate between line regulation & load regulation?
7. In which region zener diode can be used as a regulator?
8. How the breakdown voltage of a particular diode can be controlled?
9. What type of temperature coefficient does the Avalanche breakdown has?
10. By what type of charge carriers the current flows in zener and avalanche breakdown diodes?
ACERC/Department of ECE/EDC lab/33
3. SINGLE STAGE AMPLIFIER
AIM : 1. Plot frequency response curve for single stage amplifier and to determine gain bandwidth product.
APPRATUS :
N-channel FET (BFW11)Resistors (6.8KΩ, 1MΩ, 1.5KΩ)Capacitors (0.1µF, 47µF)Regulated power Supply (0-30V)Function generatorCROCRO probesBread boardConnecting wires
CIRCUIT DIAGRAM:
ACERC/Department of ECE/EDC lab/34
THEORY:
A field-effect transistor (FET) is a type of transistor commonly used for weak-signal
amplification (for example, for amplifying wireless (signals). The device can amplify analog or
digital signals. It can also switch DC or function as an oscillator. In the FET, current flows along
a semiconductor path called the channel. At one end of the channel, there is an electrode called
the source. At the other end of the channel, there is an electrode called the drain. The physical
diameter of the channel is fixed, but its effective electrical diameter can be varied by the
application of a voltage to a control electrode called the gate. Field-effect transistors exist in two
major classifications. These are known as the junction FET (JFET) and the metal-oxide-
semiconductor FET (MOSFET). The junction FET has a channel consisting of N-type
semiconductor (N-channel) or P-type semiconductor (P-channel) material; the gate is made of
the opposite semiconductor type. In P-type material, electric charges are carried mainly in the
form of electron deficiencies called holes. In N-type material, the charge carriers are primarily
electrons. In a JFET, the junction is the boundary between the channel and the gate. Normally,
this P-N junction is reverse-biased (a DC voltage is applied to it) so that no current flows
between the channel and the gate. However, under some conditions there is a small current
through the junction during part of the input signal cycle. The FET has some advantages and
some disadvantages relative to the bipolar transistor. Field-effect transistors are preferred for
weak-signal work, for example in wireless, communications and broadcast receivers. They are
also preferred in circuits and systems requiring high impedance. The FET is not, in general, used
for high-power amplification, such as is required in large wireless communications and
broadcast transmitters.
Field-effect transistors are fabricated onto silicon integrated circuit (IC) chips. A single IC can
contain many thousands of FETs, along with other components such as resistors, capacitors, and
diodes.
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. A signal of 1 KHz frequency and 50mV peak-to-peak is applied at the
Input of amplifier.
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3. Output is taken at drain and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for various input voltages.
6. Plot Av vs. Frequency
7. The Bandwidth of the amplifier is calculated from the graph using the
Expression,
Bandwidth BW=f2-f1
Where f1 is lower 3 dB frequency
f2 is upper 3 dB frequency
OBSERVATIONS:
S.NO INPUT
VOLTAGE(Vi)
OUTPUT
VOLTAGE(V0)
VOLTAGE GAIN
Av= (V0/Vi)
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MODEL GRAPH:
PRECAUTIONS:
1. All the connections should be tight.
2. Transistor terminals must be identified properly
RESULT: The frequency response of the common source FET Amplifier and Bandwidth is
obtained.
ACERC/Department of ECE/EDC lab/37
VIVA QUESTIONS
1. What is the difference between FET and BJT?
2. FET is unipolar or bipolar?
3. Draw the symbol of FET?
4. What are the applications of FET?
5. FET is voltage controlled or current controlled?
6. Draw the equivalent circuit of common source FET amplifier?
7. What is the voltage gain of the FET amplifier?
8. What is the input impedance of FET amplifier?
9. What is the output impedance of FET amplifier?
10. What are the FET parameters?
11. What are the FET applications?
ACERC/Department of ECE/EDC lab/38
4. FET CHARACTERISTICS
AIM: Plot drain current - drain voltage and drain current – gate bias characteristics of field effect transistor and measure of Idss & Vp.
APPARATUS: FET (BFW-11)
Regulated power supply Voltmeter (0-20V) Ammeter (0-100mA) Bread board Connecting wires
THEORY:
A FET is a three terminal device, having the characteristics of high input impedance and less
noise, the Gate to Source junction of the FET s always reverse biased. In response to small
applied voltage from drain to source, the n-type bar acts as sample resistor, and the drain current
increases linearly with VDS. With increase in ID the ohmic voltage drop between the source and
the channel region reverse biases the junction and the conducting position of the channel begins
to remain constant. The VDS at this instant is called “pinch of voltage”.
If the gate to source voltage (VGS) is applied in the direction to provide additional reverse bias,
the pinch off voltage ill is decreased. In amplifier application, the FET is always used in the
region beyond the pinch-off.
FDS=IDSS(1-VGS/VP)^2
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CIRCUIT DIAGRAM
PROCEDURE:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at 0.1V and 0.2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 1V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1.5 V and 2V.
9. The readings are tabulated.
10. From drain characteristics, calculate the values of dynamic resistance (rd) by using the
formula
rd = ∆VDS/∆ID
11. From transfer characteristics, calculate the value of transconductace (gm) By using the
formula
Gm=∆ID/∆VDS
12. Amplification factor (μ) = dynamic resistance. Tran conductance
μ = ∆VDS/∆VGS
ACERC/Department of ECE/EDC lab/40
OBSERVATIONS :
DRAIN CHARACTERISTICS:
S.NO VGS=0V VGS=0.1V VGS=0.2V
VDS(V) ID(mA) VDS(V) ID(mA) VDS(V) ID(mA)
TRANSFER CHARACTERISTICS :
S.NO VDS
=0.5V
VDS=1V VDS =1.5V
VGS (V) ID(mA) VGS (V) ID(mA) VGS (V) ID(mA)
ACERC/Department of ECE/EDC lab/41
MODEL GRAPH:
TRANSFER CHARACTERISTICS
DRAIN CHARACTERISTICS
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PRECAUTIONS:
1. The three terminals of the FET must be carefully identified
2. Practically FET contains four terminals, which are called source, drain, Gate, substrate.
3. Source and case should be short circuited.
4. Voltages exceeding the ratings of the FET should not be applied.
RESULT:
1. The drain and transfer characteristics of a given FET are drawn
2. The dynamic resistance (rd), amplification factor (μ) and Tran conductance (gm) of the
given FET are calculated.
VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?
ACERC/Department of ECE/EDC lab/43
6. CLIPPING AND CLAMPING CIRCUITS
AIM : Application of Diode as clipper & clamper.
APPARATUS :
Diode (IN914 / IN4007) Resistors-1 K& 100k DC Regulated power supply (for Vref) Signal generator (for Vi) CRO
THEORY:
CIRCUIT DIAGRAM OF POSITIVE CLIPPER
Fig.1 a. Positive clipper Circuit b. Transfer Characteristics
Clippers clip off a portion of the input signal without distorting the remaining part of the
waveform. In the positive clipper shown above the input waveform above Vref is clipped off.
If Vref = 0V, the entire positive half of the input waveform is clipped off. Plot of input Vi
(along X-axis) versus output Vo (along Y-axis) called transfer characteristics of the circuit
can also be used to study the working of the clippers.
For stiff clipper: 100RB < RS< 0.01RL, Where RB is bulk resistance of the diode. For diode
IN914, value of RB is 30Ω.Series resistor RS must be 100times greater than bulk resistance RB
and 100 times smaller than load resistance RL. If RB=30 Ω, select RS=1k Ω and RL=100kΩ.
ACERC/Department of ECE/EDC lab/44
PROCEDURE:
1. Before making the connections check all components using multimeter.
2. Make the connections as shown in circuit diagram.
3. Using a signal generator (Vi) apply a sine wave of 1KHz frequency and a peak-to peak
amplitude of 10V to the circuit. (Square wave can also be applied.)
4. Keep the CRO in dual mode; connect the input (Vi) signal to channel 1 and output
waveform (Vo) to channel 2. Observe the clipped output waveform which is as shown in fig.
2. Also record the amplitude and time data from the waveforms.
5. Now keep the CRO in X-Y mode and observe the transfer characteristic waveform
Note:
1. Vary Vref and observe the variation in clipping level. For this use variable DC power supply
for Vref.
2. Change the direction of diode and Vref to realize a negative clipper.
3. For double-ended clipping circuit, make the circuit connections as shown in fig.3 and the
output waveform observed is as shown in figure 5.
4. Adjust the ground level of the CRO on both channels properly and view the output in DC
mode (not in AC mode) for both clippers and clampers.
WAVEFORMS
Fig. 2. Input and output waveform for positive Clipper
ACERC/Department of ECE/EDC lab/45
RESULT:
Output voltage V0 =__________ during positive half cycle
=__________ during negative half cycle
DOUBLE ENDED CLIPPER
CIRCUIT DIAGRAM
Fig.3 a. Double ended clipper Circuit b. Transfer Characteristics
Apply Vi = 10 Vpp at 1kHz
V1= 2VV2= -2V
WAVE FORMS
Fig.4. Input and output waveform for double-ended clipping circuit
ACERC/Department of ECE/EDC lab/46
RESULT:
Output voltage V0 =__________ during positive half cycle
=__________ during negative half cycle
Note:
The above clipper circuits are realized using the diodes in parallel with the load (at the
output), hence they are called shunt clippers. The positive (and negative) clippers can also be
realized in the series configuration wherein the diode is in series with the load. These circuits
are called series clippers.
POSITIVE CLAMPER
COMPONENTS REQUIRED :
Diode (IN 914/BY-127) Resistor of 100 K Capacitor - 1F DC regulated power supply Signal generator CRO
CIRCUIT DIAGRAM
Fig. 5 Positive Clamper
The clamping network is one that will “clamp” a signal to a different DC level. The network
must have a capacitor, a diode and a resistive element, but it can also employ an independent
DC supply (Vref) to introduce an additional shift. The magnitude of R and C must be chosen
such that time constant τ = RLC is large enough to ensure the voltage across capacitor does
not discharge significantly during the interval of the diode is non-conducting
ACERC/Department of ECE/EDC lab/47
DESIGN:
For proper clamping, τ >100T where T is the time period of input waveform
If frequency is 1 kHz with peak-peak input voltage of 10V, T=1ms
τ = RL.C=100×T = 100ms
Let C=1μF
RL= 100×10-3 =100kΩ
1×10-6
Select C =1uF and RL =100 kΩ
PROCEDURE:
1. Before making the connections check all components using multimeter.
2. Make the connections as shown in circuit diagram (fig. 5).
3. Using a signal generator apply a square wave input (Vi) of peak-to-peak amplitude of 10V
(and frequency greater than 50Hz) to the circuit (Sine wave can also be applied).
4. Observe the clamped output waveform on CRO which is as shown in Fig. 6.
Note:
1. For clamping circuit with reference voltage Vref, the output waveform is observed as
shown in Fig. 7. For without reference voltage, Keep Vref = 0V.
2. CRO in DUAL mode and DC mode. Also the grounds of both the channels can be made to
have the same level so that the shift in DC level of the output can be observed.
3. For negative clampers reverse the directions of both diode and reference voltage.
Fig. 6 Input and output waveform for positive clamper without reference voltage.
ACERC/Department of ECE/EDC lab/48
Fig. 7 Input and output waveform for positive clamper circuit with reference voltage = 2V
RESULT:
With Vref =0, output voltage V0=_________With Vref =2, output voltage V0=________
VIVA QUESTIONS
1) Explain difference between clipper and clamper.2) Explain positive and negative clipper level?3) What is the basic difference between clipper and clamper and voltage multiplier?4) What are the applications of clipper and clamper?
ACERC/Department of ECE/EDC lab/49
6. RC COUPLED AMPLIFIER
AIM: Plot gain- frequency characteristic of two stages RC coupled amplifier & calculate its bandwidth and compare it with theoretical value.
APPARATUS:
Transistors - BC 107 -2Nos,Resistors - 3.3K -2Nos,
33k -2Nos, 330Ω -2Nos, 1k -2Nos,
Capacitors - 100uF -3Nos, 10uF -2Nos, Bread Board,
Regulated power supply,Cathode ray oscilloscope,
THEORY:
This is most popular type of coupling as it provides excellent audio fidelity.
A coupling capacitor is used to connect output of first stage to input of second stage.
Resistances R1, R2, Re form biasing and stabilization network. Emitter bypass capacitor
offers low reactance paths to signal coupling Capacitor transmits ac signal, blocks DC.
Cascade stages amplify signal and overall gain is increased total gain is less than product
of gains of individual stages. Thus for more gain coupling is done and overall gain of
two stages equals to A=A1*A2
A1=voltage gain of first stage
A2=voltage gain of second stage.
When ac signal is applied to the base of the transistor, its amplified output appears
across the collector resistor Rc. It is given to the second stage for further amplification
and signal appears with more strength. Frequency response curve is obtained by plotting
a graph between frequency and gain in db .The gain is constant in mid frequency range
and gain decreases on both sides of the mid frequency range. The gain decreases in the
low frequency range due to coupling capacitor Cc and at high frequencies due to
junction capacitance Cbe.
ACERC/Department of ECE/EDC lab/50
CIRCUIT DIAGRAM:
PROCEDURE:
1. Apply input by using function generator to the circuit.
2. Observe the output waveform on CRO.
3. Measure the voltage at
a. Output of first stage
b. Output of second stage.
4. From the readings calculate voltage gain of first stage, second stage and overall
gain of two stages. Disconnect second stage and then measure output voltage of
first stage calculates voltage gain.
5. Compare it with voltage gain obtained when second stage was connected.
6. Note down various values of gain for different frequencies.
7. A graph is plotted between frequency and voltage gain.
ACERC/Department of ECE/EDC lab/51
OBSERVATIONS: -
APPLIED
FREQUENCY
O/P VOLTAGE
(Vo)
VOLTAGE GAIN
in dB (20 log10Vo/Vi)
MODELGRAPH:-
INPUT WAVE FORM:
FIRST STAGE OUTPUT:
SECOND STAGE OUTPUT:
ACERC/Department of ECE/EDC lab/52
FREQUENCY RESPONSE:
PRECAUTIONS:
1) All connections should be tight.
2) Transistor terminals must be identifying properly.
3) Reading should be taken without any parallax error.
RESULT: Thus voltage gain is calculated and frequency response is observed along
with loading affect.
VIVA QUESTIONS:
1) What is the necessity of cascading?
2) What is 3dB bandwidth?
3) Why RC coupling is preferred in audio range?
4) Which type of coupling is preferred and why?
5) Explain various types of Capacitors?
6) What is loading effect?
7) Why it is known as RC coupling?
8) What is the purpose of emitter bypass capacitor?
9) Which type of biasing is used in RC coupled amplifier?
ACERC/Department of ECE/EDC lab/53
8. COMMON EMITTER FOLLOWER
AIM: Plot gain- frequency characteristic of emitter follower & find out its input and output resistances.
APPARATUS: FETBFW10Transistor BC107ResistorsCapacitorsCROFunction GeneratorMulti meter
THEORY:
CIRCUITDIAGRAM:
ACERC/Department of ECE/EDC lab/54
The common collector circuit is also known as emitter follower. The ac output voltage from a
CC circuit is essentially the same as the input voltage; there is no voltage gain or phase shift.
Thus, the CC circuit can be said to have a voltage gain of 1. The fact that the CC output
voltage follows the changes in signal voltage gives the circuit its other name emitter follower.
The input impedance of a CC amplifier is high. Output impedance is low and the Voltage
gain is almost unity. Because of these Characteristics the CC circuit is normally used as a
buffer amplifier, placed between a high impedance signal source and a low impedance load.
SOURCE FOLLOWER
The FET common drain circuit has the output voltage developed across the source resistor R s.
Here the ac output voltage is closely equal to the ac input voltage, and the circuit can be said
to have unity gain. Because the output voltage at the source terminal follows the signal
voltage at the gate, the common drain circuit is also known as a source follower. A common
drain circuit has a voltage gain approximately equal to 1, no phase shift between input and
output, very high input impedance and low output impedance. Because of its high Z i, low Zo
and unity gain the CD circuit is used as a buffer amplifier between a high impedance signal
source and a low impedance load.
ACERC/Department of ECE/EDC lab/55
PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Apply Vslv 1 KHz signal from the signal generator.
3. Observe corresponding output from the CRO and then calculate voltage gain using the
formula Av=Vo/Vi.
4. Measure voltage across AB terminals and then calculate input current by using the formula
Iin=Vab/Rab.
5. Measure current flowing through resistor at Source (or Emitter) terminal and note down it
as Iout.
6. Calculate Current gain using the formula AI=Iin/Iout.
7. Calculate input resistance using the formula Rin=Vin/Iin.
8. To calculate the output resistance, connect the pot at the output and vary the resistance of
the pot up to half of the output with RL is equal to infinity. The resistance of pot is the output
resistance.
OBSERVATIONS:
Frequency(Hz) Voltage gain (V) Current gain(mA)
ACERC/Department of ECE/EDC lab/56
MODELWAVEFORM:
PRECAUTIONS:
1. Wires should be checked for good continuity
2. FET terminals must be identified and connected carefully.
RESULT: Gain- frequency characteristic of emitter follower is successfully plotted & its input and output resistances also calculated.
ACERC/Department of ECE/EDC lab/57
9(a). TRANSISTOR CB CHARACTERSTICS
AIM: 1.To observe and draw the input and output characteristics of a transistor
connected in common base configuration.
2. To find α of the given transistor.
APPARATUS: Transistor, BC 107 Regulated power supply (0-30V, 1A) Voltmeter (0-20V) Ammeters (0-100mA) Resistor, 1000Ω Bread board Connecting wiresTHEORY:
A transistor is a three terminal active device. T he terminals are emitter, base, collector. In CB
configuration, the base is common to both input (emitter) and output (collector). For normal
operation, the E-B junction is forward biased and C-B junction is reverse biased.
In CB configuration, IE is positive, IC is negative and IB is negative. So,
VEB=f1 (VCB,IE) and
IC=f2 (VCB,IB)
With an increasing the reverse collector voltage, the space-charge width at the output junction
increases and the effective base width ‘W’ decreases. This phenomenon is known as “Early
effect”. Then, there will be less chance for recombination within the base region. With increase of
charge gradient with in the base region, the current of minority carriers injected across the emitter
junction increases. The current amplification factor of CB configuration is given by,
α= ∆IC/ ∆IE
CIRCUIT DIAGRAM
ACERC/Department of ECE/EDC lab/58
PROCEDURE:
INPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the input characteristics, the output voltage VCE is kept constant at 0V and for
different values of VEB note down the values of IE.
3. Repeat the above step keeping VCB at 2V, 4V, and 6V.All the readings is tabulated.
4. A graph is drawn between VEB and IE for constant VCB.
OUTPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the output characteristics, the input IE iskept constant at 10m A and for different
values of VCB, note down the values of IC.
3. Repeat the above step for the values of IE at 20 mA, 40 mA, and 60 mA, all the readings
are tabulated.
4. A graph is drawn between VCB and Ic for constant IE
OBSERVATIONS:
ACERC/Department of ECE/EDC lab/59
INPUT CHARACTERISTICS:
S.No VCB=0V VCB=1V VCB=2V
VEB(V) IE(mA) VEB(V) IE(mA) VEB(V) IE(mA)
OUTPUT CHARACTERISTICS:
S.No
IE=10mA IE=20mA IE=30mA
VCB(V) IC(mA) VCB(V) IC(mA) VCB(V) IC(mA)
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MODEL GRAPHS:
INPUT CHARACTERISTICS
OUTPUT CHARACTERISTICS
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PRECAUTIONS:
1. The supply voltages should not exceed the rating of the transistor.
2. Meters should be connected properly according to their polarities.
RESULT:
1. The input and output characteristics of the transistor are drawn.
2. The α of the given transistor is calculated.
VIVA QUESTIONS:
1. What is the range of α for the transistor?
2. Draw the input and output characteristics of the transistor in CB configuration?
3. Identify various regions in output characteristics?
4. What is the relation between α and β?
5. What are the applications of CB configuration?
6. What are the input and output impedances of CB configuration?
7. Define α (alpha)?
8. What is EARLY effect?
9. Draw diagram of CB configuration for PNP transistor?
10. What is the power gain of CB configuration?
ACERC/Department of ECE/EDC lab/62
9(b). TRANSISTOR CC CHARACTERSTICS
AIM: To study the input and output characteristics of a transistor in common collector
configuration and to determine its h parameters.
APPARATUS:
Transistor BC147 1
Resistance 68 k, 1k ohm 1
Regulated power supply (0 – 30V) 2
Ammeter (1-10)mA, (0-500)µA 1
Voltmeter (0 – 1) V, (0 – 30) V 1
Bread board
Connecting wires
THEORY:
Bipolar junction transistor (BJT) is a three terminal (emitter, base, collector) semiconductor
device. There are two types of transistors namely NPN and PNP. It consists of two P-N
junctions namely emitter junction and collector junction. In Common collector configuration the
input is applied between base and collector terminals and the output is taken from collector and
emitter. Here collector is common to both input and output and hence the name common
collector configuration. Input characteristics are obtained between the input current and input
voltage taking output voltage as parameter. It is plotted between VBC and IB at constant VCE in CC
configuration. Output characteristics are obtained between the output voltage and output current
taking input current as parameter. It is plotted between VCE and IE at constant IB in CC
configuration.
ACERC/Department of ECE/EDC lab/63
CIRCUIT DIAGRAM:
PROCEDURE:
INPUT CHARECTERSTICS:
1. Connect the transistor in CC configuration as per circuit diagram.
2. Keep output voltage VCE = 0V by varying VEE.
3. Varying VBB gradually, note down both base current IB and base collector voltage (VBC).
4. Repeat above procedure (step 3) for various values of VC (VBC).
OUTPUT CHARACTERSTICS:
1. Make the connections as per circuit diagram.
2. By varying VBB keep the base current IB = 20µA.
3. Varying VCC gradually, note down the readings of emitter-current (IE) and collector- Emitter
voltage (VCE).
4. Repeat above procedure (step 3) for different values of IE .
ACERC/Department of ECE/EDC lab/64
OBSERVATIONS:
INPUT CHARACTERISTICS:
S.NOVCB = 1V VCB = 2V VCB = 4V
VEB(V) IE(μA) VEB(V) IE(μA) VEB(V) IE(μA)
OUT PUT CHAREACTARISTICS:
S.NOIB = 50 μA IB = 75 μA IB = 100 μA
VCE(V) IE(mA) VCE(V) IEmA) VCE(V) IE(mA)
MODEL GRAPHS:
INPUT CHARACTERSTICS:
ACERC/Department of ECE/EDC lab/65
OUTPUT CHARECTERSTICS:
Calculations from graph:
a) Input impedance (hic) = ∆VBC / ∆IB
(b) Forward current gain (hfc) = ∆IE / ∆IB
(c) Output admittance (hoc) = ∆IE / ∆ VEC
(d) Reverse voltage gain (hrc) = ∆VBC/∆ VEC
RESULT:
Thus the input and output characteristics of CC configuration are plotted and h parameters are
found.
a) Input impedance (hic) =
b) Forward current gain (hfc) =
c) Output admittance (hoc) =
d) Reverse voltage gain (hrc) =
ACERC/Department of ECE/EDC lab/66
PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
VIVA QUESTIONS:
1. What are the applications of CC configuration?
2. Compare the voltage gain and input and output impedances of CE and CC configurations.
3. BJT is a current controlled device. Justify
4. Why CC Configuration is called emitter follower?
5. Can we use CC configuration as an amplifier?
6. What is the need for analyzing the transistor circuits using different parameters?
7. What is the significance of hybrid model of a transistor?
8. Is there any phase shift between input and output in CC configuration?
ACERC/Department of ECE/EDC lab/67
9(c). TRANSISTOR CE CHARACTERSTICS
AIM: 1. To draw the input and output characteristics of transistor connected in CE configuration
2. To find β of the given transistor.
APPARATUS:
Transistor (BC 107) R.P.S (O-30V) 2Nos Voltmeters (0-20V) 2Nos Ammeters (0-200μA) & (0-500mA) Resistors 1Kohm Bread board
THEORY:
A transistor is a three terminal device. The terminals are emitter, base, collector. In common
emitter configuration, input voltage is applied between base and emitter terminals and output is
taken across the collector and emitter terminals. Therefore the emitter terminal is common to
both input and output. The input characteristics resemble that of a forward biased diode curve.
This is expected since the Base-Emitter junction of the transistor is forward biased. As
compared to CB arrangement IB increases less rapidly with VBE. Therefore input resistance of CE
circuit is higher than that of CB circuit.
The output characteristics are drawn between Ic and VCE at constant IB. the collector current varies
with VCE unto few volts only. After this the collector current becomes almost constant, and
independent of VCE. The value of VCE up to which the collector current changes with V CE is
known as Knee voltage. The transistor always operated in the region above Knee voltage, IC is
always constant and is approximately equal to IB. The current amplification factor of CE
configuration is given by
Β = ΔIC/ΔIB
ACERC/Department of ECE/EDC lab/68
CIRCUIT DIAGRAM:
PROCEDURE:
INPUT CHARECTERSTICS:
1. Connect the circuit as per the circuit diagram.
2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for
different values of VBE. Note down the values of IC
3. Repeat the above step by keeping VCE at 2V and 4V.
4. Tabulate all the readings.
5. plot the graph between VBE and IB for constant VCE
OUTPUT CHARACTERSTICS:
1. Connect the circuit as per the circuit diagram
2. for plotting the output characteristics the input current IB is kept constant at 10μA and
for different values of VCE note down the values of IC
3. repeat the above step by keeping IB at 75 μA 100 μA
4. tabulate the all the readings
5. plot the graph between VCE and IC for constant IB
ACERC/Department of ECE/EDC lab/69
OBSERVATIONS:
INPUT CHARACTERISTICS:
S.NOVCE = 1V VCE = 2V VCE = 4V
VBE(V) IB(μA) VBE(V) IB(μA) VBE(V) IB(μA)
OUT PUT CHAREACTARISTICS:
S.NOIB = 50 μA IB = 75 μA IB = 100 μA
VCE(V) IC(mA) VCE(V) ICmA) VCE(V) IC(mA)
ACERC/Department of ECE/EDC lab/70
MODEL GRAPHS:
INPUT CHARACTERSTICS:
OUTPUT CHARECTERSTICS:
ACERC/Department of ECE/EDC lab/71
PRECAUTIONS:
1. The supply voltage should not exceed the rating of the transistor
2. Meters should be connected properly according to their polarities
RESULT:
1. the input and output characteristics of a transistor in CE configuration are Drawn
2. the of a given transistor is calculated
VIVA QUESTIONS:
1. What is the range of for the transistor?
2. What are the input and output impedances of CE configuration?
3. Identify various regions in the output characteristics?
4. what is the relation between
5. Define current gain in CE configuration?
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor?
9. What is the power gain of CE configuration?
10. What are the applications of CE configuration?
ACERC/Department of ECE/EDC lab/72
h-PARAMETERS OF CE CONFIGURATION
AIM: To calculate the H-parameters of transistor in CE configuration.
APPRATUS: Transistor BC 107Resistors 100 K Ώ 100 Ώ Ammeter (0-200µA), (0-200mA)Voltmeter (0-20V) - 2NosRegulated Power Supply (0-30V, 1A) - 2NosBreadboard
THEORY:
INPUT CHARACTERISTICS:
The two sets of characteristics are necessary to describe the behavior of the CE configuration
one for input or base emitter circuit and other for the output or collector emitter circuit.
In input characteristics the emitter base junction forward biased by a very small voltage VBB
where as collector base junction reverse biased by a very large voltage VCC. The input
characteristics are a plot of input current IB Vs the input voltage VBE for a range of values of
output voltage VCE. The following important points can be observed from these characteristics
curves.
1. The characteristics resemble that of CE configuration.
2. Input resistance is high as IB increases less rapidly with VBE
3. The input resistance of the transistor is the ratio of change in base emitter voltage ΔV BE to
change in base current ΔIB at constant collector emitter voltage (VCE) i.e. Input resistance or
input impedance hie = ΔVBE / ΔIB at VCE constant.
OUTPUT CHARACTERISTICS:
A set of output characteristics or collector characteristics are a plot of out put current I C VS
output voltage VCE for a range of values of input current IB .The following important points can
be observed from these characteristics curves:-
1. The transistor always operates in the active region. I.e. the collector current
ACERC/Department of ECE/EDC lab/73
IC increases with VCE very slowly. For low values of the VCE the IC increases rapidly with a small
increase in VCE .The transistor is said to be working in saturation region.
Output resistance is the ratio of change of collector emitter voltage ΔVCE , to change in collector
current ΔIC with constant IB. Output resistance or Output impedance hoe = ΔVCE / ΔIC at IB
constant.
Input Impedance hie = ΔVBE / ΔIB at VCE constant
Output impedance hoe = ΔVCE / ΔIC at IB constant
Reverse Transfer Voltage Gain hre = ΔVBE / ΔVCE at IB constant
Forward Transfer Current Gain hfe = ΔIC / ΔIB at constant VCE
CIRCUIT DIAGRAM:
ACERC/Department of ECE/EDC lab/74
PROCEDURE:
1. Connect a transistor in CE configuration circuit for plotting its input and output
characteristics.
2. Take a set of readings for the variations in IB with VBE at different fixed values of output
voltage VCE.
3. Plot the input characteristics of CE configuration from the above readings.
4. From the graph calculate the input resistance hie and reverse transfer ratio hre by taking the
slopes of the curves.
5. Take the family of readings for the variations of IC with VCE at different values of fixed IB.
6. Plot the output characteristics from the above readings.
7. From the graphs calculate hfe ands hoe by taking the slope of the curves.
Tabular Forms
Input Characteristics
S.NOVCE=0V VCE=6V
VBE(V) IB(μA) VBE(V) IB(μA)
Output Characteristics
S.NOIB = 20 µA IB = 40 µA IB = 60 µA
VCE (V) IC(mA) VCE (V) IC(mA) VCE (V) IC(mA)
ACERC/Department of ECE/EDC lab/75
MODEL WAVEFORM: Input Characteristics
ACERC/Department of ECE/EDC lab/76
Output Characteristics
ACERC/Department of ECE/EDC lab/77
RESULT: The H-Parameters for a transistor in CE configuration are calculated from the input
and output characteristics.
1. Input Impedance hie =
2. Reverse Transfer Voltage Gain hre =
3. Forward Transfer Current Gain hfe =
4. Output conductance hoe =
VIVA QUESTIONS:
1. What are the h-parameters?
2. What are the limitations of h-parameters?
3. What are its applications?
4. Draw the Equivalent circuit diagram of H parameters?
ACERC/Department of ECE/EDC lab/78
5. Define H parameter?
6. What are tabular forms of H parameters monoculture of a transistor?
7. What is the general formula for input impedance?
8. What is the general formula for Current Gain?
9. What is the general formula for Voltage gain?
ACERC/Department of ECE/EDC lab/79
10. HALF – WAVE RECTIFIER
AIM: - Study half wave rectifier and effect of filters on wave. Also calculate theoretical & practical ripple factor.
APPARATUS:- Experimental Board Multimeters 2No’s. Transformer (6-0-6). Diode, 1N 4007 Capacitor 100μf. Resistor 1KΩ. Connecting wires THEORY: -
During positive half-cycle of the input voltage, the diode D1 is in forward bias and conducts
through the load resistor R1. Hence the current produces an output voltage across the load resistor
R1, which has the same shape as the positive half cycle of the input voltage.
During the negative half-cycle of the input voltage, the diode is reverse biased and there is no
current through the circuit. i.e, the voltage across R1 is zero. The net result is that only the
positive half cycle of the input voltage appears across the load. The average value of the half
wave rectified o/p voltage is the value measured on dc voltmeter.
For practical circuits, transformer coupling is usually provided for two reasons.
1. The voltage can be stepped-up or stepped-down, as needed.
2. The ac source is electrically isolated from the rectifier. Thus preventing shock hazards in the
secondary circuit.
ACERC/Department of ECE/EDC lab/80
CIRCUIT DIAGRAM:-
PROCEDURE:-
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier
input.
3. By the multimeter, measure the ac input voltage of the rectifier and, ac and dc voltage at the
output of the rectifier.
4. Find the theoretical of dc voltage by using the formula,
Vdc=Vm/П
Where, Vm=2Vrms, (Vrms=output ac voltage.)
The Ripple factor is calculated by using the formula
r=ac output voltage/dc output voltage.
ACERC/Department of ECE/EDC lab/81
REGULATION CHARACTERSTICS:-
1. Connections are made as per the circuit diagram.
2. By increasing the value of the rheostat, the voltage across the load and current flowing
through the load are measured.
3. The reading is tabulated.
4. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and
IL on y-axis
5. From the value of no-load voltages, the %regulation is calculated using the formula,
Theoretical calculations for Ripple factor:-
Without Filter :-
Vrms=Vm/2
Vm=2Vrms
Vdc=Vm/П
Ripple factor r=√ (Vrms/ Vdc )2 -1 =1.21
With Filter:-
Ripple factor, r=1/ (2√3 f C R)
Where f =50Hz
C =100µF
RL=1KΩ
PRACTICAL CALCULATIONS:-
Vac=
Vdc=
Ripple factor without Filter =
Ripple factor with Filter =
ACERC/Department of ECE/EDC lab/82
OBSERVATIONS:-
WITHOUT FILTER
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
WITH FILTER
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
WITHOUTFILTER:-
Vdc=Vm/П, Vrms=Vm/2, Vac=√ ( Vrms2- Vdc 2)
USING
CRO
Vm(v) Vac(v) Vdc(v) r= Vac/ Vdc
WITHFILTER
USINGCRO
V1(V) V2(V) Vdc=
(V1+V2)/2
Vac=
(V1- V2)/2√3
r=
Vac/ Vdc
ACERC/Department of ECE/EDC lab/83
PRECAUTIONS:
1. The primary and secondary sides of the transformer should be carefully identified.
2. The polarities of the diode should be carefully identified.
3. While determining the % regulation, first Full load should be applied and then it
should be decremented in steps.
RESULT :-
1. The Ripple factor for the Half-Wave Rectifier with and without filters is measured.
2. The % regulation of the Half-Wave rectifier is calculated.
VIVA QUESTIONS:
1. What is the PIV of Half wave rectifier?
2. What is the efficiency of half wave rectifier?
3. What is the rectifier?
4. What is the difference between the half wave rectifier and full wave Rectifier?
5. What is the o/p frequency of Bridge Rectifier?
6. What are the ripples?
7. What is the function of the filters?
8. What is TUF?
9. What is the average value of o/p voltage for HWR?
10. What is the peak factor?
ACERC/Department of ECE/EDC lab/84
11. BRIDGE RECTIFER
AIM: - Study bridge rectifier and measure the effect of filter network on D.C. voltage output & ripple.
APPARATUS:-
Experimental board Diodes IN4007 4 Nos. Resistor 1KΩ Capacitor 100μF/25v. Transformer (6-0-6V) Multi meters 2 Nos. Connecting Wires
CIRCUIT DIAGRAM:-
THEORY:-
The bridge rectifier is also a full-wave rectifier in which four p-n diodes are connected in the
form of a bridge fashion. The Bridge rectifier has high efficiency when compared to half-wave
rectifier. During every half cycle of the input, only two diodes will be conducting while other
two diodes are in reverse bias.
PROCEDURE:-
1. Connections are made as per the circuit diagram.
ACERC/Department of ECE/EDC lab/85
2. Connect the ac main to the primary side of the transformer and secondary side to the bridge
rectifier.
3. Measure the ac voltage at the input of the rectifier using the multi meter.
4. Measure both the ac and dc voltages at the output of the Bridge rectifier.
5. Find the theoretical value of dc voltage by using the formula,
CALCULATIONS:-
Theoretical calculations:-
Vrms = Vm/ √2
Vm =Vrms√2
Vdc=2Vm/П
(i)Without filter:
Ripple factor, r = √ ( Vrms/ Vdc )2 -1 = 0.482
(ii)With filter:
Ripple factor, r = 1/ (4√3 f C RL) where f =50Hz
C =100µF
RL=1KΩ
Practical Calculations:-
Without filter:-
Vac=
Vdc=
Ripple factor, r=Vac/Vdc
With filters:-
Vac=
ACERC/Department of ECE/EDC lab/86
Vdc=
Ripple factor, r=Vac/Vdc
OBSEVATIONS:-
Without Filter
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
With Filter
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
Without Filter:-
Vrms = Vm/ √2 , Vdc=2Vm/П , Vac=√( Vrms2- Vdc
2)
USING CRO
Vm(v) Vac(v) Vdc(v) r= Vac/ Vdc
WITH FILTER
USINGCRO
V1(V) V2(V) Vdc=
(V1+V2)/2
Vac=
(V1- V2)/2√3
r=
Vac/
Vdc
ACERC/Department of ECE/EDC lab/87
MODELWAVEFORM:-
PRECAUTIONS:-
1. The voltage applied should not exceed in the ratings of the diode
2. The diodes will be connected correctly
RESULT:-
The Ripple factor of Bridge rectifier is with and without filter calculated.
ACERC/Department of ECE/EDC lab/88
VIVAQUESTIONS:-
1. What is the PIV of Bridge rectifier?
2. What is the efficiency of Bridge rectifier?
3. What are the advantages of Bridge rectifier?
4. What is the difference between the Bridge rectifier and full wave rectifier?
5. What is the o/p frequency of Bridge Rectifier?
6. What is the disadvantage of Bridge Rectifier?
7. What is the maximum secondary voltage of a transformer?
8. What are the different types of the filters?
9. What is the difference between the Bridge rectifier and half wave Rectifier?
10. What is the maximum DC power delivered to the load?
ACERC/Department of ECE/EDC lab/89
Department of Electronics & Communication
Beyond The Syllabus
3EC9 ELECTRONICS LAB-I
(ELECTRONICS & COMMUNICATION)
S. No. List of Experiments Beyond The Syllabus Page
No.
1 To find the Ripple factor and regulation of a Full-wave Rectifier
with and without filter.
2 To observe the characteristics of UJT and to calculate the
Intrinsic Stand-Off Ratio (η).
3 To draw the V-I Characteristics of SCR
ACERC/Department of ECE/EDC lab/90
1. FULL-WAVE RECTIFIER
AIM:-To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter.
APPARATUS:-
Experimental Board
Transformer (6-0-6V).
P-n Diodes, (lN4007) ---2 No’s
Multimeters –2No’s
Filter Capacitor (100μF/25V) -
Connecting Wires
Load resistor, 1KΩ
THEORY:-
The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. During positive half
cycle of secondary voltage (input voltage), the diode D1 is forward biased and D2is reverse
biased. The diode D1 conducts and current flows through load resistor RL. During negative half
cycle, diode
D2 becomes forward biased and D1 reverse biased. Now, D2 conducts and current flows
through the load resistor RL in the same direction. There is a continuous current flow through the
load resistor RL, during both the half cycles and will get unidirectional current as show in the
model graph. The difference between full wave and half wave rectification is that a full wave
rectifier allows unidirectional (one way) current to the load during the entire 360 degrees of the
input signal and half-wave rectifier allows this only during one half cycle (180 degree).
ACERC/Department of ECE/EDC lab/91
CIRCUIT DIAGRAM:-
PROCEDURE:
2. Connections are made as per the circuit diagram.
3. Connect the ac mains to the primary side of the transformer and the secondary side to the
rectifier.
4. Measure the ac voltage at the input side of the rectifier.
5. Measure both ac and dc voltages at the output side the rectifier.
6. Find the theoretical value of the dc voltage by using the formula Vdc=2Vm/П
7. Connect the filter capacitor across the load resistor and measure the values of V ac and Vdc
at the output.
8. The theoretical values of Ripple factors with and without capacitor are calculated.
9. From the values of Vac and Vdc practical values of Ripple factors are calculated. The
practical values are compared with theoretical values.
ACERC/Department of ECE/EDC lab/92
THEORITICAL CALCULATIONS:-
Vrms = Vm/ √2
Vm =Vrms√2
Vdc=2Vm/П
(i)Without filter:
Ripple factor, r = √ ( Vrms/ Vdc )2 -1 = 0.482
(ii)With filter:
Ripple factor, r = 1/ (4√3 f C RL) where f =50Hz
C =100µF
RL=1KΩ
PRACTICAL CALCULATIONS:
Without filter:-
Vac=
Vdc=
Ripple factor, r= Vac/Vdc
With filters:-
Vac=
Vdc=
Ripple factor=Vac/Vdc
ACERC/Department of ECE/EDC lab/93
Without Filter:
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
With Filter
USING
DMM
Vac(v) Vdc(v) r= Vac/ Vdc
Without Filter
Vrms = Vm/ √2 , Vdc=2Vm/П , Vac=√( Vrms2- Vdc 2)
USING
CRO
Vm(v) Vac(v) Vdc(v) r= Vac/ Vdc
With Filter
USINGCRO
V1(V) V2(V) Vdc=
(V1+V2)/2
Vac=
(V1- V2)/2√3
r=
Vac/ Vdc
PRECAUTIONS:
ACERC/Department of ECE/EDC lab/94
1. The primary and secondary side of the transformer should be carefully identified
2. The polarities of all the diodes should be carefully identified.
RESULT:-
The ripple factor of the Full-wave rectifier (with filter and without filter) is calculated.
VIVA QUESTIONS:-
1. Define regulation of the full wave rectifier?
2. Define peak inverse voltage (PIV)? And write its value for Full-wave rectifier?
3. If one of the diode is changed in its polarities what wave form would you get?
4. Does the process of rectification alter the frequency of the waveform?
5. What is ripple factor of the Full-wave rectifier?
6. What is the necessity of the transformer in the rectifier circuit?
7. What are the applications of a rectifier?
8. What is meant by ripple and define Ripple factor?
9. Explain how capacitor helps to improve the ripple factor?
10. Can a rectifier made in INDIA (V=230v, f=50Hz) be used in USA (V=110v, f=60Hz)?
ACERC/Department of ECE/EDC lab/95
2. UJT CHARACTERISTICS
AIM: To observe the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η).
APPARATUS:
Regulated Power Supply (0-30V, 1A) - 2Nos
UJT 2N2646
Resistors 10kΩ, 47Ω, 330Ω
Multimeters - 2Nos
Breadboard
Connecting Wires
CIRCUIT DIAGRAM
ACERC/Department of ECE/EDC lab/96
THEORY:
A Unijunction Transistor (UJT) is an electronic semiconductor device that has only one
junction. The UJT Unijunction Transistor (UJT) has three terminals an emitter (E) and
two bases (B1 and B2). The base is formed by lightly doped n-type bar of silicon. Two
ohmic contacts B1 and B2 are attached at its ends. The emitter is of p-type and it is
heavily doped. The resistance between B1 and B2, when the emitter is open-circuit is
called interbase resistance.The original unijunction transistor, or UJT, is a simple device
that is essentially a bar of N type semiconductor material into which P type material has
been diffused somewhere along its length. The 2N2646 is the most commonly used
version of the UJT.
Circuit symbol
The UJT is biased with a positive voltage between the two bases. This causes a potential
drop along the length of the device. When the emitter voltage is driven approximately
one diode voltage above the voltage at the point where the P diffusion (emitter) is,
current will begin to flow from the emitter into the base region. Because the base region
is very lightly doped, the additional current (actually charges in the base region) causes
(conductivity modulation) which reduces the resistance of the portion of the base
between the emitter junction and the B2 terminal. This reduction in resistance means
that the emitter junction is more forward biased, and so even more current is injected.
Overall, the effect is a negative resistance at the emitter terminal. This is what makes the
UJT useful, especially in simple oscillator circuits. When the emitter voltage reaches V p,
the current starts to increase and the emitter voltage starts to decrease. This is
represented by negative slope of the characteristics which is referred to as the negative
ACERC/Department of ECE/EDC lab/97
resistance region, beyond the valley point, RB1 reaches minimum value and this region,
VEB proportional to IE.
PROCEDURE:
1. Connection is made as per circuit diagram.
2. Output voltage is fixed at a constant level and by varying input voltage
corresponding emitter current values are noted down.
3. This procedure is repeated for different values of output voltages.
4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using
η = (Vp-VD) / VBB
5. A graph is plotted between VEE and IE for different values of VBE.
MODEL GRAPH:
ACERC/Department of ECE/EDC lab/98
OBSEVATIONS:
VBB=1V VBB=2V VBB=3V
VEB(V) IE(mA) VEB(V) IE(mA) VEB(V) IE(mA)
CALCULATIONS:
VP = ηVBB + VD
η = (VP-VD) / VBB
η = ( η1 + η2 + η3 ) / 3
RESULT: The characteristics of UJT are observed and the values of Intrinsic Stand-Off
Ratio are calculated.
VIVA QUESTIONS
1. What is the symbol of UJT?
2. Draw the equivalent circuit of UJT?
3. What are the applications of UJT?
4. Formula for the intrinsic stand off ratio?
5. What does it indicates the direction of arrow in the UJT?
6. What is the difference between FET and UJT?
7. Is UJT is used an oscillator? Why?
8. What is the Resistance between B1 and B2 is called as?
9. What is its value of resistance between B1 and B2?
10. Draw the characteristics of UJT?
ACERC/Department of ECE/EDC lab/99
19. SILICON-CONTROLLED RECTIFIER(SCR)
CHARACTERISTICS
AIM: To draw the V-I Characteristics of SCR
APPARATUS: SCR (TYN616) Regulated Power Supply (0-30V) Resistors 10kΩ, 1kΩ Ammeter (0-50) µA Voltmeter (0-10V) Breadboard Connecting Wires.
CIRCUIT DIAGRAM:
THEORY:
ACERC/Department of ECE/EDC lab/100
It is a four layer semiconductor device being alternate of P-type and N-type silicon. It consists
of 3 junctions J1, J2, J3 the J1 and J3 operate in forward direction and J2 operates in reverse
direction and three terminals called anode A, cathode K, and a gate G. The operation of SCR can
be studied when the gate is open and when the gate is positive with respect to cathode.
When gate is open, no voltage is applied at the gate due to reverse bias of the junction J2 no
current flows through R2 and hence SCR is at cut off. When anode voltage is increased J2 tends
to breakdown.
When the gate positive, with respect to cathode J3 junction is forward biased and J2 is reverse
biased .Electrons from N-type material move across junction J3 towards gate while holes from
P-type material moves across junction J3 towards cathode. So gate current starts flowing, anode
current increase is in extremely small current junction J2 break down and SCR conducts heavily.
When gate is open thee break over voltage is determined on the minimum forward voltage at
which SCR conducts heavily. Now most of the supply voltage appears across the load
resistance. The holding current is the maximum anode current gate being open , when break
over occurs.
ACERC/Department of ECE/EDC lab/101
PROCEDURE:
1. Connections are made as per circuit diagram.
2. Keep the gate supply voltage at some constant value
3. Vary the anode to cathode supply voltage and note down the readings of voltmeter and
ammeter. Keep the gate voltage at standard value.
4. A graph is drawn between VAK and IAK .
OBSERVATION
VAK(V) IAK ( µA)
MODEL WAVEFORM:
ACERC/Department of ECE/EDC lab/102
RESULT: SCR Characteristics are observed.
VIVA QUESTIONS
1. What the symbol of SCR?
2. IN which state SCR turns of conducting state to blocking state?
3. What are the applications of SCR?
4. What is holding current?
5. What are the important type’s thyristors?
6. How many numbers of junctions are involved in SCR?
7. What is the function of gate in SCR?
8. When gate is open, what happens when anode voltage is increased?
9. What is the value of forward resistance offered by SCR?
10. What is the condition for making from conducting state to non conducting state?
ACERC/Department of ECE/EDC lab/103