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LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING (AUTONOMOUS), MYLAVARAM - 521230

LAKIREDDY BALIREDDY COLLEGE OF ENGINEERING(AUTONOMOUS)

(Approved by AICTE, Accredited by NBA, Affiliated to JNTUK, Kakinada and ISO 9001: 2008 Certified)

ACADEMIC REGULATIONS,COURSE STRUCTURE

ANDDETAILED SYLLABUS

2010 - 2011

M.TECH – SYSTEMS AND SIGNAL PROCESSING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

L.B.Reddy Nagar, MYLAVARAM – 521 230Krishna District, Andhra Pradesh State

M.TECH (SYSTEMS AND SIGNAL PROCESSING), A.Y.2010-2011 Page 0


INDEX

Contents Page No.

1. Introduction 2

2. Programme Offered (Post Graduation) 2

3. Eligibility Criteria for Admission 2

4. Award of M.Tech Degree 3

5. Duration of the Programme 3

6. Semester-wise distribution of credits 3

7. Distribution and Weightage of Marks 3

8. Attendance Regulations & Condonation 5

9. Minimum Academic Requirements 6

10. Course Pattern 6

11. Award of Grade 7

12. Minimum Instruction days 8

13. General 8

14. Transitory Regulations 8

15. Course Code and Course Numbering Scheme 9

16. Medium of Instruction 10

17. Amendments to Regulations 10

18. Grade Card 10

19. Conduct and Discipline 10

20. Malpractices 12

21. Award of Rank 12

22. Course structure 14

23. Syllabus 16 - 42



1. INTRODUCTION

Academic Programmes of the institute are governed by rules and regulations as

approved by the Academic Council, which is the highest Academic body of the

Institute.

These academic rules and regulations are applicable to the students admitted during

academic year 2010-11 into first year of two year Postgraduate programme offered

by the college leading to Master of Technology (M.Tech) degree.

1.1 Lakireddy Balireddy College of Engineering, Mylavaram, an autonomous

institution, follows Semester pattern for all two years of its Postgraduate M.Tech

programme with internal and external evaluation.

1.2 Semester Pattern : Each academic year shall be divided into two semesters,

each of 20 weeks duration, including instruction, evaluation, etc. Each semester

consists of a minimum of 90 instruction days with at least 35 to 40 contact

periods per week.

2. PROGRAMME OFFERED (POST GRADUATE)

Master of Technology (M.Tech.)

3. ELIGIBILITY CRITERIA FOR ADMISSION

The eligibility criteria for admission into First year M.Tech programme shall be as

mentioned below:

i. Admissions to the above program shall be made subject to the eligibility,

qualifications and specialization prescribed by the AICTE from time to time.

ii. Admissions shall be made on the basis of merit rank obtained by the

qualifying candidate at GATE examination or an entrance test conducted by

the university subject to reservations prescribed by the University/State

government from time to time.

4. AWARD OF M.Tech DEGREE

A student will be declared eligible for the award of the M.Tech Degree if he/she fulfills

the following academic regulations:

i. Pursued a course of study for not less than two academic years and not more

than four academic years.

ii. The student has to fulfill all the academic requirements i.e. Registered for 88

credits and has to secure all the 88 credits with minimum grade points.



5. DURATION OF THE PROGRAMME

Students, who fail to fulfill all the academic requirements for the award of the

degree within four academic years from the year of their admission, shall forfeit their

seat in M.Tech course.

6. SEMESTER –WISE DISTRIBUTION OF CREDITS:

Year First SemesterCredits

Second SemesterCredits Total Credits

First Year 30(28+Mini Project @ 2 Credits)

30(28+Term Paper @ 2 Credits) 60

Second Year Dissertation Work – 20Technical seminar-8 28

TOTAL 88Table .1 Semester wise Credits Distribution

7. DISTRIBUTION AND WEIGHTAGE OF MARKS:

i) In I-Semester and II- Semesters, the course of study consists of 6 theory subjects

+ 2 laboratories or 6 theory subjects + 1 Laboratory. However, the final year will

be on dissertation work and Technical seminar only.

ii) The performance of a student in each semester shall be evaluated subject wise

with a maximum of 100 marks for theory and 100 marks for Laboratory Courses.

In addition, Mini project, Technical seminar, and dissertation work shall be

evaluated for 50, 50 and 200 marks respectively.

iii) For theory subjects the distribution shall be 40 marks (35 for Test and 5 for

attendance) for Internal Examinations and 60 marks for the End Semester

Examination.

iv) For theory subjects, during the semester there shall be two internal mid term

examinations, for duration of 90 minutes. First internal mid term examination to

be conducted in first and second units and the second internal mid term

examination to be conducted in third, fourth and fifth units of each subject.

However,75% weightage for the best and 25% for the other internal mid term

examination shall be considered for awarding internal marks.

v) The internal mid term examination question paper should be for 35 marks. Out of

five questions given, student has to answer any three questions.

vi) For Laboratory courses, there shall be a continuous evaluation during the

semester for 40 sessional marks and 60 end semester examination marks. Of the

40 marks for internal, 15 marks shall be awarded for day-to-day work and 15

marks to be awarded by conducting Internal laboratory test and 5 marks for



record work and 5 marks for attendance. The end semester examination shall be

conducted by an external examiner and the concerned internal examiner.

vii) Mini project shall be submitted in report form and should be presented before the

committee, which shall be evaluated for 50 marks. The committee consists of the

Head of the department, the Supervisor of mini project and a senior faculty

member of the department. There shall be no internal marks for mini project. The

student has to secure minimum 50% marks to be declared successful.

viii) There shall be Technical seminar in second year. For the seminar, the student

shall collect the information on a specialized topic and prepare a technical report,

showing his understanding over the topic, and submit to the department, which

shall be evaluated by the Department committee consisting of Head of the

department, Seminar supervisor and a senior faculty member. The seminar shall

be evaluated for 50 marks based on his/her presentation and the submitted

report. There shall be no external examination for seminar. The student has to

secure minimum 50% marks to be declared successful.

ix) Dissertation Work: a. A Departmental Dissertation Review Committee (DDRC) shall be constituted with

the Head of the Department as the chairman and two senior faculty as

members to supervise the proceedings of the dissertation work from the

time of allotment to submission.

b. Registration of Project work:

A student is permitted to register for the project work after satisfying the

attendance requirement of all the courses (theory and practical courses) up to

Second Semester. A candidate has to submit, in consultation with his/her

dissertation supervisor, the title, objectives and plan of action of his/her

dissertation work to the DDRC for its approval. Only after obtaining the approval

of DDRC, the student can initiate the dissertation work.

c. The duration of the dissertation is for two semesters (Second Year).

d. Four copies of the dissertation report, certified by the supervisor shall be

submitted to the Institute.

e. Out of a total 200 marks for the dissertation work, 50 marks shall be for Internal

Evaluation and 150 marks for the End Semester Examination. The End Semester

Examination (viva-voce or defence) shall be conducted by the committee

consisting of an External Examiner, Head of the Department and the dissertation

supervisor. External examiner will be selected by the Principal/Director out of

three member panel submitted by the Head of the Department, who are eminent



in that field of study. For maximum of 18 students, one dissertation evaluation

committee has to be formed.

f. If the work is not satisfactory, and if the student is failed to secure the minimum

(50% of total marks), the student shall revise and resubmit the dissertation report

before three months. If he/she fails to get a satisfactory report again, the

dissertation shall be summarily rejected.

g. The topics for mini project and dissertation work shall be different from each

other. The evaluation of dissertation work shall be conducted at the end of the

Second year.

h. The student has to clear all the subjects of M.Tech course to attend the Viva

Voce or Defence of his / her Dissertation Work.

i. The dissertation internal evaluation shall be on the basis of continuous review by

the DDRC on the progress of the dissertation work.

8. ATTENDANCE REGULATIONS & CONDONATION:

i. A student shall be eligible to appear for end semester examinations, if acquired a

minimum of 75% of attendance in aggregate of all the subjects.

ii. Condonation of shortage of attendance in aggregate up to 10% on medical

grounds (65% and above and below 75%) in each semester may be granted by

the College Academic Committee(CAC). However, the subject of granting is

purely at the discretion of the College Academic Committee or Competent

Authority.

iii. A Student will not be promoted to the next semester unless he/she satisfies the

attendance requirement of the present semester as applicable. They may seek

re-admission for that semester as and when offered next.

iv. Due weightage in each of the subjects shall be given to the attendance. Marks

not exceeding 5 shall be given to all such candidates who satisfy the following

criteria

Table .2 Marks weightage for Attendance

Percentage of attendance Marks

>= 90 5

85 to < 90 4

80 to < 85 3>75 to < 80 2

=75 1

v. Shortage of Attendance below 65% in aggregate shall in no case be condoned.



vi. Students whose shortage of attendance is not condoned in any semester are

not eligible to take their end Semester examinations of that particular

semester and their registration for examination shall stand cancelled.

vii. A stipulated fee shall be payable towards condonation of shortage of

attendance.

viii. Attendance may also be condoned for those who participate in prestigious

sports, co- and extra-curricular activities provided their attendance is in the

minimum prescribed range for the purpose and recommended by the

concerned authority.

9. MINIMUM ACADEMIC REQUIREMENTS:

The following academic requirements have to be satisfied in addition to the

attendance requirements mentioned in Item No.8.

i) A student shall be deemed to have secured the minimum academic requirement in

a subject if he/she secures a minimum of 40% of marks exclusively in the end

semester examination and a minimum aggregate of 50% of the total marks in the

end semester examination and internal evaluation taken together.

ii)A student will be promoted to second year, if he/she secures the minimum

attendance requirement.

Students who fail to earn 88 credits as indicated in the course within

four academic years from the year of their admission shall forfeit their

seat in M.Tech course and their admission shall stand cancelled.

10. COURSE PATTERN:

The entire course of study is of two academic years. Each academic year shall have

two semesters.

A Student eligible to appear for the end examination in a subject, but absent at it or has

failed in the end examination may appear for that subject only as and when it is conducted.

All admitted students are to study 4 electives during their course of two year study at the

institute. The following shall be the programme of study of electives.

Year Semester No. of electives

1 1 21 2 2



Final year (Two semesters) is completely reserved for Dissertation work and Technical

seminar.

When a student is detained due to shortage of attendance/any other reason, he may be re-

admitted when the semester is offered after fulfillment of academic regulations. Whereas,

the academic regulations hold good with the regulations he/she first admitted.

11. AWARD OF GRADE:

After a student has satisfied the requirement prescribed for the completion of the

programme and is eligible for the award of M.TECH Degree he/she shall be placed in

one of the following four grades. The award of the degree is on a grade point of scale

4. The grade points are awarded as follows:

CGPA Division of Pass>=3.0 First Class With Distinction>=2.0 and <3.0 First division>= 1.6 and <2.0 Pass division< 1.6 Fail

Based on the performance of the candidate, The following shall be the criteria for the

award of letter grades at the end of each semester in the subjects in which the candidate

appeared for the examination

Marks

Scored

Grades Grade Points

>=90 S 4.00>=85 to<90 A+ 3.67

>=80 and <85 A 3.33>=75 and <80 B+ 3.00>=70 and <75 B 2.67>=65 and <70 C+ 2.33>=60 and <65 C 2.00>=55 and <60 D 1.67>=50 and <55 E 1.33

<50 F 0Table .3. Marks,Grades and Grade Points

11.1 Calculation of Semester Grade Points Average (SGPA)

The performance of each student at the end of the each semester is indicated in terms of GPA. The *SGPA is calculated as below:



Where CR= Credits of a course GP = Grade points awarded for a course* SGPA (Semester Grade Point Average) is calculated for the candidates who passed all the courses in that semester.

11.2 Calculation of Cumulative Grade Point Average (CGPA) for Entire Programme.

The CGPA is calculated as below:

(for entire programme)Where CR= Credits of a course

GP = Grade points awarded for a course

12. MINIMUM INSTRUCTION DAYS:

The minimum instruction for each semester shall be 90 instruction days excluding

examination days.

13. GENERAL:a. Where the words ‘’he’’ ‘’him’’ ‘’his’’, occur in the regulations, they include

‘’she’’, ’’her’’, ’’hers’’.

b. The academic regulations should be read as a whole for the purpose of any

interpretation.

c. In the case of any doubt or ambiguity in the interpretation of the above rules,

the decision of the Director is final.

d. The Institute may change or amend the academic regulations or syllabi at any

time and the changes or amendments made shall be applicable to all the

students with effect from the dates notified.

14. TRANSITORY REGULATIONS

14.1 A candidate, who is detained or discontinued in the year/semester, on

readmission shall be required to do all the courses in the curriculum prescribed for

such batch of students in which the student joins subsequently. However, exemption

will be given to those candidates who have already passed in such courses, which

he/she had passed in the earlier semester(s) he/she was originally admitted into.

14.2 A student who is following the JNTU, Kakinada curriculum, detained due to

lack of academics/attendance at the end of a semester of an academic year, shall



join with the autonomous batch at the appropriate semester. Such candidates shall

be required to pass in all the courses in the programme prescribed by concerned

BOS for such batch of students, to be eligible for the award of degree. However,

exemption will be given to all those courses of the semester(s) of the batch, which

the candidate joins now, which he/she had passed earlier. The student has to clear

all his backlog subjects by appearing the supplementary examinations, conducted by

JNTU, Kakinada and Autonomous stream for the award of Degree. The marks

secured by the students in JNTUK-Kakinada pattern will be converted in to

appropriate grade points as per the autonomous grading system and the class will be

awarded based on the academic performance of a student in the entire 2 years as

per the guidelines of autonomous Pattern.

14.3 The concerned Board of Studies shall give the guidelines regarding ‘Course

Equivalence’ and ‘Course Exemptions’ from time to time.

15. COURSE CODE AND COURSE NUMBERING SCHEME:

Course Numbers are denoted by 5 digit unique alpha numeric characters. First two

digits are ‘MT’, that describes the Course name i.e. Master of Technology.

Third digit represents semester of offering as mentioned in Table No. 4.

THIRD DIGIT DESCRIPTION1 First Semester2 Second Semester

3 Third Semester

4 Fourth Semester Table 4: Third digit description

Fourth digit represents course type, as per Table No. 5

FOURTH DIGIT DESCRIPTION

0 Theory course

5 Lab course/other than theory subjectTable 5 : Course type description

Fifth digit represents course number as described in Figure 1 below.

However, different courses are given distinct codes.



For example, MT105 course, the course is offered in the first semester (1),

the course is of theory type (0) and the course number in that semester (5).

Figure 1: Course code description for courses

16. MEDIUM OF INSTRUCTION

The medium of instruction and examination is English.

17. SYLLABUS (Enclosed at the end of this document)

18. AMENDMENTS TO REGULATIONS

The Academic council from time to time may revise, amend, or change the

regulations, schemes of examinations, and/or syllabi.

19. GRADE CARD

The grade card issued shall contain the following:

a) The credits for each course offered for that semester

b) The letter grade obtained in each course

c) The SGPA/CGPA

d) Total number of credits earned by the student up to the end of

that semester

20. CONDUCT AND DISCIPLINE

a) Students shall conduct themselves within and outside the premises of the Institute

in a manner befitting the students of our Institution.

b) As per the order of Honorable Supreme Court of India, ragging in any form is

considered as a criminal offence and is banned. Any form of ragging will be

severely dealt with.


M T 1 0 5

Semester Number

M.TECH Course

Course Type

Course Number


c) The following acts of omission and/or commission shall constitute gross violation of

the code of conduct and are liable to invoke disciplinary measures with regard to

ragging.

i. Lack of courtesy and decorum; indecent behavior anywhere within or

outside the campus.

ii. Willful damage or distribution of alcoholic drinks or any kind of narcotics

to the fellow students/citizens.

d) Possession, consumption or distribution of alcoholic drinks or any kind of narcotics

or hallucinogenic drugs.

e) Mutilation or unauthorized possession of library books.

f) Noisy and unseemly behavior, disturbing studies of fellow students.

g) Hacking in computer systems such as entering into other person’s areas without

prior permission, manipulation and/or damage of computer hardware and software

or any other cyber crime etc.

h) Usage of camera cell phones in the campus.

i) Plagiarism of any nature.

j) Any other act of gross indiscipline as decided by the academic council from time to

time.

k) Commensurate with the gravity of offense, the punishment may be reprimand, fine,

expulsion from the institute / hostel, debarment from an examination, disallowing

the use of certain facilities of the Institute, rustication for a specified period or even

outright expulsion from the Institute, or even handing over the case to appropriate

law enforcement authorities or the judiciary, as required by the circumstances.

l) For an offence committed in (i) a hostel (ii) a department or in a class room and (iii)

elsewhere, the chief Warden, the Head of the Department and the principal

respectively, shall have the authority to reprimand or impose fine.

m) Cases of adoption of unfair means and/or any malpractice in an examination shall

be reported to the principal for taking appropriate action.

n) All cases of serious offence, possibly requiring punishment other than reprimand,

shall be reported to the Academic council.

o) The Institute Level Standing Disciplinary Action Committee constituted by the

academic council, shall be the authority to investigate the details of the offence,

and recommend disciplinary action based on the nature and extent of the offence

committed.

p) The Principal shall deal with any academic problem, which is not covered under

these rules and regulations, in consultation with the Programmes Committee in an

appropriate manner, and subsequently such actions shall be placed before the



academic council for ratification. Any emergency modification of regulation,

approved by the academic council earlier, shall be reported to the academic

council for ratification.

q) “Grievance and Redressal Committee” (General) constituted by the principal

shall deal with all grievances pertaining to the academic/administrative /disciplinary

matters.

r) All the students must abide by the code and conduct rules of the college.

21. MALPRACTICES

a) The Principal shall refer the cases of malpractices in internal assessment tests and

Semester-End Examinations, to a Malpractice Enquiry Committee, constituted by

him/her for the purpose. Such committee shall follow the approved scales of

punishment. The Principal shall take necessary action, against the erring students

based on the recommendations of the committee.

b) Any action on the part of candidate at an examination trying to get undue

advantage in the performance at examinations or trying to help another, or derive

the same through unfair means is punishable according to the provisions

contained hereunder. The involvement of the Staff, who are in charge of

conducting examinations, valuing examination papers and preparing/keeping

records of documents relating to the examinations in such acts (inclusive of

providing incorrect or misleading information) that infringe upon the course of

natural justice to one and all concerned at the examination shall be viewed

seriously and recommended for award of appropriate punishment after thorough

enquiry.

22. AWARD OF RANK

The rank shall be awarded based on the following:

22.1 Only such candidates who pass the Final year examination at the

end of the third academic year after admission as regular final year

students along with the others in their batch and become eligible for

the award of the Degree shall be eligible for the award of rank.

Candidates, who loose one or more years of study for any reason

whatsoever are not eligible for the award of rank.

22.2 Ranks shall be awarded in each branch of study for the top five

students appearing for the Regular external Examinations.



22.3 Award of prizes, scholarships, or any other Honors shall be based on

the rank secured by a candidate, consistent with the desire of the

Donor, wherever applicable.



M.TECH(ECE – SYSTEMS AND SIGNAL PROCESSING) - COURSE STRUCTURE

I-SEMESTER

Code No. Name of the Course

Scheme of Instruction Scheme of Examination

Total creditsPeriods per Week Maximum Marks

Lecture Tutorial Lab. Internal External

MEC101 Advanced Digital Signal Processing 4 - - 40 60 100 4

MEC102 Transform Techniques 4 - - 40 60 100 4

MEC103 VLSI Technology and Design 4 - - 40 60 100 4

MEC104 Microcontrollers For Embedded System Design 4 - - 40 60 100 4

MEC1051 MEC1052

ELECTIVE – I

DSP Processers & ArchitectureImage and Video Processing

4 - - 40 60 100 4

MEC1061 MEC1062

ELECTIVE – II

Radar Signal ProcessingBio – Medical Signal Processing

4 - - 40 60 100 4

MEC151 Seminar - - 3 50 -- 50 2

MEC152 Advanced Digital Signal Processing Lab - - 3 40 60 100 2

TOTAL 24 - 6 330 420 750 28



II-SEMESTER

Code No. Name of the CourseScheme of Instruction Scheme of

Examination Total creditsPeriods per Week Maximum MarksLecture Tutorial Lab Internal External

MEC201 Adaptive Signal Processing 4 -- -- 40 60 100 4MEC202 Speech Processing 4 -- -- 40 60 100 4MEC203 SOC Architecture 4 -- -- 40 60 100 4

MEC204 Coding Theory and Techniques 4 -- -- 40 60 100 4

MEC2051 MEC2052

ELECTIVE – III

CPLD & FPGA Architectures And ApplicationsDesign for Testability

4 -- -- 40 60 100 4

MEC2061 MEC2062

ELECTIVE – IV

Wireless Communication and NetworksVLSI Signal Processing

4 -- -- 40 60 100 4

MEC207 Seminar -- -- 3 50 -- 50 2MEC208 Advanced ECAD Lab -- -- 3 40 60 100 2

TOTAL 24 -- 6 330 420 750 28

III & IV SEMESTERS

Code No. Name of the CourseScheme of Instruction Scheme of Examination

Total creditsPeriods per Week Maximum MarksLecture Tutorial Lab. Internal External

MEC351 Technical Seminar -- -- 6 50 50 8MEC352 Dissertation -- -- 15 50 150 200 24

TOTAL -- -- 21 100 150 250 32



MEC101: ADVANCED DIGITAL SIGNAL PROCESSING

Lecture : 4 Periods/week Internal Marks : 40 External Marks : 60

Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------UNIT - I

Review of DFT, FFT, IIR Filters, FIR Filters, Multirate Signal Processing: Introduction, Decimation by a factor D, Interpolation by a factor I, Sampling rate conversion by a rational factor I/D, Multistage Implementation of Sampling Rate Conversion, Filter design & Implementation for sampling rate conversion, Applications of Multirate Signal Processing

UNIT - II

Non-Parametric methods of Power Spectral Estimation: Estimation of spectra from finite duration observation of signals, Non-parametric Methods: Bartlett, Welch & Blackman & Tukey methods, Comparison of all Non-Parametric methods

UNIT - III

Parametric Methods of Power Spectrum Estimation: Autocorrelation & Its Properties, Relation between auto correlation & model parameters, AR Models - Yule-Waker & Burg Methods, MA & ARMA models for power spectrum estimation.

UNIT - IV

Linear Prediction : Forward and Backward Linear Prediction – Forward Linear Prediction, Backward Linear Prediction, Optimum reflection coefficients for the Lattice Forward and Backward Predictors. Solution of the Normal Equations: Levinson Durbin Algorithm, Schur Algorithm. Properties of Linear Prediction Filters

UNIT - V

Finite Word Length Effects: Analysis of finite word length effects in Fixed-point DSP systems – Fixed, Floating Point Arithmetic – ADC quantization noise & signal quality – Finite word length effect in IIR digital Filters – Finite word-length effects in FFT algorithms.

TEXTBOOKS

1. Digital Signal Processing: Principles, Algorithms & Applications - J.G.Proakis & D.G.Manolokis, 4th ed., PHI.

2. Discrete Time signal processing -Alan V Oppenheim & Ronald W Schaffer, PHI. 3. DSP – A Pratical Approach – Emmanuel C.Ifeacher, Barrie. W. Jervis, 2 ed., Pearson Education.

REFERENCES:

1. Modern spectral Estimation : Theory & Application – S. M .Kay, 1988, PHI. 2. Multirate Systems and Filter Banks – P.P.Vaidyanathan – Pearson Education 3. Digital Signal Processing – S.Salivahanan, A.Vallavaraj, C.Gnanapriya, 2000,TMH



MEC102: TRANSFORM TECHNIQUES


Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------

UNIT – I

Review of Transforms: Signal spaces, concept of convergence, Hilbert spaces for energy signals, Fourier basis, FT-failure of FT-need for time-frequency analysis, spectrogram plot-phase space plot in time-frequency plane, Continuous FT, DTFT, Discrete Fourier Series and Transforms, Z-Transform, relation between CFT-DTFT, DTFT-DFS,DFS-DFT, DCT(1D&2D), Walsh, Hadamard, Haar, Slant, KLT,Hilbert Transforms – definition, properties and applications

UNIT – II

CWT & MRA: Time-frequency limitations, tiling of time-frequency plane for STFT, Heisenberg uncertainty principle, Short time Fourier Transform (STFT) analysis, short comings of STFT, Need for wavelets- Wavelet Basis- Concept of Scale and its relation with frequebcy , Continuous time wavelet Transform Equation- Series Expansion using Wavelets- CWT- Need for scaling Function- Multi resolution analysis, Tiling of time scale plane for CWT. Important Wavelets : Haar, Mexican Hat Meyer, Shannon, Daubechies.

UNIT – III

Multirate Systems , Filter Banks and DWT. Basics of Decimation and Interpolation in time & frequency domains, Two-channel Filter bank, Perfect Reconstruction Condition, Relation ship between Filter Banks and Wavelet basis, DWT Filter Banks For Daubechies Wavelet Function

UNIT – IV

Special Topics: Wavelet Packet Transform Multidimensional Wavelets, Bi-orthogonal basis- B-splines, Lifting Scheme of Wavelet Generation, Multi Wavelets

UNIT – V

Applications of Transforms Signal Denoising, Subband Coding of Speech and Music, Signal Compression - Use of DCT, DWT,KLT, 2-D DWT, Fractal Signal Analysis.

TEXT BOOKS

1. “Fundamentals of Wavelets- Theory, Algorithms and Applications”, Jaideva C Goswami, Andrew K Chan, John Wiley & Sons, Inc, Singapore, 1999.

2. Wavelet Transforms-Introduction theory and applications-Raghuveer M.Rao and Ajit S. Bopardikar, Pearson edu, Asia, New Delhi, 2003.

3. “Insight into Wavelets from Theory to practice “, Soman.K.P, Ramachandran. K.I, Printice Hall India, First Edition, 2004.



REFERENCES

1. “Wavelets and sub-band coding”, Vetterli M. Kovacevic, PJI, 1995. 2. “Introduction to Wavelets and Wavelet Transforms”, C. Sydney Burrus, PHI, First

Edition, 1997. 3. “A Wavelet Tour of Signal Processing”, Stephen G. Mallat,. Academic Press, Second

Edition,



MEC103: VLSI TECHNOLOGY AND DESIGN



UNIT - I

Review of Microelectronics and Introduction to MOS Technologies: MOS, CMOS, BiCMOS Technology, Trends And Projections. Basic Electrical Properties of MOS, CMOS & BiCMOS Circuits: Ids-Vds relationships, Threshold Voltage Vt, Gm, Gds and ωo, Pass Transistor, MOS, CMOS & Bi CMOS Inverters, Zpu/Zpd, MOS Transistor circuit model, Latch-up in CMOS circuits.

UNIT - II

LAYOUT DESIGN AND TOOLS: Transistor structures, Wires and Vias, Scalable Design rules, Layout Design tools.

LOGIC GATES & LAYOUTS: Static Complementary Gates, Switch Logic, Alternative Gate circuits, Low power gates, Resistive and Inductive interconnect delays.

UNIT - III

COMBINATIONAL LOGIC NETWORKS: Layouts, Simulation, Network delay, Interconnect design, Power optimization, Switch logic networks, Gate and Network testing.

UNIT - IV

SEQUENTIAL SYSTEMS: Memory cells and Arrays, Clocking disciplines, Design, Power optimization, Design validation and testing.

UNIT – V

FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods, off-chip connections, High-level synthesis, Architecture for low power, SOCs and Embedded CPUs, Architecture testing.

TEXT BOOKS

1. Essentials of VLSI Circuits and Systems, K. Eshraghian Eshraghian. D, A.Pucknell, 2005, PHI.

2. Modern VLSI Design - Wayne Wolf, 3rd ed., 1997, Pearson Education.

REFERENCES

1. Principals of CMOS VLSI Design – N.H.E Weste, K.Eshraghian, 2nd ed., Adisson Wesley.



MEC104: MICROCONTROLLERS FOR EMBEDDED SYSTEM DESIGN



UNIT – I

Introduction to Embedded Systems Overview of Embedded Systems, Processor Embedded into a system, Embedded Hardware Units and Devices in system, Embedded Software, Complex System Design, Design Process in Embedded System, Formalization of System Design, Classification of Embedded Systems.

UNIT – II

Microcontrollers and Processor Architecture & Interfacing 8051 Architecture, Input/Output Ports and Circuits, External Memory, Counters and Timers, PIC Controllers. Interfacing Processor (8051, PIC), Memory Interfacing, I/O Devices, Memory Controller and Memory arbitration Schemes.

UNIT - III

Embedded RISC Processors & Embedded System-on Chip Processor PSOC (Programmable System-on-Chip) architectures, Continuous Timer blocks, Switched Capacitor blocks, I/O blocks, Digital blocks, Programming of PSOC, Embedded RISC Processor architecture – ARM Processor architecture, Register Set, Modes of operation and overview of Instructions

UNIT - IV

Interrupts & Device Drivers Exceptions and Interrupt handling Schemes – Context & Periods for Context Switching, Deadline & interrupt latency. Device driver using Interrupt Service Routine, Serial port Device Driver, Device drivers for Internal Programmable timing devices

UNIT – V

Network Protocols Serial communication protocols, Ethernet Protocol, SDMA, Channel & IDMA, External Bus Interface

TEXT BOOKS

1. Embedded Systems - Architecture Programming and Design – Raj Kamal, 2nd ed., 2008,TMH.

2. PIC Microcontroller and Embedded Systems – Muhammad Ali Mazidi, Rolin D.Mckinaly, Danny Causy – PE.

3. Designers Guide to the Cypress PSOC – Robert Ashpy, 2005, Elsevier.

REFERENCES



1. Embedded Microcomputer Systems, Real Time Interfacing – Jonathan W. Valvano – Brookes / Cole, 1999, Thomas Learning.

2. ARM Systems Developers Guides-Design & Optimizing System Software - Andrew N. Sloss, Dominic Symes, Chris Wright, 2004, Elsevier.

3. Designing with PIC Microcontrollers- John B. Peatman, 1998, PH Inc.



MEC1051: DIGITAL SIGNAL PROCESSORS AND ARCHITECTURE



UNIT – I

INTRODUCTION TO DIGITAL SIGNAL PROCESING Introduction, A Digital signal-processing system, The sampling process, Discrete time sequences. Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear time-invariant systems, Digital filters, Decimation and interpolation, Analysis and Design tool for DSP Systems MATLAB, DSP using MATLAB.

COMPUTATIONAL ACCURACY IN DSP IMPLEMENTATIONS Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision, Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors, D/A Conversion Errors, Compensating filter.

UNIT - II

ARCHITECTURES FOR PROGRAMMABLE DSP DEVICES Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed Issues, Features for External interfacing.

UNIT - III

EXECUTION CONTROL AND PIPELINING Hardware looping, Interrupts, Stacks, Relative Branch support, Pipelining and Performance, Pipeline Depth, Interlocking, Branching effects, Interrupt effects, Pipeline Programming models.

PROGRAMMABLE DIGITAL SIGNAL PROCESSORS Commercial Digital signal-processing Devices, Data Addressing modes of TMS320C54XX DSPs, Data Addressing modes of TMS320C54XX Processors, Memory space of TMS320C54XX Processors, Program Control, TMS320C54XX instructions and Programming, On-Chip Peripherals, Interrupts of TMS320C54XX processors, Pipeline Operation of TMS320C54XX Processors.

UNIT - IV

IMPLEMENTATIONS OF BASIC DSP ALGORITHMS The Q-notation, FIR Filters, IIR Filters, Interpolation Filters, Decimation Filters, PID Controller, Adaptive Filters, 2-D Signal Processing.

IMPLEMENTATION OF FFT ALGORITHMS An FFT Algorithm for DFT Computation, A Butterfly Computation, Overflow and scaling, Bit-Reversed index generation, An 8-Point FFT implementation on the TMS320C54XX, Computation of the signal spectrum.



UNIT - V

INTERFACING MEMORY AND I/O PERIPHERALS TO PROGRAMMABLE DSP DEVICES Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA). A Multichannel buffered serial port (McBSP), McBSP Programming, a CODEC interface circuit, CODEC programming, A CODEC-DSP interface example.

TEXT BOOKS

1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.

2. DSP Processor Fundamentals, Architectures & Features – Lapsley et al. 2000, S. Chand & Co.

REFERENCES

1. Digital Signal Processors, Architecture, Programming and Applications – B. Venkataramani and M. Bhaskar, 2002, TMH. 2. Digital Signal Processing – Jonatham Stein, 2005, John Wiley.



MEC1052: IMAGE AND VIDEO PROCESSING



UNIT - I

Fundamentals of Image Processing and Image Transforms Basic steps of Image Processing System Sampling and Quantization of an image – Basic relationship between pixels Image Transforms: 2 D- Discrete Fourier Transform, Discrete Cosine Transform (DCT), Wavelet Transforms: Continuous Wavelet Transform, Discrete Wavelet Transforms.

UNIT - II

Image Processing Techniques – Image Enhancement Spatial domain methods: Histogram processing, Fundamentals of Spatial filtering, Smoothing spatial filters, Sharpening spatial filters. Frequency domain methods: Basics of filtering in frequency domain, image smoothing, image sharpening, Selective filtering.

Image Segmentation Segmentation concepts, Point, Line and Edge Detection, Thresholding, Region Based segmentation.

UNIT - III

Image Compression Image compression fundamentals - Coding Redundancy, Spatial and Temporal redundancy, Compression models: Lossy& Lossless, Huffman coding, Arithmetic coding, LZW coding, Run length coding, Bit plane coding, Transform coding, Predictive coding, Wavelet coding, JPEG Standards.

UNIT - IV

Basic steps of Video Processing Analog Video, Digital Video. Time-Varying Image Formation models: Three-Dimensional Motion Models, Geometric Image Formation, Photometric Image Formation, Sampling of Video signals, Filtering operations.

UNIT - V

2-D Motion Estimation Optical flow, General Methodologies, Pixel Based Motion Esimation, Block- Matching Algorithm, Mesh based Motion Estimation, Global Motion Estimation, Region based Motion Estimation, Multi resolution motion estimation, Waveform based coding, Block based transform coding, Predictive coding, Application of motion estimation in Video coding.



TEXT BOOKS

1. Digital Image Processing – Gonzaleze and Woods, 3rd ed., Pearson. 2. Video processing and communication – Yao Wang, JoemOstermann and

Ya–quin Zhang. 1st Ed., PH Int.

REFRENCES

1. Digital Video Processing – M. Tekalp, Prentice Hall International



MEC1061: RADAR SIGNAL PROCESSING



UNIT - I

Introduction– Radar Block Diagram, Radar Equation, Information Available from Radar Echo. Review of Radar Range Performance– General Radar Range Equation, Radar Detection with Noise Jamming, Beacon and Repeater Equations, Bistatic Radar.Matched Filter Receiver – Impulse Response, Frequency Response Characteristic and its Derivation, Matched Filter and Correlation Function, Correlation Detection and Cross-Correlation Receiver. Efficiency of Non-Matched Filters, Matched Filter for Non-White Noise.

UNIT - II

Detection of Radar Signals in Noise: Detection Criteria – Neyman-Pearson Observer, Likelihood-Ratio Receiver, Inverse Probability Receiver, Sequential Observer. Detectors – Envelope Detector, Logarithmic Detector, I/Q Detector. Automatic Detection -CFAR Receiver, Cell Averaging CFAR Receiver, CFAR Loss, CFAR Uses in Radar. Radar Signal Management – Schematics, Component Parts, Resources and Constraints.

UNIT - III

Waveform Selection [3, 2] : Radar Ambiguity Function and Ambiguity Diagram – Principles and Properties; Specific Cases – Ideal Case, Single Pulse of Sine Wave, Periodic Pulse Train, Single Linear FM Pulse, Noiselike Waveforms. Waveform Design Requirements.Optimum Waveforms for Detection in Clutter, Family of Radar Waveforms.

UNIT - IV

Pulse Compression in Radar Signals: Introduction, Significance, Types. Linear FM Pulse Compression – Block Diagram, Characteristics, Reduction of Time Sidelobes, Stretch Techniques, Generation and Decoding of FM Waveforms – Block Schematic and Characteristics of Passive System, Digital Compression, SAW Pulse Compression.

UNIT - V Phase Coding Techniques: Principles, Binary Phase Coding, Barker Codes, Maximal Length Sequences (MLS/LRS/PN), Block Diagram of a Phase Coded CW Radar. Poly Phase Codes : Frank Codes, Costas Codes, Non-Linear FM Pulse Compression, Doppler Tolerant PC Waveforms – Short Pulse, Linear Period Modulation (LPM/HFM). Sidelobe Reduction for Phase Coded PC Signals.

TEXT BOOKS

1. Radar Handbook - M.I. Skolnik, 2nd ed., 1991, McGraw Hill. 2. Radar Design Principles : Signal Processing and The Environment - Fred E.

Nathanson,2nd ed., 1999, PHI. 3. Introduction to Radar Systems - M.I. Skolnik, 3rded., 2001, TMH.

REFERENCES



1. Radar Principles - Peyton Z. Peebles, Jr., 2004, John Wiley. 2. Radar Signal Processing and Adaptive Systems - R. Nitzberg, 1999, Artech House. 3. Radar Design Principles - F.E. Nathanson, 1st ed., 1969, McGraw Hill.



MEC1062: BIO-MEDICAL SIGNAL PROCESSING



UNIT - I

Discrete and continuous Random variables, Probability distribution and density functions. Gaussian and Rayleigh density functions, Correlation between random variables. Stationary random process, Ergodicity, Power spectral density and autocorrelation function of random processes. Noise power spectral density analysis, Noise bandwidth, noise figure of systems.

UNIT- II

Data Compression Techniques: Lossy and Lossless data reduction Algorithms. ECG data compression using Turning point, AZTEC, CORTES, Huffman coding, vector quantisation, DCTand the K L transform.

UNIT- III

Cardiological Signal Processing: Pre-processing. QRS Detection Methods.Rhythm analysis.Arrhythmia Detection Algorithms.Automated ECG Analysis.ECG Pattern Recognition.Heart rate variability analysis. Adaptive Noise Cancelling: Principles of Adaptive Noise Cancelling. Adaptive Noise Cancelling with the LMS Adaptation Algorithm.Noise Cancelling Method to Enhance ECG Monitoring.Fetal ECG Monitoring.

UNIT- IV

Signal Averaging, polishing – mean and trend removal, Prony’s method, Prony's Method based on the Least Squares Estimate, Linear prediction. Yule – walker (Y –W) equations, Analysis of Evoked Potentials.

UNIT- V

Neurological Signal Processing: Modeling of EEG Signals. Detection of spikes and spindles Detection of Alpha, Beta and Gamma Waves. Auto Regressive(A.R.) modeling of seizure EEG. Sleep Stage analysis. Inverse Filtering.Least squares and polynomial modeling.

TEXT BOOKS

1. Probability, Random Variables & Random Signal Principles – Peyton Z. Peebles, 4th ed., 2009, TMH.

2. Biomedical Signal Processing- Principles and Techniques - D.C.Reddy, 2005,TMH.

REFERENCES



1. Digital Bio signal Processing - Weitkunat R, 1991, Elsevier. 2. Biomedical Signal Processing - Akay M , IEEE Press. 3. Biomedical Signal Processing -Vol. I Time & Frequency Analysis - Cohen.A, 1986,

CRC Press.

4. Biomedical digital Signal Processing : C-Language Experiments and Laboratory Experiments, willisJ.Tompkins, PHI.



MEC201: ADAPTIVE SIGNAL PROCESSING


Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------UNIT – I

Introduction to Adaptive Systems Adaptive Systems: Definitions, Characteristics, Applications, Example of an Adaptive System. The Adaptive Linear Combiner - Description, Weight Vectors, Desired Response Performance function -Gradient & Mean Square Error.

UNIT – II

Development of Adaptive Filter Theory & Searching the Performance surface: Introduction to Filtering - Smoothing and Prediction – Linear Optimum Filtering, Problem statement, Principle of Orthogonality - Minimum Mean Square Error, Wiener- Hopf equations, Error Performance - Minimum Mean Square Error.

Searching the performance surface – Methods & Ideas of Gradient Search methods -Gradient Searching Algorithm & its Solution - Stability & Rate of convergence - Learning Curves.

UNIT - III

Steepest Descent Algorithms Gradient Search by Newton’s Method, Method of Steepest Descent, Comparison of Learning Curves.

UNIT – IV

LMS Algorithm & Applications Overview - LMS Adaptation algorithms, Stability & Performance analysis of LMS Algorithms - LMS Gradient & Stochastic algorithms - Convergence of LMS algorithm. Applications: Noise cancellation – Cancellation of Echoes in long distance telephone circuits, Adaptive Beam forming.

UNIT – V

Kalman filtering: Introduction - Recursive Mean Square Estimation Random variables, Statement of Kalman filtering problem – Filtering -Initial conditions - Variants of Kalman filtering – Extend Kalman filtering.

TEXT BOOKS 1. Adaptive Signal Processing - Bernard Widrow, Samuel D.Strearns, 2005, PE.2. Adaptive Filter Theory - Simon Haykin-, 4 ed., 2002,PE Asia.

REFERENCES1. Optimum signal processing: An introduction - Sophocles.J.Orfamadis, 2 ed., 1988,

McGraw-Hill, Newyork.2. Adaptive signal processing-Theory and Applications, S.Thomas Alexander, 1986,

Springer –Verlag.



MEC202: SPEECH PROCESSING



UNIT - I

Fundamentals of Digital Speech Processing: Anatomy & Physiology of Speech Organs, The process of Speech Production, The Acoustic Theory of Speech Production, Digital models for speech signals.

UNIT - II

Time Domain Models for Speech Processing Introduction- Window considerations, Short time energy and average magnitude Short time average zero crossing rate ,Speech vs. silence discrimination using energy and zero crossing, Pitch period estimation using a parallel processing approach, The short time autocorrelation function, The short time average magnitude difference function, Pitch period estimation using the autocorrelation function.

UNIT – III

Linear predictive coding (LPC) analysis Basic principles of Linear Predictive Analysis:The Autocorrelation Method, The Covariance Method,Solution of Lpc Equations: Cholesky Decomposition Solution for Covariance Method, Durbin’s Recursive Solution for the AutoCorrelation Equations, Comparision between the Methods of Solution of the LPC Analysis Equations, Applications of LPC Parameters: Pitch Detection using LPC Parameters, Formant Analysis using LPC Parameters.

Homomorphic Speech Processing Introduction, Homomorphic Systems for Convolution: Properties of the Complex Cepstrum, Computational Considerations,The Complex Cepstrum of Speech, Pitch Detection, Formant Estimation, The HomomorphicVocoder.

UNIT - IV Speech enhancement: -Nature of interfering sounds, Speech enhancment techniques: Single Microphone Approach : spectral substraction, Enhancement by re-synthesis, Comb filter, Wiener filter, Multimicrophone Approach.

Automatic speech recognition-Basic pattern recognition approaches, Parametric represention of speech, Evaluating the similarity of speech patterns, Isolated digit Recognition System,.Contineous digit Recognition System

UNIT - V

Hidden Markov Model (HMM) for Speech Hidden markov model (HMM) for speech recognition, Viterbialgorithm, Training and testing using HMMS,Adapting to variability in speech(DTW), Language models.



Speaker recognition Recognition techniques,Features that distinguish speakers, Speaker Recognition Systems: Speaker Verification System , Speaker Identification System.

TEXT BOOKS

1. Digital processing of speech signals - L.R Rabiner and S.W.Schafer. Pearson Education.

2. Speech Communications : Human & Machine - Douglas O'Shaughnessy, 2nd ed., IEEE Press.

3. Digital processing of speech signals. L.R Rabinar and R W Schafer,1978, PHI.

REFERENCES

1. Discrete Time Speech Signal Processing : principles and Practice - Thomas F. Quateri 1 ed., PE.

2. Speech & Audio Signal Processing- Ben Gold & Nelson Morgan, 1 ed., Wiley.

*****



MEC203: SOC ARCHITECTURE



UNIT - I

Introduction to Processor Design: Abstraction in Hardware Design, MUO a simple processor , Processor design trade off, Design for low power consumption. ARM Processor as System-on-Chip: Acorn RISC Machine – Architecture inheritance – ARM programming model – ARM development tools – 3 and 5 stage pipeline ARM organization – ARM instruction execution and implementation – ARM Co-processor interface

UNIT - II

ARM Assembly Language Programming: ARM instruction types – data transfer, data processing and control flow instructions – ARM instruction set – Co-processor instructions. Architectural Support for High Level Language: Data types – abstraction in Software design – Expressions – Loops – Functions and Procedures – Conditional Statements – Use of Memory

UNIT - III

Memory Hierarchy: Memory size and speed – On-chip memory – Caches – Cache design-an example – memory management

UNIT - IV

Architectural Support for System Development: Advanced Microcontroller bus architecture – ARM memory interface – ARM reference peripheral specification – Hardware system prototyping tools – Armulator – Debug architecture

UNIT - V

Architectural Support for Operating System: An introduction to Operating Systems – ARM system control coprocessor – CP15 protection unit registers – ARM protection unit – CP15 MMU registers – ARM MMU Architecture – Synchronization – Context Switching input and output



TEXT BOOKS

1. ARM System on Chip Architecture – Steve Furber– 2nd ed., 2000, Addison Wesley Professional.

2. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st ed., 2004, Springer

REFERENCES

1. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded Technology) – Jason Andrews – Newnes, BK and CDROM System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter Paterson and Leena Singh L, 2001,Kluwer Academic Publishers.



MEC204 : CODING THEORY AND TECHNIQUES



UNIT - I

Coding for Reliable Digital Transmission and storage: Mathematical model of Information, A Logarithmic Measure of Information, Average and Mutual Information and Entropy, Types of Errors, Error Control Strategies. Linear Block Codes: Introduction to Linear Block Codes, Syndrome and Error Detection, Minimum Distance of a Block code, Error-Detecting and Error-correcting Capabilities of a Block code, Standard array and Syndrome Decoding, Probability of an undetected error for Linear Codes over a BSC, Hamming Codes. Applications of Block codes for Error control in data storage system

UNIT- II

Cyclic codes: Description, Generator and Parity-check Matrices, Encoding, Syndrome Computation and Error Detection, Decoding ,Cyclic Hamming Codes, Shortened cyclic codes, Error-trapping decoding for cyclic codes, Majority logic decoding for cyclic codes.

UNIT- III

Convolutional codes: Encoding of Convolutional Codes, Structural and Distance Properties, maximum likelihood decoding, Sequential decoding, Majority- logic decoding of Convolution codes. Application of Viterbi Decoding and Sequential Decoding, Applications of Convolutional codes in ARQ system.

UNIT- IV

Burst –Error-Correcting codes: Decoding of Signle-Burst error Correcting Cyclic codes, Single-Burst-Error-Correcting Cyclic codes, Burst-Error-Correcting Convoulutional Codes, Bounds on Burst Error-Correcting Capability, Interleaved Cyclic and Convolutional Codes , Phased-Burst –Error-Correcting Cyclic and Convolutional codes.

UNIT – V

BCH – Codes: BCH code- Definition, Minimum distance and BCH Bounds, Decoding Procedure for BCH Codes- Syndrome Computation and Iterative Algorithms, Error Location Polynomials and Numbers for single and double error correction

TEXT BOOKS

1. Error Control Coding- Fundamentals and Applications –Shu Lin, Daniel J.Costello,Jr, Prentice Hall, Inc.

2. Error Correcting Coding Theory-Man Young Rhee- 1989, McGraw-Hill Publishing.



REFERENCES

1. Digital Communications-Fundamental and Application - Bernard Sklar, PE. 2. Digital Communications- John G. Proakis, 5th ed., 2008, TMH. 3. Introduction to Error Control Codes-Salvatore Gravano-oxford 4. Error Correction Coding – Mathematical Methods and Algorithms – Todd K.Moon,

2006, Wiley India. 5. Information Theory, Coding and Cryptography – Ranjan Bose, 2ndEdition, 2009,

TMH.



MEC2051 : CPLD & FPGA ARCHITECTURES AND APPLICATIONS



UNIT - I

Programmable logic : ROM, PLA, PAL PLD, PGA – Features, programming and applications using complex programmable logic devices Altera series – Max 5000/7000 series and Altera FLEX logic-10000 series CPLD, AMD’s- CPLD (Mach 1to 5), Cypres FLASH 370 Device technology, Lattice PLST’s architectures – 3000 series – Speed performance and in system programmability.

UNIT - II

FPGAs: Field Programmable gate arrays- Logic blocks, routing architecture, design flow technology mapping jfor FPGAs, Case studies Xitir x XC4000 & ALTERA’s FLEX 8000/10000 FPGAs: AT &T ORCA’s (Optimized Reconfigurable Cell Array): ACTEL’s ACT-1,2,3 and their speed performance

UNIT - III

Alternative realization for state machine chat suing microprogramming linked state machine one –hot state machine, petrinetes for state machines-basic concepts, properties, extended petrinetes for parallel controllers.

UNIT - IV

Digital front end digital design tools for FPGAs& ASICs: Using mentor graphics EDA tool (“FPGA Advantage”) – Design flow using FPGAs

UNIT - V

Case studies of paraller adder cell paraller adder sequential circuits, counters, multiplexers, parellel controllers.

TEXT BOOKS

1. Field Programmable Gate Array Technology - S. Trimberger, Edr, 1994, Kluwer Academic Publications.

2. Field Programmable Gate Arrays, John V.Oldfield, Richard C Dore, Wiley Publications.



REFERENCES

1. Digital Design Using Field Programmable Gate Array, P.K.Chan & S. Mourad, 1994, Prentice Hall.

2. Digital System Design using Programmable Logic Devices – Parag.K.Lala, 2003, BSP.

3. Field programmable gate array, S. Brown, R.J.Francis, J.Rose, Z.G.Vranesic, 2007, BSP.

4. Digital Systems Design with FPGA’s and CPLDs – Ian Grout, 2009, Elsevier



MEC2052 : DESIGN FOR TESTABILITY


Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------UNIT – I

Introduction to Test and Design for Testability (DFT) Fundamentals Modeling: Modeling Digital Circuits at Logic Level, register Level, and Structural Models. Levels of Modeling. Logic Simulation: Types of Simulation, Delay Models, Element Evaluation, Hazard Detection, Gate Level Event Driven Simulation. UNIT – II

Fault Modeling: Logic Fault Models, Fault Detection and Redundancy, Fault equivalence and Fault Location. Single Stuck and Multiple Stuck- Fault Models, Fault Simulation Applications, General Techniques for Combinational Circuits.

UNIT – III

Testing for Single Stuck Faults (SSF) – Automated Test Pattern Generation(ATPG/ATG) for SSFs in Combinational and Sequential Circuits, Functional Testing with Specific Fault Models, Vector Simulation – ATPG Vectors, Formats, Compaction and Compression, Selecting ATPG Tool.

UNIT – IV

Design for Testability – testability Trade-off’s Techniques, Scan Architectures and Testing, Controllability and Absorbability, Generic Boundary Scan, Full Integrated Scan, Storage Cells foe Scan Design, Board level and System level approaches, Boundary Scans Standards, Compression Techniques – Different Techniques, Syndrome test and Signature analysis.

UNIT – V

Built-in Self test (BIST) – BIST Concepts and Test pattern Generation. Specific BIST Architectures – LOCST, STUMPS, CBIST, RTD, BILBO. Brief ideas on some advanced BIST concepts and design for self-test at board level. Memory BIST (MBIST): Memory Test Architectures and Techniques, Introduction to Memory Test, Types of Memories and Integration, Embedded Memory Testing Model, Memory Test requirements for MBIST, JTAG Testing Features. TEXT BOOKS

1. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A. Breur, ArthuD.Friedman, John Wiley & Sons.

2. Design for Test for Digital ICs & Embedded Core Systems – Alfred Crouch, 2008, PE.

3. Introduction to VLSI Testing – Robrt.J.Feugate J, Steven M.Mclntyre, Englehood Cliffs, 1988, Prentice Hall.

REFERENCES1. Essentials of Electronic Testing – M.L. Bushnell, Vishwani.D.Agarwal, Springer.



MEC2061 : WIRELESS COMMUNICATION AND NETWORKS


Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------UNIT - I Wireless Communications & System Fundamentals: Introduction to wireless communications systems, examples, comparisons & trends, Cellular concepts-frequency reuse, strategies, interference & system capacity, trucking & grade of service, improving coverage &capacity in cellular systems.

UNIT - II Multiple Access Techniques for Wireless Communication: FDMA, TDMA, SSMA (FHMA/CDMA/Hybrid techniques), SDMA technique (AS applicable to wireless communications).Packet radio access-protocols, CSMA protocols, reservation protocols, capture effect in packet radio, capacity of cellular systems.

UNIT - III Wireless Networking: Introduction, differences in wireless & fixed telephone networks, traffic routing in wireless networks – circuit switching, packet switching X.25 protocol. Wireless data services – cellular digital packet data (CDPD), advanced radio data information systems, RAM mobile data (RMD). Common channel signaling (CCS), ISDN-Broad band ISDN & ATM, Signaling System no .7 (SS7)-protocols, network services part, user part, signaling traffic, services & performance

UNIT - IV Mobile IP and Wireless Application Protocol: Mobile IP Operation of mobile IP, Co-located address, Registration, Tunneling, WAP Architecture, overview, WML scripts, WAP service, WAP session protocol, wireless transaction, Wireless datagram protocol. Wireless LAN Technology, Infrared LANs, Spread spectrum LANs, Narrow bank microwave LANs, IEEE 802 protocol Architecture, IEEE802 architecture and services, 802.11 medium access control, 802.11 physical layer. UNIT - V Mobile Data Networks: Introduction, Data oriented CDPD Network, GPRS and higher data rates, Short messaging service in GSM, Mobile application protocol. Ad-hoc Wireless Networks: Cellular and Adhoc wireless networks, applications, MAC protocols, Routing, Multicasting, Transport layer Protocols, quality of service browsing, deployment considerations, Adhoc wireless Internet

TEXT BOOKS

1.Wireless Communication and Networking – William Stallings, 2003, PHI. 2.Wireless Communications, Principles, Practice-Theodore, S.Rappaport, 2nd Ed. 2002, PHI.

3. Principles of Wireless Networks – Kaveh Pah Laven and P. Krishna Murthy, 2002, Pearson Education publishers



REFERENCES

1. Wireless Digital Communications – Kamilo Feher, 1999, PHI.

2. Telecommunication System Engineering – Roger L. Freeman, 4/ed., Wiley-Interscience, John Wiley & Sons, 2004.



MEC2062 : VLSI SIGNAL PROCESSING


Credits : 4 External Examination : 3 Hrs---------------------------------------------------------------------------------------------------------------UNIT - I

Introduction to DSP: Typical DSP algorithms, DSP algorithms benefits, Representation of DSP algorithms Pipelining and Parallel Processing: Introduction, Pipelining of FIR Digital filters, Parallel Processing, Pipelining and Parallel Processing for Low Power Retiming: Introduction – Definitions and Properties – Solving System of Inequalities – Retiming Techniques

UNIT - II

Folding and Unfolding: Folding : Introduction -Folding Transform - Register minimization Techniques – Register minimization in folded architectures – folding of multirate systems Unfolding: Introduction – An Algorithm for Unfolding – Properties of Unfolding – critical Path, Unfolding and Retiming – Applications of Unfolding

UNIT - III

Systolic Architecture Design: Introduction – Systolic Array Design Methodology – FIR Systolic Arrays – Selection of Scheduling Vector – Matrix Multiplication and 2D Systolic Array Design – Systolic Design for Space Representations contain Delays

UNIT – IV

Fast Convolution: Introduction – Cook-Toom Algorithm – Winogard algorithm – Iterated Convolution – Cyclic Convolution – Design of Fast Convolution algorithm by Inspection

UNIT – V

Low Power Design: Scaling Vs Power Consumption –Power Analysis, Power Reduction techniques – Power Estimation Approaches Programmable DSP : Evaluation of Programmable Digital Signal Processors, DSP Processors for Mobile and Wireless Communications, Processors for Multimedia Signal Processing

TEXT BOOKS

1. VLSI Digital Signal Processing- System Design and Implementation – Keshab K. Parthi, 1998, Wiley Inter Science.

2. VLSI and Modern Signal processing – Kung S. Y, H. J. While House, T. Kailath, 1985, Prentice Hall.

REFERENCES

1. Design of Analog – Digital VLSI Circuits for Telecommunications and Signal Processing – Jose E. France, YannisTsividis, 1994, Prentice Hall.

2. VLSI Digital Signal Processing – Medisetti V. K ,1995, IEEE Press (NY), USA


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