ECE 342 Electronic Circuits Lecture 7 DC Analysis of...

ECE 342 – Jose Schutt‐Aine

ECE 342Electronic Circuits

Lecture 7DC Analysis of MOSFET

Jose E. Schutt-AineElectrical & Computer Engineering

University of [email protected]

1


MOS – Active Region

• Saturation– Channel is pinched off– Increase in VDS has little effect on iD– Square-law behavior wrt (VGS-VT)– Acts like a current source

2

ECE 342 – Jose Schutt‐Aine 3

G D TV Vfor saturation region. Since VGD is zero, then the device is always in the saturation region.

Diode-Connected Transistor

When the drain and gate of a MOSFET are connected together the result is a two-terminal device known as a diode-connected transistor


2'12D n GS t

Wi i k V VL

2't

Wi k V VL

1

'

1 1

2 ' t n ov

ir W WV k V V k VL L

t ovV V V

Diode-Connected Transistor

' '1If we replace by and use2GS nV V k k

incrementalresistance


An MOS process technology has Lmin= 0.4 m, tox= 8 nm, = 450 cm2/V.s, VT = 0.7V

(a)Find Cox and kn’= nCox

(b) W/L = 8 m/0.8m. Calculate VGS, VDSmin for operation in saturation with ID= 100 A

(c)Find VGS for the device in (b) to operate as a 1 k resistor for small vDS

Example

5


113 2 2

9

3.45 10 4.32 10 / 4.32 /8 10

ox

oxox

C F m fF mt

' 2 2 2450 / . 4.32 / 194 / n n oxk C cm V s fF m A VFor operation in saturation region

2'12

D n GS TWi k V VL

21 8100 194 0.7 0.7 0.32 1.022 0.8

GS GS GSV V V V V

min 0.32 DS GS TV V V V

Example - Solution

24.32 /oxC fF m

min 0.32DSV V

6


'

1

DS

DSDS

D small vn GS T

vrWi k V VL

Triode region with vDS very small

6

11000194 10 10 0.7GSV

0.7 0.52 GSV V

1.22GSV V

Example – (con’t)

7


• The body effect– VT varies with bias between source and body– Leads to modulation of VT

Potential on substrate affects threshold voltage

1/ 2 1/ 2( ) 2 2

T SB To F SB FV V V V

ln

aF

i

NkTq n

1/ 22 a s

ox

qNC

Fermi potential of material

Body bias coefficient

Body Effect

8


With depletion layer widening, the channel length is in effect reduced from L to L-L Channel-length modulation

This leads to the following I-V relationship

2'1 12D n GS T DS

Wi k v V vL

Where is a process technology parameter

Channel-Length Modulation

9


Channel-Length Modulation

Channel-length modulation causes iD to increase with vDS in saturation region

10


VGS(V) VDS(V) ID(A)2 1 802 8 91

Problem

( ) GS T DS GS Ta V V V V V Pinchoff

( ) 1GS T DS GS Tb V V V V V V Active region

A MOSFET has VT = 1 V with measured data:

Find

11


2'1 12D n GS T DS

WI k V V VL

2'1 1 1

1 12D n GS T DS

WI k V V VL

2'2 2 2

1 12D n GS T DS

WI k V V VL

Find iD at pinchoff VDSP = VGS-VT =1V

Problem (cont’)


1

2

1 91 1.13751 80

DS

DS

VRV

2 11 DS DSV R R V

2 1( ) 1DS DSV RV R

1

2 1

1 1.1375 1 0.028 1.1375DS DS

R VV RV

Problem (cont’)


characteristics for a device with k’n (W/L) = 1.0 mA/V2.

NMOS – IV Characteristics


NMOS IV Curves


The MOSFET in the circuit shown has Vt = 1V, kn’= 100A/V2 and = 0. Find the required values of W/L and of R so that when vI = VDD= +5 V, rDS = 50 and vo= 50 mV.

5 , 0.05I GS o DSv V V v V V

0.0550 0.001 150

DSDS D

D

Vr I A mAI

5 0.05 4.951

DD o

D

V vR kI

MOSFET Circuit at DC – Problem 1


triode regionDS GS tV V V

2

'

2DS

D n GS t DSVWI k V V V

L

2

3 0.051 100 10 5 1 0.052

WL

50WL

MOSFET Circuit at DC – Problem 1 (cont’)


The NMOS transistors in the circuit shown have Vt = 1V, nCox = 120A/V2, = 0 and L1=L2=1m. Find the required values of gate width for each of Q1 and Q2 and the value of R, to obtain the voltage and current values indicated.

1 1.5GSV V

211

1120 120 1.5 1 82 1

WA W m

2'1Using2D n GS t

WI k V VL



2 3.5 1.5 2GSV V

222

1120 120 2 1 22 1

WA W m

5 3.5 12.50.120

R k

2'1Using2D n GS t

WI k V VL


ECE 342 Electronic Circuits Lecture 7 DC Analysis of...

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