ECE 301 – Digital Electronicsece.gmu.edu/~clorie/Spring11/ECE-301/Lectures/Lecture_25.pdfECE 301...
Transcript of ECE 301 – Digital Electronicsece.gmu.edu/~clorie/Spring11/ECE-301/Lectures/Lecture_25.pdfECE 301...
ECE 301 – Digital Electronics
FSM Design Examples
(Lecture #25)
The slides included herein were taken from the materials accompanying
Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,
and were used with permission from Cengage Learning.
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Sequential Circuit Design1. Understand specifications
2. Draw state graph (to describe state machine behavior)
3. Construct state table (from state graph)
4. Perform state reduction (if necessary)
5. Assign a binary value to each state (state assignment)
6. Create state transition table
7. Select type of Flip-Flop to use
8. Derive Flip-Flop input equations and FSM output equation(s)
9. Draw circuit diagram
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FSM Design
Example #1:
Design a sequence detector that outputs a 1 when either 011 or 101 is detected.
The FSM does not reset when a sequence is detected.
Requirements:
1. Mealy machine2. Binary state-assignment
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Example #1: State Graph
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Example #1: State Table
Present Next State Output
State X = 0 X = 1 X = 0 X = 1
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Example #1: State Reduction
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Example #1: State Transition Table(using Binary state assignment)
A+B+C+ Z
ABC X = 0 X = 1 X = 0 X = 1
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FSM Design
Example #2:
Design a sequence detector that outputs a 1 when either 11 or 010 is detected.
The FSM does not reset when a sequence is detected.
Requirements:
1. Mealy machine2. Binary state-assignment3. JK Flip-Flops
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Example #2: State Graph
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Example #2: State Table
Present Next State Output
State X = 0 X = 1 X = 0 X = 1
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Example #2: State Reduction
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Example #2: State Transition Table(using Binary state assignment)
A+B+ Z
AB X = 0 X = 1 X = 0 X = 1
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Example #2: JK Excitation Table
Q Q+ J K
0 0 0 x
0 1 1 x
1 0 x 1
1 1 x 0
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Example #2: State Transition Table
A+B+ JAKA JBKB
AB X = 0 X = 1 X = 0 X = 1 X = 0 X = 1
(using Binary state assignment)
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Example #2: FF Input Equations
JA = KA =
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Example #2: FF Input Equations
JB = KB =
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Example #2: FSM Output Equation
Z =
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Example #2: FSM Circuit Diagram
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FSM Design
Example #3:
Design a sequence detector that outputs a 1 when either 11 or 010 is detected.
The FSM does not reset when a sequence is detected.
Requirements:
1. Mealy machine2. Binary state-assignment3. T Flip-Flops
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Example #3: T Excitation Table
Q Q+ T
0 0 0
0 1 1
1 0 1
1 1 0
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Example #3: State Transition Table(using Binary state assignment)
A+B+ TA TB
AB X = 0 X = 1 X = 0 X = 1 X = 0 X = 1
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Example #3: FF Input Equations
TA = TB =
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Example #3: FSM Output Equation
Z =
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Example #3: FSM Circuit Diagram
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Questions?