EC7412: MICROCONTROLLER AND INTERFACING ... of 8085...3 8085 Microprocessor Features: 12. The...

EC7412: MICROCONTROLLER AND INTERFACING LABORATORY

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Presentation Slides:

www.sathieshkumar.com/tutorials

Overview 1. Architecture and pin details of 8085 2. Basic assembly language programs 3. 8255-Programmable peripheral interface 4. Stepper Motor Interfacing 5. Traffic Light Control System 6. DAC Interface using DAC0800 7. ADC Interface using ADC0804

Presented By,

Dr. V. Sathiesh Kumar Department of Electronics Engg.,

MIT-Anna University

Dr. V. SATHIESH KUMAR Department of Electronics Engg., MIT

EC7412: MICROCONTROLLER AND INTERFACING LABORATORY 8085

Dr. V. SATHIESH KUMAR Department of Electronics Engg., MIT 2

8085 Microprocessor Features:

1. It is a 8-bit microprocessor.

2. 40-pin ceramic DIP.

3. It is manufactured with N-MOS technology.

4. It has 16 bit address bus and hence can address up to 216=65536 bytes of memory

locations through A0-A15 address lines.

5. The first 8 lines of address bus and 8 lines of data bus are multiplexed AD0-AD7.

6. Data bus is a group of 8 lines D0-D7.

7. It supports external interrupt request.

8. A 16-bit program counter (PC) and 16-bit Stack pointer (SP).

9. Six 8-bit general purpose registers arranged in pairs: BC, DE, HL.

10. It requires a signal +5 V power supply and operates at 6.144 MHz single phase

clock.

11. Program, data and stack memories occupy the same memory space. The total

addressable memory size is 64 KB.

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8085 Microprocessor Features:

12. The processor always uses 16-bit addresses, so that data can be placed anywhere.

13. Stack memory is limited only by the size of memory. Stack grows downward.

14. First 64 bytes in a zero memory page should be reserved for vectors used by RST

instructions.



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8085 Microprocessor Pin Details:



5




6


RESET IN: When this signal goes low, the program counter (PC ) is set to zero,

microprocessor is reset and rests the interrupt enable and HLDA flip-flops.

RESET OUT: This signal indicates the microprocessor is reset. This signal can be

used to reset other devices. The signal is synchronized to the processor clock and lasts

an integral number of clock periods.

SID (Serial Input Data Line): The data on this line is loaded into accumulator bit 7

whenever a RIM instruction is executed.

SOD (Serial Output Data Line): The SIM instruction loads the value of bit 7 of the

accumulator into SOD latch if bit 6 (SOE) of the accumulator is 1.

HOLD: Indicates that another master is requesting the use of the address and data

busses. The CPU, upon receiving the hold request, will relinquish the use of the bus as

soon as the completion of the current bus transfer. Internal processing can continue. The

processor can regain the bus only after the HOLD is removed. When HOLD is

acknowledged, the Address, Data, RD, WR and IO/M lines are tristated.



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HLDA (Hold Acknowledge): Indicated that the CPU has received the HOLD request

and that it will relinquish the bus in the next clock cycle. HLDA goes low after the HOLD

request is removed.

READY: This signal synchronizes the fast CPU and the slow memory, peripherals. If

READY is high during a read or write cycle, it indicates that the memory or peripheral is

ready to send or receive data. If READY is low, the CPU will wait an integral number of

clock cycle for READY to go high before completing the read or write cycle.



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8085 Microprocessor Architecture:



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Accumulator or A register is an 8-bit register used for arithmetic, logic, I/O and

load/store operations.

Flag register has five 1-bit flags.

Sign flag: Set if the MSB of the result is set.

Zero flag: Set if the result is zero.

Auxiliary carry: Set if there was a carry out from bit 3 to bit 4 of the result.

Parity: Set if the parity (the number of set bits in the result) is even.

Carry flag: Set if there was a carry during addition or borrow during

subtraction/comparison/rotation.

Stack pointer (SP): It is a 16-bit register, points to the top of the stack. This register is

always decremented/incremented by 2 during push and pop instructions.

Program counter (PC): It is a 16-bit register, points to the next instruction to be

executed.



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8085 Instruction Set:

Data moving instructions

Arithmetic- Add, Subtract, Increment and Decrement functions

Logic- AND, OR, XOR and rotate

Control transfer- Conditional and unconditional program branch, Conditional and

unconditional call subroutines, Conditional and unconditional return from subroutines.

Input/Output instructions

Others- Setting/Clearing flag bits, Enabling/Disabling interrupts, Stack operations etc.



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8085 Addressing Modes:

Register- References the data in a register or in a register pair

Register indirect- Instruction specifies register pair containing address, where the

data is located.

Direct, Immediate- 8 or 16-bit data.



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Procedure to enter a program

1. Switch on the 8085 kit, Type A and enter.

2. Type in the starting address and press enter. Example: A8000

3. Enter the mnemonics.

Procedure to input data or view the output data

1. Type M input/output address and press enter key. Example: M8150

2. Update the locations with desired bytes.

Procedure to execute the program

1. Press reset key.

2. Type G starting address of code and press enter key. Example: G8000

3. Press RES Key

4. Check the output data after execution of the program.

Key Functions

RES (RESET) : This key allows the user to terminate any activity and return to an

initialized state.

Procedure to view the program

1. Type U starting address of code and press enter key. Example: U8000

2. To view next instruction, press Space Bar

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8085 Programming: Addition of two 8-bit numbers

# BEGIN 8000H //Opcodes

MVI C,00 //0E 00 //C <=00

LDA 8150 //3A 50 81 //A <=Content of 8150 (Ist No)

MOV B,A //47 //B <= A

LDA 8151 //3A 51 81 //A <=Content of 8151 (IInd No)

ADD B //80 //A <=A+B

JNC AHEAD //D2 0E 80 //Jump on No Carry to specified location

INR C //0C // If Carry flag is set, Increment C

AHEAD: STA 8152 //32 52 81 //8152 <=A (SUM)

MOV A,C //79 //A <=C

STA 8153 //32 53 81 //8153 <=A (CARRY)

HLT //76 //Program End

// EXAMPLE ->8150 = 98H, 8151 = 9AH

// ANSWER-> 8152 = 32H, 8153 = 01H

# ORG 8150

# DB 98H,9AH



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8085 Programming: Addition of two 16-bit numbers


LHLD 8050 //2A 50 80 //L <=8050, H <= 8051 (Load Ist Data)

XCHG //EB //D <=H, E <=L

LHLD 8052 //2A 52 80 //L <=8052, H<=8053 (Load IInd Data)

MVI C,00 //0E 00 //C <=00 (Initialize CARRY)

DAD D //19 //HL <= HL+DE (If SUM > 16 bits, CARRY flag is set)

JNC AHEAD //D2 0E 80 // Jump on No CARRY to specified location

INR C //0C // If CARRY flag is set, increment C

AHEAD: SHLD 8054 //22 54 80 // 8054 <= L, 8055 <=H (SUM)

MOV A,C //79 // A <=C

STA 8056 //32 56 80 // 8056 <= A (CARRY)

HLT //76 //End of Program

// EXAMPLE-> A645+9B23=014168

// STORE-> 8050=45,8051=A6,8052=23,8053=9B

// Answer-> 8054=68,8055=41,8056=01

# ORG 8050

# DB 45H,A6H,23H,9BH



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8085 Programming: Subtraction of two 8-bit numbers


MVI C,00 //0E 00 // C <=00 (Initialize CARRY)

LDA 8150 //3A 50 81 // A <=8150

MOV B,A //47 // B <=A

LDA 8151 //3A 51 81 // A <=8151

SUB B //90 // A <= A-B

JNC AHEAD //D2 10 80 // If no CARRY or BORROW, jump to specified location

CMA //2F // Complement Accumulator content (1’s Complement)

INR A //3C // A <= A+1 (2’s Complement)

INR C //0C // C <= C+1 (Increment CARRY)

AHEAD: STA 8152 //32 52 81 // 8152 <= A (DIFFERENCE)

MOV A,C //79 // A <= C

STA 8153 //32 53 81 // 8153 <= A (CARRY or BORROW)

HLT //76 // End of Program

//95H-35H=60H(DIFFERENCE) BORROW=00H

# ORG 8150

# DB 65H,95H



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8085 Programming: Subtraction of two 16-bit numbers


MVI C,00 //0E 00 // C <=00 (Initialize CARRY)

LHLD 8150 //2A 50 81 // L <=8150, H <= 8151 (Load Ist Data)

XCHG //EB // D <=H, E <=L

LHLD 8152 //2A 52 81 // L <=8152, H <= 8153 (Load IInd Data)

MOV A,E //7B // A <= E

SUB L //95 // A <= A-L

STA 8154 //32 54 81 // 8154 <= A (DIFFERENCE LSB)

MOV A,D //7A // A <= D

SBB H //9C // A <= A- (H + BORROW flag)

STA 8155 //32 55 81 // 8155 <= A (DIFFERENCE MSB)

JNC AHEAD //D2 19 80 // If no CARRY or BORROW is set, jump to specified location

INR C //0C // If CARRY is set, C <= C+1

CMA //2F // Complement Accumulator content (1’s Complement)

INR A //3C // A <= A+1 (2’s Complement)

AHEAD: MOV A,C //79 // A <= C (CARRY)

STA 8156 //32 56 81 // 8156 <=A (CARRY)


// EXAMPLE ->8988-C4C5=C4C3 BORROW=1

# ORG 8150

# DB 88H,89H,C5H,C4H



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8085 Programming: Multiplication of two 8-bit numbers

# BEGIN 8000H

MVI D,00 //16 00 // D <= 00

LDA 8150 //3A 50 81 // A <= 8150 (Load Multiplicand)

MOV B,A //47 // B <= A

LDA 8151 //3A 51 81 // A <= 8151 (Load Multiplier)

MOV C,A //4F // C <= A

MVI A,00 //3E 00 // A <=00 (Initialize A to 00)

LOOP2: ADD B //80 // A <= A+B

JNC LOOP1 //D2 11 80 // Jump on no CARRY to specified location

INR D //14 // D <= D+1

LOOP1: DCR C //0D // C <= C-1

JNZ LOOP2 //C2 0C 80 // Jump on no Zero to specified location

STA 8152 //32 52 81 // 8152 <= A (LSB byte of PRODUCT)

MOV A,D //7A // A <= D

STA 8153 //32 53 81 // 8153 <= A (MSB byte of PRODUCT)


# ORG 8150H

# DB FFH,FFH



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8085 Programming: Division of two 8-bit numbers

# BEGIN 8000H

LDA 8150 //3A 50 81 // A <= 8150 (Load Divisor)

MOV B,A //47 // B <= A

LDA 8151 //3A 51 81 // A <= 8151 (Load Dividend)

MVI C,00 //0E 00 // C <= 00 (Initialize C to 00)

LOOP2: CMP B //B8 // if A>B => C=0, Z=0 & S=0; A<B => C=1 & S=1; A=B => Z=0 & S=0

JC LOOP1 //DA12 80 // Jump on CARRY to specified location

SUB B //90 // A <= A-B

INR C //0C // C <= C+1

JMP LOOP2 //C3 09 80 // Jump to specified location

LOOP1: STA 8152 //32 52 81 // 8152 <= A (REMAINDER)

MOV A,C //79 // A <= C

STA 8153 //32 53 81 // 8153 <= A (QUOTIENT)


# ORG 8150H

//08(DIVIDEND-8151)/03(DIVISOR-8150)= QUOTIENT=02(8153) REMAINDER=02(8152)

# DB 03H,08H



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8085 Programming: Bubble Sort-Ascending Order

# BEGIN 8000H

MVI D,05 // D <= 05 (Counter or No of Iterations)

W: LXI H,C020 // HL <= C020

MVI C,05 // C <= 05 (Counter)

X: MOV A,M // A <= M (Content of HL register pair is moved to A)

INX H // HL <= HL+1

MOV B,M // B <= M (Content of HL register pair is moved to B)

CMP B // if A>B => C=0, Z=0 & S=0; A<B => C=1 & S=1; A=B => Z=0 & S=0

JC Y // Jump on CARRY to specified location

MOV M,A // M <= A

DCX H // HL <= HL-1

MOV M,B // M <= B SWAPPING

INX H // HL <= HL+1

Y: DCR C // C <= C-1

JNZ X // Jump on no zero to specified location

DCR D // D <= D-1

JNZ W // Jump on no zero to specified location

HLT // End of Program

// EXAMPLE C020 -> 88H,AAH,03H,F0H,54H,66H

// ANSWER C020 -> 03H,54H,66H,88H,AAH,F0H

# ORG C020

# DB 88H,AAH,03H,F0H,54H,66H



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8085 Programming: Bubble Sort-Descending Order

# BEGIN 8000H

MVI D,05 // D <= 05 (Counter or No of Iterations)

W: LXI H,C020 // HL <= C020

MVI C,05 // C <= 05 (Counter)

X: MOV A,M // A <= M (Content of HL register pair is moved to A)

INX H // HL <= HL+1

MOV B,M // B <= M (Content of HL register pair is moved to B)

CMP B // if A>B => C=0, Z=0 & S=0; A<B => C=1 & S=1; A=B => Z=0 & S=0

JNC Y // Jump on no CARRY to specified location

MOV M,A // M <= A

DCX H // HL <= HL-1

MOV M,B // M <= B SWAPPING

INX H // HL <= HL+1

Y: DCR C // C <= C-1

JNZ X // Jump on no zero to specified location

DCR D // D <= D-1

JNZ W // Jump on no zero to specified location


// EXAMPLE C020 -> 88H,AAH,03H,F0H,54H,66H

// ANSWER C020 -> F0H,AAH,88H,66H,54H,03H

# ORG C020

# DB 88H,AAH,03H,F0H,54H,66H



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8085 Programming: Smallest number in an array

# BEGIN 8000H

MVI C,05 // C <= 05 (Counter or No of Elements in an array)

LXI H,C020 // HL <= C020

MOV A,M // A <= M (Content pointed by HL register pair is moved to A)

INX H // HL <= HL+1

DCR C // C <= C-1

REPEAT: CMP M // if A>M => C=0, Z=0 & S=0; A<M => C=1 & S=1; A=M => Z=0 & S=0

JC SKIP // Jump on CARRY to specified location

MOV A,M // A <= M

SKIP: INX H // HL <= HL+1

DCR C // C <= C-1

JNZ REPEAT // Jump on No ZERO to the specified location

STA C050 // C050 <= A (Smallest no in an array)


// EXAMPLE C020 -> 88H,AAH,03H,F0H,AAH

// ANSWER C050 -> 03H

# ORG C020

# DB 88H,AAH,03H,F0H,AAH



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8085 Programming: Largest number in an array

# BEGIN 8000H

MVI C,05 // C <= 05 (Counter or No of elements in an array)

LXI H,C020 // HL <= C020

MVI A,00 // A <= 00 (Initialize A to 00)

REPEAT: CMP M // if A>M => C=0, Z=0 & S=0; A<M => C=1 & S=1; A=M => Z=0 & S=0

JNC SKIP // Jump on No CARRY to specified location

MOV A,M // A <= M

SKIP: INX H // HL <= HL+1

DCR C // C <= C-1

JNZ REPEAT // Jump on No ZERO to specified location

STA C050 // C050 <= A (Largest no in an array)


// EXAMPLE C020 -> 88H,AAH,03H,F0H,AAH

// ANSWER C050 -> F0H

# ORG C020

# DB 88H,AAH,03H,F0H,AAH



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8085 Programming: Sum of N numbers in an array

# BEGIN 8000H

LDA 8150 // A <= 8150 (Load the count or no of elements in an array )

MOV D,A // D <= A

LXI H,8151 // HL <= 8151 (First element in an array)


MVI C,00 // C <= 00 (Initialize C to 00)

REPEAT: MOV B,M // B <= M

INX H // HL <= HL+1

ADD B // A <= A+B

JNC SKIP // Jump on No CARRY to specified location

INR C // C <= C+1

SKIP: DCR D // D <= D-1

JNZ REPEAT // Jump on No Zero to specified location

STA 8161 // 8161 <= A (SUM)

MOV A,C // A <= C

STA 8162 // 8162 <= A (CARRY)


# ORG 8150

# DB 05H,01H,FFH,A0H,89H,54H



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8085 Programming: Fibonacci Series Generation

# BEGIN 8000H

MVI C,09 // C <= 09 (Total number of elements)

LXI H,C050 // HL <= C050 (Load first data-01H)

X: MOV A,M // A <= M

INX H // HL <= HL+1

MOV B,M // B <= M

INX H // HL <= HL+1

ADD B // A <= A+B

DAA // Content of A is changed from binary to 4-bit BCD digits. if lower or higher order 4-bits is greater

than 9, then the instruction adds 06 to lower or higher order 4-bits

MOV M,A // M <= A

DCX H // HL <= HL-1

DCR C // C <= C-1

JNZ X // Jump on No ZERO to specified location

RST 1 // It transfers the program execution to 0008H address (RST 1)

// To run the Program simply load at memory location C050=01,C051=01

# ORG C050

# DB 01H,01H



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8085 Programming: Factorial of N number

# BEGIN 8000H

LXI H,8100 // HL <= 8100

MOV C,M // C <= M

MOV E,M // E <= M

DCR E // E <= E-1

LOOP1: INX H // HL <= HL+1

DCR C // C <= C-1

MOV M,C // M <= C

JNZ LOOP1 // Jump on No ZERO to specified location

LXI H,8100 // HL <= 8100

LOOP2: MOV A,M // A <= M

INX H // HL <= HL+1

MOV B,M // B <= M

MOV C,A // C <= A


GO: ADD B // A <= A+B

DCR C // C <= C-1

JNZ GO // Jump on No ZERO to specified location

MOV M,A // M <= A

DCR E // E <= E-1


STA 8500 // 8500 <=A (RESULT)


# ORG 8100H

# DB 05H

//RESULT(8500)=78H (DECIMAL 5!=120)



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8085 Programming: Check the number is palindrome or not

# BEGIN 8000H


STA 8151 // 8151 <= A (RESULT is initialized to 00)

LDA 8150 // A <= 8150 (Load the number)

MOV B,A // B <= A

ANI 0F // A <= A && 0F (&&- Logical AND) (Masking the lower 4-bits)

MOV C,A // C <= A

MOV A,B // A <= B

ANI F0 // A <= A && F0 (&&- Logical AND) (Masking the higher 4-bits)

RLC // Accumulator content is rotated left by one bit position. D0 <= D7 and CARRY= D7

RLC

RLC

RLC

CMP C // if A>C => CARRY=0, Z=0 & S=0; A<C => CARRY=1 & S=1; A=C => Z=0 & S=0


MVI A,FF // A <= FF

STA 8151 // 8151 <= A (RESULT)

LOOP1: HLT // End of Program

# ORG 8150H

# DB 98H

//RESULT(8151)=00H (NOT A PALINDROME NUMBER EX-98H)

//RESULT(8151)=FFH (PALINDROME NUMBER EX-BBH)



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8085 Programming: Squareroot of a given number

# BEGIN 8000H

MVI C,01 // C <= 01

MVI E,01 // E <= 01

LDA 8500 // A <= 8500 (Load the number)

LOOP1: SUB C // A <= A-C

JZ LOOP2 // Jump on Zero to the specified location

INR C // C <= C+1

INR C // C <= C+1

INR E // E <= E+1

JMP LOOP1 // Jump to specified location

LOOP2: MOV A,E // A <= E

STA 8502 // 8502 <= A (RESULT)


# ORG 8500H

# DB 40H (Decimal Equivalent is 64)

//RESULT(8502)=08H



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8255 Programmable peripheral interface (PPI):

1. Is used to give the CPU access to programmable parallel I/O

2. 24 Input/Output pins (PORTA, PORTB, PORTC) in all

3. D0-D7 data bus lines are available to read/write data into the ports or control register

using RD and WR.

4. Address lines A1 and A0 allow to successively access any one of the ports or the

control register.

5. CS is used to enable 8255 chip

6. On Reset, all the ports are initialized as input line

A1 A0 PORT SELECTED

0 0 PORTA

0 1 PORTB

1 0 PORTC

1 1 Control Register



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Modes of 8255 Programmable peripheral interface (PPI):



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Bit set/reset mode (BSR Mode):

1. Applicable only to PORTC



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Input/Output mode (I/O Mode):



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8255 Pin Details:



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Stepper Motor Interfacing:



• Applications: Disk drives, Dot matrix printers and in robotics

• Step angle: Minimum degree of rotation associated with a single step

• 8085 Address for 8255 Interface

Control word register 0x23

PORTA 0x20

PORTB 0x21

PORTC 0x22

A

B

A

B

Control Word (Clockwise)

0 1 1 1 0x07

1 0 1 1 0x0B

1 1 0 1 0x0D

1 1 1 0 0x0E

+12 V

A

A

B

B

Socket Connections

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A

B

A

B

Control Word (Clockwise)

0 0 1 1 0x03

1 0 0 1 0x09

1 1 0 0 0x0C

0 1 1 0 0x06

A and B are generated using NOT gate

PA2 is for supply to the coil or motor

PA2

PA1

B

PA0

A

Control Word

(Clockwise)

1 0 0 0x04

1 0 1 0x05

1 1 1 0x07

1 1 0 0x06

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MVI A,80H // I/O Mode

OUT 23H // Control word register=0x23H

LOOP: MVI A,04H // Clockwise sequence starts

OUT 20H // PORTA=0x20H

CALL DELAY// Jump to delay subroutine

MVI A,05H

OUT 20H

CALL DELAY

MVI A,07H

OUT 20H

CALL DELAY

MVI A,06H

OUT 20H

CALL DELAY

JMP LOOP

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DELAY SUBROUTINE:

MVI B,10H

LOOP2: MVI A,FFH

LOOP1: NOP

NOP

NOP

NOP

DCR A

JNZ LOOP1

DCR B

JNZ LOOP2

RET

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MVI A,80H // I/O Mode

OUT 23H // Control word register=0x23H

LOOP: MVI A,06H // Anti-Clockwise sequence starts

OUT 20H // PORTA=0x20H

CALL DELAY// Jump to delay subroutine

MVI A,07H

OUT 20H

CALL DELAY

MVI A,05H

OUT 20H

CALL DELAY

MVI A,04H

OUT 20H

CALL DELAY

JMP LOOP

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DELAY SUBROUTINE:

MVI B,10H

LOOP2: MVI A,FFH

LOOP1: NOP

NOP

NOP

NOP

DCR A

JNZ LOOP1

DCR B

JNZ LOOP2

RET

40

Traffic Light Control System:



EG1 EG2 EG3

EY

ER

WR

WY

WG1 WG2 WG3

SR

SY

SG

1

SG

2

SG

3

NG

1

NG

2

NG

3

NY

NR

EAST

WEST

NORTH SOUTH

R1B

P2B

R1B

P2B

R2C P1C

P1C R2C

P2A

R1A

P2A

R1A

R2D P1D

R2D P1D

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P1D P2A P1C P2B R2C R1A R2D R1B

PEDESTRIAN CONTROL LED-PORTB (Address:0x21H)

B0 B7

0- LED OFF

1- LED ON

X- Don’t Care (0 or 1)

NR &SR

ER & WR

EY & WY

NY & SY

NG3 &SG1

NG2 & SG2

EG2 & WG2

EG3 & WG1

A0 A7

TRAFFIC CONTROL LED-PORTA (Address:0x20H)

TRAFFIC CONTROL LED-PORTC(Address:0x22H)

X X X X X X SG3 & NG1

EG1 & WG3

C0 C7

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R R

P

P

R R

R R

R R

R R

R R

P

P

R

R

R

R

R

R

R

R

R R

R R

R

R

R

R

R R

R R

R

R

R

R

P P

P P

R

R

R

R

1 2 3

4 5 6

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MVI A,80H //I/O Mode

OUT 23H // Control word register=0x23

LOOP: MVI A,0FH // For pedestrian

OUT 21H

MVI A,4DH // For green leds in N-S direction

OUT 20H

CALL DELAY // Sequence delay

CALL AMBER // Amber delay

MVI A,8BH // For stopping N-S direction & starting in E-W direction

OUT 20H

CALL DELAY

CALL AMBER

MVI A,49H // For free left in all sides & stopping E-W direction

OUT 20H

MVI A,01H // For right turn in N-S direction

OUT 22H

CALL DELAY

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MVI A,00H // For Amber signal

OUT 22H

CALL AMBER

MVI A,89H // For stopping vechicles in N-S direction

OUT 20H

MVI A,02H // For right turn in E-W direction

OUT 22H

CALL DELAY

MVI A,00H

OUT 22H

MVI A,30H

OUT 20H

MVI C,04H

CALL DELAYSUB // For Amber delay

MVI A,C0H // For stopping vechicles in all direction

OUT 20H

MVI A, F0H // Green signal for pedestrian

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OUT 21H

MVI C,10H

CALL DELAYSUB

MVI A,30H

OUT 20H

MVI C,08H

CALL DELAYSUB

JMP LOOP

46




AMBER SUBROUTINE:

MVI A,39H // For amber signal in all directions

OUT 20H

MVI C,08H

CALL DELAYSUB

RET

DELAY SUBROUTINE:

MVI C,40H

CALL DELAYSUB

RET

47




DELAYSUB SUBROUTINE:

L3: MVI D,FFH

L2: MVI A,FFH

L1: NOP

DCR A

JNZ L1

DCR D

JNZ L2

MOV A,C

JZ OUT

DCR C

JNZ L3

OUT: RET

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DAC Interface:



DAC 0808 is a 8-bit DAC

Binary weighted DAC and R/2R ladder type

DAC0808 (8-bit) provides 256 discrete voltage or current levels of output

7 6 5 3 04 2 1( )2 4 8 16 32 64 128 256

out ref

D D D D DD D DI I

2refI mA

49

DAC Interface:



50

DAC Interface:



SQUARE WAVEFORM GENERATION

MVI A,80H //I/O mode

OUT 23H

START: MVI A,00H // Low logic level

OUT 20H

CALL DELAY

MVI A,FFH // High logic level

OUT 20H

CALL DELAY

JMP START

DELAY: MVI B,05H //Delay Subroutine

LOOP1: MVI C,FFH

LOOP2: DCR C

JNZ LOOP2

DCR B

JNZ LOOP1

RET

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DAC Interface:



SAWTOOTH WAVEFORM GENERATION

MVI A,80H //I/O mode

OUT 23H

START: MVI A,00H // Low logic level

LOOP1: OUT 20H

INR A

JNZ LOOP1

JMP START

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ADC Interface:



1 1606

1.1 1.1 10 150

11.65

f kHzRC k pF

t sf

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ADC Interface:



Vref/2 (V) Vin (V) Step Size (mV)

Not connected 0 to 5 5/256=19.53

2.0 0 to 4 4/256=15.62

1.5 0 to 3 3/256=11.71

1.28 0 to 2.56 2.56/256=10

When Vref/2 is not connected (open), Vref/2 is measured at 2.5 V for Vcc=5V

Step Size (Resolution) is the smallest change that can be discerned by an ADC

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ADC Interface:



MVI A,90H // CWR for PORT A as INPUT, PORT B & C as OUTPUT

OUT 23H

MVI A,FFH //Start of Conversion

OUT 22H // PORTC is enabled for WR

MVI A,00H // WR-Low to high transition

OUT 22H

MVI A,FFH

OUT 22H

CALL DELAY

IN 20H //End of conversion, PORTA as INPUT

RST 1

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ADC Interface:



DELAY SUBROUTINE:

MVI B,06H

L1: MVI A,FFH

L2: NOP

NOP

DCR A

JNZ L2

DCR B

JNZ L1

RET

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Summary:



Architecture and pin details of 8085 microprocessor

Basic assembly language programming using 8085 microprocessor

Architecture and pin details of 8255

Stepper motor interfacing

Traffic light control system

DAC interface using DAC0808

ADC interface using ADC0804

EC7412: MICROCONTROLLER AND INTERFACING ... of 8085...3 8085 Microprocessor Features: 12. The...

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