EC2308

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YEAR/SEM :III / V SUBJECT : EC 1304 - MICROPROCESSORS AND MICROCONTROLLER LAB 1 M.A.M SCHOOL OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING LAB MANUAL Year/Sem: III/V

Transcript of EC2308

Page 1: EC2308

YEAR/SEM :III / V SUBJECT : EC 1304 - MICROPROCESSORS AND MICROCONTROLLER LAB

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M.A.M SCHOOL OF ENGINEERING

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

LAB MANUAL

Year/Sem: III/V

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Exno:1A 8-BIT ARITHMETIC OPERATIONS

AIM:

To perform the following arithmetic operations using 8085

microprocessor

1.8-Bit Addition

2.8-Bit Subtraction

3.8-Bit Multiplication

4.8-Bit Division

APPARATIUS REQUIRED:

8085 MICROPROCESSOR KIT , POWER SUPPLY(0-5V)

PROGRAM:

1.8-BIT ADDITION:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100,4101 3E,09 MVI A,09 Move

immediate

data 09 to

acc

4102,4103 06,05 MVI B,05 Move

immediate data 05 to

regB

4104 80 ADD B Value in B is

added

With A

4105,4106,4107,4108 32,00,42 STA 4200

Store acc to

memory

76 HLT Stop the

program

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1.8-BIT SUBRACTION:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100,4101 3E,09 MVI A,09 Move immediate data 09 to acc

4102,4103 06,05 MVI B,05 Move immediate data 05 to regB

4104 90 SUB B Value in B is subracted With A

4105,4106,4107,4108 32,00,42,76 STA 4200 HLT

Store acc to memory Stop the program

Flow chart:

1.8-BIT MULTIPLICATION:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 3E,00 MVI A,00 Move

immediate data 09 to acc

4102 06,05 MVI B,05 Move

immediate data

05 to regB

4104 0E,03 MVI C,03 Move

immediate data

03 to regC

4106 80 L1 ADD B It adds the data

4107 0D DCR C Decrement the

value of regC

4108 C2,06,80 L1 JNZ L1 Jump

instruction

checks the flag

410B 32,00,44 STA 4400 Store acc to

memory

410E 76 HLT Stop the

program

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Flow chart:

1.8-BIT DIVISION:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 3E,09 MVI A,09 Move

immediate data

09 t0 acc

4102 06,03 MVI B,03 Move

immediate data 03 t0 regB

4104 0E,00 MVI C,00 Move

immediate data

00 t0 regC

4106 0C L1 INR C Increment the

value of C

4107 90 SUB B Sub content of

C with D

4108 C2,06,80 JNZ L1 Jumped to

specified

memory

location

410B 32,00,46 STA 4600 Store the

content of acc

to mmy

410E 23 INX H Increment to

reg pair content

410F 79 MOV A,C Move the data

C to A

4110 32,01,46 STA 4601 Store the

content of acc

to mmy

4113 76 HLT Stop the

program

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OUTPUT:

1.8-BIT ADDITION:

ADDRESS DATA

4200 0E

2.8-BIT SUBRACTION:

ADDRESS DATA

4200 0F

3.8-BIT MULTIPLICATION:

ADDRESS DATA

4200 04

4.8-BIT DIVISION:

ADDRESS DATA

4600 00

4601 03

RESULT:

Thus the 8-Bit Arithmetic operation was performed by using 8085

microprocessor kit & the 0utput was obtained.

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Exno:1B 16-BIT ADDITION/SUBRACTION

AIM:

To ADD/SUB 16-bit Numbers stored at consecutive locations.

PROGRAM:

ADDRES

S

OPCOD

E

LABE

L

MNEMONIC

S

OPERAN

D

COMMENT

S

4100 0E,00 MVI C,00 Move

immediate

data to regC

4102 2A,00,45 LHLD 4500 Load HL

direct to

4500

4105 EB XCHG Xchange

H&L with

D&E

4106 2A,02,45 LHLD 45,02 Load HL

direct to

4502

4109 19/9A DAD/SUB D ADD/SUB

DE to HL

410A D2,0E,4

1

JNC 410E Jump on no

carry 410E

410D 0C INR C Increment

regC

410E 22,04,45 SHLD 4504 Store HL

direct

4111 79 MOV A,C Move mmy

A to regC

4112 32,06,45 STA 4506 Store acc

4115 76 HLT stop

Flow chart:

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OBSERVATIONS:

1.ADDITION:

INPUT OUTPUT

ADDRESS DATA ADDRESS DATA

4500 00 4504 00

4501 01 4505 06

4502 00 4506 00

4503 05

2.SUBRACTION:

INPUT OUTPUT

ADDRESS DATA ADDRESS DATA

4500 00 4504 00

4501 02 4505 01

4502 00 4506 00

4503 01

RESULT:

Thus the ALP program for 16-Bit Addition/Subraction was

written and executed

Exno:2 PROGRAM FOR SORTING & SEARCHING USING 8086

AIM:

To write the ALP program for sorting & searching using 8086

PROGRAM:

1.SORTING:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

1000 BE,00,15 MVI SI,15,00 Initialize SI

regs

1002 8B,1C MOV BX,[SI] BX reg has no

of byte

1005 4B DEC BX Decrement

the no of

bytes

1006 8B,0C MOV CX,[SI] CX reg has no

of byte

1008 49 DEC CX Decrement

the no of

bytes

1009 BE,02,15 MOV SI,1502 Initialize SI

regs

100C 8A,04 MOV AL,[SI] Move the Ist

data byte into

A

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100E 46 INC SI Increment the

next byte of

string

100F 3A,04 CMP AL,[SI] Compare the 2

byte of string

1111 73/72,06 JB/JNB 1119 Jump on

borrow/jump

on no borrow

1113 86,04 XCHG [SI],AL Exchange the

data from ‘al’

to SI

1115 4E DEC SI Decrements

the SI reg

1116 88,04 MOV [SI],AL Move AL reg

to SI

1118 46 INC SI Inc the next

byte

1119 E2,F1 LOOP 111C Loop if CX is

not zero

111B 4B DEC BX Decrements

the BX reg

111C BE,00,15 MOV SI,1500 Move data to

SI

111F 75,E5 JNE 1106 Jump if not

equal

1120 F4 HLT End the

program

2.SEARCHING:

PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

1400 B9,05 MOV CX,05 Initialize

counter for no

of iteration

1403 BE,00,05 MOV SI,0500 Initialize

source pointer

1406 8A,04 MOV AL,[SI] Take first no

in acc

1408 46 Back INC SI Increment

source pointer

1409 3A,04 CMP AL,[SI] Compare next

no with prev

140B 72/73,02 INC/IC 040F If the next no

is large

140D 8A,04 MOV AL,[SI] Replace prev

one with the

next

140F E2,E7 Next LOOP 1408 Repeat

procedure

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1411 88,06,00,15 MOV[1500],AL Move the AL

content into

1500 address

1415 F4 HLT Stop the

program

OBSERVATIONS:

1.SORTING:

INPUT DATA OUTPUT DATA

MEMORY

ADDRESS

DATA MEMORY

ADDRESS

ASC ORDER

DATA(JB)

DESC ORDER

DATA(JNB)

1500 05 1502 00 28

1501 00 1503 05 25

1502 20 1504 07 20

1503 25 1505 20 07

1504 28 1506 25 05

1505 07 1507 28 00

2.SEARCHING:

1.INPUT:

MEMORY ADDRESS DATA

1500 02

1501 03

1502 08

1503 09

1504 10

1505 07

2.OUTPUT:

MEMORY ADDRESS SMALLEST DATA LARGEST DATA

1500 02 10

RESULT: Thus the ALP for sorting& searching using 8086 has been written

and executed.

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EX.NO INTERFACING ADC WITH 8085 AIM:

To write a program to indicate ADC and to store the digital data in

the memory

PROGRAM:

ADDRES

S

OPCOD

E

LABE

L

MNEMONIC

S

OPERAN

D

COMMENT

S

4100 3E,10 STAR

T

MVI A,10 Select a

channel&ma

ke

4102 DE,C8 OUT OC,08 ALE low

4104 3E,18 MVI A,18 Make ALE

high

4106 D3,C8 OUT 0C,08

4108 3E,01 MVI A,01 Soc signal

high

410A D3,00 OUT 0D,0H

410C AF,AF,A

F

XRA A Delay

410F 3E,00 MVI A,00 SOC signal

low

4111 D3,D0 OUT 0D,0H

4113 3E,18 LOOP MVI A,18 Check SOC

4115 30,FB STA

4117 76 HLT

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OBSERVATIONS:

Compare the data displayed at the LED’S with that stored

at location 4150

RESULT: Thus the program was initiated the ADC and the

digital data was stored in the memory.

EX.NO. INTERFACING DAC WITH 8085

AIM:

To interface DAC WITH 8085 to demonstrate the generation of

square ,sawtooth and triangular wave.

PROGRAM:

1.SQUARE WAVE GENERATOR:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 3E,00 START MVI A,00 Move

immediate A

4102 D3,C8 OUT C8 0utput

4104 CD,11,41 CALL DELAY Call

unconditional

4107 3E,FF MVI A,FF Move

immediate A

4109 D3,C8 OUT C8 0utput

410B CD,11,41 CALL DELAY Call

unconditional

410E C3,0D JMP START Jump

unconditional

4111 06,05 MVI B,05 Move

immediate to

regB

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4113 0E,FF MVI C,FF Move

immediate toC

4115 0D DCR C Decrement C

4116 C2,15,41,05 L2 JNZ L2 Jump on no

zero

411A C2,13 DCR B Decrement B

411C 41,C9 JNZ L1 Jump on no

zero

RESTART

2.SAWTOOTH GENERATOR:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 3E,00 Start MVI A,00 Move

immediate 00

to A

4102 D3,00 OUT 00 Output

4104 3C INR A Increment A

4105 C2,02,41 L1 JNZ L1 Jump on no

zero

4108 C3,00,41 Start JMP Jump

unconditional

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OBSERVATIONS:

1.SQUARE WAVE:

Amplitude:

Time period:

2.SAWTOOTH WAVE:

Amplitude:

Time period:

3.TRIANGULAR WAVE:

Amplitude:

Time period:

RESULT:

Thus the square,sawtooth&triangular wave were generated by interfacing

DAC with 8085 trainer kit.

EX.NO. STEPPER MOTOR INTERFACE BOARD WITH 8051

AIM: To run a stepper motor at different speed

PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 90,45,00 START MOV

DPTR,#4500

Load the data

ptr with 16-bit

4103 78,04 MOV R0,#04 Move the data

to R0 reg

4105 ED JO: MOVX

A,@DPTR

Move acc to

external RAM

4106 C0,83 PUSH 83 Push 83

4108 CO,82 PUSH 82 Push 82

410A 90,FF,CO MOV

DPTR,#FFCO

Load the data

ptr with 16-bit

410D 7A,04 MOV R2,#04 Move the data

to R2 reg

410F 79,0F MOV R1,#0F Move the data

to R1 reg

4111 7B,0F DLY1: MOV R3,#0F Move the data

to R3 reg

4113 DB,FE DLY2: DJNZ R3,4113

4115 D9,FA DJNZ R1,4111

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4117 DA,F8 DJNZ R2,4111

4119 F0 MOVX

@DPTR,A

Move acc to

external RAM

411A D0,82 POP 82 Pop 82

411C D0,83 POP 83 Pop 83

411E A3 INC DPTR Increment data

ptr

411F D8,84 DJNZ R0,4105

4121 80,DD SJMP 4100 Short jump to

address

4123 END stop

4500 09,05,06,0A DB,09,05,06,0A

Result:

Thus the stepper motor at different speed is runned and it is verified.

EX.NO. PROGRAMMING USING ARITHMETIC,LOGICAL AND

BIT MANIPULATION INSTRUCTION USING

8051 MICROCONTROLLER

AIM:

To write the ALP for performing Arithmetic ,Logical & bit-

manipulation instruction using 8051 . PROGRAM:

8-BIT ADD/SUB:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 74,55 Start MOV A,#55 Move the data

to acc

4102 75,38 MOV B,#38 Move the data

to regB

4104 78,00 MOV R0,#00 Move the data

to regr0 reg in

selected bank

4106 25/95,F0 ADD/SUB A,B Add/sub reg in

acc

4018 50,0C,41 JNC 410C Jump on no

carry

401B 08 INC R0 Inc the R0 reg

401C 90,00,45 Loop MOV

DPTR,#4500

Load the data

pointer with

16-bit data

401F F0 MOVX

@DPTR,A

Move acc to

external RAM

4111 A3 INC DPTR Inc data pointer

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4112 E8 MOV A,R0 Move Ro reg to

acc

4113 F0 MOVX

@DPTR,A

Move acc to

external RAM

4114 80,13,41 SJMP 4113 Short jump to

address

8-BIT MUL/DIV:

PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS

4100 74,05 MOV A,#05 Move the data

to acc

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4102 75,02 MOV B,#02 Move the data

to reg B

4104 A4/84.F0 MUL/DIV A,B Mul/div the reg

B with acc

4105 90,00,36 MOV

DPTR,#4600

Load the data

ptr with 16 bit

4108 F0 MOVX

@DPTR,A

Mov the acc to

external RAM

4109 E5,F0 MOV A,B Mov the

content of regB

to acc

411B A3 INC DPTR Increment the

data ptr

411C F0 MOVX

@DPTR,A

Mov the acc to

external RAM

411D 80 SJMP 410F Short jump to

relative address

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OBSERVATIONS:

8-BIT ADDITION:

INPUT DATA OUTPUT DATA

ADDRESS DATA ADDRESS DATA

4100 55 4500 8D

4102 48 4501 00

8-BIT SUBRACTION:

INPUT DATA OUTPUT DATA

ADDRESS DATA ADDRESS DATA

4100 55 4500 1D

4102 48 4501 00

8-BIT MULTIPLICATION:

INPUT DATA OUTPUT DATA

ADDRESS DATA ADDRESS DATA

4100 05 4500 0A

4102 02 4501 00

8-BIT DIVISION:

INPUT DATA OUTPUT DATA

ADDRESS DATA ADDRESS DATA

4100 55 4500 02

4102 48 4501 01

RESULT:

Thus the programming using Arithmetic ,Logical & bit-manipulation

instruction using 8051 microcontroller is successfully executed.

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EX.NO. SEARCHING AND SORTING USING 8086 AIM:

To write an ALP program for searching and sorting using

microprocessor 8086.

APPARATUS REQUIRED:

Microprocessor kit 8086

Power supply

ALGORITHM:

Start the program.

Move 16-bit data to C register.

Move 16-bit data to source index.

Move 8-bit data to D register.

Move content of SI to A register.

Increment source index.

Compare source index with AX register.

Jump to l1,if carry flag set.

Move the data of source index to BX register.

Decrement source index.

Move the content of BX to SI.

Increment source index.

Move data AX to SI.

Decrement D register.

Jump to l2,if zero flag is reset.

Decrement C register.

Jump to l3,if zero flag is reset.

Stop the program.

ASCENDING ORDER ADDRESS OPCODE LABLE MNEMONIC COMMENT

1000 B1 05

MOV CL, 054

Move 05 to CL Register.

1002 BE 00 20

l3 MOV SI, 2000

Load the data to source index.

1005 B2 04

MVI DI,04 Move the data to destination index.

1007 l2 MVI AX,[SI] Move content of SI to A register.

1009 46 INC SI Increment the source index register.

100A 46 INC SI Increment the source index.

100B 3B 04

CMP AX,[SI] Compare the source index with A register.

1011 4E DEC SI Decrement the SI register.

1012 4E DEC SI Decrement the SI register.

1013 89 1C

MOVSI,BX Move B content to source index

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register.

1015 46 INC SI Increment the SI

1016 46 INC SI Increment the SI

1017 89 04

MOV[SI],AX Move accumulator content to SI

1019 FE CA

l1 DEC DI Decrement the D register

101B 75 EA

INZ l2 If no carry,jump to l2

101D FE C9

DEC CL Decrement C register.

101F 1021

75 E1 CC

JNZ l3 INT3

If no zero,jump to l3. Stop the program.

DESCENDING ORDER:

Address opcode label mnemonic comments

1000 B1 05

MOVCL,05H Move the data to C register.

1002 BE 00 20

L3 MOVSI,2000 Load the data in 2000.

1005 B2 04

MVI DI,04 Move the data immediately to D register.

1007 8B 04

L2 MVI AX,[SI] Move source index address to A.

1009 46 INC SI Increment SI register.

100A 46 INC SI Increment SI.

100B 3B 04

CMPAX,[SI] Compare SI with A register.

100D 73 0A

INCl1 If no carry,jump to l1.

100F 8B 1C

MOV BX,[SI] Move SI content to B register.

1016 46 INC SI Increment SI.

1017 46 INC SI Increment SI.

1019 89 04

MOV[SI],AX Move A to SI.

101B FE CA

L1 DEC DL Decrement DL register.

101D 75 EA

JNZ l2 Continue if counter is not zero.

101F 8B 1C

MOV BX,[SI] Move SI content to BX.

1011 4E DEC SI Decrement count of SI.

1012 4E DEC SI Decrement count of SI.

1013 89 1C

MOV[SI],BX Move the data from B to SI.

1015 46 INC SI Increment the SI register.

1016 46 INC SI Increment the SI register.

1017 89 0C

MOV[SI],AX Move accumulator content to SI.

1019 FE CA

L1 DEC DL Decrement the DI register.

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101B JNZ l2 Back to loop2 if no zero.

101D FE C9

DEC CL Decrement the CL register.

101F 75 E1

JNZl3 Back to l3 if no zero.

1021 cc INT3 Stop the program.

PROGRAM FOR SEARCHING

ADDRESS OPCODE LABEL MNEMONIC COMMENTS

1000 B8 22 22

Start MOV AX, 2222

Move 16-bit data to A register.

1003 MOV BL,05 Move 5 value to B register.

1005 BE 00 20

MOV SI,2000

Initialise the source pointer.

1008 8A 14 L2 MOV DL,[SI] Send abyte of data to destination register.

100A 46 JNC SI Increment source pointer.

100B 8A 34 MOV DH,[SI] Send a byte of data to D register.

100D 39 C2 COMP AX,DX

Compare D reg with A register.

1011 A3 50 20

MOV 2050,[AX]

Move the byte of data to 2050.

1014 EB 0B JMP L3 Jump to loop3.

1016 46 L1 JNC SI Increment SI reg.

1017 FE CB DEC BL Decrement the B register.

1019 75 ED JNZ L2 Jump to L2 if no zero.

101B B8 FF FF MOV AX,FFFF

Move the data to A.

101E A3 50 20

MOV 2050,[AX]

Move AX content to 2050.

1021 CC L3 INT 3 Stop the program.

RESULT:

Thus an ALP for searching and sorting has been written by using

microprocessor 8086.

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Ex.no STRING MANIPULATION OF 8086

AIM:

To Write an ALP for String manipulation operation using 8086.

APPARATUS REQUIRED:

Microprocessor kit 8086

Power supply

ALGORITHM:

Start the program

Move data to source index

Move data to destination index

Clear the D register

Move the data to C register

Move the data to source index

Decrement C register

Jump to L1 when there is no zero

Stop the program.

1.program for move data ADDRESS OPCODE LABEL MNEMONICS COMMENTS

1000 BE,00,12 MOV SI,1200

Mov the 16 bit data to SI

1003 BF,00,20 MOV DI,2000

Send the data to DI

1006 FE CLD Clear D reg

1007 B9,0A,00 MOV CX,000A

Mov data to C reg

100A A4 L1 MOV SI Mov data to SI

100B 49 DEC CX Decrement C reg

100C 75,FC JNZ L1 Jump to L1 if no zero

100E CC INT 3 Stop the prog

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MOVE DATA FLOW CHART:

no

yes

yes

2)Algorithm for copying the data:

Start the program

Move data to destination index

Move data to a reg

Move data to C reg

Clear the D reg

Store the content in B reg

Decrement C reg

Jump to L1 if there is no zero

Stop the program.

Program:

ADDRESS OPCODE LABEL MNEMONICS COMMENTS 1000 BF,00,20 MOV

DI,2000

Initialize the

D register

1003 8B,FF,FF MOV AX,FFFF

Mov the 16 bit data to A

1006 B9,06,00 MOV CX

,0006

Mov data to

C register

1009 FC CLD Clear the D register

100A AA L1 STA B Store the

content in B

reg

100C 75,FC JNZ L1 Jump to L1 if no zero

100E CC INT 3 Stop the programs

start

Mov data to SI

Mov data to DI

Clear D register

Move data to C register

Mov data to SI

If Z=0

stop

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. COPYING THE DATA FLOW CHART

no

yes

Result: Thus an ALP for string manipulation operation using 8086

was written and output was verified

6. INTERFACING 8253 TIMER WITH 8085

Interfacing 8253 Programmable Interval Timer with 8085 p

AIM:

To interface 8253 Interface board to 8085 p and verify the

operation of 8253in six different modes.

APPARATUS REQUIRED:

8085 p kit, 8253 Interface board, DC regulated power supply,

VXT parallel bus, CRO.

Mode 0 – Interrupt on terminal count:

The output will be initially low after mode set operations. After

loading the counter, the output will be remaining low while counting

and on terminal count; the output will become high, until reloaded

again.

Let us set the channel 0 in mode 0. Connect the CLK 0 to the

debounce circuit by changing the jumper J3 and then execute the

following program.

Program:

Address Opcodes Label Mnemonic Operands Comments

4100 START: MVI A, 30 Channel 0 in

mode 0

4102 OUT CE Send Mode

Control

word

4104 MVI A, 05 LSB of count

4106 OUT C8 Write count

to register

start

Mov data to DI

Mov data to A

Move data to C register

Clear D register

Clear the D register

Store the content in B

register

If Z=0

stop

Decrement the C register

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4108 MVI A, 00 MSB of

count

410A OUT C8 Write count

to register

410C HLT

It is observed in CRO that the output of Channel 0 is initially LOW. After

giving six clock pulses, the output goes HIGH.

Mode 1 – Programmable ONE-SHOT:

After loading the counter, the output will remain low following

the rising edge of the gate input. The output will go high on the

terminal count. It is retriggerable; hence the output will remain low for

the full count, after any rising edge of the gate input.

Example:

The following program initializes channel 0 of 8253 in Mode 1

and also initiates triggering of Gate 0. OUT 0 goes low, as clock pulse

after triggering the goes back to high level after 5 clock pulses. Execute

the program, give clock pulses through the debounce logic and verify

using CRO.

Address Opcodes Label Mnemonic Operands Comments

4100 START: MVI A, 32 Channel 0 in

mode 1

4102 OUT CE Send Mode

Control

word

4104 MVI A, 05 LSB of count

4106 OUT C8 Write count

to register

4108 MVI A, 00 MSB of

count

410A OUT C8 Write count

to register

410C OUT D0 Trigger

Gate0

4100 HLT

Mode 2 – Rate Generator:

It is a simple divide by N counter. The output will be low for one

period of the input clock. The period from one output pulse to the

next equals the number of input counts in the count register. If the

count register is reloaded between output pulses the present period

will not be affected but the subsequent period will reflect the new

value.

Example:

Using Mode 2, Let us divide the clock present at Channel 1 by 10.

Connect the CLK1 to PCLK.

Address Opcodes Label Mnemonic Operands Comments

4100 3E 74 START: MVI A, 74 Channel 1 in

mode 2

4102 D3 CE OUT CE Send Mode

Control

word

4104 3E 0A MVI A, 0A LSB of count

4106 D3 CA OUT CA Write count

to register

4108 3E 00 MVI A, 00 MSB of

count

410A D3 CA OUT CA Write count

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to register

410C 76 HLT

In CRO observe simultaneously the input clock to channel 1 and the

output at Out1.

Mode 3 Square wave generator:

It is similar to Mode 2 except that the output will remain high until

one half of count and go low for the other half for even number

count. If the count is odd, the output will be high for (count + 1)/2

counts. This mode is used of generating Baud rate for 8251A

(USART).

Example:

We utilize Mode 0 to generate a square wave of frequency 150

KHz at channel 0.

Address Opcodes Label Mnemonic Operands Comments

4100 3E 36 START: MVI A, 36 Channel 0 in

mode 3

4102 D3 CE OUT CE Send Mode

Control

word

4104 3E 0A MVI A, 0A LSB of count

4106 D3 C8 OUT C8 Write count

to register

4108 3E 00 MVI A, 00 MSB of

count

410A D3 C8 OUT C8 Write count

to register

410C 76 HLT

Set the jumper, so that the clock 0 of 8253 is given a square wave of

frequency 1.5 MHz. This program divides this PCLK by 10 and thus the

output at channel 0 is 150 KHz.

Vary the frequency by varying the count. Here the maximum

count is FFFF H. So, the square wave will remain high for 7FFF H counts

and remain low for 7FFF H counts. Thus with the input clock frequency

of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the

resulting square wave has an ON time of 0.02184 microseconds and an

OFF time of 0.02184 microseconds.

To increase the time period of square wave, set the jumpers

such that CLK2 of 8253 is connected to OUT 0. Using the above-

mentioned program, output a square wave of frequency 150 KHz at

channel 0. Now this is the clock to channel 2.

Mode 4: Software Triggered Strobe:

The output is high after mode is set and also during counting.

On terminal count, the output will go low for one clock period and

becomes high again. This mode can be used for interrupt generation.

The following program initializes channel 2 of 8253 in mode 4.

Example:

Connect OUT 0 to CLK 2 (jumper J1). Execute the program and

observe the output OUT 2. Counter 2 will generate a pulse after 1

second.

Address Opcodes Label Mnemonic Operands Comments

4100 START: MVI A, 36 Channel 0 in

mode 0

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4102 OUT CE Send Mode

Control

word

4104 MVI A, 0A LSB of count

4106 OUT C8 Write count

to register

4108 MVI A, 00 MSB of

count

410A OUT C8 Write count

to register

410C MVI A, B8 Channel 2 in

Mode 4

410E OUT CE Send Mode

control

Word

4110 MVI A, 98 LSB of

Count

4112 OUT CC Write Count

to register

4114 MVI A, 3A MSB of

Count

4116 OUT CC Write Count

to register

4118 HLT

Mode 5 Hardware triggered strobe:

Counter starts counting after rising edge of trigger input and

output goes low for one clock period when terminal count is reached.

The counter is retriggerable.

Example:

The program that follows initializes channel 0 in mode 5 and also

triggers Gate 0. Connect CLK 0 to debounce circuit.

Execute the program. After giving Six clock pulses, you can see

using CRO, the initially HIGH output goes LOW. The output ( OUT 0 pin)

goes high on the next clock pulse.

Address Opcodes Label Mnemonic Operands Comments

4100 START: MVI A, 1A Channel 0 in

mode 5

4102 OUT CE Send Mode

Control

word

4104 MVI A, 05 LSB of count

4106 OUT C8 Write count

to register

4108 MVI A, 00 MSB of

count

410A OUT D0 Trigger Gate

0

410C HLT

Result:

Thus the 8253 has been interfaced to 8085 p and six different

modes of 8253 have been studied.