This is information on a product in full production.

March 2014 DocID018656 Rev 2 1/13

ECMF02-2BF3

Dual line IPAD™, common mode filter withESD protection for high speed serial interface

Datasheet - production data

Features• Very large differential bandwidth above 5 GHz• High common mode attenuation:

– - 23 dB at 900 MHz.• High common mode attenuation:

– - 20 dB between 800 MHz and 2.2 GHz.• Very low PCB space consumption:

Characteristics ECMF02-2BF3

2/13 DocID018656 Rev 2

1 Characteristics

Figure 3. Electrical characteristics (definitions)

Table 1. Absolute maximum ratings (Tamb = 25 °C)

Symbol Parameter Value Unit

VPP Peak pulse voltage(1)

1. Measurements done on IEC 61000-4-2 test bench. For further details see Application note AN3353.

IEC 61000-4-2 contact dischargeIEC 61000-4-2 air discharge

1020

kV

Tj Maximum junction temperature 125 °C

Top Operating temperature range - 30 to + 85 °C

Tstg Storage temperature range - 55 to 150 °C

Table 2. Electrical characteristics (values, Tamb = 25 °C)

Symbol Test conditions Min. Typ. Max. Unit

VBR IR = 1 mA 6 V

IRM VRM = 3 V per line 100 nA

RDC DC serial resistance 3 4 Ω

Symbol ParameterV = Breakdown voltage

I

I

= Leakage current @

= Leakage current @

V

VV = Stand-off voltage

BR

RM

R

RM

BR

RM

I

VVBRVRM

IRIRM

IRMIR

VRMVBR

DocID018656 Rev 2 3/13

ECMF02-2BF3 Application schematics

13

2 Application schematics

Figure 4. USB2.0 application

Figure 5. MIPI D-PHY application

ECMF02-2BF3

D-

D+

GND

To U

SB

tra

nsc

eive

r

ID

VBUS

IN1

GND

OUT1

OUT2 IN2

D0+

D0-

D1+

D1 -

D2+

D2-

CLK+

CLK-

GND

GND

GND

GND

IN1

GND

OUT1

OUT2 IN2

IN1

GND

OUT1

OUT2 IN2

IN1

GND

OUT1

OUT2 IN2

IN1

GND

OUT1

OUT2 IN2

To d

isp

lay

and

cam

era

MIP

I D-P

HY

Measurement curves ECMF02-2BF3

4/13 DocID018656 Rev 2

3 Measurement curves

Figure 6. SDD21 differential attenuation measurement (Z0 diff = 100 Ω)

Figure 7. SCC21 common mode attenuation measurement (Z0 com = 50 Ω)

100.0k 1.0M 10.0M 100.0M 1.0G-3.00

-2.50

-2.00

-1.50

-1.00

-0.50

0.00SDD21 (dB)

F (Hz)

SCC21 (dB)

100.0k 1.0M 10.0M 100.0M 1.0G-40.00

-35.00

-30.00

-25.00

-20.00

-15.00

-10.00

-5.00

0.00

F (Hz)

DocID018656 Rev 2 5/13

ECMF02-2BF3 Measurement curves

13

Figure 8. SDD11 and SDD22 differential return loss measurement (Z0 diff = 100 Ω)

100.0k 1.0M 10.0M 100.0M 1.0G-40.00

-35.00

-30.00

-25.00

-20.00

-15.00

-10.00

-5.00

0.00

SDD11 SDD22

SDD1 and SDD22 (dB)

F (Hz)

Measurement curves ECMF02-2BF3

6/13 DocID018656 Rev 2

Figure 9. ESD response to IEC 61000-4-2 (+8 kV contact discharge)

Figure 10. ESD response to IEC 61000-4-2 (-8 kV contact discharge)

61.2 V

31.8 V

19.6 V 16.4 V

1

2

43

V : ESD peak voltageV :clamping voltage @ 30 nsV :clamping voltage @ 60 ns

PP

CL

CL

V :clamping voltage @ 100 nsCL

1234

-60.6 V

-21.9 V-16.7 V -13.7 V

1

243

V : ESD peak voltageV :clamping voltage @ 30 nsV :clamping voltage @ 60 ns

PP

CL

CL

V :clamping voltage @ 100 nsCL

1234

DocID018656 Rev 2 7/13

ECMF02-2BF3 High speed differential standard compliance tests

13

4 High speed differential standard compliance tests

4.1 USB2.0 compliance tests

Figure 11. TDR measurement (loaded by Zdiff = 90 Ω)

Figure 12. Eye diagram with USB2.0 template

70

75

80

85

90

95

100

110

0.5 1.0 1.5 2.0 2.5 3.0 3.5

ZDIFF ( )Ω

t(ns)

0.0

105

tr = 400 ps (10% - 90%)

200 mV/div 200 mV/div

347.2 ps/div347.2 ps/div

Through ISS* Board + ECMF02-2BF3

* Impedance standard substrate

High speed differential standard compliance tests ECMF02-2BF3

8/13 DocID018656 Rev 2

4.2 HDMI1.4 compliance tests

Figure 13. TDR measurement (loaded by Zdiff = 100 Ω), tr = 194 ps (10% - 90%)

DocID018656 Rev 2 9/13

ECMF02-2BF3 PCB layout recommendations

13

5 PCB layout recommendations

Figure 14. PCB layout recommendations

90 Ω differential pairs

Pad layout recommendation

GND IN2 IN1

OUT2 OUT1

220 µm recommended

220 µm recommended260 µm maximum

Solder stencil opening:

Copper pad Diameter:

Solder mask opening:300 µm minimum

Package information ECMF02-2BF3

10/13 DocID018656 Rev 2

6 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Figure 15. Package dimensions

Figure 16. Marking

1230

µm

± 4

0 µ

m

830 µm ± 30 µm

255 µm ± 40

400 µm ± 40

400

µm

± 4

0 505 µm ± 55

215 µm

215

µm

xy

xw

zw

DotECOPACK grade

xx = marking

yww = datecode(y = year

z = manufacturing location

http://www.st.com

DocID018656 Rev 2 11/13

ECMF02-2BF3 Ordering information

13

Figure 17. Flip Chip tape and reel specification

Note: More information is available in the application notes:AN2348, “IPAD™ 400 µm Flip Chip: package description and recommendations for use”AN1751, “EMI filters: recommendations and measurements”

7 Ordering information

Figure 18. Ordering information scheme

Dot identifying Pin A1 location

User direction of unreelingAll dimensions are typical values in mm

4.0

4.0

2.0

8.0

1.75

3.5

Ø 1.55

0.59

0.93

0.22

1.33

ST ST STxxzyww

xxzyww

xxzyww

Table 3. Ordering information

Order code Marking Package Weight Base qty Delivery mode

ECMF02-2BF3 KE Flip Chip 1.15 mg 5000 Tape and reel 7”

ECMF 02 - 2 B F3

Function

Number of lines

Number of ESD protected lines

Version

Package

ESD common mode filter

02 = 2 lines

2 = 2 ESD protected lines

F3 = WLCSP 0.4 mm pirch

Revision history ECMF02-2BF3

12/13 DocID018656 Rev 2

8 Revision history

Table 4. Document revision history

Date Revision Changes

09-Feb-2012 1 Initial release.

07-Mar-2014 2 Updated Figure 13.

DocID018656 Rev 2 13/13

ECMF02-2BF3

13

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Figure 1. Pin configuration (bump side)Figure 2. Schematic1 CharacteristicsTable 1. Absolute maximum ratings (Tamb = 25 °C)Figure 3. Electrical characteristics (definitions)Table 2. Electrical characteristics (values, Tamb = 25 °C)

2 Application schematicsFigure 4. USB2.0 applicationFigure 5. MIPI D-PHY application

3 Measurement curvesFigure 6. SDD21 differential attenuation measurement (Z0 diff = 100 W)Figure 7. SCC21 common mode attenuation measurement (Z0 com = 50 W)Figure 8. SDD11 and SDD22 differential return loss measurement (Z0 diff = 100 W)Figure 9. ESD response to IEC 61000-4-2 (+8 kV contact discharge)Figure 10. ESD response to IEC 61000-4-2 (-8 kV contact discharge)

4 High speed differential standard compliance tests4.1 USB2.0 compliance testsFigure 11. TDR measurement (loaded by Zdiff = 90 W)Figure 12. Eye diagram with USB2.0 template

4.2 HDMI1.4 compliance testsFigure 13. TDR measurement (loaded by Zdiff = 100 W), tr = 194 ps (10% - 90%)

5 PCB layout recommendationsFigure 14. PCB layout recommendations

6 Package informationFigure 15. Package dimensionsFigure 16. MarkingFigure 17. Flip Chip tape and reel specification

7 Ordering informationFigure 18. Ordering information schemeTable 3. Ordering information

8 Revision historyTable 4. Document revision history