Dual Frequency Dry Etching for Advanced Memory Applications...etching results that have been...

1Confidential Information EXTERNAL USECopyright 2004 Tegal Corporation. All rights reserved.

Dual Frequency Dry Etching forDual Frequency Dry Etching forAdvanced Memory ApplicationsAdvanced Memory Applications

Robert DitizioManager of Etch Process

Tegal CorporationPetaluma, CA

January 12, 2006


AbstractAbstract

Abstract – A wide variety of new materials have been, and continue to beinvestigated to enhance the performance of current IC device structuresand to introduce new features. In advanced memory applications, forexample, such as MRAM, FeRAM, PRAM, and RRAM, numerous metaland dielectric layers are under investigation that require advancedpatterning techniques to overcome the issue of reduced etch volatility incomparison to more conventional materials. In this presentation, dryetching results that have been obtained from a number of dual frequencyreactor configurations for a variety of films used in advanced memorystructures are presented. In these dual frequency reactors, plasmageneration is accomplished using 13.56MHz and wafer bias isaccomplished with 450kHz. The benefits of the use of the high 13.56MHzfrequencies for efficient plasma generation and the use of low 450kHz biasfrequency at the extreme ranges of producing high bias voltages forefficient removal of low volatility etch byproducts and low bias voltages forproducing high selectivity to underlying layers are also discussed.


OutlineOutline

MotivationDual Frequency configurations using

13.56MHz/450kHzFrequency effectsMRAM top electrode/stop-on-alumina

process results (low bias regime)FeRAM stack etch process results (high

bias regime)Conclusions


MotivationMotivation

Advanced Non-volatile Memory applications,Integrated Passive Devices, CompoundSemiconductor Devices, and many MEMsdevices use materials that are difficult to etchrelative to conventional Si IC based films

Etch tool requirements for these new materialscan vary across a wide spectrum of biaspower and process temperature

Dual frequency plasma sources using high(13.56MHz) and low (450kHz) frequencies aresuited to the requirements for advancedmaterials over a wide range of processrequirements


Some “New” Materials used inSome “New” Materials used inAdvanced Memory DevicesAdvanced Memory Devices

MRAMMetals – NiFe, CoFe, CoFeB, PtMn, IrMn, Rudielectric materials -- AlOx, MgO

MRAMMetals – NiFe, CoFe, CoFeB, PtMn, IrMn, Rudielectric materials -- AlOx, MgO

FeRAMMetals -- Pt, Ir, IrOx, RuFerroelectrics -- PZT, BST, SBT

FeRAMMetals -- Pt, Ir, IrOx, RuFerroelectrics -- PZT, BST, SBT

RRAM/ReRAM/CBRAM/PRAMMetals -- Au, Ag, Cu, Se, Pt, Ir, IrOx, Ru, NiDielectric materials -- manganites, …, NiO

RRAM/ReRAM/CBRAM/PRAMMetals -- Au, Ag, Cu, Se, Pt, Ir, IrOx, Ru, NiDielectric materials -- manganites, …, NiO


Tegal Dual Frequency PlasmaTegal Dual Frequency PlasmaTechnologyTechnology

Wafer

MatchingNetwork

kHzSupply

MHzSupply

MatchingNetwork

Wafer

Combiner

MatchingNetwork

kHzSupply

MHzSupply

MatchingNetwork

Spectra ICPHRe CCP

Moderate plasma densityVery low to moderate bias power

Moderate plasma densityHigh bias power

Wafer

MatchingNetwork

kHzSupply

MHzSupply

MatchingNetwork

Moderate to high plasma densityVery low to moderate bias power


Frequency effectsFrequency effectsparallel plate reactorparallel plate reactor

13.56MHz -- Efficient plasmageneration frequency

450kHz -- Efficient ionbombardment frequencywithout secondary iongeneration

Flamm et.al.Flamm et.al.

Ion Energy and Ion Density vs. Frequency

0

100

200

300

400

500

0.01 0.1 1 10 100Frequency ( MHz)

1 E+10

3 E+10

5 E+10

7 E+10

9 E+10

Ion energy decreaseswith increasing frequency

Ion density increaseswith increasing frequency

13.56 MHz450 kHz Ion Energy

(volts)Ion Density(ions/cm^3)


Relative Ion density/Ion Energy LevelsRelative Ion density/Ion Energy Levelsfor Various Dual Frequencyfor Various Dual FrequencyConfigurationsConfigurations

HRe- -- Wafer at both 13.56MHz and 450kHz

HRe- -- Sidewall at 13.56MHz,Wafer at 450kHz

Spectra ICP source at 13.56MHz,

Wafer at 450kHz

Ion

Den

sity

Ion Energy


Relative Ion density/Ion Energy LevelsRelative Ion density/Ion Energy Levelsfor Various Dual Frequencyfor Various Dual FrequencyConfigurationsConfigurations

HRe -- Wafer at both 13.56MHz and 450kHz

HRe -- Sidewall at 13.56MHz,Wafer at 450kHz

Spectra ICP source at 13.56MHz,

Wafer at 450kHz

Ion

Den

sity

Ion Energy

High bias regime for FeRAM, IPDHigh bias regime for FeRAM, IPD

Low bias regime for MRAM SOA applicationLow bias regime for MRAM SOA application


MRAMTop Electrode/Stop-on-

Alumina Process

Low Bias SpectraTM ICP processing regime utilizing dual frequencies – 13.56MHz/450kHz

Low Bias SpectraTM ICP processing regime utilizing dual frequencies – 13.56MHz/450kHz


Off-Axis MRAM CellOff-Axis MRAM CellArchitectureArchitecture

M0

BEMTJ

M2 bit line

M1 digit line

WordLine Transistor


Typical MRAM Stack StructureTypical MRAM Stack Structure

SubstrateTiN 600A

Ta 600A

NiFe 30AAlOx 12ACoFe 28A

PtMn 150A

NiFe 20ATa 50A

CoFe 18ARu 8A

PR 1µm

1. TE/SOA Etch

Two Step Process

2. BE Etch

Mask

Top Contact

Fixed Magnet

Free Magnet Tunnel Junction

Pinning Layer

Bottom Contact

Substrate


Two-mask Etch Schemes forTwo-mask Etch Schemes forPatterning MRAM stacksPatterning MRAM stacks

TCTM

BMBC

alumina

Stop on Alumina

TCTMBM

BC

alumina

Stop on BC

TCTM

BM

BC

aluminaBM

Stop within BM


Benefits of SOA approachBenefits of SOA approach

• Isolation between TM and BM• CD Control dictated by patterning of TC/TMetch rather than full stack etch

insulator

Bottom Magnet

Substrate

Top magnet

Topcontact

Bottom Contact

CriticalCD

alumina


Top Electrode/Stop-on-Top Electrode/Stop-on-AluminaAluminaEtch RequirementsEtch Requirements

• Control of Ion energy at low levels(ER<50A/min)

• Uniform Etch Capability• Temperature <300ºC during processing• Good endpoint sensitivity and accuracy

– to identify etch-stop layers• No corrosion or residues• Magnetic bit performance• Throughput, MWBC (high)


Lower Electrode Power (watts)0 50 100 150 200 250

dc b

ias

(vol

ts)

-400

-300

-200

-100

0

100

500W750W1000W1500W2000W2500W2750W

Linear DC Bias Dependence in Chlorine PlasmaPressure = 2mTorr

Control of ion energyControl of ion energySpectra Process ModuleSpectra Process Module


Control of Ion EnergyControl of Ion EnergyMagnetic Stack Etch Rate vs. Bias PowerMagnetic Stack Etch Rate vs. Bias Power

0

100

200

300

400

500

600

700

0 10 20 30 40 50 60

LF Bias Power (watts)

Ave

rage

Etc

h R

ate

(Å/m

in.)

0

50

100

150

200

250

300

350

400

450

500

Stac

k Et

ch T

ime

(sec

.)

Etch Time

Etch Rate

Low Power >8A/sec

0.8 A/sec

Switching magnet layer thickness is typically <50A thickSwitching magnet layer thickness is typically <50A thick


NiFeNiFe/Alumina Selectivity >90:1/Alumina Selectivity >90:1proprietary etch chemistryproprietary etch chemistry

Selectivity test wafer -- 50A NiFe/15A Al2O3/50A NiFe

0

100

200

300

400

500

600

0 500000 1000000 1500000 2000000 2500000 3000000 3500000 4000000 4500000

Time (ms)

Inte

nsity

NiFe:Alumina Selectivity > 90:1

>40minutes to etch 15A alumina layer

NiFe NiFe


Radius (cm)

-20 -15 -10 -5 0 5 10 15 20

Ion

Satu

ratio

n C

urre

nt D

ensi

ty (m

A/c

m2 )

0

10

20

30

40

502000W / 140sccm2000W / 70sccm2000W / 35sccm1500W / 140sccm1500W / 70sccm1500W / 35sccm1000W / 140sccm1000W / 70sccm1000W / 35sccm

Cl22mT

Radius (cm)

-20 -15 -10 -5 0 5 10 15 20Io

n sa

tura

tion

curr

ent d

ensi

ty (m

A/c

m2 )

0

10

20

30

40

502mT / 140sccm2mT / 70sccm6mT / 140sccm6mT / 70sccm10mT / 140sccm10mT / 70sccm

Cl22000W

Control of UniformityControl of Uniformity(at the wafer)(at the wafer)

2kW2kW1.5kW1.5kW1kW1kW

2mT2mT6mT6mT10mT10mT

Plasma Non-uniformity of ~5% max-min across 8” wafer diameterPlasma Non-uniformity of ~5% max-min across 8” wafer diameter


1s = 1%ER = 2892 Å/min

Cl2 140sccm2mtorr

2940

2820

2840

2860

2880

2920

2900

200mm Polysilicon Wafer Etch Map200mm Polysilicon Wafer Etch Map


Control of UniformityControl of UniformityContribution of 450kHz bias power to plasma densityContribution of 450kHz bias power to plasma density

0

0.4

0.8

1.2

1.6

2

0 100 200 300

450kHz Lower electrode power level (W)

Ion

satu

ratio

n cu

rren

t (m

A)

0

0.05

0.1

0.15

0.2

0.25

0.3

0 100 200 300

450 kHz Lower electrode power (W)

Ion

satu

ratio

n cu

rren

t (m

A)

Selection of frequencies can minimize contribution of lower electrode power on plasma density to provide

independent control of ion density and ion energy

2000W2000W

1000W1000W500W500W

250W250W

500W500W


Summary of benefits of dualSummary of benefits of dualfrequency configurationfrequency configuration

High frequency (13.56MHz) efficient for plasmageneration

Low frequency (450kHz) efficient for biasingwafer – very low applied power levels for freemagnet layer etch

Dual frequency (13.56MHz + 450kHz) allows forindependent control of ion density and ionenergy -- low frequency of 450kHz on thewafer minimizes secondary plasmageneration over the wafer

Plasma uniformity is dictated by chamberdesign, not by secondary plasma generationover the wafer


Typical SOA Etch PerformanceTypical SOA Etch PerformancePhotoresist Mask TE processPhotoresist Mask TE process

750A Composite Top electrode thickness

Corrosion-free, residue-free surfacesvertical profiles



1650A Composite Top electrode thickness




1135Å Composite Top Electrode Stack Thickness of0.5µm x 0.7µm



TEM of MRAM Stack after Stop-TEM of MRAM Stack after Stop-on-Alon-Al22OO33 Process Process

0.6µm feature

Etch stopped on 15Å alumina layer


High High MagMag TEM of MRAM Stack TEM of MRAM Stackafter Stop-on-Alafter Stop-on-Al22OO33 Process Process

Alumina

SOA process leaves alumina layer intact


SOA VerificationSOA Verification

• Proprietary technique developed and used to determine ifalumina was breached during processing

• TEM used to confirm continuity of alumina• Kerr Optical Magnetometry measurements confirming that

the alumina layer and fixed magnet layer below thealumina are intact

• Electrical resistance measurements have confirmed noelectrical shorting across junction

• Magnetic Ratio measurements confirmed working devices

insulator

Bottom Magnet

Substrate

Top magnet

Topcontact

Bottom Contact

alumina


FeRAMStack Etch Process

HRe- CCP High Bias processing regimeutilizing dual frequencies – 13.56MHz/450kHz

HRe- CCP High Bias processing regimeutilizing dual frequencies – 13.56MHz/450kHz


FeRAMFeRAM Cell Architecture Cell Architecture

Storage cell

Transistor

From Xing, patent #US 6,492,222From Xing, patent #US 6,492,222


Typical Typical FeRAMFeRAM Stack Structure Stack Structure

Hard Mask/contact layer

Substrate

Top Contact -- Pt, Ir, IrOx, Ru

Ferroelectric --PZT, BST, SBT

PR Mask

Barrier/contact layer

Bottom Electrode -- Pt, Ir, IrOx, Ru

Note: similar materials used in Integrated Capacitor Devices and MEMsNote: similar materials used in Integrated Capacitor Devices and MEMs

HM/contact layer

Substrate

Top Contact

Ferroelectric

Barrier/contact layer

Bottom Electrode


FeRAM FeRAM Etch RequirementsEtch Requirements

• High Ion energy• Process Stability over time• Uniform Etch Capability• Temperature <500ºC during processing• High Throughput and MWBC• Memory cell bit performance


Dual Frequency HReDual Frequency HRe-- Process ProcessModule for Module for FeRAM FeRAM applicationsapplications

Low FrequencyMatch

Low FrequencyMatch

Power delivered only through the wafer

High FrequencyMatch

MatchingNetwork

MatchingNetwork

450 kHz

13.56 MHzCombiner

•Dual Frequencythrough wafer

•High ion energy–increased volatility of

hard to etch materials•Plasma stability–No sputtering of

deposited materialfrom internal surfaces


Independent control of Ion DensityIndependent control of Ion Densityand Bias Voltage using Dualand Bias Voltage using DualFrequencies through the waferFrequencies through the wafer

1 >1 >

13.56MHz + 450kHz13.56MHz + 450kHz

HF/LF Power DC Bias(Watts) (Volts)500/0 640300/200 1400

700/0 760500/200 1400

HF/LF Power DC Bias(Watts) (Volts)500/0 640300/200 1400

700/0 760500/200 1400


Control of Process StabilityControl of Process Stabilityno attenuation of plasma over time in CCP HReno attenuation of plasma over time in CCP HRe

300

250

200

150

100

50

00 20 40 60 80 100 120 140 160

Etched Wafers (ea)

IntensityICP SignalAttenuation Dueto WindowCoating

Dual FrequencyCCP HRe DesignProvidesRepeatableProcess Stability


Pt postPt post

Process temperature <100CER>1000 Å /min

Profile <80°

Process temperature <100CER>1000 Å /min

Profile <80°


FeRAM Planar Stack Etch ResultsFeRAM Planar Stack Etch Results

Capacitor stack etch (twomasking steps)

Key etch results are profile,residue, selectivities, rate

Oxide

FerroelectricPZT or Y-1

2 Masks

Pt or Ir/IrO2

Pt or Ir/IrO2

CD

Bottom Elec.

Top Elec.

> 2kÅ1k - 2kÅ

1k - 2kÅ1k - 2kÅ

Process temperature <100CER>1000A/min

Process temperature <100CER>1000A/min

Pt/PZT/PtPt/PZT/Pt


High Temperature High Temperature IrIr and PZT and PZTEtching in CCP HReEtching in CCP HRe--

PZT Profile & E.R. vs. Temperature

0

20

40

60

80

100

120

100 200 300 400 500Temperature (C)

Etc

h R

ate

(nm

/min

)

70

75

80

85

90

95

100

Prof

ile A

ngle

(deg

)

Ir Profile & E.R. versus Temperature

0

20

40

60

80

100

120

100 200 300 400 500Temperature (C)

Etc

h R

ate

(nm

/min

)

70

75

80

85

90

95

100

Prof

ile A

ngle

(deg

)

Incorporation of high temperature capability provides improved process performanceIncorporation of high temperature capability provides improved process performance


High Temperature Etch PerformanceHigh Temperature Etch Performancefor Ir/PZT/Ir Stack in Dual Frequencyfor Ir/PZT/Ir Stack in Dual FrequencyHRe HRe CCP Process ModuleCCP Process Module

90 degree Stack Profile0.13 micron spaces

500o C: 90deg profile on Ir/PZT/Ir

TE Ir -->Mask -->

PZT -->BE Ir -->


ConclusionsConclusions

Dual frequency plasma tools utilizing 13.56MHzfor efficient plasma generation and 450kHz forefficient biasing can be used to produce awide range of process conditions suitable foradvanced memory cell fabrication

A unique stop-on-alumina process has beendemonstrated for MRAM device fabricationusing the SpectraTM dual frequency ICPprocess module

The stop-on-alumina process was achievedspecifically using the features of control ofion energy to very low levels and control ofplasma uniformity


ConclusionsConclusions

Dry etching of FeRAM device structures has beendemonstrated using the features of control ofion energy to very high levels and delivery of allpower through the wafer

High etch rates (1000-3000 Å/min) can be obtainedin the HRe- CCP at Temperatures <100C with noloss in plasma stability

High temperature processing (500°C) incombination with dual frequencies applied tothe wafer has been shown to produce high etchrates and vertical profiles in advances FeRAMstack structures


AcknowledgementsAcknowledgements

Steven Marks for providing the FeRAM resultsSteven Marks for providing the FeRAM results


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