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A DSTATCOM Modelling, Analysis and Performancefor Unbalanced and Non-linear Load

C N Bhende, Non-member Dr M K Mishra, Non-member Dr H M Suryawanshi, Member

This paper describes the modelling and analysis of distribution static compensator (DSTATCOM), which is capablebalancing the source currents inspite of unbalanced and non-linear load currents. In addition to this, the power factor canalso be set to a desired value. The theory of instantaneous symmetrical components is used here to extract the three-phreference currents. These reference currents are then tracked using voltage source inverter (VSI), operated in a hysterband control mode. The detailed simulation results are presented to support the concept. The two-level and three-levneutral clamped inverter topologies are used to realize the compensator. It is demonstrated that three-level inverter givless total harmonic distortion (THD) in source currents as compare to two-level inverter.

Keywords: DSTATCOM; Load compensation; Three-level VSI; PI voltage controller

Vol 86, March 2006 297

NOTATIONh : hysteresis current control band

i fa, i fb, i fc : three-phase compensator currents

i i i fa fb fc * * *, , : three-phase compensator reference currents

ila, ilb, ilc : three-phase load currents

i sa, i sb, i sc : three-phase source currents K p, K i : proportional, integral gains of voltage controller

L f : interface inductance

P lav : average load power

P loss : switching losses of the inverter

R f : internal resistance of interface inductance

vc 1, vc 2 : voltages across capacitorsC 1, C 2

v vc c y l

c c y l

1 2, : voltages across capacitorsC 1, C 2 at the end of each cycle

vcref : reference voltage across the capacitorv sa, v sb, v sc : three-phase source voltages

v sa1, i sa1 : instantaneous positive sequence source voltage,current

f : phase angle between source voltage and sourcecurrent

C N Bhende, Dr M K Mishra and Dr H M Suryawanshi are with theDepartment of Electrical Engineering, Visvesvaraya National Instituteof Technology (formerly VRCE), Nagpur.This paper (modified) was received on July 7, 2005. Written discussion onthis paper will be received until May 31, 2006.

INTRODUCTIONThe unbalanced and the non-linear loads affect the quality of source currents to a large extent. It affects the voltage at point of common coupling (PCC) where the facility is connected. Thishas adverse effects on the sensitive equipments connected toPCC and may damage the equipment appliances. Manytechniques have been proposed to improve the supply sidepower factor to cancel out the harmonics generated by power

electronic loads. L Gyugyi proposed sampling and averagingtechniques to realize thyristor controlled time varying reactivenetwork1. Disadvantage of these methods is that these have beencarried out only for sinusoidal steady state conditions. In fastFourier transform (FFT) technique2, the disadvantage is that itadds inherent one cycle delay. Source current synthesis usingthe capacitor voltage feedback can also be used3-4 for loadcompensation. However, the transient performance of thecompensator based on this method is poor 4-5. Recently, pqtheory which is also called instantaneous reactive powertheory6 has drawn much attention. The pq theory, not onlycompensates the fundamental reactive power under transientconditions but also compensates for harmonic currents in theload. However, pq theory fails if the source voltages areunbalanced and non-sinusoidal. Furthermore, it needs a largenumber of transducers including complex transformations,which makes the operation complex.

The theory of instantaneous symmetrical components 7-8can beused for the purpose of load balancing, harmonic suppression,and power factor correction. The theory of instantaneoussymmetrical components for compensation7-8 is much moresimplified as compared to the pqtheory6. Algorithms providedby instantaneous symmetrical component theory can practicallycompensate any kind of unbalance and harmonics in the load,provided it has a high bandwidth current source to track thefilter reference currents.

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298 IE (I) JournalEL

In this paper, the theory of instantaneous symmetricalcomponents is used to extract instantaneous reference currents,which are then realized by voltage source inverter circuit andare injected at the point of common coupling (PCC). It can beshown that instantaneous power in the electrical systemcontaining unbalanced and non-linear load has an oscillatingcomponent that rides a dc value7. The objective of thecompensator is to supply this zero-mean oscillating power suchthat dc component of power is supplied by the source. Themethod of reference current generation based on the theory of instantaneous symmetrical components is described in the nextsection.

REFERENCE CURRENT GENERATION SCHEMEThe schematic diagram of three-phase four-wire compensatedsystem is shown in Figure 1. The compensator and the load areconnected at a point called as point of common coupling(PCC). The load may be unbalanced and non-linear. The

compensator is assumed to be ideal, ( ie, infinite bandwidth). Inthe analysis given below, it is assumed that the idealcompensator tracks the reference currents perfectly, ie, i i f f

* .

The purpose of the proposed scheme is to generate the threereference current waveforms, which will then be supplied asreference to the three VSIs. In three-phase four-wire system,three phase currents are independent. Thus, three independentequations are required to generate these currents. Theextraction of reference currents is given as follows.Criterion 1: The supply current must be balancedFrom the above Criterion

i i i sa sb sc + + = 0 (1)Criterion 2: The desired power factor of the source can be setexplicitlyFrom the power factor consideration, it is assumed that thephase of the vector i sa1 lagsv sa1 by an angle f ie,

+ + = + + +v v v i i i sa sb sc sa sb sc 2 2o t o t (2)

where

= e j 120

Substituting value of a , the above equation can be written as

tan / tan / = +1 1 21

3 4 K K K K b g b g (3)where

K v v sb sc 1 32= b g, K v v v sa sb sc 2 12 12=

K i i sb sc 33

2= b g, K i i i sa sb sc 4 2 2=

Defining

tan / 3 (4)

Solving (3), gives (Appendix)

v v v i v v v i sb sc sa sa sc sa sb sb + b g b g + =v v v i sa sb sc sc b g 0 (5)

The instantaneous reactive power q is defined as6

q i v v i v v i v v sa sc sb sb sa sc sc sb sa= + + 13

b g b g b gn s (6)

when = =0 0, and equation (5) becomes

13

0i v v i v v i v v sa sc sb sb sa sc sc sb sa + + =b g b g b gn s (7)

Equation (7) implies that when the power factor angle isassumed to be zero, the instantaneous reactive power suppliedby the source is zero.

when 0 0, and equation (5) becomes

13

i v v i v v i v v sa sc sb sb sa sc sc sb sa + + b g b g b gn s = + +3 v i v i v i sa sa sb sb sc sc b g (8)

Equation (8) implies that when power factor angle is non-zero,the source supplies a reactive power that is equal to b times

instantaneous power.Criterion 3: The source should supply the average load power

The instantaneous power in a balanced three-phase circuit isconstant while for an unbalanced circuit it has a doublefrequency component in addition to the dc value. The objectiveof the compensator is to supply the double frequencycomponent such that the source supplies the dc value of the loadpower. Therefore it is obtained

v i v i v i P sa sa sb sb sc sc lav+ + = (9)

where, P lav is the average load power and is computed using a

moving average filter (MAF). Moving average filter has beenused to provide fast transient response to the compensator. TheFigure 1 Schematic diagram of the compensation scheme for star

connected load with 4-wire supply

LOAD

LOAD

LOAD

Idealcompensator

PCC

v sa

i sc

i sb

i sa

i lc

i lb

i la

v sc

v sbN n

i o

i* fa

i* fb i* fc

n`

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Vol 86, March 2006 299

conventional low pass filter gives poor transient responsetypically about 4-5 cycles5. It is to be noted that any harmoniccomponent in the load does not require any real power from thesource provided source voltages are balanced and sinusoidal.The formulation of equation (9) is thus valid even when the loadcurrent contains harmonics.

Combining equation (1), (5) and (9)

A i P s l * = (10)

where

i i i i P P sT

sa sb sc l T

lav, = 0 0 and A v v vv sb sc

sa sa=

F H G

I K J

LNMM

1 3

v vv

v v vv

v sc sa sb

sb sa sb sc

sc F H G

I K J F H G

I K J OQPP

1 3 1 3

Applying KCL at PCC

i i i i i i i i i sa la fa sb lb fb sc lc fc = = = * * *, , (11)

Using (10)-(11), gives

Ai Ai P f l l * = (12)

where

i i i i i i i i f T

fa fb fc l T

la lb lc * * * * ,= =

Premultiplying both the sides of equation (12) by, A1 gives

i i A P f l l * = 1 (13)

To simplify equation (13) it is noted that

A v v j a b c

sj s= LNM

OQP=3 3

20

2

, ,(14)

where

v v s j a b c

sj 013

= = , ,

Then the equation for generating reference currents is given as

i iv v v v

P

i iv v v v

P

i iv v v v

P

fa la sa s sb sc

lav

fb lb sb s sc sa

lav

fc lc sc s sa sb

lav

*

*

*

= +

= +

= +

U

V|||

W|||

0

0

0

b g b gb g b gb g b g

(15)

where

= = j a b c v v sj s, ,2

02

3

For a balanced supply voltages, v s0 = 0 and equation (15)reduces to

i iv v v

P

i i v v v P

i iv v v

P

fa la sa sb sc

lav

fb lb sb sc sa

lav

fc lc sc sa sb

lav

*

*

*

= +

= +

= +

U

V

|||

W|||

b g

b gb g

(16)

where

= = j a b c

sj v, ,

2

COMPENSATOR STRUCTURE AND MODELLINGTo realize the reference currents described earlier, a suitablecompensator structure is required. In the present work neutralclamped inverter topology9 is used to track the referencecurrents given by equation (16) using two-level voltage sourceinverter as shown in Figure 2(a) and three-level voltage sourceinverter as shown in Figure 2(b). The structure of two-level VSIconsists of six IGBT switches ( S 1 S 6 ), each with anti-paralleldiodes and two dc storage capacitors.

In three-level inverter twelve IGBT switches are used each withanti-parallel diodes. Two additional diodes are also required toprovide useful path for zero voltage level in each leg as shown inFigure 2(b). The compensator is connected to the point of common coupling (PCC) through interfacing inductance L

f with its internal resistance R f . This practical inverter has alsoswitching and other losses.

If the dc storage capacitors are used for VSI operation, they willdischarge in due course of time, due to switching losses in thecompensator. If the voltage across any of these capacitors fallsbelow the peak of system voltage, then the inverter will nottrack the reference currents properly. Therefore for proper

LOAD

LOAD

LOAD

v sa

i sc

i sb

i sa

i lc

i lb

i la

i 1

v sbN n

i fa

i fb i fc

n`

v sc

Rf

Lf

i 2

C2

C1 v c 1

v c 2

S1

S3

S5

S4

S6

S2

a

b c

Figure 2(a) The compensated system with two-level inverter

PCC

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operation of compensator, the total voltage across thecapacitors is to be maintained at the reference voltage level.To achieve this, the term P loss, which is equivalent to switchinglosses and other losses in the inverter should come from thesource in balanced manner. The source therefore should nowsupply average load power P lav and switching losses P loss. Hence,the equation (16) is modified to

i iv v v

P P

i iv v v

P P

i i v v v P P

fa la sa sb sc

lav loss

fb lb sb sc sa

lav loss

fc lc sc sa sb

lav loss

*

*

*

= +

+

= +

+

= + +

U

V|||

W|||

b gb gb gb gb gb g

(17)

To generate P loss term in equation (17), a suitable feedbackcontrol is used, which regulates the total voltage v v vc c c = +1 2across the two capacitors to a reference value 2vcref , (where,vcref is the reference voltage across each capacitor). Theaverage capacitor voltage is held constant if the average value of the dc capacitor current over a cycle is zero. Thus a simpleproportional-plus-integral (PI) controller is chosen as

P K e K edtloss p i

= +

z (18)where, K p and K i are the constants of PI controller ande e e v v vcref c

c y l c c y l = + = +1 2 1 22 e j (19)

In equation (19),e v vcref c c y l

1 1= and e v vcref c c y l

2 2= , wherevcref is the dc voltage to which the capacitors are regulated,vc

c y l 1 , vc

c y l 2 are the values of the voltages across capacitorsC 1

and C 2 at the end of each cycle7.

STATE SPACE MODELLING OF COMPENSATORThe gating signal forS

1in Figure 2(a) is represented by a binary

variableS a. If S a = 1, S 1 is closed, and if S a = 0, S 1 is open. A gating

signal for S 4 is the complementary signal S a . Similarly,S S S S b b c c , , , represents gating signals for switchesS 3, S 6, S 5, S 2,respectively. The switches of the inverter are operated such thatin each leg one of the switches is always gated. Therefore thecurrents i1 and i2 in the input lines of the inverter (Figure 2(a))

can be written in terms of inverter currents and gating signals asfollows

i S i S i S ia fa b fb c fc 1 = + + (20)

i S i S i S ia fa b fb c fc 2 = + + (21)

The voltage source inverter configuration of switchesS 1 to S 6 isoperated in the hysteresis current control mode. When thecurrent i fa hits a pre-calculated lower limit, switchS 1 is closed.The equivalent circuit for this mode is shown in Figure 3. Byapplying KVL around the loop

ddit

R L

iv L

v L

fa f

f fa

c

f

sa

f = + 1 (22)

Similarly, if the current i fa hits a pre-calculated upper limit,switch S 1 is opened andS 4 is closed. An equivalent circuit gives,

ddit

R L

iv L

v L

fa f

f fa

c

f

sa

f = + 2 (23)

Using the binary variablesS a and S a defined above we get from

equations (22) and (23)ddit

R L

i S v L

S v L

v L

fa f

f fa a

c

f a

c

f

sa

f = + 1 2 (24)

Similar equations can be written for other two phases.

By using equations (20)-(21) the following equations can bewritten assuming C 1 = C 2 = C

Figure 2(b) The compensated system with three-level inverter

LOAD

LOAD

LOAD

v sa

i sc

i sb

i sa

i lc

i lb

i la

i 1

v sbN n

i fa

i fb i fc

n`

v sc

Rf

Lf

i 2

C2

C1

v c 1

v c 2

S1a S

1b S 1c

S4a

S4b

S4c

a b

PCC

S2a

S3a

S2b

S3b

S2c

S3c

C1 vc1

C2 vc2 S4(Open)

S1(Closed)

ifa

Lf

Rf

vsa

Figure 3 Equivalent circuit for phase-a when S 1 is closed and S4 is open

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Vol 86, March 2006 301

ddvt

S iC

S iC

S iC

c a

fab

fbc

fc 1 = (25)

ddv

tS

iC

S iC

S iC

c a

fab

fbc

fc 2 = + (26)

From equations (24)-(26), the following state space model isobtained

& x Ax Bu= + (27)

where

x i i i v vt fa fb fc c c = 1 2

A

R L S L S L

R L S L S L

R L S L S L

S C S C S C

S C S C S C

f f a f a f

f f b f b f

f f c f c f

a b c

a b c

=

L

N

MMMMMMM

O

Q

PPPPPPP

/ / /

/ / /

/ / /

/ / /

/ / /

0 0

0 0

0 0

0 0

0 0

B

L

L

L

f

f

f =

L

N

MMMMMMM

O

Q

PPPPPPP

1 0 0

0 1 0

0 0 1

0 0 0

0 0 0

/

/

/

and

u v v vt sa sb sc =

The state space model derived in equation (27) is valid for three-level inverter also, only change is that the switching logic has tobe modified. As shown in Figure 2(b), each leg of the three-levelinverter consists of four switches,ie, S 1a, S 2a, S 3aand S 4a in the legconcerned to phase-a. With this inverter, three levels arepossible, ie, + vc 1, 0 and vc 2. The zero voltage level is anadditional voltage level if compared with two-level inverter.For voltage level + vc 1, S 1a and S 2a are closed whileS 3a and S 4a areopen. Zero voltage level is obtained by opening all the fourswitches. To achieve vc 2 voltage level, the bottom twoswitches,ie, S 3a and S 4a are closed and the top switchesS 1a and S 2aare open.

Though three-level inverter requires more numbers of switchesand diodes comparable to two-level inverter, it has followingsignificant advantages:

l It can be used for high power applications as thesemiconductor devices are subjected to less voltage andcurrent stresses.

l Gives less THD in the source current.

SIMULATION STUDIES AND RESULTS

Using state space model as given in equation (27), the states arecomputed in MATLAB. First the system is initialized and thensystem states are updated. After this, these state variables

i i i fa fb fc , ,e jare compared with reference currents given byequation (17) in a hysteresis band h. If , i i h v fa fa c > +

* ,e j 2voltage level is applied. If i i h v fa fa c < + +

* ,e j 1 voltage level is

Time, s

20

0

200 0.02 0.04 0.06 0.08

ila

ilbilc

L o a d C

u r r e n t s ,

A m p s

(a)

Time, s

10000

4000

2000

4000

0 0.02 0.04 0.06 0.08

W a t

t s a n

d V A r

plp l

q l

ql

Figure 4(a) Load currents which are also the source currents whencompensator is not connected; and (b) active and reactiveload powers

(b)

Table 1 System parameters

System Parameters Values

System voltage 360 V peak (Balanced and sinusoidal)

Load z z za b c = = = 25 0 50 30 100 600 0 0, , ,

3-phase rectifier drawing current of 5 A

Interface impedance R L H f f = =2 0 02, .

dc capacitor 2200mF

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applied. For two-level inverter, if i h i i h fa fa fa* *+ < < +e j e jthen

the status of the switches is retained and for three-level inverter,switches status corresponding to the zero voltage level isproduced.

Based on the above logic, the simulation is carried out and thesimulation results are given below. Consider three-phase, four-wire system as shown in Figure 1. The system parameters forthe simulation studies are given in Table 1. The source voltagesare assumed to be balanced and sinusoidal. The load currentsare unbalanced and non-linear.

When the compensator is not connected, the source currents areequal to the load currents as shown in Figure 4(a). The THD inthe load currents is 8.37%, 13% and 21% for phasesa, b and c,respectively. For this the instantaneous load powers ( pl and ql )and the average load powers ( p ql l and ) are shown in Figure4(b). When the compensator is connected, it gives balanced set

Time, s

15

0

15

0 0.02 0.04 0.06 0.08

isa

S o u r c e c u r r e n t s ,

A m p s

(a)

isb isc

Time, s

15

0

150 0.02 0.04 0.06 0.08

isa

S o u r c e c u r r e n

t s ,

A m p s

(b)

isb isc

Figure 5 Three-phase source currents with (a) two-level inverter; and(b) three-level inverter

Time, s

20

0

20

0 0.02 0.04 0.06 0.08

V o l

t s a n

d A m p s

(a)

vsa /15

isa

Time, s

20

0

20

0 0.02 0.04 0.06 0.08

V o l

t s a n

d A m p s

(b)

vsa /15isa isb isc

Figure 6 Power factor of source current is set to (a) unity; and(b) 0.8 lagging

of source currents inspite of non-linear and unbalanced loadcurrents as shown in Figure 5(a) and Figure 5(b). Figure 5(a) isshowing the source currents by using the two-level inverter andFigure 5(b) is showing for three-level inverter. The THD in thesource currents in case of two-level inverter is 3.71%, 2.87% and1.82% for phasesa, band c, respectively, while in case of three-

level inverter, the THD is 2.08%, 1.59%, 1.46% for phasesa, band c, respectively. It seems that THD in three-level inverter isless than that of two-level inverter. The power factor of sourcecurrent is set to unity as shown in the Figure 6(a). In order to setunity power factor, from (4), = 0 . Substituting this b inequation (17), reference currents are generated and then thesecurrents are tracked. For unity power factor of the sourcecurrent, the active power supplied by the source ( p s ) is constantand it is equal to the average load power ( pl ) as shown inFigure 7(a). Also, source should not supply any reactive power,ie,reactive power supplied by source ( q s ) is zero which is shownin Figure 7(a). The compensator supplies whole reactive load

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Vol 86, March 2006 303

Time, s

7000

0

40000 0.02 0.04 0.06 0.08

W a t

t s a n d

V A r

(a)

plp s = = p lav

q s

Time, s

4000

4000

0 0.02 0.04 0.06 0.08

V A r

(b)

W a t

t s

4000

0

4000

p f =~pl

q f = q l

Figure 7 Active and reactive power supplied by (a) source;

and (b) compensator

Time, s

1200

1160

1120

0 0.2 0.4 0.6 0.8

V o l t s

(a)

vc1 + v c2

Time, s

650

600

550

5000 0.2 0.4 0.6 0.8 1

V o l

t s

(b)

vc2

vc1

Figure 8 (a) Without voltage control; and (b) with voltage control(PI controller)

power ( q f = ql ) and zero oscillating instantaneous active load

power ( p p f l =~ ) as shown in Figure 7(b). The power factor can

also be set to any other desired value. For example if powerfactor of 0.8 is desired, then from equation (4), is 0.433. Forthis, three-phase source currents anda-phase source voltage areshown in Figure 6(b).

The controller is required to maintain the voltage acrosscapacitors to reference value. When controller is not used, thecapacitors will discharge and voltage across them will go onreducing as shown in Figure 8(a). By using PI controller, voltageacross each capacitor is maintained atvcref as shown in Figure8(b).

Transient performance of compensator is evaluated in Figure 9.At the end of fourth cycle the load current in phase c reduces tozero while in phasesa and bonly rectifier load current is presentas shown in Figure 9(a). At the end of eighth cycle, the loadcurrents regain. The compensator source currents are shown inFigures 9(b) and (c). It is seen that inspite of load transient,source currents change sinusoidally with the settling time of half cycle. This ensures fast transient response of thecompensator.

20

0

200 0.08 0.16 0.24

C u r r e n t s ,

A m p s

ilailb

20

0

200 0.08 0.16 0.24

isa

20

0

200 0.08 0.16 0.24

isa isb isc

(a)

(b)

(c)

Time, s

Figure 9 Transient response (a) load currents; (b) source current of phase; and (c) three-phase source currents

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CONCLUSIONSA compensator with two-level and three-level inverter structureis proposed for three-phase, four-wire distribution system. It iscapable of compensating sinusoidal or non-sinusoidal loadcurrents. It can simultaneously correct the power factor tounity. A detailed state space model of the compensator isderived. The paper discusses the use of three-level inverter,which can be used for the high power applications and to reducethe THD in source currents. The scheme discussed here is alsocomputationally simple, as it does not require complicatedtransformations and definition of many powers.

REFERENCES1. T J E Miller (ed). Reactive Power Control in Electric System. JohnWiley, New York, 1982.

2. G Ha and M H Park. Analysis and Control of Active Power Filter withOptimized Injection. IEEE Transaction Power Electronics,vol 4, no 4, 1989,pp 427-433.3. D A Torrey and A Al-Zamel. Single-phase Active Power Filters forMultiple Non-linear Loads. IEEE Transaction Power Electronics,vol 10, no 3,May 1995, pp 263-271.

4. K K Mahapatra, A Ghosh and S R Doradla. An Active HarmonicCurrent Compensator Using Quasi-resonant dc Link Inverter. Proceedingsof CIGRE Regional Meeting on Power Quality-Assessment of Impact,SessionVI, New Delhi, September 1997, pp 80-89.

5. H Akagi, A Nabae and S Atoh. Control Strategy of Active Power Filtersusing Multiple Voltage-Source PWM Converters. IEEE Transaction on Industry Application, vol 22, no 3, 1986, pp 460-465.

6. H Akagi, Y Kanazawa and A Nabae. Instantaneous Reactive PowerCompensator Comprising Switching Devices without Energy StorageComponents. IEEE Transaction on Industry Application,vol 20, no 3, 1984,pp 625-630.

7. A Ghosh and A Joshi. A New Approach for Load Balancing and PowerFactor Correction in Power Distribution System. IEEE Transaction Power Delivery,vol 15, no 1, January 2000, pp 417-422.

8. A Ghosh and A Joshi. A New Method for Load Balancing and PowerFactor Correction using Instantaneous Symmetrical Components. IEEE Power Engineering Review, vol 18, no 9, 1998, pp 60-62.

9. M K Mishra, A Ghosh and A Joshi. A New STATCOM Topology toCompensate Loads Containing ac and dc Components. IEEE Winter Power Meeting,Singapore, 2000.APPENDIX

By rewriting equation (3)

tan ( / ) tan ( / ) = +1 1 21

3 4 K K K K (A.1)

where

K v v sb sc 13

2= c h, K v v v v sa sb sc sa2 2 2

32

= =

K i i sb sc 33

2= c h, K i i i i sa sb sc sa4 2 2

32

= =

From (A.1)

tan tan ( / ) tan tan ( / ) = +1 1 21

3 4 K K K K { } { } (A.2)By solving (A.2)

K K

K K K K

1

2

3 4

3

41

=+

/ tan

tan

b g

(A.3)

Putting values of K 1, K 2, K 3 and K 4 in (A.3), gives

V vv

i i i i i

i i i i i sb sc

sa

sb sc sa sb sc

sa sb sc sb sc

=

+

+3

3 2 2 2

2 3 3

c h

(A.4)

where

tan / 3

By solving (A.4), gives

v v v i v v v i v v v i sb sc sa sa sc sa sb sb sa sb sc sc + + = c h c h c h0 (A.5)

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