DSP Intro Slides

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    1-1LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    What Is DSP?

    a bit loudAnalog Computer

    Digital Computer

    ADC

    DSP

    DAC OUTPUT

    1010 1001

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    1-2LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    A Typical DSP System

    DSP Chip

    Memory

    Converters (Optional) Analog to Digital

    Digital to Analog

    Communication Ports Serial Parallel

    DSP

    MEMORY

    ADC

    PORTS

    DAC

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    1-3LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Multiply and Add

    Most Common Operation in DSP

    A = B*C + D

    Multiply, Add, and Accumulate

    E = F*G + A

    ..

    .

    MAC Instruction

    1+2 = 3

    +

    0001

    0010

    0011

    Add Multiply5*3 = 15

    Typically 70 Clock Cycles WithOrdinary Processors

    MAC Operation

    0101

    xxxx

    8421

    0011001100110011

    xxxx

    00000011

    00000011

    =5 3

    Shifted and

    addedmultiple times

    Typically 1 Clock Cycle WithDigital Signal Processors

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    1-4LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Drop in Multiplication Times

    0

    100

    200

    300400

    500

    600

    1971 1976 1998

    YEARS

    TIME (ns)

    5 ns

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    1-5LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Digital Computers

    STOREDPROGRAM

    ANDDATA

    ARITHMETICLOGIC

    UNIT

    INPUT/

    OUTPUT

    von Neuman Machine

    Harvard Architecture

    STOREDPROGRAM

    ARITHMETICLOGIC

    UNIT

    INPUT/

    OUTPUTSTORED

    DATA

    A

    DD

    D

    AA

    A = ADDRESS

    D = DATA

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    1-6LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    An ExampleTMS320C31 Architecture

    P = PROGRAM D = DATA

    D31-D0

    A23-A0

    DMA SERIALPORT 0

    TIMER 1

    TIMER 0

    RAM 01K x 32

    CACHE64 x 32

    RAM 11K x 32

    7 SEPARATE BUSES ( P / D )

    MULTIPLIER ADDER

    MULTIPLEXER

    PERIPHE

    RAL

    BUS

    (P\D)

    FLOATING POINT ARITHMETICLOGIC UNIT

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    1-7LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    DSP Development

    DSP

    ASSEMBLER

    HIGH-LEVEL LANGUAGE

    EMULATOR

    ADD A, B

    Tools of the Trade

    TEST

    S/W DESIGN

    OK?

    Y

    N

    PRODUCT

    CODE

    11100010010100001001

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    1-8LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Why Digital Processing?

    Advantages to Digital Processing

    Programmability

    Stability

    Repeatability

    Special Applications

    ADC DACPROCESS

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    1-9LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    One Hardware = Many Tasks

    Upgradability and Flexibility Develop New Code Upgrade Analog Solder New Component

    Programmability

    LOW-PASS FILTER

    MUSIC SYNTHESIZER

    MOTOR CONTROL

    SOFTWARE 1

    SOFTWARE 2

    SOFTWARE N

    SAMEHARDWARE.

    ...

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    1-10LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Analog Variability

    Analog Circuits are affected byTemperature

    Aging

    Tolerance of ComponentsTwo Analog Systems using the same design andcomponents may differ in performance

    1k + 10 years = 1.1k

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    1-11LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Digital Repeatability

    Perfect Reproducibility Nearly identical performance from unit to unit

    Performance not affected by tolerance

    No drift in performance due to temperature or aging

    Guaranteed accuracy

    A CD player always plays the same musicquality

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    1-12LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Performance

    Some special functions are best implemented digitally

    f

    f1 f2

    phase

    frequency

    gain

    frequency

    Lossless Compression

    Linear Phase Filters Adaptive Filters

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    1-13LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Practical DSP Systems

    Hi-Fi Equipment

    Toys

    VideophonesModems

    Phone Systems

    3D Graphics

    Image Processing

    And More ...

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    1-14LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Analog Advantages

    Low cost and simplicity in some applications Attenuators/amplifiers

    Simple filters

    Wide bandwidth (GHz) Low signal levels

    Infinite effective sampling rate Infinite resolution in frequency

    No aliasing/reconstruction issues

    Infinite resolution in amplitude No quantitation noise

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    1-15LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Digital Signal Processing (DSP)

    Advantages Repeatability

    Low sensitivity to component tolerances

    Low sensitivity to temperature changes

    Low sensitivity to aging effects

    Nearly identical performance from unit to unit

    Matched circuits cost less

    High noise immunity

    In many applications DSP offers higher

    performance and lower cost CD players versus phonographic turntable

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    1-16LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Analogs Place in DSP

    Most transducers are analog by nature Microphones, speakers, etc.

    Analog circuits are required to pre-process low

    level signals before ADC Analog filters may be required to limit the

    bandwidth of signals Anti-alias (before ADC) and reconstruction filters (after

    DAC) Analog circuits may be required to drive output

    transducers A power amplifier is required to enable a DAC to drive

    a speaker

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    1-17LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Number Systems Represent numbers digitally

    Decimal 3 in binary

    Any number can be represented as a series of 1s and 0s

    Decimal 26 in binary

    Decimal 128 64 32 16 8 4 2 1

    2DigitNumber 27 26 25 24 23 22 21 20

    DigitNumber 7 6 5 4 3 2 1 0

    Decimal 0 0 016+ 8+ 02= 0 26

    2DigitNumber 27 26 25 24 23 22 21 20

    DigitNumber 7 6 5 4 3 2 1 0

    Binary 0 0 0 1 1 0 1 000011010

    Decimal 0 0 0 0 0 0 2+ 1= 3

    2Digit Number

    27

    26

    25

    24

    23

    22

    21

    20

    Digit Number 7 6 5 4 3 2 1 0

    Binary 0 0 0 0 0 0 1 1 0000 0011

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    1-18LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Binary and Hex

    Decimal 0,1,2,.,9

    Binary 0,1Hex 0,1,2,..,A,B,C,D,E,F

    16 Decimal 0x10 Hex20 Decimal 0x14 Hex

    4 bits of binary system is represented by a single hex digit

    Decimal 26 in binary and hex

    Decimal 8+ 4+ 2+ 1=15

    2DigitNumber 23 22 21 20

    Binary 1 1 1 1 1111

    Hex F F

    Decimal 0 0 016+ 8+ 02= 0 26

    2DigitNumber 27 26 25 24 23 22 21 20

    Digit Number 7 6 5 4 3 2 1 0

    Binary 0 0 0 1 1 0 1 000011010

    Hex 1 A 1A

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    1-19LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Signed Integers

    Signed magnitude integers

    Signed

    BinaryDecimalHex

    Sign Number

    2 00000002 0 0000000000000000000000000000010

    3 00000003 0 0000000000000000000000000000011

    -2 80000002 1 0000000000000000000000000000010

    -3 80000003 1 0000000000000000000000000000011

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    1-20LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Twos Complement Notation

    2Digitnumber -27 26 25 24 23 22 21 20

    Decimal -128 64 32 16 8 4 2 1

    Binarytwoscomplement 3 0 0 0 0 0 0 1 1

    Decimal

    calculation0 0 0 0 0 0 +2 +1= 3

    Binary

    twoscomplement-2 1 1 1 1 1 1 1 0

    Decimal

    calculation-128 +64 +32 +16 +8 +4 +2 +0= -2

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    1-21LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Twos Complement

    Conversion to twos complement notation

    Twos complement addition

    BinaryAction Decimal

    Sign Number

    Signedinteger -2 1 0000000 000000000000000000000010

    Stripsignbit 0 0000000 000000000000000000000010

    Invert 1 1111111 111111111111111111111101

    Addone 1 1

    Twoscomplement 1 1111111 111111111111111111111110

    Hex F F F F F F F E

    TwosComplementBinaryDecimal HexSign Number

    -2 FFFFFFFE 1 1111111 111111111111111111111110

    3 00000003 0 0000000 000000000000000000000011

    -2+3=1 00000001 0 0000000 000000000000000000000001

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    1-22LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Fixed-Point NotationConventions

    Number range is between 1 and -1 Decimal point is always in a fixed location (e.g., 0.74, 0.34, etc.) Multiplying a fraction by a fraction always results in a fraction and will

    not produce an overflow (e.g., 0.99 x 0.9999 = less than 1) Successive additions may cause overflow

    Why?

    Signal processing is multiplication-intensive Fixed-point notation prevents overflow (useful with a small dynamic

    range) Fixed-point notation is less expensive

    How is fixed-point notation realized in a DSP? Most fixed-point DSPs are 16 bits

    The range of numbers that can be represented is 32767 to -32768 The most common fixed-point format is Q15

    Q15 Notation

    Bit15 Bits14to0

    sign twoscomplementnumber

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    1-23LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Q15 Format

    Dynamic range in Q15

    Number representations in Q15

    Rules for operationsAvoid operations with numbers larger than 1

    2.0 x (0.5 x 0.45) = (0.2 x 0.5 x 0.45) x 10 = (0.5 x 0.45) + (0.5 x 0.45)

    Scale numbers before the operation

    0.5 in Q15 = 0.5 x 32767 =16384

    Number Biggest Smallest

    Fractional number 0.999 -1.000

    ScaledintegerforQ15 32767 -32768

    Decimal Q15=Decimalx215 Q15Integer

    0.5 0.5x32767 16384

    0.05 0.05x32767 1638

    0.0012 0.0012x32767 39

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    1-24LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Q15 Operations

    Addition

    Multiplication

    2 x 0.5 x 0.45 =

    Decimal Q15 Scaleback

    Q15/ 32767

    0.5+0.05=0.55 16384+1638=18022

    0.55

    0.50.05=0.45 163841638=

    Decimal Q15 BacktoQ15

    Product/ 32767

    Scaleback

    Q15/ 32767

    0.5x0.45=0.225 16384x14745=

    241584537

    7373

    0.225+0.225=0.45 7373+7373=

    14746

    0.45

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    1-25LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    TMS Floating-Point Format

    Conversion equationsBinary Decimal Equation

    s = 0 X = 01.f x 2e

    X = 01.f x 2e 1

    s = 1 X = 10.f x 2e

    X = ( -2 + 0.f ) x 2e 2

    Special cases = 0 X = 0 e = -128

    e = exponent is a signed twos compliment 8-bit field and determinesthe location of the binary Q point

    s = sign of mantissa (s = 0 positive, s =1 negative)

    f = fractional part of the mantissa; an implied 1.0 is added to this fractionbut is not allocated in the bit field since this value is always present

    TMS single-precision floating-point format31 ... 24 23 22 .............. 0

    e s f

    8 bits 1 bit 23 bits

    Bit No

    Exponent (e)

    Hextwos comp. 00 01 7F FF 80

    Decimal 1 127 -1 -1280

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    1-26LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Floating-Point Numbers

    Calculate 1.0e0In hex 00 00 00 00In binary 0000 0000 0000 0000 0000 0000 0000 0000

    s = 0 Equation 1 applies: X = 01.f x2e

    01.0 x 20 = 1.0

    e = 0

    f = 0

    Calculate 1.5e01In hex 03 70 00 00

    In binary 0011 0111 0000 0000 0000 0000 0000 0000s = 0 Equation 1 applies: X = 01.f x2e

    0011 e = 3s111 f = 0.5 + 0.25 + 0.125 = 0.875

    X = 01.875 x 23

    = 15.0 decimal

    ...

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    1-27LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    More on Floating Point

    Calculate -2.0e0In hex 00 80 00 00In binary 0000 0000 1000 0000 0000 0000 0000 0000

    s = 1 Equation 2 applies: X = ( -2.0 + 0.f ) x 2e

    ( -2.0 + 0.0 ) x 20 = -2.0

    e = 0

    f = 0

    Addition

    1.5 + (-2.0) = 0.5

    Multiplication1.5e00 x 1.5e01 = 2.25e01 = 22.5

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    1-28LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Dynamic Range

    Numbers Base 2 Decimal

    TwosComplement

    Hex

    Largest Integer 231

    - 1 2 147 483 647 7F FF FF FF

    Smallest Integer - 231 -2 147 483 648 80 00 00 00

    Largest Q15 215

    - 1 32 767 7F FF

    Smallest Q15 - 215 -32 768 80 00

    Largest Floating Point ( 2 - 2-23

    ) x 2127

    3.402823 x 1038 7F 7F FF FD

    Smallest Floating Point -2 x 2127

    -3.402823 x 1038 83 39 44 6E

    Ranges of number systems

    The dynamic range of floating-point representation is very large Conclusion

    Largest integer x (1.5 x 10 29 ) ~ = largest floating point

    Largest Q15 x (1.03 x 10 34 ) ~ = largest floating point

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    1-29LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Fixed vs. Floating Point

    Characteristic Floating point Fixed point

    Dynamic range much larger smaller

    Resolution comparable comparable

    Speed comparable comparable

    Ease of programming much easier more difficult

    Compiler efficiency more efficient less efficient

    Power consumption comparable comparable

    Chip cost comparable comparable

    System cost comparable comparable

    Design cost less more

    Time to market faster slower

    Comparison

    DSP devices are designed as floating point or fixed point

    Fixed-point devices are usually 16-bits, e.g. TMS320C5x Floating-point devices are usually 32-bits, e.g. TMS320C3x Floating-point devices usually have a full set of fixed-point instructions Floating point devices are easier to program Fixed-point devices can emulate floating point in software

    S

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    1-30LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    TMS320 Family

    16-Bit Fixed Point Devices

    C1x Hard-Disk Controllers

    C2x Fax Machines

    C2xx Embedded Control

    C5x Voice Processing

    C54x Digital CellularPhones

    32-Bit Floating Point Devices

    C3x Videophones

    C4x Parallel Processing

    Other Devices

    C6x Advanced VLIWProcessor

    Wireless BaseStations/PooledModems

    C8x Video Conferencing

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    1-31LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    TMS320C54x Architecture

    Tregister

    A(40) B(40)

    Multiplier (17y17)

    Fractional

    0

    er

    ystemcontrointerface

    rograma ressgeneratonogc

    ataa ressgeneratonogc

    PC, IPTR, RC,, ,

    ARAU0, ARAU1AR0-AR7

    ARP, BK, DP, SP

    Memoryan

    externainterface

    erp eranterace

    Sign ctr Sign ctr

    MUX

    gn ctr gn ctr gn ctr

    Barrel

    MUX

    TR

    select

    CAB D

    BAAB

    A Accumulator AB Accumulator B

    ata usata us

    E EBdatabusM MACunitP PBprogrambus

    arre s terregster

    egen

    E

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    1-32LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    ALU Functional Diagram

    MUX

    CB15 - CB0

    DB15 - DB0

    MUX

    Sign ctr

    40

    Sign ctr

    40

    MUX

    A B

    ACCALU

    Y X

    SXM

    40

    4040

    Shifter output (40)

    OVM

    C16

    C

    OVA/OVB

    TC

    SXM

    ZA/ZB

    T

    A B T DC S

    MACoutput

    A M U B A Accumulator AB Accumulator BC CB data busD DB data busM MAC unitS Barrel shifterT T registerU ALU

    Legend:

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    1-33LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Two C54x Memory Maps

    8000h

    2000h

    4000h

    6000h

    C000h

    E000h

    FFFFh

    0000h External

    On-chip DARAM

    ReservedOVLY=1

    OVLY=0

    0000h-007Fh

    '541 Data Memory'541 Program Memory

    0080h-13FFh

    0000h-13FFh

    In terrupt vec tors(ex ternal )

    ExternalMP/ MC =1 9000h-FF7Fh

    FF80h-FFFFh

    MP/ MC =0 On-chip ROM9000h-FF7Fh

    I n t e r ru p t v e c t o r s(internal)

    FF80h-FFFFh

    8000h

    A000h

    2000h

    4000h

    6000h

    C000h

    E000h

    FFFFh

    0000h

    External1400h-8FFFh

    0000h-005Fh

    0060h-007Fh

    0080h-13FFh On-chip DARAM

    Scratch-pad DARAM

    Memory-mapped regis ters

    External1400h-DFFFh

    External

    Reserved

    DROM=1

    DROM=0

    E000h-FEFFh

    FF00h-FFFFh

    E000h-FFFFh

    On-chip ROM

    A000h

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    1-34LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Direct Addressing Block Diagram

    Data bus EB(16)

    CPL

    Data bus DB(16)

    SP(16)

    DP(9)

    7 LSBs from IR (dma)

    EA = SP + offset(IR)

    EA = DP : offset(IR)

    DAGEN

    DAB(16) (read)

    EAB(16) (write)or

    CAB(16)

    (32-bit read)

    1

    0

    CPL

    Legend: EA Effect ive address

    IR Instruction register

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    1-35LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    C54x Program Memory

    PAGEN

    R C

    Repeat registers

    B R C

    RSA

    REA

    PC

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    1-36LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    C54x Pipeline

    Prefetch Fetch Decode Access Read Execute/write

    L o a d s P B w i t h t h e

    f e t c h e d i n s t r u c t i o nw o r d

    L o a d s P A B w i t ht h e P C ' s c o n t e n t s

    L o a d s I R w i t h t h e c o n t e n t so f P BD e c o d e s t h e I R ' s c o n t e n t s

    L o a d s D B w i t h t h e d a t a 1r e a d o p e r a n dL o a d s C B w i t h t h e d a t a 2r e a d o p e r a n dL o a d s E A B w i t h t h e d a t a 3w r it e a d d r e s s , i f r e q u i r e d

    L o a d s D A B w i t h t h e d a t a 1 r e a d

    a d d r e s s , if r e q u i r e dL o a d s C A B w i t h t h e d a t a 2 r e a da d d r e s s , if r e q u i r e dU p d a t e s a u x i l i a r y r e g i s t e r s a n ds t a c k p o i n t e r

    E x e c u t e s t h e i n s t r u c t io n

    a n d l o a d s E B w i t h w r i t ed a t a

    Time

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    1-37LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    Serial Port Interface Block

    Diagram

    B y t e / w o r dc o u n t e r( C l o c k )

    ( C l e a r )( C l e a r )

    ( C l o c k )

    D a t a B u s

    L o a dc o n t r o l

    l o g i c

    L o a dC o n t r o l

    L o g i c

    D R R ( 1 6 )

    R S R ( 1 6 )

    B y t e / w o r dc o u n t e r

    X S R ( 1 6 )

    D X R ( 1 6 )

    F S X

    C L K XC L K R

    F S R

    ( L o a d )

    ( L o a d )

    16

    16

    16

    16R I N T o n

    R S R - D R Rt r a n s f e r

    X I N T o nD X R - X S Rt r a n s f e r

    DXDR

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    1-38LECTURE 1Copyright 1998, Texas Instruments Incorporated All Rights Reserved

    C54x External Bus Interface

    EB WriteCB/DB Reads

    PB Fetch

    FetchReadReadWriteD(15 - 0)

    A(22 - 0)

    CLKOUT