DS89C430/DS89C450 Ultra-High-Speed Flash Microcontrollers

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  • 1. DS89C430/DS89C450Ultra-High-Speed Flash Microcontrollers www.maxim-ic.com GENERAL DESCRIPTIONFEATURES The DS89C430 and DS89C450 offer the highest High-Speed 8051 Architecture performanceavailablein8051-compatible One Clock-Per-Machine Cycle microcontrollers. They feature newly designed DC to 33MHz Operation processor cores that execute instructions up to 12Single Cycle Instruction in 30ns times faster than the original 8051 at the same Optional Variable Length MOVX to Access crystal speed. Typical applications will experience a Fast/Slow Peripherals speed improvement up to 10x. At 1 million Dual Data Pointers with Automatic instructions per second (MIPS) per megahertz, the Increment/Decrement and Toggle Select microcontrollers achieve 33 MIPS performance from Supports Four Paged Memory-Access Modes a maximum 33MHz clock rate. On-Chip Memory 16kB/64kB Flash Memory The DS89C440 is a 32kB version of the DS89C450 In-Application Programmable that is no longer available. The DS89C450 can be In-System Programmable Through Serial Port used as a drop-in replacement. 1kB SRAM for MOVX The Ultra-High-Speed Flash Microcontroller Users Guide should be used in conjunction with this data sheet. Download it at 80C52 Compatible www.maxim-ic.com/microcontrollers.8051 Pin and Instruction Set Compatible Four Bidirectional, 8-Bit I/O Ports ORDERING INFORMATIONThree 16-Bit Timer Counters 256 Bytes Scratchpad RAMFLASHPARTPIN-PACKAGEMEMORY SIZEPower-Management ModeDS89C430-MNL 16kB 40 PDIPProgrammable Clock DividerDS89C430-MNL+16kB 40 PDIPAutomatic Hardware and Software ExitDS89C430-QNL 16kB 44 PLCCDS89C430-QNL+16kB 44 PLCCROMSIZE FeatureDS89C430-ENL 16kB 44 TQFPSelects Internal Program Memory Size fromDS89C430-ENL+16kB 44 TQFP0 to 64kBContact factory or replace withAllows Access to Entire External Memory MapDS89C440-xxxDS89C430 or DS89C450.Dynamically Adjustable by SoftwareDS89C450-MNL 64kB 40 PDIP Peripheral FeaturesDS89C450-MNL+64kB 40 PDIPDS89C450-QNL 64kB 44 PLCC Two Full-Duplex Serial PortsDS89C450-QNL+64kB 44 PLCCProgrammable Watchdog TimerDS89C450-ENL 64kB 44 TQFP13 Interrupt Sources (Six External)DS89C450-ENL+64kB 44 TQFPFive Levels of Interrupt Priority Power-Fail Reset + Denotes a lead-free/RoHS-compliant device. Early Warning Power-Fail Interrupt Complete Selector Guide appears at end of data sheet. Electromagnetic Interference (EMI) Reduction Pin Configurations appear at end of data sheet. APPLICATIONS Data Logging Telephones Building Energy UninterruptibleAutomotive Text Industrial Control Control and Power Supplies Equipment and Automation White GoodsHVAC Management Motor ControlVendingProgrammableBuilding SecurityConsumer Logic Controllers and Door AccessElectronics MagstripeGaming Control Reader/Scanner Equipment Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata. 1 of 49 REV: 040507

2. DS89C430/DS89C450 Ultra-High-Speed Flash MicrocontrollersABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground-0.3V to (VCC + 0.5V) Voltage Range on VCC Relative to Ground..-0.3V to +6.0V Ambient Temperature Range (under bias)-40C to +85C Storage Temperature Range.-55C to +125C Soldering TemperatureSee IPC/JEDEC J-STD-020Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = 4.5V to 5.5V, TO = -40C to +85C.) (Note 1)PARAMETER SYMBOLMINTYP MAXUNITSSupply Voltage (Notes 2, 3) VCC 4.55.0 5.5 V Power-Fail Warning (Notes 2, 4) VPFW4.2 4.3754.6 V Reset Trip Point (Min Operating Voltage) (Notes 2, 3, 4)VRST3.954.125 4.35 V Supply Current, Active Mode (Note 5) ICC75 110 mA Supply Current, Idle Mode at 33MHz (Note 6) IIDLE 40 50mA Supply Current, Stop Mode, Bandgap Disabled (Note 7)ISTOP 1100A Supply Current, Stop Mode, Bandgap Enabled (Note 7) ISPBG150 300A Input Low Level (Note 2) VIL-0.3+0.8 V Input High Level (Note 2)VIH2.0VCC + 0.3 V Input High Level XTAL and RST (Note 2)VIH23.5VCC + 0.3 V Output Low Voltage, Port 1 and 3 at IOL = 1.6mA (Note 2)VOL10.150.45 V Output Low Voltage, Port 0 and 2, ALE, PSEN at IOL = 3.2mA VOL20.150.45 V (Note 2) Output High Voltage, Port 1, 2, and 3, at IOH = -50A VOH12.4V (Notes 2, 8) Output High Voltage, Port 1, 2, and 3 at IOH = -1.5mA (Notes 2, 9)VOH22.4V Output High Voltage, Port 0, 1, 2, ALE, PSEN, RD, WR in Bus VOH32.4V Mode at IOH = -8mA (Notes 2, 10) Output High Voltage, RST at IOL = -0.4mA (Note 2, 11) VOH42.4V Input Low Current, Port 1, 2, and 3 at 0.4VIIL-50 A Transition Current from 1 to 0, Port 1, 2, and 3 at 2V (Note 12) ITL -650 A Input Leakage Current, Port 0 in I/O Mode and EA (Note 13)IL-10+10A Input Current, Port 0 in Bus Mode (Note 14) IL -300 +300A RST Pulldown Resistance (Note 13) RRST 50120 200k2 of 48 3. DS89C430/DS89C450 Ultra-High-Speed Flash MicrocontrollersNote 1:Specifications to -40C are guaranteed by design and not production tested. Note 2:All voltages are referenced to ground. Note 3:The user should note that this part is tested and guaranteed to operate down to 4.5V (10%) and that VRST (min) is specified belowthat point. This indicates that there is a range of voltages [(VMIN to VRST (min)] where the processor's operation is not guaranteed, butthe reset trip point has not been reached. This should not be an issue in most applications, but should be considered when properoperation must be maintained at all times. For these applications, it may be desirable to use a more accurate external reset. Note 4:While the specifications for VPFW and VRST overlap, the design of the hardware makes it so this is not possible. Within the rangesgiven, there is guaranteed separation between these two voltages. Note 5:Active current is measured with a 33MHz clock source driving XTAL1, VCC = RST = 5.5V. All other pins are disconnected. Note 6:Idle mode current is measured with a 33MHz clock source driving XTAL1, VCC = 5.5V, RST at ground. All other pins aredisconnected. Note 7:Stop mode is measured with XTAL and RST grounded, VCC = 5.5V. All other pins are disconnected. Note 8:RST = 5.5V. This condition mimics the operation of pins in I/O mode. Note 9:During a 0-to-1 transition, a one shot drives the ports hard for two clock cycles. This measurement reflects a port pin in transitionmode. Note 10: When addressing external memory. Note 11: Guaranteed by design. Note 12: Ports 1, 2, and 3 source transition current when pulled down externally. The current reaches its maximum at approximately 2V. Note 13: RST = 5.5V. Port 0 is floating during reset and when in the logic-high state during I/O mode. Note 14: This port is a weak address holding latch in bus mode. Peak current occurs near the input transition point of the holding latch atapproximately 2V.3 of 48 4. DS89C430/DS89C450AC CHARACTERISTICS (VCC = 4.5V to 5.5V, TO = -40C to +85C.) (See Figure 1, Figure 2, and Figure 3.)1-CYCLE 2-CYCLE4-CYCLE PAGE MODE 2NONPAGE MODE PARAMETER SYMBOLPAGE MODE 1PAGE MODE 1PAGE MODE 1UNITSMIN MAX MIN MAXMIN MAXMIN MAX MIN MAX System Clock External1/tCLCL0 330 33 0 33 033 033Oscillator (Note 15)MHzSystem Clock External Crystal1/tCLCL1 331 33 1 33 133 133(Note 15) 0.5tCLCL - 2 tCLCL - 22tCLCL - 41.5tCLCL - 51.5tCLCL - 5 nsALE Pulse Width (Note 16)tLHLL+ tSTC3 + tSTC3+ tSTC3+ tSTC3 + tSTC3 Port 0 Instruction Address Valid ns tAVLL tCLCL - 30.5tCLCL - 3to ALE Low Port 2 Instruction Address Valid nstAVLL20.5tCLCL - 40.5tCLCL - 41.5tCLCL - 40.5tCLCL - 4 tCLCL - 4to ALE Low Port 0 Data AddressValid to tCLCL - 3 + 0.5tCLCL - 3 nstAVLL3ALE LowtSTC3+ tSTC3 Program Address Hold After ns tLLAX0.5tCLCL - 81.5tCLCL - 82.5tCLCL - 81tCLCL - 10 1tCLCL - 10ALE Low Address Hold after ALE Low0.5tCLCL - 81.5tCLCL - 82.5tCLCL - 80.5tCLCL - 80.5tCLCL - 8 nstLLAX2MOVX Write+ tSTC4 + tSTC4+ tSTC3+ tSTC2 + tSTC2 Address Hold after ALE Low0.5tCLCL - 81.5tCLCL - 82.5tCLCL - 80.5tCLCL - 80.5tCLCL - 8 nstLLAX3MOVX Read + tSTC4 + tSTC4+ tSTC3+ tSTC3 + tSTC2ALE Low to Valid Instruction IntLLIV 2tCLCL - 62tCLCL - 6ns ALE Low to PSEN LowtLLPL1.5tCLCL - 60.5tCLCL - 2 nsPSEN Pulse Width for Program ns tPLPH tCLCL - 5 tCLCL - 52tCLCL - 5 tCLCL - 5 2tCLCL - 5Fetch 4 of 48 5. DS89C430/DS89C450 Ultra-High-Speed Flash MicrocontrollersAC CHARACTERISTICS (continued) (VCC = 4.5V to 5.5V, TO = -40C to +85C.) (See Figure 1, Figure 2, and Figure 3.)1-CYCLE2-CYCLE 4-CYCLE PAGE MODE 2NONPAGE MODE PARAMETER SYMBOLPAGE MODE 1PAGE MODE 1 PAGE MODE 1 UNITS MIN MAXMIN MAXMIN MAXMIN MAXMINMAX PSEN Low to Valid InstructionnstPLIVtCLCL - 20tCLCL - 20 2tCLCL - 20 tCLCL - 202tCLCL - 20In Input Instruction Hold After nstPXIX 00 000PSEN Input Instruction Float AfternstPXIZtCLCL - 5tCLCL - 5PSEN Port 0 Address to ValidnstAVIV0 1.5tCLCL - 223tCLCL - 22Instruction In Port 2 Address to ValidnstAVIV2 tCLCL - 20 1.5tCLCL - 20 2.5tCLCL - 203tCLCL - 203.5tCLCL - 20Instruction In PSEN Low to Port 0 Address nstPLAZ 0 0Float RD Pulse Width (P3.7)tCLCL - 5tCLCL - 52tCLCL - 5 2tCLCL - 5 2tCLCL - 5nstRLRH(Note 16) + tSTC1+ tSTC1+ tSTC1+ tSTC1+ tSTC1 WR Pulse Width (P3.6)tCLCL - 5tCLCL - 52tCLCL - 5 2tCLCL - 5 2tCLCL - 5nstWLWH(Note 16) + tSTC1+ tSTC1+ tSTC1+ tSTC1+ tSTC1 RD (P3.7) Low to Valid Data In tCLCL - 18 tCLCL - 18 2tCLCL - 182tCLCL - 182tCLCL - 18 nstRLDV(Note 16) + tSTC1+ tSTC1 + tSTC1+ tSTC1+ tSTC1Data Hold After RD (P3.7) tRHDX 00 000 ns Data Float After RD (P3.7)tRHDZtCLCL - 5tCLCL - 5nsMOVX ALE Low to Input Data2tCLCL - 82tCLCL - 5 nstLLDVValid (Note 16) + tSTC1+ tSTC15 of 48 6. DS89C430/DS89C450 Ultra-High-Speed Flas