DIX4192EVM-PDK User's Guide · User's Guide SBOU037– June 2006 DIX4192EVM-PDKUser's Guide ......

User's GuideSBOU037–June 2006

DIX4192EVM-PDK User's Guide

This user’s guide provides a reference document for the DIX4192EVM-PDK productdevelopment kit. The kit includes a DIX4192EVM daughterboard as well as a DAIMBmotherboard. Together, the daughter and mother boards form a modular platform forevaluating the function and performance of the Texas Instruments’ DIX4192 integratedcircuit. Applications software is provided with the PDK for writing and reading registersand data buffers integral to the DIX4192 device. The software communicates with thedevice under test using the USB slave interface on the DAIMB board. The softwarerequires a host PC running the Microsoft Windows™ 2000 or XP operating system.

Throughout this document, the acronym EVM and the phrase evaluation module aresynonymous with the DIX4192EVM. The acronym PDK refers to the daughterboardEVM and DAIMB motherboard combination. This document includes informationregarding absolute operating conditions, hardware configuration, and softwareinstallation and operation. Complete electrical schematics and a bill of materials forboth the EVM and the DAIMB boards are also included.

Contents1 Introduction .......................................................................................... 22 Quick Start........................................................................................... 33 Software Overview, Installation, and Operation ................................................ 94 Hardware Reference.............................................................................. 14

List of Figures

1 Illustration of the PDK Platform Utilizing a DAIMB Motherboard and aDaughterboard EVM ............................................................................... 2

2 Power-Supply Jumper Configuration (DAIMB Motherboard) ................................. 53 PDK Power, Host, and Input/Output Connections ............................................. 84 Applications Software Window (USB Serial Commander)................................... 105 Example of a Readback Display and Break Message in the USB Serial Commander

Application ......................................................................................... 126 Electrical Schematic: DIX4192EVM Daughterboard.......................................... 157 Electrical Schematic: DAIMB Motherboard, .......................................... 168 Electrical Schematic: DAIMB Motherboard, Page 2 .......................................... 17

List of Tables

1 Absolute Operating Conditions ................................................................... 42 Jumper JMP2 Configuration (EVM Daughterboard) ........................................... 53 Jumper JMP3 Configuration (EVM Daughterboard) ........................................... 54 Jumper JMP4 Configuration (EVM Daughterboard) ........................................... 55 Jumper JMP1, RX4 Input Selection (EVM Daughterboard)................................... 66 Audio Serial Port Slave/Master Switch Configuration (DAIMB Motherboard) .............. 67 USB SPI PortConfiguration (DAIMB Motherboard) ............................................ 6

I2C, I2S are trademarks of Koninklijke Philips Electronics N.V.Windows is a trademark of Microsoft Corporation.SPI is a trademark of Motorola, Inc.NI-VISA is a trademark of National Instruments.TOSLINK is a trademark of Toshiba Corporation.WinZip is a trademark of WinZip International, LLC.All other trademarks are the property of their respective owners.

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1 Introduction

PORT C

PORT D

TX1

110W

Power

Adapter +5V VIO EXT SPI EXT I C and DIO2

USB

PORT A

PORT B

RX1

110W

RX1

75W

RX2

75W

RX3

75W

RX4

75W

OPTICAL

IN

LOGIC

IN

EXT

MCLK1

EXT

MCLK2

LOGIC

OUT

OPTICAL

OUT

TX1

75W

75W

TX2

TX3

75W

TX4

75WDAIMB

(Motherboard)

EVM

(Daughterboard)

J1

J2

J5

J6

J7

J8

J9

U9J10

J17 J18

J3

J4

J12

J13

J14

J15

J11

J16U13

J19

J20 J21 J22 J23

J24

JA JB

JC JD

JF

HOST I/O

PORTS

A and B

PORTS

C and D

DAI

IN

DAI

OUT

JE

POWER

Introduction

8 MCLK1 Clock Source Selection (DAIMB Daughterboard) .................................... 79 MCLK2 Clock Source Selection (DAIMB Daughterboard) .................................... 710 DIX4192 Control Port Mode Configuration (EVM Daughterboard)........................... 711 I2C 7-Bit Slave Address Configuration (EVM Daughterboard)................................ 812 SPI Command Syntax ............................................................................ 1213 I2C Command Syntax............................................................................. 1314 Bill of Materials for the DIX4192EVM .......................................................... 1815 Bill of Materials for the DAIMB .................................................................. 19

The DIX4192EVM-PDK provides a modular solution for evaluating the function and performance of theDIX4192 device from Texas Instruments. The PDK includes a motherboard (the DAIMB) and adaughterboard (the EVM). Figure 1 depicts the modular platform concept, with the EVM plugged into theDAIMB board. Connectors are indicated and labeled for ease of identification.

Figure 1. Illustration of the PDK Platform Utilizing a DAIMB Motherboard and a Daughterboard EVM

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2 Quick Start

2.1 Electrostatic Discharge Warning

Quick Start

The modular design allows for common functions to be integrated onto the DAIMB motherboard, whiledevice-specific functions are integrated onto the daughterboard EVM. The modular platform supports avariety of digital audio interface devices by simply replacing the daughterboard EVM shipped with theproduct-specific PDK. Texas Instruments products supported by this modular platform include digital audiointerface receivers, transmitters, transceivers, and combination SRC/transceiver products.

The primary features of the DIX4192EVM-PDK include:

• A USB slave interface, implemented with a Texas Instruments TAS1020B USB controller, andsupported by computers running Microsoft Windows 2000 or XP. The USB interface supports bus orself-powered operation, and communicates with the EVM daughterboard via an SPI™ or I2C™interface.

• Buffered headers support up to four audio serial port interfaces, compatible with I2S™-style ortime-division multiplexed (TDM) data formats. Only two of these ports are utilized for the DIX4192EVM.

• Six digital audio input ports support AES3-balanced inputs, S/PDIF coaxial and optical sources, andCMOS logic level inputs.

• Six digital audio output ports support AES3-balanced, S/PDIF coaxial and optical, and CMOS logiclevel outputs. Three of the ports are utilized for the DIX4192EVM.

• Flexible reference and master clock generation are supported, using either onboard oscillators orexternal clock sources.

• Power may be provided from a wall adapter (included), or an external +5V regulated power supply. Anoptional external logic I/O (or VIO) supply connection is also supported.

• Onboard linear regulators derive +1.8V, +3.3V, and +5V power supplies from the supplied poweradapter, external supplies, and/or the USB bus connection.

• An LED indicator is provided for the DIR Lock output flag.• Applications software provides functions for writing and reading the on-chip registers and data buffers.

The applications software is compatible with personal computers with at least one USB 1.x or 2.0 portand running the Microsoft Windows 2000 or XP operating systems.

This section provides information regarding handling, package contents, and the absolute operatingconditions for the DIX4192EVM-PDK.

WARNINGFailure to observe proper ESD handling precautions may result indamage to EVM components.

Many of the components used in the assembly of the PDK are susceptible to damage by electrostaticdischarge (ESD). Customers are advised to observe proper ESD handling procedure when unpacking andhandling the PDK components. All handling should be performed at an approved ESD workstation or testbench, using a grounded wrist strap. Failure to observe proper handling procedure may result in damageto EVM components.


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2.2 Product Development Kit (PDK) Package Contents

2.3 Absolute Operating Conditions

2.4 Jumper Configuration

Quick Start

The DIX4192EVM is included as part of a complete evaluation module package, referred to as a ProductDevelopment Kit (PDK). Each PDK package includes:

• One DIX4192EVM board.• One DAIMB board.• One printed copy of this DIX4192EVM-PDK User’s Guide.• One printed copy of the DIX4192 datasheet.• One power supply for powering the PDK.• One USB cable (Type A to Type B male plugs).• One CD-ROM containing the EVM applications software, support files, and documentation.

CAUTION

Exceeding the absolute operating conditions may result in improper EVMoperation or damage to the evaluation module and/or the equipment connectedto it.

The user should be aware of the absolute operating conditions for the PDK. Table 1 summarizes theseconditions.

Table 1. Absolute Operating Conditions

Min Max Units

Power Supplies

Power Adapter (J19) +6.0 +10.0 VDC

EXT +5V (J20) –0.3 +5.5 VDC

EXT VIO –0.3 +3.6 VDC

Digital Input Voltage Range

Daughterboard Connectors (JA–JD,JF) –0.3 +3.6 V

PORT A through PORT D (J1–J4) –0.3 +3.6 V

EXT SPI and EXT I2C & DIO (J22 and J23) –0.3 +3.6 V

RX1 Balanced Input (J5), measured differentially — 7.2 VPP

RX1 Unbalanced Input (J6) — 3.6 VPP

RX2 through RX4 (J7–J9) — 3.6 VPP

EXT MCLK1 and EXT MCLK2 (J17 and J18) –0.3 +3.6 V

LOGIC INPUT (J10) –0.3 +5.5 V

PDK Operating Temperature 0 +70 °C

This subsection provides an overview of the required jumper configuration for both the DAIMBmotherboard and EVM daughterboard. Refer to the electrical schematics included in Section 4 of thisdocument for connection details, as well as jumper functions that may not be discussed in this section.


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2.4.1 Power-Supply Jumpers

External +5V (J20)

Power Adapter (U17)

1 2

3 4

JMP1

EXT

+5V

ADAPTER

External VIO (J21)

+1.8V (U18)

JMP2

1 2

3 4

VIO

+3.3V (U19)5 6

+5V (selected by JMP1)

+5V from USB Port (J24)

1 2

3 4

JMP3

SELF

To Input

of U20

BUS

2.4.2 SPI and I2C Jumpers

Quick Start

Power-supply configuration for the PDK is enabled using jumpers JMP1 through JMP3, located on theDAIMB motherboard. Figure 2 illustrates the options for each of these jumpers.

Figure 2. Power-Supply Jumper Configuration (DAIMB Motherboard)

By default, jumper JMP1 is configured for Power Adapter input at J19, jumper JMP2 is set up for a +3.3Vlogic I/O (or VIO) supply, and jumper JMP3 is set up for Bus power operation (+5V from connector J24).The +3.3V logic I/O supply is required in this case to maintain logic level compatibility with the USB slaveinterface circuitry.

Jumpers JMP5 through JMP8 on the EVM daughterboard are provided for measuring power-supplycurrent. By default, these jumpers are shorted with bus wire, soldered during assembly of the board.

Jumpers JMP2 through JMP4, located on the EVM daughterboard, are utilized to select SPI or I2C hostinterface connections for the DIX4192EVM. Refer to Table 2 through Table 4 for jumper configuration.

Table 2. Jumper JMP2 Configuration (EVM Daughterboard)

JMP2 Pins 1–2 JMP2 Pins 3–4 Host Interface Selection

OPEN SHORT SPI

SHORT OPEN I2C


JMP3 Pins 1–2 JMP3 Pins 3–4 Host Interface Selection

OPEN SHORT SPI

SHORT OPEN I2C


JMP4 Pins 1-2 JMP4 Pins 3-4 Host Interface Selection

OPEN OPEN SPI

SHORT SHORT I2C



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2.4.3 RX4 Receiver Input Jumper

2.5 Switch Configuration

2.5.1 Audio Serial Port Slave/Master Configuration

2.5.2 USB Serial Peripheral Interface (SPI) Port Configuration

Quick Start

Jumper JMP1, located on the EVM daughterboard, is used to select the input source for the RX4 linereceiver inputs. Selection options are shown in Table 5.

Table 5. Jumper JMP1, RX4 Input Selection (EVM Daughterboard)

JMP1 Pins JMP1 Pins JMP1 Pins JMP1 Pins1-2 3-4 5-6 7-8 RX4 Input Source

SHORT SHORT OPEN OPEN RX4 Unbalanced 75Ω Input (DAIMB connector J9)

OPEN SHORT SHORT OPEN Optical Input Receiver (DAIMB U9)

OPEN SHORT OPEN SHORT Logic Level Input (DAIMB header J10)

This subsection provides an overview of the DIP switch configuration for both the DAIMB motherboardand EVM daughterboard.

The audio serial ports for the DIX4192 may operate in either Slave or Master mode. Switches SW1 andSW2 must be configured to match the programmed register configurations for the Port A and Port B audioserial ports on the DIX4192.

Port A of the DIX4192 is connected to Port D (or header J4) on the DAIMB motherboard, while Port B isconnected to Port B (or header J2) on the motherboard. Switch SW1 must be set to match the Port Bslave/master configuration, while switch SW2 must be set to match the Port A slave/master configuration.Switch configuration is summarized in Table 6, where x = B for Port B, and x = D for Port A.

Table 6. Audio Serial Port Slave/Master Switch Configuration (DAIMBMotherboard)

Switch SW1 or SW2, x_S/M Port Configuration

LO Master

HI Slave

CAUTION

When the I2C bus is utilized for host communications, the USBSPI switch mustbe set to HI.

For the DAIMB motherboard, the USBSPI switch on SW5 is utilized to enable or disable the tri-statebuffers for the USB controller SPI port connections. Table 7 summarizes the USBSPI switch settings.

Table 7. USB SPI PortConfiguration (DAIMB Motherboard)

Switch SW5, USBSPI USB-Based SPI Interface

LO Enabled; the SPI port may be utilized for DIX4192host communications.

HI Disabled; the SPI port outputs are set to ahigh-impedance state.

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2.5.3 MCLK1 and MCLK2 Clock Configuration

2.5.4 Host Interface Configuration

Quick Start

When the USB controller SPI interface is disabled, an external SPI host may be connected via headerJ22. Refer to the DAIMB electrical schematics in Section 4 of this document for the header pinconfiguration.

The DAIMB board supports both onboard and external clock generation for two clocks, referred to asMCLK1 and MCLK2. The MCLK1 clock source is buffered and routed to the RXCKI input (pin 13) of theDIX4192 on the EVM daughterboard. The MCLK2 source is buffered and routed to the MCLK input (pin25) of the DIX4192 on the EVM daughterboard.

Switch SW3 selects the clock source for the MCLK1 (that is, RXCKI) clock, while SW4 selects the clocksource for MCLK2 (that is, MCLK). Table 8 and Table 9 summarize the SW3 and SW4 switch settings.

Table 8. MCLK1 Clock Source Selection (DAIMB Daughterboard)

Switch SW3, Switch SW3,OSC2 OSC1 MCLK1 (or RXCKI) Source Selection

LO LO External clock source at BNC connector J17 (X1 and X2 are disabled)

LO HI Oscillator X1, 24.576MHz ±50ppm

HI LO Oscillator X2, 22.5792MHz ±50ppm

HI HI Not allowed due to Oscillator X1 and X2 output contention.

Table 9. MCLK2 Clock Source Selection (DAIMB Daughterboard)

Switch SW4, Switch SW4,OSC4 OSC3 MCLK2 (or MCLK) Source Selection

LO LO External clock source at BNC connector J18 (X3 and X4 are disabled)

LO HI Oscillator X3, 24.576MHz ±50ppm

HI LO Oscillator X4, 22.5792MHz ±50ppm

HI HI Not allowed due to Oscillator X3 and X4 output contention.

For the EVM daughterboard, DIP switch SW1 is utilized to manually select the DIX4192 control port modevia the CPM input (pin 18). Bits A0 and A1 for the DIX4192 I2C slave address may also be configuredusing this switch. Table 10 and Table 11 summarize the operation of the SW1 switches.

Table 10. DIX4192 Control Port Mode Configuration (EVM Daughterboard)

Switch SW1, CPM SPI or I2C

LO SPI

HI I2C



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2.6 Audio, Power, and Logic I/O Connections

Power

Supply

( nclui ded)

D O =I 1 G O1P

D O =I 2 G O2P

D O =I 3 G O3P

D O =I 4 G O4P

DI 5 =O BLS

D O =I 6 S NCY

J19 J24

J2 J4

J5

J6

J7

J8

J9U9 U13

J12

J11

J17 J18

PC

W 2Kin /XP

U B oS P rt

RX 11: 10 BalanceW d XLR

RX1: 75W Unbala cen d RCA




TX 5: 7 W Unbalanced RCA

TX: 110 BalancedW XLR

RX4: TOSLINK Optical InputTM

AE TS UO : TOSLINK Optical OutputTM

MCLK1 = RXCKI

Ext Clock Input

MCLK2 = MCLK

Ext Clock Input

1 2J2

S OUTBD

S BDIN

L BRCK

BCKB

TP4

J23

2 1

J4

RXCKO

SDINA

SDOUTA

BCKA

LRCKA

Quick Start

Table 11. I2C 7-Bit Slave Address Configuration (EVM Daughterboard)

Switch SW1, Switch SW1,A1 A0 7-Bit Slave Address (Binary) Slave Address for Command Files (Hex)

LO LO 1110000 E0

LO HI 1110001 E2

HI LO 1110010 E4

HI HI 1110011 E6

Figure 3 illustrates the power, USB, and primary audio input/output connections for the PDK. Headers J2and J4 provide access to the DIX4192 audio serial ports, Port A (J4) and Port B (J2), as well as the DIRrecovered clock output, RXCKO (pin 12). The pin assignments for the headers are also shown in Figure 3.Connectors J5 through J9, as well as optical receiver U9, provide the inputs for AES3 and S/PDIF digitalaudio sources. Connectors J11 and J12, along with optical transmitter U13, provide the AES3-encodeddigital outputs for connection to external audio systems and test equipment. The J17 and J18 BNCconnectors allow connection to external clock sources when the onboard oscillators are disabled.General-purpose outputs, as well as the DIT block start (BLS) and DIT internal frame synchronization(SYNC) clocks, are made available at header J23. The power adapter provided with the PDK is connectedto the DAIMB motherboard at power jack J19. The host PC is connected to the PDK via the supplied USBcable, with connector J24 providing access to the DAIMB motherboard USB slave interface.

Figure 3. PDK Power, Host, and Input/Output Connections



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3 Software Overview, Installation, and Operation

3.1 Overview

3.2 System Requirements

3.3 Installation Procedure

Software Overview, Installation, and Operation

This section provides a discussion of the applications software that accompanies the PDK, includingsystem requirements, installation procedures, and software operating instructions.

The applications software provided with the PDK allows the user to program and read the contents ofDIX4192 control and status registers, as well as the channel status and user data buffers for both the DIRand DIT. The software is referred to as the USB Serial Commander, and is a product of TexasInstruments (portions of the software are copyright by National Instruments). Refer to the End UsersLicense Agreement included with the software.

The applications software functions on computers that run the Microsoft Windows 2000 or XP operatingsystems, and include at least one available USB 1.x or USB 2.0 port. A CD-ROM drive is also required forsoftware installation. A minimum of 256MB of system RAM is required, while 512MB of system RAM isrecommended. Installation of the applications software requires a minimum of 50MB of free hard diskspace.

The following steps are required to install the USB Serial Commander Software. It is assumed that theuser is familiar with the Windows 2000 or XP operating system, including window and menu navigation.

Step 1: Insert the accompanying CD-ROM into the PC CD-ROM drive.

Step 2: Go to the folder named usc_installer on the CD-ROM. Open the folder and double-click on the filenamed setup.exe. Follow the instructions and prompts given by the installer program.

Step 3: When the main installation is complete, a dialog box will come up informing you about installingNI-VISA™ 3.1 Runtime. This file is a self-extracting archive. Click OK to proceed. You will then bepresented with a WinZip™ dialog. Simply click Unzip; the archive self-extracts and automatically runs theNI-VISA 3.1 Runtime installer.

Step 4: Follow the instructions in the NI-VISA 3.1 Runtime Installer. When prompted for which features toinstall, do the following:

1. Click on the disk icon next to NI-VISA 3.1.2. Select, Do not install this feature.3. Click on the disk icon next to USB.4. Select the option that installs this feature.5. Click Next.

Step 5: Accept the license agreement, and continue the installation.

Step 6: When this completes, click Finish on the USB Serial Commander installer window.

Step 7: Restart your computer.

Step 8: When your computer is restarted, connect the DIX4192EVM-PDK to the host PC using thesupplied a USB cable. Windows should recognize the new device as USB- MODEVM. However, on somesystems, it will be recognized as a USB Human Interface Device rather than an NI-VISA USB device.

To check this configuration, go to Start→Control Panel→System→Hardware→Device Manager. Look inthe list and verify whether any NI-VISA USB Devices are shown. If so, the USB-MODEVM should beincluded in the list of the NI-VISA USB devices, and you can proceed to Step 10.

If the USB-MODEVM appears instead under Human Interface Devices, right-click on the device and selectUpdate Driver... In the driver update screen, choose the option to select the driver from a list. When thelist is given, you should have the choice of either a Human Interface Device or the USB-MODEVM. Selectthe USB-MODEVM and install the new driver.



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3.4 Operating the Applications Software


If the USB-MODEVM does not appear as an option, go to the C:\Windows\inf directory and see if theUSB-MODEVM_WDM.inf file exists. If this file is present, right-click on the file and select Install... Repeatthe Update Driver… process described in the previous paragraph.

If the USB-MODEVM_WDM.inf file does not exist in the C:\Windows\inf directory, go to the CD-ROM andlocate the inf_file.zip archive. This archive contains the USB-MODEVM_WDM.inf file. Copy the archive toyour hard disk, unzip the archive, and move the USB-MODEVM_WDM.inf file to the C:\Windows\infdirectory. Once the file is moved, right-click on the file and select Install... Repeat the Update Driver…process described previously in this section.

Step 9: Disconnect the USB_MODEVM hardware and reconnect to the USB cable. Repeat Step 8 tocheck that it is now recognized as an NI-VISA USB Device. When the hardware is recognized and listedas a NI-VISA USB device, proceed to Step 10.

Step 10: Installation is complete. You may now proceed with using the PDK software.

To start the applications software, click on the Start menu icon and navigate to Programs→TexasInstruments→USB-SerialCommander. Click on the USB-SerialCommander to start the application. Thewindow shown in Figure 4 appears. The Command Buffer text area will be empty when the applicationinitially launches.

Figure 4. Applications Software Window (USB Serial Commander)

The first order of business is to select the Interface, using one of the five radio buttons shown in theInterface panel. For an I2C host interface configurations, either the I2C Standard Mode or I2C Fast Modemay be selected. For an SPI host interface configuration, the SPI–16 bit register addresses mode must beselected.

On the CD-ROM accompanying the PDK, there is a folder named Sample Command Files. These fileshave been written to exercise specific portions and functions of the DIX4192. The sample files alsoprovide the user with code that can be copied and modified as needed, assisting the learning process.Any standard text editor, such as Notepad, can be utilized to edit and create command files.



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3.4.1 Error Indicators

3.4.2 Last Executed Command Field

3.4.3 Read Data Display


Click on the applications File menu. There is only one selection under the File menu: Open CommandFile… Clicking on this menu selection displays an open file dialog, where sample command files may belocated and loaded.

Once a command file has been loaded, the Command Buffer text area displays the script code. You mayscroll through this code, as well as select and edit code as needed. The user can also select and deletethe contents of the Command Buffer and manually enter his or her own script code. Section 3.5 andSection 3.6 of this guide provide command syntax information for writing scripts. When you are ready toexecute the script code in the Command Buffer, simply click on the Execute Command Buffer button.

There are three indicators below the Execute Command Buffer button. When a command buffer issuccessfully executed, the req done indicator glows green. If a command request or an SPI/I2C bus erroroccurs, then the req error or bus error indicators glow red. Typical errors include selecting the wronginterface mode for the given command buffer contents, running command syntax that is invalid, and busconfiguration or electrical errors.

This field is located below the error indicators, and contains the text of the last executed command (notincluding Break commands).

The Read Data display shows a list of hexadecimal values, with the first four values being program statusinformation, followed by the data bytes read from control or status registers using a Read command.Figure 5 illustrates the results of an SPI read command. The Last Executed Command field shows that aread command was executed. This information is reiterated in the text field to the left of the Read Datadisplay. Ignoring the first four bytes of the Read Data display, the last four bytes correspond to the datalocated in the four register addresses referenced by the Read command.



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3.4.4 Command Script Paused Dialog

3.5 Command Syntax for SPI Communications


This dialog is presented when a Break command is executed in the Command Buffer, and is shown inFigure 5. The Break command pauses the Command Buffer execution until the OK button is clicked. Readcommands must always be followed by a Break command, so that the user may evaluate the Read Datadisplay results.

Figure 5. Example of a Readback Display and Break Message in the USB Serial Commander Application

Simple but strict command syntax is required for the command files utilized by the applications software.The command syntax for SPI communications are summarized in Table 12. Each command must beterminated with a carriage return, and must fit on a single line.

Table 12. SPI Command Syntax

Command Syntax

Write w rr 00 dd

Read r rr 00 bb

Break b

Comment # write your comments here

Interface Mode i spi16

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3.6 Command Syntax for I2C Communications


Where:

• rr = The register address (Hex)• dd = The register data (Hex)• bb = The number of bytes to be read (Hex)

For the DIX4192, the SPI 16-bit address mode must always be utilized, as the second byte (00) isinterpreted as the second byte of the address by the USB Serial Commander. The first line of thecommand file should always be the interface mode syntax shown in Table 12.

When setting the register address for an SPI command, the most significant bit of the address is theRead/Write bit. Set this bit to '0' for Write operations, and to '1' for Read operations.

Example 1.

# write register 01 to power-up all function blocksw 01 00 3f

Example 2.

# read the Q sub code data registers and then break for read data display resultsr 9f 00 0ab

The command syntax for I2C communications are summarized in Table 13. Each command must beterminated with a carriage return, and must fit on a single line.

Table 13. I2C Command Syntax

Command Syntax

Write w ss rr dd

Read r ss rr bb

Break b

Comment # write your comments here

Interface Mode (I2C Slow) i i2cslow

Interface Mode (I2C Fast) i i2cfast

Where:

• ss = The I2C slave address for the DIX4192 (Hex).• rr = The register address byte (Hex)• dd = The register data (Hex)• bb = The number of bytes to be read (Hex)

For the DIX4192, the I2C interface mode may be Slow or Fast. The first line of the command file shouldalways indicate the speed of the interface, and match the selection shown in the Interface section of theUSB Serial Commander window. Generally, the interface may be set to Fast mode for all operations.

When setting the slave address, the R/W bit does not need to be included, because the Write or Readcommand will set this bit automatically.

The most significant bit of the Register Address Byte is the INC, or auto-increment bit. When set to '0',auto-increment mode is disabled. When set to '1', auto-increment mode is enabled. Refer to the datasheetfor additional information regarding auto-increment mode for I2C write and read operations.



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4 Hardware Reference

Hardware Reference

Example 3.

# write register 01 to power up all function blocksw e0 01 3f

Example 4.

# read the non pcm status register and then break for read data display resultsr e0 12 01b

Example 5.

# read the Q sub code data registers and then break for read data display results# reading multiple registers requires that the auto increment bit be set to 1r e0 9f 0ab

This section includes schematics for the EVM and DAIMB boards, as well as a Bill of Materials for eachboard.



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4.1 Schematics

RN

2

100

2 4 6

1 3 5 78

910

JE

PO

WE

R

+5V

VIO

+1.8

V

+3.3

V

2 4 6

1 3 5 78

910

11

12

13

14

15

16

17

18

19

20

JA

PO

RTS

A&

B

2 4 6

1 3 5 78

910

11

12

13

14

15

16

17

18

19

20

JB

PO

RTS

C&

D

2 4 6

1 3 5 78

910

11

12

13

14

15

16

17

18

19

20

JC

DA

IIN

PU

T

2 4 6

1 3 5 78

910

11

12

13

14

15

16

17

18

19

20

22

24

26

21

23

25

27

28

29

30

JF

HO

ST

I/O

2 4 6

1 3 5 78

910

11

12

13

14

15

16

17

18

19

20

JD

DA

IO

UTP

UT

DIO

6

DIO

5D

IO4

DIO

3

DIO

2

DIO

1

DIO

7

SD

AS

CL

/RE

SE

T

/IN

T

CD

OU

TC

DIN

/CS

CC

LK

SD

INA

LR

CK

A

BC

KA

SD

OU

TB

SD

INB

SD

OU

TA

LR

CK

B

BC

KB

SD

INC

LR

CK

C

BC

KC

CLK

OU

T1

SD

OU

TD

SD

IND

SD

OU

TC

BC

KD

CLK

OU

T2

LR

CK

D

RX

1-

RX

2+

RX

2-

RX

3+

RX

3-

RX

4+

RX

1+

RX

4-

LO

GIC

_IN

TO

SLIN

K_IN

TX

1-

TX

2+

TX

2-

TX

3+

TX

3-

TX

4+

TX

1+

TO

SLIN

K_O

UT

LO

GIC

_O

UT

TX

4-

TP

1

TP

2

MC

LK

1M

CLK

2

RX

1-

RX

1+

RX

2-

RX

2+

RX

3-

RX

3+

RX

4-

RX

4+

R1

10

LE

D1

RX

LO

CK

VIO

TX

+32

AE

SO

UT

34

BLS

35

SY

NC

36

BC

KA

37

SD

INA

39

SD

OU

TA40

N.C

.41

VIO

42

DG

ND

343

BG

ND

44

SD

INB

46

LR

CK

B47

BC

KB

48

RX

1+

1

RX

2+

3

RX

3+

5

RX

3-

6

RX

4+

7

VC

C9

RX

2-

4

DG

ND

116

GP

O3

28

SD

OU

TB

45

AG

ND

10

/LO

CK

11

LR

CK

A38

RX

CK

O12

CC

LK

(SC

L)

20

CD

OU

T(S

DA

)22

RX

CK

I13

N.C

.14

N.C

.15

VD

D18

17

CP

M18

/CS

(A0)

19

RX

1-

2

VD

D33

33

CD

IN(A

1)

21

RX

4-

8

/IN

T23

/RS

T24

MC

LK

25

GP

O1

26

GP

O2

27

GP

O4

29

DG

ND

230

TX

-31

U1

DIX

4192IP

FB

C5

0.1

uF

C6

10uF

12

34

JM

P3

+3.3

V

18

27

36

45

SW

1

12

34

56

78

JM

P1

12

34

JM

P2

12

34

JM

P4

12J

MP

5

12

JM

P8

12

JM

P7

C3

0.1

uF

C4

10uF

RN

3

10K

RN

1

100

Daughte

rB

oard

Connecto

rs

C7

0.1

uF

C8

10uF

+1.8

V

R3

0R6

2.7

K

R5

0

R4

2.7

K

VIO

VIO

VIO

C1

0.1

uF

C2

10uF

12J

MP

6+

3.3

V

SD

OU

TD

SD

IND

BC

KD

LR

CK

D

SD

OU

TB

SD

INB

LR

CK

B

BC

KB

LO

GIC

_IN

TO

SLIN

K_IN

CLK

OU

T2

DIO

6D

IO5

DIO

4

DIO

3

DIO

2D

IO1

SD

A

SC

L

/RE

SE

T/IN

T

CD

OU

T

CD

IN

/CS

CC

LK

TX

1-

TX

1+

TO

SLIN

K_O

UT

LO

GIC

_O

UT

MC

LK

2

MC

LK

1

CP

M

A0

A1

SP

AR

ETP

3

Hardware Reference

The schematics for the EVM and DAIMB boards are shown in Figure 6 through Figure 8.

Figure 6. Electrical Schematic: DIX4192EVM Daughterboard



www.ti.com

2 4 6

1 3 5 78

91

0

J1

PO

RTA

RN

1

10

0

TP

3

1O

E1

1A

12

2Y

43

1A

24

2Y

35

1A

36

2Y

27

1A

48

2Y

19

GN

D1

02

A1

11

1Y

41

22

A2

13

1Y

31

42

A3

15

1Y

21

62

A4

17

1Y

11

82

OE

19

VC

C2

0

U1

SN

74

ALV

C2

44

PW

VIO

C1

0.1

Fm

SD

OU

TA

SD

INA

LR

CK

A

BC

KA

VIO

C2

0.1

Fm

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

12

B8

11

GN

D1

0

DIR

1V

CC

20

OE

19

U2

SN

74

ALV

C2

45

PW

RN

21

0k

14

23

SW

1

2 4 6

1 3 5 78

91

0

J2

PO

RT

BR

N3

10

0

TP

4

1O

E1

1A

12

2Y

43

1A

24

2Y

35

1A

36

2Y

27

1A

48

2Y

19

GN

D1

02

A1

11

1Y

41

22

A2

13

1Y

31

42

A3

15

1Y

21

62

A4

17

1Y

11

82

OE

19

VC

C2

0

U3

SN

74

ALV

C2

44

PW

VIO

C3

0.1

Fm

SD

OU

TB

SD

INB

LR

CK

B

BC

KB

VIO

C4

0.1

Fm

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

12

B8

11

GN

D1

0

DIR

1V

CC

20

OE

19

U4

SN

74

ALV

C2

45

PW

2 4 6

1 3 5 78

91

0

J3

PO

RT

CR

N4

10

0

1O

E1

1A

12

2Y

43

1A

24

2Y

35

1A

36

2Y

27

1A

48

2Y

19

GN

D1

02

A1

11

1Y

41

22

A2

13

1Y

31

42

A3

15

1Y

21

62

A4

17

1Y

11

82

OE

19

VC

C2

0

U5

SN

74

ALV

C2

44

PW

VIO

C5

0.1

Fm

SD

OU

TC

SD

INC

LR

CK

C

BC

KC

VIO

C6

0.1

Fm

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

12

B8

11

GN

D1

0

DIR

1V

CC

20

OE

19

U6

SN

74

ALV

C2

45

PW

RN

51

0K

14

23

SW

2

2 4 6

1 3 5 78

91

0

J4

PO

RT

DR

N6

10

0

1O

E1

1A

12

2Y

43

1A

24

2Y

35

1A

36

2Y

27

1A

48

2Y

19

GN

D1

02

A1

11

1Y

41

22

A2

13

1Y

31

42

A3

15

1Y

21

62

A4

17

1Y

11

82

OE

19

VC

C2

0

U7

SN

74

ALV

C2

44

PW

VIO

C7

0.1

Fm

LR

CK

D

BC

KD

VIO

C8

0.1

Fm

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

12

B8

11

GN

D1

0

DIR

1V

CC

20

OE

19

U8

SN

74

ALV

C2

45

PW

CL

KO

UT

1

SD

OU

TD

SD

IND

CL

KO

UT

2

R1

75

R2

75

2 4 6

1 3 5 78

91

0

JE

PO

WE

R

+5

V

VIO

+1

.8V

+3

.3V

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

JA

PO

RT

S A

an

d B

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

JB

PO

RT

S C

an

d D

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

JC

DA

I IN

PU

T

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

22

24

26

21

23

25

27

28

29

30

JF

HO

ST

I/O

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

JD

DA

I O

UT

PU

T

DIO

6

DIO

5

DIO

4

DIO

3

DIO

2

DIO

1

DIO

7

SD

A

SC

L

/RE

SE

T

/IN

T

CD

OU

T

CD

IN

/CS

CC

LK

SD

INA

LR

CK

A

BC

KA

SD

OU

TB

SD

INB

SD

OU

TA

LR

CK

B

BC

KB

SD

INC

LR

CK

C

BC

KC

CL

KO

UT

1

SD

OU

TD

SD

IND

SD

OU

TC

BC

KD

CL

KO

UT

2

LR

CK

D

RX

1-

RX

2+

RX

2-

RX

3+

RX

3-

RX

4+

RX

1+

RX

4-

LO

GIC

_IN

TO

SL

INK

_IN

TX

1-

TX

2+

TX

2-

TX

3+

TX

3-

TX

4+

TX

1+

TO

SL

INK

_O

UT

LO

GIC

_O

UT

TX

4-

TP

1

TP

2

MC

LK

1M

CL

K2

C9

0.1

Fm

R5

11

0

J6

RX

1 I

NP

UT

75

W

1 4

5 6 87P

RI

SE

C 1

SE

C 2

T1

SC

93

9-0

6

+3

.3V

24

1

5 3

U1

1

SN

74

LV

C1

G1

25

DB

V

C1

9

0.1

Fm

R3

0 R4

0

C1

0

0.1

Fm

RX

1-

RX

1+

C1

1

0.1

Fm

R6

75

C1

2

0.1

Fm

RX

2-

RX

2+

J7

RX

2 I

NP

UT

75

W

C1

3

0.1

Fm

R7

75

C1

4

0.1

Fm

RX

3-

RX

3+

J8

RX

3 I

NP

UT

75

W

C1

5

0.1

Fm

R8

75

C1

6

0.1

Fm

RX

4-

RX

4+

J9

RX

4 I

NP

UT

75

W

LO

GIC

_IN

+3

.3V

24

1

5 3

U1

0

SN

74

LV

C1

G1

25

DB

V

C1

8

0.1

Fm

TO

SL

INK

_IN

1

2

3

RX

U9

Op

tica

l In

pu

t

+5

V

C1

7

0.1

Fm

L1

47

Hm

J1

1

TX

1 O

UT

PU

T

75

W

1 4

5 6 87P

RI

SE

C 1

SE

C 2

T2

SC

93

9-0

6

VIO

24

1

5 3

U1

4

SN

74

LV

C1

G1

25

DB

V

C2

6

0.1

Fm

R9

11

0 C2

0

0.1

Fm

TX

1-

TX

1+

C2

1

0.1

Fm

R1

01

50

TX

2+

J1

3

TX

2 O

UT

PU

T

75

W

C2

2

0.1

Fm

R1

11

50

TX

3+

J1

4

TX

3 O

UT

PU

T

75

W

C2

3

0.1

Fm

R1

21

50

TX

4+

J1

5

TX

4 O

UT

PU

T

75

W

LO

GIC

_O

UT

+5

V

24

1

5 3

U1

2

SN

74

AH

CT

1G

12

5D

BV

C2

5

0.1

Fm

TO

SL

INK

_O

UT

+5

VC

24

0.1

Fm1

2

3

TX

U1

3

Op

tica

l O

utp

ut

Da

ug

hte

r B

oa

rd C

on

ne

cto

rs

VIO

VIO

1 2

J1

0

LO

GIC

IN

PU

T

1 2

J1

6

LO

GIC

OU

TP

UT

2

3

1G

J1

2

TX

1 O

UT

PU

T

11

0

2

3

1G

J5

RX

1 O

UT

PU

T

11

0

R2

8

15

0

R2

9

15

0

R3

0

15

0

Hardware Reference

Figure 7. Electrical Schematic: DAIMB Motherboard, Page 1



www.ti.com

TP

11

SW

6M

AN

UA

L R

ES

ETR

18

2.7

K

RN

9

10

K

VIO

18

27

36

45

SW

5

/RE

SE

T

VIO

24

1

5 3

U2

3S

N7

4LV

C1

G1

25

DB

V

C4

8

0.1

Fm

US

B3

3

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

12

B8

11

GN

D1

0

DIR

1V

CC

20

OE

19

U2

1

SN

74

ALV

C2

45

PW

C4

6

0.1

Fm

2 4 6

1 3 5 78

91

0

11

12

13

14

J2

2E

XT

SP

I

12

34

JM

P4

2 4 6

1 3 5 78

91

0

11

12

13

14

15

16

17

18

19

20

J2

3

EX

T I

2C

an

d D

IO

CD

OU

T

CD

IN

/CS

CC

LK

/IN

T

VIO

24

1

5 3

U2

2S

N7

4LV

C1

G1

25

DB

V

C4

70

.1F

m

Q1

Q2

R1

62

.7K

R1

72

.7K

VIO

12

JMP5

12

JMP6

DIO

6

DIO

5

DIO

4

DIO

3

DIO

2

DIO

1

DIO

7

EN

1

OU

T3

VC

C4

GN

D2

X2

SM

77

45

HS

V-2

2.5

79

2M

EN

1

OU

T3

VC

C4

GN

D2

X1

SM

77

45

HS

V-2

4.5

76

M

C2

80

.01

Fm

C2

90

.01

Fm+

3.3

V

+3

.3V

24

1

5 3

U1

5S

N7

4LV

C1

G1

25

DB

VJ1

7E

XT

MC

LK

1

C2

7

0.1

Fm

VIO

RN

7

10

K

14

23

SW

3

MC

LK

1 S

EL

EC

T

MC

LK

1

+3

.3V

EN

1

OU

T3

VC

C4

GN

D2

X4

SM

77

45

HS

V-2

2.5

79

2M

EN

1

OU

T3

VC

C4

GN

D2

X3

SM

77

45

HS

V-2

4.5

76

M

C3

10

.01

Fm

C3

20

.01

Fm+

3.3

V

+3

.3V

24

1

5 3

U1

6S

N7

4LV

C1

G1

25

DB

VJ1

8E

XT

MC

LK

2

C3

0

0.1

Fm

VIO

RN

8

10

K

14

23

SW

4

MC

LK

2 S

EL

EC

T

MC

LK

2

+3

.3V

CS

CH

NE

32

CR

ES

ET

34

CS

YN

C3

5C

DA

TI

36

CS

CL

K3

7

MC

LK

O1

39

MC

LK

O2

40

RE

SE

T4

1V

RE

N4

2S

DA

43

SC

L4

4

XTA

LO

46

XTA

LI

47

PL

LF

ILI

48

PL

LF

ILO

1

MC

LK

I3

PU

R5

DP

6

DM

7

MR

ES

ET

9

DV

SS

4

DV

SS

16

DV

SS

28

AV

SS

45

TE

ST

10

EX

TE

N1

1C

DA

TO

38

RS

TO

12

NC

20

NC

22

P3

.01

3

P3

.11

4

P3

.2/X

INT

15

P3

.31

7

P3

.41

8

P3

.51

9

AV

DD

2

DV

DD

33

DV

DD

21

DV

DD

8

P1

.02

3

P1

.12

4P

1.2

25

P1

.32

6P

1.4

27

P1

.52

9P

1.6

30

P1

.73

1

U2

4

TA

S1

02

0B

PF

B

R1

5

39

0D

4

US

B A

CT

IVE

C4

93

3p

F

R2

7

3.0

9K

R2

4N

I

Note

: #3

US

BV

CC

X5

6.0

00

MH

z

VC

C1

D-

2D

+3

GN

D4

J2

4

US

B P

OR

TR

21

1.5

K

R2

22

7.4

R2

32

7.4

C5

61

00

pF

C5

03

3p

F

C5

31

.0F

m

C5

21

.0F

m

C5

41

.0F

m

TP

7

TP

6

TP

5

TP

9

TP

8

C5

50

.00

1F

m

C5

7

33

pF

C5

8

33

pF

TP

10

C5

9

1.0

Fm

US

B3

3

VD

D5

RE

SE

T4

MR

3

CT

1

GN

D2

U2

5

TP

S3

83

6

VCC8

VSS4

SD

A5

SC

L6

A0

1

A1

2

A2

3

WP

7

U2

6

24

LC

64

R2

5N

I

Note

: #2

R2

6N

I

Note

: #1

R1

92

.7K

R2

0

2.7

K

C5

10

.1F

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Hardware Reference

Figure 8. Electrical Schematic: DAIMB Motherboard, Page 2



www.ti.com

4.2 Bills of Material

Hardware Reference

Table 14. Bill of Materials for the DIX4192EVMQTY

REFERENCE PERITEM VALUE DESIGNATOR BOARD MFR MFR PART NUMBER DESCRIPTION

1 0 R3, R5 2 Panasonic ERJ-3GEY0R00V Resistor, 0Ω, Size = 0603

2 10 R1 1 Panasonic ERJ-3GEYJ100V Resistor, Thick Film Chip 10Ω, 5%, 1/10W,Size = 0603

3 2.7K R4, R6 2 Panasonic ERJ-3GEYJ272V Resistor, Thick Film Chip, 2.7kΩ, 5%, 1/10WSize = 0603

4 100 RN1, RN2 2 CTS 742C083101J Thick Film Chip Resistor Array 100Ω,8-Terminal, 4 Resistors, Isolated

5 10k RN3 1 CTS 742C163103J Thick Film Chip Resistor Array 10kΩ,16-Terminal, 8 Resistors, Isolated

6 0.1µF C1, C3, C5, C7 4 TDK C1608X7R1E104K Chip Capacitor, X7R Ceramic 0.1µF ±10%,25V, Size = 0603

7 10µF C2, C4, C6, C8 4 Kemet T491A106K010AS Chip Capacitor, Tantalum, 10µF ±10%, 10V,Size = A

8 U1 1 Texas DIX4192IPFB Integrated Digital Audio Interface Receiver andInstruments Transmitter (DIR & DIT)

9 LED1 1 Lumex SML-LX0603GW-TR Green LED, SMT, Size = 0603

10 JA, JB, JC, JD 4 Samtec SSW-110-02-G-D Socket Strip, Dual Row, 10x2

11 JE 1 Samtec SSW-105-02-G-D Socket Strip, Dual Row, 5x2

12 JF 1 Samtec SSW-115-02-G-D Socket Strip, Dual Row, 15x2

13 JMP1 1 Samtec TSW-104-07-G-D Terminal Strip, Dual Row, 4x2

14 JMP2-JMP4 3 Samtec TSW-102-07-G-D Terminal Strip, Dual Row, 2x2

15 JMP5-JMP8 4 — — Bus Wire, 18 to 22 guage

16 SW1 1 ITT TDA04H0SK1 DIP Switch, 4-element, Half-pitchIndustries/C&K Surface-Mount, Tape Sealed

17 6 Samtec SNT-100-BK-G-H Shorting Blocks

18 PWB 1 Texas 6479511 DIX4192EVM Printed Circuit BoardInstruments



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Hardware Reference

Table 15. Bill of Materials for the DAIMBREFERENCE QTY PER

ITEM VALUE DESIGNATOR BOARD MFR MFR PART NUMBER DESCRIPTION

1 0 R3, R4, R24 3 Panasonic ERJ-3GEY0R00V Resistor, 0Ω, Size = 0603

2 Not Installed R25 1 Panasonic ERJ-3GEY0R00V Resistor, 0Ω, Size = 0603

3 27.4 R22, R23 2 Panasonic ERJ-3EKF27R4V Resistor, Thick Film Chip 27.4Ω, 1%,1/16W, Size = 0603

4 75 R1, R2, R6–R8 5 Panasonic ERJ-3EKF75R0V Resistor, Thick Film Chip 75Ω, 1%, 1/16W,Size = 0603

5 110 R5, R9 2 Panasonic ERJ-3EKF1100V Resistor, Thick Film Chip 110Ω, 1%,1/16W, Size = 0603

6 150 R10–R12,R28– 6 Panasonic ERJ-3EKF1500V Resistor, Thick Film Chip 150Ω, 1%,R30 1/16W, Size = 0603

7 392 R13–R15 3 Panasonic ERJ-3EKF3920V Resistor, Thick Film Chip 392Ω, 1%,1/16W, Size = 0603

8 1.5K R21 1 Panasonic ERJ-3EKF1501V Resistor, Thick Film Chip 1.5kΩ, 1%,1/16W, Size = 0603

9 2.7K R16–R20 5 Panasonic ERJ-3GEYJ272V Resistor, Thick Film Chip 2.7kΩ, 5%,1/10W Size = 0603

10 3.09K R27 1 Panasonic ERJ-3EKF3091V Resistor, Thick Film Chip 3.09kΩ, 1%,1/16W, Size = 0603

11 Not Installed R26 1 Panasonic ERJ-3EKF1002V Resistor, Thick Film Chip 10kΩ, 1%,1/16W, Size = 0603

12 100 RN1, RN3, 4 CTS 742C083101J Thick Film Chip Resistor Array 100Ω,RN4, RN6 8-Terminal, 4 Resistors, Isolated

13 10k RN2, RN5, 5 CTS 742C083103J Thick Film Chip Resistor Array 10kΩ,RN7–RN9 8-Terminal, 4 Resistors, Isolated

14 33pF C49, C50, C57, 4 TDK C1608C0G1H330J Chip Capacitor, C0G Ceramic 33pF ±5%,C58 50V, Size = 0603

15 100pF C56 1 TDK C1608C0G1H101J Chip Capacitor, C0G Ceramic 100pF ±5%,50V, Size = 0603

16 0.001µF C55 1 TDK C1608C0G1H102J Chip Capacitor, C0G Ceramic 0.001µF±5%, 50V, Size = 0603

17 0.01µF C28, C29, 6 TDK C1608X7R1H103K Chip Capacitor, X7R Ceramic 0.01µFC31–C33,C35 ±10%, 50V, Size = 0603

18 0.1µF C1–C27, C30, 33 TDK C1608X7R1E104K Chip Capacitor, X7R Ceramic 0.1µF ±10%,C37, C46–C48, 25V, Size = 0603

C51

19 1µF C38, C52–C54, 6 TDK C1608X7R1C105K Chip Capacitor, X7R Ceramic 1µF ±10%,C59, C60 16V, Size = 0603

20 10µF C39–C45 7 Kemet T491A106K010AS Chip Capacitor, Tantalum, 10µF ±10%,10V, Size = A

21 100µF C34, C36 2 Panasonic EEV-FK1C101P Capacitor, Alum Elect, SMT, 100µF ±20%,16V, Size = D

22 47µH L1 1 Panasonic ELJ-FA470KF Inductor, SMT, 47µH ±10%, Size = 1210

23 T1, T2 2 Scientific SC939-06 Dual Zo Digital Audio TransformerConversion

24 U1, U3, U5, U7 4 Texas SN74ALVC244PWR Octal Buffer/Driver with Tri-State OutputsInstruments

25 U2, U4, U6, U8, 5 Texas SN74ALVC245PWR Octal Bus Transceiver with Tri-StateU21 Instruments Outputs

26 U9 1 Toshiba TORX179P TOSLINK™ Optical Receiver

or

TORX179PL TOSLINK Optical Receiver

27 U10, U11, 7 Texas SN74LVC1G125DBVR Single Buffer with Tri-State OutputU14–U16, U22, Instruments

U23

28 U12 1 Texas SN74AHCT1G125DBVR Single Buffer with Tri-State Output andInstruments TTL Compatible Input

29 U13 1 Toshiba TOTX179P TOSLINK Optical Transmitter

or

TOTX179PL TOSLINK Optical Transmitter



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Hardware Reference

Table 15. Bill of Materials for the DAIMB (continued)REFERENCE QTY PER


30 U17 1 Texas REG1117-5 Linear Voltage Regulator with +5V FixedInstruments Output

31 U18 1 Texas REG1117A-1.8 Linear Voltage Regulator with +1.8V FixedInstruments Output

32 U19, U20 2 Texas REG1117-3.3 Linear Voltage Regulator with +3.3V FixedInstruments Output

33 U24 1 Texas TAS1020BPFB USB Streaming ControllerInstruments

34 U25 1 Texas TPS3836K33DBVR Nanopower Supervisory Circuit with ActiveInstruments Low Push-Pull Output

or

Texas TPS3838K33DBVR Nanopower Supervisory Circuit with ActiveInstruments Low Open Drain Output (requires

installation of R26)

35 U26 Microchip 24LC64I/SN 64k EEPROM with 2-wire I2C SerialInterface

36 D1 Micro DL4001 Diode, 50V, 1A, MELF SMTCommercialComponents

37 D2, D3 2 Lumex SML-LX0603GW-TR Green LED, SMT, Size = 0603

38 D4 1 Lumex SML-LX0603YW-TR Yellow LED, SMT, Size = 0603

39 Q1, Q2 2 Zetex ZXMN6A07F N-channel MOSFET, SMT

40 X1, X3 2 Pletronics SM7745HSV-24.576M +3.3V SMT Clock Oscillator with CMOSOutput and Active High Enable 24.576MHz±50ppm

41 X2, X4 2 Pletronics SM7745HSV-22.5792M +3.3V SMT Clock Oscillator with CMOSOutput and Active High Enable22.5792MHz ±50ppm

42 X5 1 Citizen HCM49-6.000MABJT 6.000MHz Crystal, SMT

or

Epson MA-505 6.000M-C0 6.000MHz Crystal, SMT

or

CTS ATS060SM-T 6.000MHz Crystal, SMT

43 J1–J4, JE 5 Samtec TSW-105-07-G-D Terminal Strip, Dual Row, 5x2

44 J5 1 Neutrik NC3FAH2 3-pin Female XLR Chassis Connector,Horizontal PC Mount with Latch

45 J6–J9, J11, 8 CUI Stack RCJ-041 RCA Jack, PC Mount, BlackJ13–J15

46 J10, J16, 4 Samtec TSW-102-07-G-S Terminal Strip, 2x1JMP5, JMP6

47 J12 1 Neutrik NC3MAH-0 3-pin Male XLR Chassis Connector,Horizontal PC Mount

48 J17, J18 2 Tyco AMP 414305-1 BNC Connector, Female, PC Mount

49 J19 1 CUI Stack PJ-102BH 2.5mm Male Power Jack, PCB Mount,Silver Plated

50 J20, J21 2 Weidmuller 1699670000 Terminal Block, 2 poles, 3.5mm PCB

51 J22 1 Samtec TSW-107-07-G-D Terminal Strip, Dual Row, 7x2

52 J23, JA, JB, JC, 5 Samtec TSW-110-07-G-D Terminal Strip, Dual Row, 10x2JD

53 J24 1 Mill-Max 897-30-004-90-000000 USB Type B Receptable, Single,Through-Hole

54 JF 1 Samtec TSW-115-07-G-D Terminal Strip, Dual Row, 15x2

55 JMP1, JMP3 2 Samtec TSW-102-07-G-D Terminal Strip, Dual Row, 2x2

56 Not Installed JMP4 1 Samtec TSW-102-07-G-D Terminal Strip, Dual Row, 2x2

57 JMP2 1 Samtec TSW-103-07-G-D Terminal Strip, Dual Row, 3x2

58 SW1-SW4 4 ITT TDA02H0SK1 DIP Switch, 2-element, Half-pitchIndustries/C&K Surface-Mount, Tape Sealed



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Hardware Reference

Table 15. Bill of Materials for the DAIMB (continued)REFERENCE QTY PER


59 SW5 1 ITT TDA04H0SK1 DIP Switch, 4-element, Half-pitchIndustries/C&K Surface-Mount, Tape Sealed

60 SW6 1 Omron B3S-1000 Momentary Tact Switch, SMT, WithoutGround Terminal

61 5 Samtec SNT-100-BK-G-H Shorting Blocks

62 5 3M Bumpon SJ-5003 Rubber Feet, Adhesive Backed

63 PWB 1 Texas 6472591 DAIMB Printed Circuit BoardInstruments



FCC Warning

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATIONPURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, andcan radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of thisequipment in other environments may cause interference with radio communications, in which case the user at his own expensewill be required to take whatever measures may be required to correct this interference.

EVALUATION BOARD/KIT IMPORTANT NOTICE

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATIONPURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling theproduct(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided arenot intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,including product safety and environmental measures typically found in end products that incorporate such semiconductorcomponents or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regardingelectromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet thetechnical requirements of these directives or other related directives.

Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BYSELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDINGANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from allclaims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility totake any and all appropriate precautions with regard to electrostatic discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHERFOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.

TI assumes no liability for applications assistance, customer product design, software performance, or infringement ofpatents or services described herein.

Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling theproduct. This notice contains important safety information about temperatures and voltages. For additional information on TI’senvironmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.

No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used.

EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the input voltage range of the Absolute Operating Conditions and the output voltage rangeof the Absolute Operating Conditions (see Table 1).

Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there arequestions concerning the input range, please contact a TI field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to theEVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the loadspecification, please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than 37°C. The EVM is designed tooperate properly with certain components above 60°C as long as the input and output ranges are maintained. These componentsinclude but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types ofdevices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes nearthese devices during operation, please be aware that these devices may be very warm to the touch.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2006, Texas Instruments Incorporated

http://www.ti.com/esh

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current andcomplete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’sstandard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support thiswarranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarilyperformed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products andapplications using TI components. To minimize the risks associated with customer products and applications, customers shouldprovide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, maskwork right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or servicesare used. Information published by TI regarding third-party products or services does not constitute a license from TI to use suchproducts or services or a warranty or endorsement thereof. Use of such information may require a license from a third party underthe patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.

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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Amplifiers amplifier.ti.com Audio www.ti.com/audio

Data Converters dataconverter.ti.com Automotive www.ti.com/automotive

DSP dsp.ti.com Broadband www.ti.com/broadband

Interface interface.ti.com Digital Control www.ti.com/digitalcontrol

Logic logic.ti.com Military www.ti.com/military

Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork

Microcontrollers microcontroller.ti.com Security www.ti.com/security

RFID www.ti-rfid.com Telephony www.ti.com/telephony

Low Power www.ti.com/lpw Video & Imaging www.ti.com/videoWireless

Wireless www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2007, Texas Instruments Incorporated

http://amplifier.ti.com

http://www.ti.com/audio

http://dataconverter.ti.com

http://www.ti.com/automotive

http://dsp.ti.com

http://www.ti.com/broadband

http://interface.ti.com

http://www.ti.com/digitalcontrol

http://logic.ti.com

http://www.ti.com/military

http://power.ti.com

http://www.ti.com/opticalnetwork

http://microcontroller.ti.com

http://www.ti.com/security

http://www.ti-rfid.com

http://www.ti.com/telephony

http://www.ti.com/lpw

http://www.ti.com/video

http://www.ti.com/wireless

DIX4192EVM-PDK User's Guide · User's Guide SBOU037– June 2006 DIX4192EVM-PDKUser's Guide ......

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