Discussion 1B
Transcript of Discussion 1B
About Me(Super) Senior CS & Math Double Major4th time TAing this class, taught 16A for a year
Academic Interests: Machine Learning, Control Theory, Probability
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Discussion 1B: Transistors
Transistors are electrical devices that switch or amplify electrical signals and power.
Common Terminology
What is a transistor?
MOS: Metal-Oxide SemiconductorFET: Field-Effect Transistor
BJT: Bipolar Junction Transistor
CMOS TransistorsC stands for “Complementary”
NMOS NMOS : PM OS pmos :Drain : Higher
source : HigherSource : Lower Notice
→ Drain '. Lowerthe bubble
in the PNOS
N stands for N - Type P stands for P - Type"
Type " refers to the semiconductor material that makes these transistors.( out of scope)
Why do we care about transistors?Some call it the greatest invention of the 20th century!
We can build logic gates out of CMOS Transistors
You can build a CPU with logic gates and a clock (61C Logisim Project)
A clock can be made out of transistors. (Ring oscillator)
We can amplify signals using transistors. (Op-Amps are a lie)
•
a.
a
•
←Not Gate
Digital clock
whyDo-17-177 type✓
takes some time
to switch frominput-outputT → F
Breakdown of a Transistor ParasitictankNMOS switch Model Resistor - Switch Model Capac
' RC Model
D NMOS . DD G
Vtn'
- threshold 6 . ( I closed when I ¥ Closed when. ←
Closed b f v f-I } I , when o
Vos 7- Vthcµ=
Vbs ZV
Gs Node ! / Vos ZUM { RN I { RN
voltages T Internal -Vos = Vo - Vs S
Resistance S S
Switch Model Resistor - Switch Model RC Model
PMOS S Ss ss ← opposite G & Uso ? Htpl G ↳ VSGZ Ntp ) -
G -fly of NMOS O
pmos has o l l
l a negative Cp = } RpD D threshold { RP I * Uso > Ntpl
Vsb = Us - Vo potential p ylD
Utp : PM 's switch Model Resistor- Switchthreshold RC ModelUses Analyze Logical Analyze Power
behavior of consumption Analyze the timetransistor delay of each
Normally pnos is ON when Vbs S Vtp transistorUsb Z lvtpl
CMOS InverterVpp The CMOS Inverter is a NOT Gate o-1>0-0
T we define OV as a logical False and Vpp -_5V as
of[ a logical True . Suppose Vtn=lVtpl= VDI✓ out"
tie "
* ou
T OV
Assume Vin -_ True -_ VppNew Circuit ( Assume switch model)
UDD Usb = Us - VG '
Upp- .
S= Upp - Vpp Gwin . T
Vin -6014 = o o i rD
. to rout -- OVAsk : Is o > Ntpl ? -
Ub -- Vin - Upp - Iµ. : switch isg- Upp o D
Vs = Vpp Up -- tout off / open oVbs = Vpp 7 Vtn=
# s =p ✓ Ex : Ven > Up,
Vin = Upp or Vin -- T : Vin = 0 or Vin = F/
Circuit uns ! Circuit Upp-
-
( PMOS is off'
' f PMO ) is ON
' ↳ UoutKohout '
f NMOS is on': L
Nmos is off= i
,I
✓out is connected to ground so i
'
'
V' out is connected to Upp sobout = OV :' bout = VDDl
ll
l
ll
l
l
l
l
l
l
l.
3. Single Transistor Inverter
up , switch ModelVos zum OC Vtnl VDD
- f → ¥R " } Ci ) what is Vast when Vin = OV
•nobout
I . Label 6. D. S 2.
Calculate Vbs 3.Switch is on/off ?
Vinay} . D : bout Vbs -_ Vo -Vs Vos = O L VenVin 44 = Vin - O so switch is off/ open
=S O = O Voort
Vo - Vin, Us -
- O,Vo -- tout yep T
4. Resulting circuit : by R , Ito bout
y Voet - Vpb since in ,'- O
=
Lii ) what is Vouet when Vin = Ubb ?I . Label 6
,D,S 2
. Calculate Vos
p Vouet Vos = Vo - Us 3- Switch on/off ?
Vin 44 = Vpp - O Vos - Vpp > VtnSo = Vpp so switch is out closed
Vb = Vpp,Us - O
,Vp -- Vout E
4. Resulting circuit : { Ri Vout= 0 since rout is
1-Vout
connected to ground .
=
Part 2 : Using resistor - switch model +4 → In Vos ZUM
Ven { RN OL Utu L Vbb=
R , VPDCi ) what is Vouet when Vin -- O ? - in , -_ 0
vi. +tf ""t - punt Vos = Vo - Vs ip , } Rt sinceVino- I } = o - o = O L Vtn to Vat nothing is
NOT Gate°
.S
NMOS is off ( open { RN connectedOV bout = UDD
Cii ) what is Vout when Vin = Vpn ?✓ DD
p G= Vin-
- Vas Vos = Vpb > Utu -
by } s -- OVNmos is out closed {Io wut
s D= VoutRµ= to RI tf RN
Voltage Dividers : you = RI Upp = ÷, HPDRct RN t
'
Doesn't reachtrue O
.
Using this inverter. designers should label Ivpp as False
or create some threshold H if VL H, then Vis False
Here Ha to Voy will suffice.
Ciii ) How much power does this circuit consume when Vin -_ o ?
✓DDRemember P = IV - in} p ,when Vin = OVto ← open
circuit
since i -- o,p=o .
Ii '- o
Civ ) How much power does this circuit consume when Vin - Von ?
emi v i = VI V= Vpp since
} Rt RctRNpower is consumed across
- vout both resistors.
tf RN p= Vast=-
R ,t RN
Vin -
- OV Vin -- UppUpp Vpb
( V) compare to CMOS Inverter : -
CMOS inverter consumes zero powerFRP { RPw -
This is why CMOS is desirable over-Vmt
single NMOS transistor. } RN } RN= =
P=o p=o since Vouet - o
Summary (Main Takeaways )
I.
Two Transistors CPMOS and NMOS ),they behave like
switches
-4 -4Nmos PMOS
2.We can build Logic gates out of Transistors
✓DD Upp VDD
VinVout In circuits -
--
-Do- → vinofldhov.at ORuin.iq#Ru..+0RVin-tdhovout44 IR=
=
3.
CMOS Inverter is desirable over single NMOSIPMOS since
CMOS consumes zero power when no load is attached .
4. Looking Forward : Transistors always have delay due to parasitic
capacitance .