Direct Memory Access (DMA).Ppt

8/13/2019 Direct Memory Access (DMA).Ppt

1/15

Direct Memory AccessDMA)Department of Computer

Engineering,

M.S.P.V.L. Polytechnic College,

A Presentation

On


2/15

Introduction The transfer of data between the memory

and an external device without involving

the micro processor improves the speed of

transfer.

This transfer technique is called DMA .

www.ustudy.in


3/15

DMA Controller

Controllogic

CS

Data busbuffers

Control register

Data bus

DMA select

nenb

RS

InterruptBGBR

RDWR

Register selectReadWrite

Bus requestBus grant

Interrupt

Address register

Word count register

Address busbuffers

Address bus

DMA requestDMA Acknowledge to I/O device

www.ustudy.in


4/15

DMA Controller DMA controller is used to transfer the data between the memory

and i/o device.

The DMA controller needs the usual circuits to communicate with

the CPU and i/o device.

In addition to this, it needs an address register and address bus

buffer.

The address register contains an address of the desired location in

memory.

The word count register holds the number of words to be

transferred. The control register specifies the mode of transfer.

The DMA communicates with the i/o devices through the DMAwww.ustudy.in


5/15

Cont.., The RD (Read) and WR (write) signals are

bidirectional.

When the BG (Bus Grant) signal are bidirectional.

When the BG (Bus Grant) signal is 0, the CPU can

communicate with the DMA registers through the

data bus.

When BG is 1, the CPU has relinquished thewww.ustudy.in


6/15

DMA Transfer I/O to Memory )

I/OPeripheral

device

DMA acknowledge

Addressselect

CPUInterrupt

Address Data

BGBR

RD WR

Random accessmemory RAM)

Address DataD WR

Direct memory access DAM)

controller

Interrupt

Address DataD WR

BG

RSDS

BRDMA request

Read controlWrite control

Address busData bus

www.ustudy.in


7/15

Process of DMA Transfer To initiate a DMA transfer, the CPU loads the

address of the first memory location of the

memory block (to be read or written from) into

the DMA address register. It does his via an I/O

output instruction, such as the OTPT instruction

for the relatively simple CPU.

It then writes the no. of bytes to be transferred

into the DMA count register in the sane manner.

Finally, it writes one or more commands to thewww.ustudy.in


8/15

Cont.., These commands may specify transfer options

such as the DMA transfer mode, but should

always specify the direction of the transfer, eitherfrom I/O to memory or from memory to I/O.

The last command causes the DMA controller to

initiate the transfer. The controller then sets BR

to 1 and, once BG becomes 1 , seizes control of

the system buses.

www.ustudy.in


9/15


10/15

Introduction IOP : Communicate directly with all I/O devices

Fetch and execute its own instruction

IOP instructions are specifically designed to

facilitate I/O transfer

DMAC must be set up entirely by the CPU

Designed to handle the details of I/O

processingwww.ustudy.in


11/15

Cont.., Command Instruction that are read form memory by

an IOP

Distinguish from instructions that are read by

the CPU

Commands are prepared by experiencedwww.ustudy.in


12/15

CPU - IOPCommunicationCPU operations IOP operations

Send instructionto test IOP path Transfer status wordto memory location

If status OK. , sendstart I/O instruction

to IOP Access memory forIOP program

CPU continues withanother program

Conduct I/O transferusing DMA ; prepare

status report

I/O transfer completedinterrupt CPU

Request IOP statusTransfer status wordto memory location

Check status wordfor correct transfer

Continue

Message Center

IOPProgramPUProgram

www.ustudy.in


13/15

CPU - IOP Communication

The communication between CPU and IOP may takedifferent forms depending on the particular computer

considered.

The CPU sends a test I/O instruction to IOP to test the IOP

path.

The responds by inserting a status word in memory

location.

The CPU refers to the status word in memory. If everything

is in order, the CPU sends the start I/O instruction to start

the I/O transfer.

The IOP accesses memory for IOP program.www.ustudy.in


14/15

Cont.., When the IOP terminates the execution of its

program, it sends an interrupt request to the CPU.

The CPU then issues a read I/O instruction to readthe status from the IOP.

The IOP transfers the status word to memory

location.

The status word indicates whether the transfer

has been completed satisfactorily or if any error

has occurred during the transfer.www.ustudy.in


15/15

The End

Thank U

www.ustudy.in

Direct Memory Access (DMA).Ppt

Documents

Transcript of Direct Memory Access (DMA).Ppt