Direct current hybrid breakers : a design and its realization

Direct current hybrid breakers : a design and itsrealizationAtmadji, A.M.S.

DOI:10.6100/IR533277

Published: 01/01/2000

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Citation for published version (APA):Atmadji, A. M. S. (2000). Direct current hybrid breakers : a design and its realization Eindhoven: TechnischeUniversiteit Eindhoven DOI: 10.6100/IR533277

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DIRECT CURRENT HYBRID BREAKERS:

A DESIGN AND ITS REALIZATION

Cover: The Hindu temple in Lake Bratan, Bali, Indonesia.



PROEFSCHRIFT

ter verkrijging van de graad van doctor aan deTechnische Universiteit Eindhoven, op gezag van de

Rector Magnificus, prof.dr. M. Rem, voor eencommisie aangewezen door het College voor

Promoties in het openbaar te verdedigenop donderdag 4 Mei 2000 om 16.00 uur

door

Ali Mahfudz Surya Atmadji

geboren te Semarang, IndonesiN

iv

Dit proefschrift is goedgekeurd door de promotoren:

prof. ir G.C. Damstra

en

prof. dr.-ing. H. Rijanto

CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN

Atmadji, Ali M.S.

Direct current hybrid breakers : A design and its realization / by AliM.S. Atmadji. - Eindhoven : Technische Universiteit Eindhoven, 2000.Proefschrift. - ISBN 90-386-1740-2NUGI 832Trefw.: kortsluitingsbeveiliging / kortsluitstromen /vacuumschakelaars / elektrische schakelaars.Subject headings: current limiters / short-circuit currents /vacuum circuit breakers / switchgear testing.

Copyright 2000 by A.M.S. Atmadji, Departement of Electrical Engineering, EindhovenUniversity of Technology, Eindhoven, The Netherlands.

v

Do not believe in anything simply because you have heard it. Do not

believe in anything simply because it is spoken and rumored by many. Do

not believe in anything simply because it is found written in your religious

books. Do not believe in anything merely on the authority of your teachers

and elders. Do not believe in traditions because they have been handed

down for many generations. But after observation and analysis, when you

find that anything agrees with reason and is conducive to the good and

benefit of one and all, then accept it and live up to it.

—Buddha

To my parentsSamoeri and Koestiwati

vi

Summary

The use of semiconductors for electric power circuit breakers instead of conventional breakers

remains a utopia when designing fault current interrupters for high power networks. The major

problems concerning power semiconductor circuit breakers are the excessive heat losses and their

sensitivity to transients. However, conventional breakers are capable of dealing with such matters. A

combination of the two methods, or so-called ‘hybrid breakers’, would appear to be a solution;

however, hybrid breakers use separate parallel branches for conducting the main current and

interrupting the short-circuit current. Such breakers are intended for protecting direct current (DC)

traction systems. In this thesis hybrid switching techniques for current limitation and purely solid-

state current interruption are investigated for DC breakers.

This work analyzes the transient behavior of hybrid breakers and compares their operations with

conventional breakers and similar solid-state devices in DC systems. Therefore a hybrid breaker was

constructed and tested in a specially designed high power test circuit. A vacuum breaker was chosen

as the main breaker in the main conducting path; then a commutation path was connected across the

vacuum breaker where it provided current limitation and interruption. The commutation path

operated only during any current interruption and the process required additional circuits. These

included a certain energy storage, overvoltage suppressor and commutation switch. So that when

discharging this energy, a controlled counter-current injection could be produced. That counter-

current opposed the main current in the breaker by superposition in order to create a forced current-

zero. One-stage and two-stage commutation circuits have been treated extensively.

This study project contains both theoretical and experimental investigations. A direct current short-

circuit source was constructed capable of delivering power equivalent to a fault. It supplied a direct

voltage of 1kVDC which was rectified having been obtained from a 3-phase 10kV/380V supply. The

source was successfully tested to deliver a fault current of 7kA with a time constant of 5ms. The

hybrid breaker that was developed could provide protection for 750VDC traction systems. The

breaker was equipped with a fault-recognizing circuit based on a current level triggering. An

electronic circuit was built for this need and was included in the system. It monitored the system

continuously and took action by generating trip signals when a fault was recognized. Interruption

was followed by a suitable timing of the fast contact separation in the main breaker and the current-

zero creation. An electrodynamically driven mechanism was successfully tested having a dead-time

of 300:s to separate the main breaker contacts. Furthermore, a maximum peak current injection of

3kA at a frequency of 500Hz could be obtained in order to produce an artificial current-zero in the

vacuum breaker. A successful current interruption with a prospective value of 5kA was achieved by

the hybrid switching technique. In addition, measures were taken to prevent overvoltages.

Experimentally, the concept of a hybrid breaker was compared with the functioning of all

mechanical (air breaker) and all electronical (IGCT breaker) versions. Although a single stage

interrupting method was verified experimentally, two two-stage interrupting methods were analyzed

theoretically.

vii

Samenvatting

Het gebruik van halfgeleider schakelaars om conventionele schakelaars te vervangen blijft een

utopia voor de foutstroom onderbreking in elektrische netten. Voor de halfgeleider

stroomonderbrekers zijn er beperkingen zoals het grote warmte verlies en de gevoeligheid voor

transienten waar conventionele schakelaars juist heel goed tegen bestand zijn. Samenstellingen van

beide soorten schakelaars noemt men hybride schakelaars. Hybride schakelaars maken gebruik van

twee afzonderlijke paden; voor de doorgaande nominale stroom en voor de foutstroom

onderbreking. Zulke schakelaars zijn grotendeels bedoeld voor de beveiliging van tractiesystemen.

In dit proefschrift zijn hybride technieken voor de stroombegrenzing en volledige halfgeleider

stroomonderbreking behandeld voornamelijk in gelijkstroom circuits.

In dit werk wordt een analyse gepresenteerd van het transient gedrag van hybride schakelaars en

worden hun functies vergeleken met conventionele en halfgeleider schakelaars. Een ontwerp voor

een hybride schakelaar is gerealiseerd en beproefd in een hiertoe opgebouwd gelijkstroom test

circuit. Een vacuum schakelaar is gekozen als de hoofdschakelaar in het hoofdpad. Hieraan parallel

is een commutatie pad aangebracht dat voorziet in stroombegrenzing en stroomonderbreking. Het

commutatie pad wordt alleen gedurende een stroomonderbreking bedreven om de commutatie van

de hoofdstroom mogelijk te maken. Het commutatie proces vereist componenten voor het opslaan

van energie en het onderdrukken van overspanningen. Door het vrijgeven van opgeslagen energie

kan een gecontroleerde tegenstroom injectie worden bewerkstelligd. Deze tegenstroom forceert een

stroom nuldoorgang in het hoofdpad. Een en twee-trap commutatie circuits zijn vergeleken.

Het onderzoek bevat zowel theoretisch als experimenteel werk. Een gelijkstroom circuit is gebouwd

om de kortsluitstroom te leveren van 7kA met een tijdkonstant 5ms. De bron heeft een nominale

spanning van 1kVDC door gelijkrichting van twee distributie transformatoren (10kV/380V). Het

ontwerp van de hybride schakelaar is gericht op toepassing voor het beveiligen van 750VDC tractie

systemen. De schakelaar is uitgerust met een foutdetectiesysteem gebaseerd op een stroomlevel trip.

De stroom in het circuit wordt bewaakt waarbij uitschakel commando gegenereerd wordt zodra de

stroom in het circuit de ingestelde waarde overschrijdt. Het feitelijke onderbrekingsproces wordt

bepaald door de snelheid van contactscheiding in de vacuum schakelaar en het creNren van de

benodigde nuldoorgang. Een snelle contactscheiding na ongeveer 300:s is gerealiseerd met een

elektrodynamische aandrijving. Een injectie stroom met een frequentie van 500Hz en amplitude

3kA is gebruikt voor het creNren van de nuldoorgang in de vacuum schakelaar. Een successvolle

stroomonderbreking van een prospective gelijkstroom van 5kA is met de hybride techniek

gerealiseerd. Bovendien is een geschikte overspanning onderdrukking bereikt. Het hybride concept

is experimenteel vergeleken met volledig mechanische en volledig electronische (IGCT)

schakelaars. Terwijl alleen de een-trap commutatie circuit ook experimenteel is uitgevoerd, zijn 2

twee-trap commutatie circuits alleen theoretisch geanalyseerd.

viii

CONTENTS

Summary vi

Samenvatting vii

1 Concepts of direct current limitation and interruption ........................ 11.1 Introduction ............................................................................................................. 11.2 Current limiting and interrupting techniques ........................................................... 3

1.2.1 Conventional direct current air breakers ....................................................... 31.2.2 Current Limiting Fuses ................................................................................. 61.2.3 Pyrotechnique ................................................................................................ 61.2.4 Positive Temperature Coefficient Resistors (PTCR) ..................................... 71.2.5 Superconducting Current Limiter (SCCL) ..................................................... 81.2.6 Solid-state breakers (SSB’s) ......................................................................... 9

1.3 Hybrid switching techniques ................................................................................... 101.4 Outline of thesis ....................................................................................................... 141.5 References and reading lists .................................................................................... 14

2 Analysis of commutating circuits for hybrid breakers .......................... 192.1 Introduction ............................................................................................................... 192.2 Analysis of the active commutation circuit ............................................................... 222.3 Dimensions for the components of the parallel circuit ............................................. 322.4 Simulating one-stage interruptions using MATLAB ................................................ 35

2.4.1 Successful interruption using a bi-directional switch .................................. 382.4.2 Successful interruption at the first current-zero using a uni-directional

switch ........................................................................................................... 392.4.3 Successful interruption at the second current-zero using a uni-directional

switch ........................................................................................................... 402.4.4 Unsuccessful interruption ............................................................................. 40

2.5 Protection against excessive overvoltages ................................................................ 412.5.1 Linear energy absorbing devices as the primary protection ......................... 442.5.2 Non-linear energy absorbing elements as the secondary protection ............ 452.5.3 Snubber circuits as the tertiary protection .................................................... 462.5.4 Applications of the freewheeling diode ....................................................... 482.5.5 Combining all the components ..................................................................... 48

2.6 Circuit simulation using PSPICE .............................................................................. 492.6.1 Device modelling ......................................................................................... 492.6.2 Simulation diagram ...................................................................................... 512.6.3 Simulation results using PSPICE ................................................................. 52

2.7 Conclusions ...............................................................................................................572.8 References and reading lists ...................................................................................... 57

3 Two-stage commutation circuits for direct current interrupters ......... 593.1 Introduction .............................................................................................................. 593.2 Basic principles of the first variant .......................................................................... 613.3 Basic principles of the second variant ...................................................................... 673.4 Computer simulation using PSPICE ......................................................................... 72

3.4.1 The short-circuit simulation of a DC source with a prospective current of10kA .............................................................................................................

73

ix

3.4.2 The one-stage DC interruption of 10kA with Itrip=5kA ................................ 74

3.4.3 The first variant of two-stage DC interruption with Itrip=5kA ...................... 75

3.4.4 The second variant of two-stage DC interruption with Itrip=5kA ................. 76

3.5 Conclusions .............................................................................................................. 773.6 References and reading lists .................................................................................... 77

4 Fault identification and direct current measurement ........................... 794.1 Introduction .............................................................................................................. 794.2 Realization of a detection circuit .............................................................................. 804.3 Direct current transducers ......................................................................................... 814.4 Rogowski-coils as current transducers ..................................................................... 844.5 Conclusions .............................................................................................................. 884.6 References and reading lists ..................................................................................... 88

5 Fast electrodynamic drives for the hybrid breaker ............................... 915.1 Introduction .............................................................................................................. 915.2 Description of the electrodynamic drive system ....................................................... 925.3 Mathematical analysis of the electrodynamic drive system ...................................... 94

5.3.1 Analysis of the electrodynamic drive using the coupled coils theory .......... 955.3.2 Analysis of the electrodynamic drive using equivalent lumped parameters 103

5.4 Comparison between simulation and measurement results ...................................... 1075.5 Conclusions .............................................................................................................. 1165.6 References and reading lists ..................................................................................... 116

6 Test circuit for DC breakers ..................................................................... 1196.1 Introduction ............................................................................................................... 1196.2 Analysis of rectifier circuits for a direct current short-circuit source ....................... 120

6.2.1 One 3-phase rectifier .................................................................................... 1216.2.2 Two 3-phase rectifiers in series .................................................................... 123

6.3 Realization of the direct current short-circuit source (DCSCS) ................................ 1296.3.1 Sequential timing operation ......................................................................... 1306.3.2 Overvoltage suppression .............................................................................. 1316.3.3 Surge phase-currents in the transformer secondary when switching-on ...... 1346.3.4 Overcurrent protection by I2t fusing ............................................................. 1386.3.5 Protection from overheating.......................................................................... 139

6.4 Simulation results ...................................................................................................... 1406.4.1 Simulation of a 10kA prospective short-circuit current ............................... 1416.4.2 A short-circuit current directly after the bridge ............................................ 142

6.5 Measured and simulated results ................................................................................ 1436.5.1 An open circuit test ...................................................................................... 1446.5.2 Short-circuit test ........................................................................................... 144

6.6 Conclusions ............................................................................................................... 1456.7 References and reading lists ...................................................................................... 146

7 Experimental and modelling results ........................................................ 1497.1 The air breaker experiment ....................................................................................... 1497.2 The hybrid breaker experiment ................................................................................. 151

7.2.1 Hybrid breaker test without anti-parallel diode across the vacuum breaker 1517.2.2 Hybrid breaker test with anti-parallel diode across the vacuum breaker ..... 156

7.3 The solid-state breaker experiment ........................................................................... 159

x

7.2.1 A brief description of the Integrated Gate Commutated Thyristor (IGCT) .. 1607.2.2 Experimental and simulated results using IGCT .......................................... 161

7.4 Conclusions ............................................................................................................... 1647.5 References and reading lists ...................................................................................... 165

8 General conclusions and future developments ....................................... 1678.1 General conclusions .................................................................................................. 1678.2 Future developments ................................................................................................. 169

Appendix A ....................................................................................................... 171

List of symbols ................................................................................................. 173

Acknowledgements .......................................................................................... 177

Biography ......................................................................................................... 179

Chapter 1

Concepts of direct current limitation and interruption

AbstractThis chapter presents an overview of available electric current limitation and interruption

techniques for protecting direct current systems. Some of them were installed in networks for long

periods while others are still in the development stage. Attention was focused on hybrid switching

techniques which were the subject of this study. Finally, the form of this thesis is discussed.

1.1 Introduction

Faults in electric currents impose severe thermal and mechanical stresses on electrical systems and

their related apparatus and the severity depends on the peak current value and the time of the

interruption. Thermal overloading can result in the burning of lines or cables, while electrodynamic

forces can deform bus bars or the coils of reactors and transformers. Moreover, arcing resulting

from a fault can initiate explosions. Protection against such events is usually provided by installing

circuit breakers or current limiters in the line to be protected. A conventional AC circuit breaker is

capable of conducting high continuous currents and has a substantial short-circuit interrupting

capacity; but it is not able to perform current limitation at nominal high current ratings. On the other

hand, fuses which are the best known current limiting devices, have a relatively low continuous

current rating. Due to this contradictory situation, an ideal circuit breaker should have the following

features which are difficult to combine into one concept:

• fast breaking action (at earliest current-zero);• minimal arcing after contact separation (to reduce contact erosion);• minimal conduction losses (a small voltage drop across the contacts);• reliable and efficient protection against all types of faults;• repetition of switching operation (allowing contacts to reclose after a fault clearance);• prevention of excessive overvoltage (during operation).

While these features are applicable for all circuit breakers, the task of direct current breakers is even

heavier because current limitation is required in the absence of current-zeros.

Direct current (DC) can be used for a large voltage range. According to the provisions of standards,

DC voltages are classified as low voltages (LV) up to 1200V (for instance, urban vehicles use

750V), systems for 1500V and 3000V are generally referred to as medium voltages (MV) and high

voltage (HV) is up to 1500kV. High voltage direct current (HVDC) technology applies especially to

high power transmission lines and for the ‘back-to-back’ stations of AC systems. In the medium

voltage range, direct current is used principally in electric traction, electric heating devices and

some drives. In the low voltage range, direct current is used for most kinds of urban and mine

electric traction, in various drives and converter systems. Short-circuit parameters for specific

2 Chapter 1

circuits are very different. Time constant values in HV circuits generally are rather high. In LV and

MV circuits, time constants are in the range of 5 to 30ms, prospective short-circuit currents are in

the range of 10 to 150kA, initial rates of current rise in the range of 0.5 to 15A/:s and magnetic

energy of the short-circuits in the range of 5 to 30kJ [1.1].

Current interruption in DC systems is more problematic than in AC systems since there is no natural

current-zero available and the magnetic energy stored in the circuit inductance has to be dissipated.

Breakers must not only be able to interrupt but also to reduce the current to zero within a certain

time [1.2,3,4,5]. During the interruption process, an excessive high voltage should not be created in

the system.

A current-zero can be created in two ways. The first one is the traditional method used in DC

circuits: a switching device develops arc voltages significantly in excess of the system voltage. The

second method creates a virtual current-zero by producing a counter-current from auxiliary

commutation circuits. This counter-current is usually provided by a capacitor bank. The diagram in

Figure 1.1 shows the classification of fault clearances in DC systems [1.4].

Inverse voltage method

DC Interruption

Current Limiting

Current commutation method

Current Oscillation

Self oscillation

Arc Switches & LC orRLC (active)

LC+Arc(passive)

Forced oscillation

Impulse circuitLC & Switches

R+Arc+Switches

FusesExplosive chargefuses

Non-linear materialor devices

ConventionalDC and HVDCbreakers

PTC-resistorSuperconductor Hybrid breakersPure solid-state

breakers

Unknown

Figure 1. 1 Classification of DC interrupting methods; where PTC: Positive Temperature Coefficient,

R: resistor, RLC and LC: oscillating loops with and without damping.

Concepts of direct current limitation and interruption 3

1.2 Current limiting and interrupting techniques

A current limiting device can be seen as a series of elements in the line; they offer low impedance to

the load current and high impedance to the fault current. In principle, it is not necessary for the

current limiting device itself to create the final current-zero. An auxiliary interrupter can be

connected in series in order to interrupt the limited current. In the following sub-sections, a number

of current limiting techniques are summarized.

1.2.1 Conventional direct current air breakers

Classical direct current interruption utilizes arc plasma in order to build up the inverse voltage

opposing the supply voltage for the current-zero creation. In the closed position, conventional

mechanical breakers are able to conduct high continuous currents with low power dissipation. In the

open position, these breakers provide excellent isolation. During the switching process, the arc

plasma causes contacts to erode and it generates noises and hot gasses. Moreover, these switches

generally react slowly. Hence, they hardly limit the maximal fault current, due to their slow opening

and long arcing times which together take longer than 20ms, which is usually above the time

constant of a circuit.

Interrupting DC is accompanied by different phenomena depending on the system’s parameters and

the exact location of the breaker. For example, see Figure 1.2, for a given simple 1kV DC system

containing the total lumped resistance RS=100mS and inductance LS=400:H with a breaker and

load. In the closed position, the breaker has a low resistance. During a fault, the current has to be

interrupted. The prospective short-circuit current is 10kA. The fault is distinguished from a normal

current load by the setting of a trip current value. As soon as the current exceeds that trip value, the

electromagnetic device in the circuit breaker (CB) separates the contacts creating an arc between the

electrodes.

LoadVCBi(t)

LS RS

ES

Figure 1. 2 A typical DC system with a conventional breaker.

The current can be reduced to zero only if the breaker can generate and maintain a switching arc

voltage of VCB that is higher than the system’s voltage ES for long enough. While this occurs, the

4 Chapter 1

breaker dissipates the inductive energy and any excess energy delivered by the source during the

interruption process. Obviously, this method is suitable for conventional air breakers. Figure 1.2shows the application of a conventional breaker in a simple circuit.

Much depends on the way that the switching arc voltage VCB is generated, this may be represented

by a function of several different quantities, such as: current, time derivative, stored magnetic

energy, time, etc. The equation for voltages in the circuit (Figure 1.2) is given by the expression:

E V V VS R L CB= + + (1.1)

where: V R i tR S= 1 6, V Ldi

dtL S= and V f idi

dti dt tCB =

I, , , .

During the switching process, the energy stored in the system must be dissipated by the circuit

resistance and the breaker. The energy dissipated in the resistance is calculated by:

W R i dtR S= I 2 (1.2)

And the arcing energy is given by the relationship:

W V i dtCB CB= I (1.3)

The let-through energy integral for the breaker can be computed using the expression:

i dt i t2 2I ∑≈ ∆ .

To demonstrate the interruption process, a switching arc voltage VCB across the breaker was

represented empirically by some idealized algebraic functions, in order to simulate the relationship

between the voltage across the breaker and the current through it. The trip current for opening the

breaker was set to 2kA. After a successful interruption, a transient recovery voltage appears across

the breaker. Now two cases: A and B, for empirical switching arc voltage traces will be presented

(Table 1.1). Table 1. 1 Switching arc voltage patterns.

Case A Case B

V tS t t

t t

t t tCB 1 6 1 6

=−

≤ ≤

≤ ≤

%&K'K

0 0

1

1

1 2

V tS t t

t t

t t tCB 1 6 1 6

=−

≤ ≤

≤ ≤

%&K'K

0

3

0

1

1

1 2

where: t1 is tripping time, t2 is current-zero time and S is the slope of the switching arc voltage. The

interruption time is defined as the time difference between t2 and t1 . In case A, the rate of change of

the switching arc voltage S was about 250V/ms which is a typical value for conventional breakers.

The switching arc voltage increased and suppressed the current within 6.8ms, see the left hand

column of Figure 1.3. In case B, the switching arc voltage grew three times faster (750V/ms). The

interrupting time then became 2.95ms, see the right hand column of Figure 1.3. The energy balance

for both cases can be calculated too as shown below the current and voltage graphs.


Case A Case B

ICB

VCB

0 2 4 6 8 100

500

1000

1500

2000

2500

3000

3500

4000

time [ms]

Cur

rent

[A

], V

olta

ge [

V]

Current and voltage

ICB

VCB

0 2 4 6 8 10-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A

], V

olta

ge [

V]

Current and voltage

WTot

WR

WCB

0 2 4 6 8 100

5

10

15

20

25

time [ms]

Ene

rgy

[kJ]

Energy balance

WTot

WR

WCB

0 2 4 6 8 100

1

2

3

4

5

6

7

8

time [ms]

Ene

rgy

[kJ]

Energy balance

Figure 1. 3 DC interruption for different patterns of the arc voltage with a trip current I trip=2kA;

where: ICB and VCB are the current in and voltage across the breaker and WTot, WR and WCB represent the

energy dissipated during the interruption; due to the total, line resistance and in the breaker, respectively.

From these results, it can be seen why the interruption must not be too fast because it caused high

surge voltages and not too slow because it caused long energy dissipation times that might damage

the contacts. The simulated results are summarized in Table 1.2.

Table 1. 2 The energy balance of the interruption;

WR and WCB for the dissipated energy in the line resistance and the breaker respectively.

WR

[Joule]

WCB

[Joule]

tint

[ms]

Imax

[A]

Case A with S=250V/ms 6322 13909 6.8 3929

Case B with S=750V/ms 1586 5576 2.95 2807

Adequate current limiting capacity could be achieved by minimizing the arcing time and generating

switching voltages 1.1 to 1.5 times higher than the supply voltage. This was possible by using a

special cooling mechanism to destabilize the arc plasma. Clearly, the appearance of switching

voltages across the breaker could cause energy dissipation through the arcing process. It was

6 Chapter 1

released mainly as heat to the surroundings. At the same time, this energy could damage and

corrode the contacts, thus shortening the breaker life and reducing its interrupting capacity.

In this thesis, a conventional air breaker was investigated and it is described in Chapter 7.

1.2.2 Current limiting fuses

The simplest current limiting device is the fuse [1.6], which is able to conduct a continuous current,

sense a fault automatically, limit the current, dissipate the energy and interrupt the fault. Current

limiting fuses unlike circuit breakers become operational before the short-circuit current reaches a

prospective peak value and thereby they effectively limit the let-through current to lower values.

Due to this current limiting action and the subsequent rapid interruption and isolation of the circuit,

thermal and electrodynamic effects on components of the circuit are reduced to a minimum. The

most important characteristics of fuses are low continuous current ratings, small size, cheapness and

suitability for both low and medium voltage AC and DC systems.

Self-recovery fuses based on sodium (Na) have been developed in the past [1.7], but so far further

development is uncertain; however, it should be noted that the fuse arc voltage will be

superimposed on the system and must, therefore, be limited to avoid excessive overvoltages. On the

other hand, energy considerations and fuse size limitations require that the fuse arc voltage is

typically up to twice the line to neutral voltage. Disadvantages of a fuse are its limited continuous

current rating and the need for replacement after each fault. These shortcomings can be partly

overcome by using triggerable current limiting devices with a parallel path for the continuous

current.

1.2.3 Pyrotechnique

By separating the continuous current conduction and interruption duties of triggerable current

limiting devices, the fusible element is shunted by a link which can be removed as required. The

interrupting duty is provided by a fuse once the current has been commutated from the shunting

device. In principle, such breakers consist of two main components, firstly a special copper

conductor which can carry large continuous currents during normal operation, but it can be sheared

at high speed by a pyrobreaking technique when overloaded, and, secondly, current limiting fuses

which are mounted in parallel with the large continuous current conductor [1.8]. A diagram of this

device is depicted in Figure 1.4.


Main conductor

Control Circuit

II dI/dt

Fuse

Figure 1. 4 Schematic of the Pyrotechnique

The main current conductor is broken by the pyrotechnique mechanism which is triggered by a

control circuit fed by a sensor system. The pyrotechnique mechanism contains an explosive

chemical charge. After that charge explodes, the current commutates to the fuse for controlling

current limitation and interruption. System parameters, such as the current and current slope, are

monitored using appropriate sensors. The signal generated by the sensors is compared with a preset

reference value in the control circuit and this can trigger the chemical charge. The pyrotechnique

circuit interrupter is very useful for protecting electrical systems with high continuous currents

(>5kA) when rapid interrupting is required. Clearly, this device can not be reset. The recovery time

is long and the cost of the replacement is high.

Several manufacturers deliver pyrotechnique products [1.8,9,10]. Their main uses are in medium

voltage AC networks although they can be used in DC systems too (but not for traction, due to fast

reclosing requirements).

1.2.4 Positive Temperature Coefficient Resistors (PTCR)

A composite of polymer and metal forms the main part of this device which like fuses, is inserted in

the line where it carries a rated current continuously. In such situations, the ohmic losses are

sufficiently low in order to prevent any real resistance increase. When the current suddenly

increases, the internal heating will exceed the natural cooling capability. If the temperature of the

polymer resistor increases above a critical limit, its resistance changes stepwise up to ten orders of

the normal magnitude (Figure 1.5). Consequently, the current is limited. A load breaker then

interrupts the final current. When the internal temperature returns to the ambient temperature, the

PTCR resumes normal service after the short-circuit has been removed; therefore, this device can be

used repetitively.

8 Chapter 1

20 40 60 80 100 120 140

10-2

100

102

104

106

108

Temperature [C]

Spe

c. R

esis

tivit

y [Ω

cm]

Figure 1. 5 Specific resistivity as a function of temperature TiB2.

These devices have been tested in 220V AC networks [1.11] when a prospective current of 16kA

can be reduced to just 3kA. Recently, a device for 12kV networks was announced [1,12] for

repetitive current limitation of prospective currents of 4 to 14kA within 1ms. Their reliability and

economy are not yet generally accepted and suitability for DC networks is also unknown as yet.

1.2.5 Superconducting Current Limiters (SCCL)

Because superconducting materials operate below the ambient temperature they require cooling in

order to maintain their superconducting properties. A fault current brings the superconducting

material to its normal resistive state which limits the fault current to an acceptable level. Basically,

two methods are employed; firstly, the so-called resistive method which uses a superconducting

element for transferring the fault current to a shunt resistor thereby limiting it, see Figure 1.6 (a).

Secondly, a system of coupled coils in which the secondary winding is connected to the

superconducting material, see Figure 1.6 (b). This is also known as the inductive method

[1.13,14,15].

Rshunt

iline

Cryogenic shield

Load breaker

(a)iline

Cryogenic shield

Load breaker

Lprim

Lsec

(b)Figure 1. 6 Schematic of the superconducting current limitation types; (a) resistive (b) inductive.

Resistive typeCommutating the current is accomplished by switching the superconducting element from a state of

zero resistance (this occurs below the critical temperature TC) to its resistive state, by increasing the

temperature above TC. The critical temperature TC depends on the superconducting material. Under

normal conditions, the load current flows through the superconductor but after a fault, the resistance


of the superconductor becomes much greater than the shunt resistance. So, after commutation only a

small current flows in the superconducting element. A load breaker for fully rated continuous

current can finally interrupt the limited current.

Inductive type:Under normal conditions, coupled coils consisting of a normal conducting primary coil and a

superconducting secondary coil act as a short-circuited transformer, so that a low impedance is

introduced into the primary circuit. But when the current exceeds a certain value, the current

induced in the secondary coil becomes too high, resulting in a change in the state of the

superconducting material. A high impedance value will then appear on the primary side and it limits

the fault current. Finally, a load breaker can disconnect this current. The secondary side can also

include a stack of short-circuit rings composed of superconducting material [1.16].

These interrupting devices have the following advantages : there are no moving parts; and there are

low losses, but the main drawback is their need for permanent cooling. Apparently, the

superconducting current limiter may become economically attractive for medium voltage AC

networks; however, the inductive type is unsuitable for DC systems.

1.2.6 Solid-State Breakers (SSB)

Since the invention of power semiconductors (power diode, thyristor, GTO-thyristor, power

transistor, IGBT, power MOSFET, and recently the IGCT), these components have been considered

for load switching in power networks [1.17,18,27,30,32,37]. Power semiconductor switches provide

a fast acting arcless mechanism with great reliability and reduced maintenance. There are some

disadvantages, however, such as their sensitivity to transient overvoltage and overcurrent. Such

transients can break down the junctions of power semiconductors. Also the power losses in them

can be relatively high which will limit their current ratings. Effective cooling is required too. Figure1.7 shows an overview of the voltage-current-range capacities of solid-state devices [1.28]. The

IGCT has a rating comparable with the GTO.

101

102

103

104

101

102

103

104

SCR

GTO-thyristorHPBT

IGBTSIT

MOSFET

Current maximum [A]

Figure 1. 7 Application ranges of power semiconductor deviceswhere SCR: Silicon Controlled Rectifier or Thyristor; GTO-thyristor: Gate Turn-Off thyristor;

HPBT: High Power Bipolar Junction Transistor; IGBT: Insulated Gate Bipolar Transistor;SIT: Static Induction Transistor; MOSFET: Metal Oxide Semiconductor Field Effect Transistor;

10 Chapter 1

As a controllable solid-state switch with its highest rating for forward currents and blocking

voltages, the thyristor is still invincible, followed by the GTO-thyristor and the IGCT. Since such

devices are controlled by currents, they can be unsuitable for some applications. Transistor-based

devices which are controlled by voltage are faster, but generally, they have much lower current

ratings and blocking voltages. Figure 1.8 shows a general application of solid-state breakers with

auxiliary protective devices.

Commutation Circuit

Voltage Limiting Element

Control Circuit

I

SSB dI/dt

Snubber Circuit

I

Figure 1. 8 Schematic of the Solid-state breaker (SSB).

Research and testing of breakers based on pure solid-state switches have been reported in many

papers both for AC and DC systems. Basically, two methods are known; one and two-stage

interruptions. One-stage interruption is the commonest type where the interruption process can be

difficult, because the device must reduce the overcurrent to zero [1.19,20,21,22,33,43,49,56].

During this process, the solid-state switches may undergo stresses and not be able to interrupt the

current, particularly in high voltage or high current systems. A combination of both series and

parallel arrangements of the solid-state switches may help solve the problem. However, a new

problem arises, that is, the sharing of voltages and currents among those switches. On the other

hand, two-stage interruption facilitates the interruption process by firstly reducing the fault current

to a much lower value after which the current is interrupted in the second stage [1.23].

In this thesis, a new solid-state device (IGCT) was investigated and the results are presented in

Chapter 7.

1.3 Hybrid switching techniques

Purely mechanical and solid-state breakers have both positive and negative points. Table 1.3summarizes and compares a number of breaker features.


Table 1. 3 Comparison of mechanical and semiconductor breakers.

Feature mechanical breaker semiconductor breaker

Switching mechanism metallic contact and arc PN-junction

Contact resistance µS- mS few mS

Power loss very small relative high

Voltage drop at rated current less than 10mV 1-2V

Galvanic isolation Yes No

Isolation capability very high limited (sensitive for overvoltage)

Overload capability very high limited by I2t value

Delay/response time few ms-20ms few µs

Life expectancy limited by contact erosion theoretically unlimited

Contact reliability high very high

Frequent switching ability high very high

Surge capabilities high limited (device dependence)

Overvoltage protection not necessary snubber circuit/varistor

Size & volume compact and small relatively big due to cooling beingnecessary

Maintenance necessary not necessary

Cost relatively low relatively high

Integrating solid-state devices with a mechanical breaker in a combined configuration is called the

Hybrid Switching Technique (HST) [1.24,25,26,31,35,36,40,42,44,48,49]. Intentionally, the positive

points from each method are retained and the negative points are eliminated. As a result of the fast

actions of semiconductors, the moving mechanism of the main contact is critical. The hybrid

switching technique is very suitable for limiting currents especially for repetitive use.

Generally, within a hybrid switching system, two different mechanical switches are incorporated; a

main breaker and an isolation switch; the main breaker is accompanied by a solid-state switch in

parallel. The main breaker provides a path for the continuous current, while the isolation switch

allows dielectric separation of the load after a current interruption. The solid-state switch will

operate only when the main current has to be interrupted. Figure 1.9 shows the basic components of

hybrid switching. A commutation path is connected in parallel with the main breaker, it includes a

snubber circuit as a transient suppressor and a voltage limiting element as an energy absorber.

During normal operation, the snubber circuit and voltage limiting element provide high impedance

paths. The commutation path is introduced by solid-state switches and only operates during the

interruption process. All the switches are controlled by electronic circuits.

12 Chapter 1

Snubber Circuit

Isolation Switch

Voltage Limiting Element

I

CommutationCircuit

Main Breaker

Solid-stateSwitch

Figure 1. 9 Basic components of hybrid switching techniques.

The fact that the reaction times of solid-state switches are much quicker than those of the

mechanical ones, means that the mechanical drive of hybrid breakers must be as fast as possible

[1.53]. The higher the rated current, the greater the mass of the mechanism that is needed. Also, the

main breaker MB must be able to maintain insulation at the time of the first current-zero event;

consequently, a vacuum breaker is most suitable because of its excellent insulating properties after

the current-zero. For the development of a high-speed current limiting circuit breaker based on

hybrid switching techniques, the features needed are listed in Table 1.4 [1.29,50,52].

Table 1. 4 Design requirements for hybrid breakers.Subject Purpose Methods

High-speed operation fast fault detecting time suitable criteria for faults in a certainnetwork based on parameters ∆i , di/dt

fast main breaker MB openingtime

• adoption of a fast electrodynamic drivesystem

• decrease the entire mass of the movingpart of the MB

High-current interruption fast current commutation frommain breaker MB tocommutating path

• reduction of circuit inductance on thecommutation path

• increase the arc voltage in the MBadaptation of main breakerMB and commutating devices

• application of fast switches forinitiating the counter-current, (highdi/dt and dv/dt capabilities)

limitation of the overvoltageduring the interruption

• using proper overvoltage protectiondevices (snubber and non-linearresistance)

• free-wheeling diodes to absorb the load-stored inductive energy

• increase the capacitance value anddecrease its initial voltages


Economic considerations will follow these engineering design aspects of hybrid breakers in the

field. Investigations of contact erosion with HST are reported in [1.34,38], whilst the role of ZnO as

a voltage clipper during operation is discussed in [1.45,46].

An interest in developing HST breakers has been shown by a few electric power companies and

their breakers are detailed in Table 1.5.Table 1. 5 Commercial types of HCB for fault current limitation.

ACEC (1992) Meiden (1995) Fuji(1994)

Zwar (1996)

rated voltage 750V,1.5kV,3kV(DC)

1.5kV(DC) 400V(AC) 3kV(DC)

rated current 6kA 4kA 2kA 250, 400A

interruptiontime

<2ms <16ms < 1ms <2ms

limiterinterruptingcurrent

<5kA of 63kA 19kA < 10kA of60kA

<5kA of 40kA, 20ms60kA, 30ms

arc No Yes No No

breakingcapacity

<200kA - - -

mechanicalswitch

fast switch in air fast switch in air fast switchin vacuum

fast switch in vacuum

solid-stateswitch

thyristor thyristor GTO-thyristor

thyristor

standard IEC 801, ISO 9001 JEC-7152-1991,JEC-2500, JEM-1425

- ISO 9001

Literature [1.39,41] [1.51] [1.29] [1.54,55]

The use of hybrid switching techniques is still very much in the development stage, because their

fundamental and technical limits are not generally known. Experimental results with test circuits are

rarely found in literature. The study described in this thesis concerns an analysis of hybrid systems,

both experimental and theoretical with simulated extensions. A prototype design for a hybrid

breaker was developed. That breaker has been tested in a specially designed test circuit using two

distribution transformers and double rectifier bridges (see Chapter 6). Its behavior has been

compared with those of purely mechanical or purely solid-state solutions (see Chapter 7).

In the Seventies, a severe DC interrupting problem appeared in the large Joint European Torus

(JET) project at Culham but it was solved by AEG. The interruption technique that they used was an

existing pressurized air breaker (80 bar) in a counter current injection circuit with a capacitor of

2mF at 25kV [1.57]. After intensive testing at KEMA, the system worked successfully for more

than 20 years. Also vacuum interrupters have been used for the Japanese Torus (JT60) in a similar

way by Toshiba. At Pulse Physics laboratory of TNO, a repetitive mechanical high current opening

switch of 500kA was designed to commutate current to a rail accelerator; it used commutation

14 Chapter 1

capacitance of 1.44F with initial voltage of 400V [1.58]. Nevertheless, this solution could not

penetrate into existing DC applications because of their triggering criteria and economics.

1.4 Outline of thesis

The outline of this thesis is given below.

Chapter 2 characterizes one-stage hybrid interruption techniques using analytic and numeric

solutions.

Chapter 3 presents two-stage interruption methods that alleviate the component problems, with the

aid of analysis and simulations.

Chapter 4 describes DC measurement and fault detection methods.

Chapter 5 describes and models the fast opening mode of the prototype breaker developed using a

specially designed electrodynamic drive.

Chapter 6 gives an explanation of the direct current short-circuit source with the models required for

the experiments.

Chapter 7 covers the experimental and simulation results including those for an air breaker, a hybrid

breaker and a solid-state breaker.

Chapter 8 presents and discusses the conclusions that can be drawn from the work described in this

thesis giving recommendations for future work.

1.5 References and reading lists

[1.1] Bartosik, M., “Progress in D.C. breaking”, Proc. 8th Int. Conf. Switching Arc Phenomena,

Summary of discussed items on fuses, Lodz, Poland 3-6 Sept. 1997, Vol. 2, p. 24-41.

(Published in 1998)

[1.2] Kenn Lian, “DC Breaker Applications”, HVDC Circuit Breaker Symposium 1972, IEEESummer Power Conference, p. 9-10.

[1.3] Schaufelberger, F.G., “HVDC Circuit Breakers- Application”, HVDC Circuit BreakerSymposium 1972 IEEE Summer Power Conference, p. 13-4.

[1.4] Pucher, W., “Fundamentals of HVDC Interruption”, Electra, No. 5, 1968, p. 24-38.[1.5] Lee, A., et. al., “The development of a HVDC SF6 breaker”, IEEE Trans. on Power

Apparatus and Systems, Vol. PAS-104, No. 10, October 1985, p. 2721-9.[1.6] Newbery, P. and Wright, A., “Electric fuses”, Proc. IEE, Vol. 124, No. 11R, November

1977, p. 909-24.[1.7] Nakayama, H. et.al., “Development oh high voltage, self-healing current limiting element

and verification of its operating parameters as a CLD for distribution substations”, IEEETrans. on Power Delivery, Vol. 4, No. 1, January 1989, p. 342-8.

[1.8] Benouar, M., “Pyrotechnique circuit interrupter for the protection of electrical systems”,IEEE Trans. on Power Apparatus and Systems, Vol. PAS-103, No. 8, August 1984, p.2006-10.

[1.9] -, Is-limiter, ABB Calor Emag Schaltanlagen AG, 1996.


[1.10] Das, J.C., “Limitations of fault current limiters for expansion of electrical distributionsystems”, IEEE Trans. on Industry Applications, Vol. 33, No. 4, July/August 1997, p.1073-82.

[1.11] Skindhrj, J., et.al., “Repetitive current limiter based on polymer PTC resistor”, IEEETrans. on Power Delivery, Vol. 13, No. 2, April 1998, p. 489-94.

[1.12] Strumpler, R., et.al., “Novel medium voltage fault current limiter based on polymer PTCresistors”, IEEE Trans. on Power Delivery, Vol. 14, No. 2, April 1999, p. 425-30.

[1.13] Tixador, P., et.al., “Hybrid superconducting a.c. fault current limiter principle and previousstudies”, IEEE Trans. on Magnetics, Vol. 28, No. 1, January 1992, p. 446-9.

[1.14] Gray, K.E., and Fowler, D.E., “A superconducting fault-current limiter”, Journal ofApplied Physics, 49(4) April 1978, p. 2546-50.

[1.15] Noe, M., Supraleitende Strombegrenzer als neuartige Betriebmittel inElektroenergiesystemen, PhD Dissertation 1998, Hannover University. (In German)

[1.16] Tanaka, T, et.al, “Electrical insulation in HTS power cables, fault-current limiters andtransformers”, Electra, No. 186, October 1999, p. 11-29.

[1.17] Smith, R.K., et. al., “Solid state distribution current limiter and circuit breaker: applicationrequirements and control strategies”, IEEE Trans. on Power Delivery, Vol. 8, No. 3, July1993, p. 1155-64.

[1.18] Ueda, T., et. al., “Solid-state current limiter for power distribution system”, IEEE Trans.On Power Delivery, Vol. 8, No. 4, October 1993, p. 1796-1801.

[1.19] Jinzenji, T., and Kudor, T., “GTO DC circuit breaker based on a single-chipmicrocomputer”, IEEE Trans. on Industrial Electronics, Vol. IE-33, No. 2, May 1986, p.138-43.

[1.20] Salama, M.M.A., et. al., “Fault-current limiter with thyristor-controlled impedance (FCL-TCI)”, IEEE Trans. on Power Delivery, Vol. 8, No. 3, July 1993, p. 1518-27.

[1.21] Chokhawala, R., and G. Castino, “IGBT Fault current limiting circuit”, IEEE IndustryApplications Magazine, September/October 1995, p. 30-5.

[1.22] Zyborski, J., J. Czucha and M. Sajnacki, “Thyristor circuit breaker for overcurrentprotection of industrial d.c. power installations”, Proc. IEE, Vol. 123, No. 7, July 1976, p.685-8.

[1.23] McEwan, P.M., and Tennakoon, S.B., “A two stage DC thyristor circuit breaker”, IEEETrans. on Power Electronics, Vol. 12, No. 4, July 1997, p. 597-607.

[1.24] Atmadji, A.M.S., “Hybrid switching: a review of current literature”, Int. Conf. on EnergyManagement and Power Delivery 1998, Mar. 1998 Singapore, p. 631-8.

[1.25] Amft, D., and Drummer, G., “Hohere Schaltstuecklebensdauer durchHybridschutztechnik”, Elektrie 24, 1970, H.5, p. 165-7. (In German)

[1.26] Humann, K., and Koppelmann, F., “Lichtbogenfreies von Wechselstrom mit mechanischenSchaltern in Verbindung mit Paralleldioden im Niederspannungsbereich”,Elektrotechnische Zeitschrift ETZ-A, Bd. 86, 1965, H. 15, p. 496-500. (In German)

[1.27] Baliga, J., Modern power devices, Wiley-Interscience, 1987.[1.28] Chen, D.Y., “Power Semiconductors: fast, though and compact”, IEEE Spectrum

Magazine, September 1987, p. 30-5.[1.29] Genji, T., et. al., “400V class high-speed current limiting circuit breaker for electric power

system”, IEEE Trans. on Power Delivery, Vol. 9, No. 3, July 1994, p. 1428-35.[1.30] Bonhomme, H., and Legros, W., “Use of Power semiconductors in circuit breakers”,

Proceedings of the fifth International PCI Conf., September 28-30 1982, GenevaSwitzerland, p. 319-25.

[1.31] Hartig, G., and Wedell, H., “Betrachtungen uber Ausgleichvorgange bei derParallelschaltung von mechanischen Schaltstrecken und Halbleiterleistungsventilen”,Elektrie 27, 1973, H. 6, p. 309-10. (In German)

16 Chapter 1

[1.32] Humann, K., and Koppelmann, F., “Kontaktloses Schalten mit steuerbarenHalbleiterelementen im Niederspannungsbereich”, Elektrotechnische Zeitschrift ETZ-A,Bd. 86, 1965, H. 17, p. 552-7. (In German)

[1.33] Bonhomme, H., et.al., “A 6kV/500A Switching device with thyristors : dream or reality”,Proceedings of the sixth International PCI Conf., April 1983, Orlando, USA, p. 1-5.

[1.34] Greitzke, S., Untersuchungen an Hybridschaltern, Dissertation TU Braunschweig, 1988.(In German)

[1.35] Bonhomme, H., et. al., “A semistatic switching device”, Int. Conf. on Power Electronicsand Variable-Speed Drives, PEVSD '84, London, May 1984, p. 27-9.

[1.36] Krstic, S., and P.J. Theisen, “Push-Button Hybrid Switch”, IEEE Trans. on Components,Hybrids and Manufacturing Technology, Vol. CHMT-9, No. 1, March 1986, p. 101-105.

[1.37] Holroyd, F.W., and Temple, V.A.K., “Power Semiconductor devices for hybrid breakers”,IEEE Trans. on Power Apparatus and Systems, Vol. PAS-101, No.7, July 1982, p. 2103-8.

[1.38] Greitzke, S., and Lindmayer, M., “Commutation and erosion in hybrid contactor systems”,IEEE Trans. on Components, Hybrids and Manufacturing Technology, Vol. CHMT-8, No.1, March 1985, p. 34-9.

[1.39] Collart, P., and Pellichero, S., “A new high speed DC circuit breaker: the DHR”, IEEColloquium on Electronic-aided current limiting circuit breaker developments andapplications, No. 1989/137, p. 7/1-3.

[1.40] Chaly, M., et. al., “Switching arc in combined switching systems”, 3th Int. Symp. onSwitching Arc Phenomena (SAP), Lodz, Poland, September 1977, Part 1, p. 153-6.

[1.41] Collart, P., and Pellichero, S., “A super high speed intelligent circuit breaker”, GECAlsthom Technical Review, No. 9, 1992, p. 35-42.

[1.42] Theisen, J., et. al., “270-V DC Hybrid Switch”, IEEE Trans. on Components, Hybrids andManufacturing Technology, Vol. CHMT-9, No. 1, March 1986, p. 97-100.

[1.43] Lasota, R., “Reduction of switching arc energy in direct current hybrid switches with GTOthyristors”, 7th International Conference Switching Arc Phenomena (SAP), 27 September -1 October 1993, Lodz, Poland, p. 264-7.

[1.44] Shammas, N.Y.A., “Combined conventional and solid-state device breakers”, IEEColloquium on Power semiconductor devices, No. 1994/247, p. 5/1-5.

[1.45] Hasan, S., et.al., “The critical switching parameters of a new hybrid AC low voltage circuitbreaker without and with ZnO varistor”, 6th Int. Symp. On Short-Circuit Currents inPower System, September 1994, Liege Belgium, p. 3.11.1-8.

[1.46] Czucha, J., et.al., “AC low-voltage arcing fault protection by hybrid current limitinginterrupting device”, 7th Int. Symp.on Short-Circuit Currents in Power Systems, September1996, Warsaw Poland, p. 3.8.1-5.

[1.47] Brice, C.W., et.al., “Review of Technologies for Current-Limiting Low-Voltage CircuitBreakers”, IEEE Trans. on Industry Applications, Vol. 32, No. 5, Sept./Oct. 1996, p. 1005-10.

[1.48] Lasota, R., “The work of hybrid switches in low voltage direct current circuits”, FifthInternational Symposium on Switching Arc Phenomena (SAP), September 1985, Lodz,Poland, p. 152-5.

[1.49] Lasota, R., “Some problems of arc energy limitation in the DC hybrid switches with powerMOSFET”, Sixth International Conference on Switching Arc Phenomena (SAP),September 1989, Lodz, Poland, p. 40-3.

[1.50] Bartosik, W., “Theoretical and practical aspects of fault direct current switching-off bycounter-current”, Proc. of the Int. Conf. on Electrical Contacts, Arcs, Apparatus and TheirApplications, May 3-7 1989, Xi'an China, p. 5-12.


[1.51] Takehara, K. and Yamada, Y., “High-speed circuit-breaker incorporating a digital currentdetector to support safe operation of electric trains”, Meiden review [InternationalEdition], 1995, No. 3, p. 29-32.

[1.52] Shammas, N.Y.A., and Naumovski, N., “Combined conventional and solid-state devicebreakers 'Hybrid circuit breakers' “, Proc. 29th Univ. Power Eng. Conf, UPEC 1994,Galway (Ireland), p. 716-9.

[1.53] Czucha, J., and J. Zyborski, “Ultra fast hybrid circuit breaker for AC network theoreticalanalysis”, 29th University Power Engineering Conf, UPEC 1994, Galway Ireland, Vol. 1,p. 173-6.

[1.54] -, Ultra high-speed direct current-limiting vacuum circuit breakers, Manufacture CatalogueSheet, 1996, Zwar, Poland.

[1.55] Bartosik, W., et. al., “Arcless DC Hybrid circuit breaker”, Eight International Conferenceon Switching Arc Phenomena (SAP), September 1997, Lodz Poland, p. 115-9.

[1.56] Dawson, F.P., et.al., “A fast DC current breaker”, IEEE Trans. on Industry Applications,Vol. IA-21, No. 5, Sept./Oct. 1985, p. 1176-81.

[1.57] Dokopoulos, P. and Kriechbaum, K., “Gleichstromschalter fuer 73kA und 24kV in derPlasmaphysik”, Elektrotechnische Zeitschrift ETZ-A, Bd. 97, 1976, H.8, S. 499-503. (InGerman)

[1.58] Dijk, E. van., “Experimental results obtained with the 1 MA resonant series counterpulseopening switch system, developed at TNO”, 11th IEEE International Pulsed Power Conf.,June 29 - July 2 1997, Baltimore, Maryland, USA, p. 287-92.

18 Chapter 1

Chapter 2

Analysis of commutating circuits for hybrid breakers

AbstractFor DC networks, current limiting devices are necessary for disconnecting faulty circuits rapidly.

This work presents an analysis of the hybrid techniques which apply to current commutation.

Firstly the basic commutation circuit known as one-stage interruption is described. Results from

simulations of the complete system are presented giving an estimation of the possible transient

behavior during the interruption processes. Analytical and numerical solutions have been obtained

for the relevant differential equations.

2.1. Introduction

The fact that DC systems have no natural current-zero, becomes a problem when currents have to be

interrupted. Principally, breakers may use two ways of producing current-zeros. According to one

method, an arc voltage is created between the electrodes of the breaker which opposes the supply

voltage. The breaker has to be able to produce arc voltages greater than the system’s voltage in order

to produce the current-zero. The success of arc plasma quenching depends on the ability of the

surrounding medium to absorb all the inductive energy stored in the system. Unfortunately, this

method eventually results in long arcing times causing considerable erosion of the contacts of the

breaker. The greater the inductive energy content of the system, the longer the arcing times

necessary. An effective current limitation may be hampered by the chance of the contacts opening

and a fast voltage building up in the early stages of the interruption process.

Another way of interrupting a current is known as current commutation. The commutation process

requires additional circuits to be connected in parallel across the main breaker. Generally, such

circuits are able to store a certain amount of energy and by discharging this energy, a controlled

counter-current injection can be made. This counter-current injection opposes the main current in

the breaker (by superposition) in order to produce a forced current-zero. Indeed, current-zero can

only be produced if the counter-current injected is greater than the instantaneous fault current;

consequently, it is very important to identify the fault current level in which the counter-current

injection will be able to force the current to zero. This method reduces the arcing time effectively

thereby reducing contacts erosion [2.1]. The basic DC commutation system is shown in Figure 2.1[2.2,3].

20 Chapter 2

MOV

RLoad

ES

iS iB S1

DFW

CC LC

iMOV

S3

S2

-

+

iCRT

LT LLoadvC

Figure 2. 1 Basic DC systems with a commutation circuit; S1: main breaker, S2: auxiliary switch,

S3: load breaker, CC and LC : commutation capacitor and coil, and MOV: metal oxide varistor.

A DC source ES with circuit resistance RT and inductance LT is connected in series with a main

breaker S1 and a load breaker S3 followed by a load. The circuit resistance and inductance may

comprise the value of the DC source and linking lines or tracks. The current normally passes

through the main breaker S1. A commutation circuit is connected in parallel across the main breaker

S1; it consists of capacitor CC, coil LC and auxiliary switch S2. The metal oxide varistor (MOV)

connected across S1 have a clamp voltage protecting devices in the system. The capacitor CC can be

initially pre-charged, as is required of the active commutation mode, otherwise it is called the

passive commutation mode. Because the load is inductive, the system may require a freewheeling

diode DFW in parallel with the load side. The freewheeling diode DFW will bypass the circuit current

when the current slope changes to negative. Intentionally, this is very useful for avoiding any energy

being transferred from the downstream lines (transmission lines and inductive loads) to the

commutation capacitor CC during the interruption. In contrary, the source side inductive energy

cannot be bypassed using the freewheeling diode.

In the active mode, a current oscillation provided by the precharged commutation capacitor CC will

arise instantly and it will grow to oppose the current in the main breaker S1 when the auxiliary

switch S2 is closed. A trip command provided by a fault sensor controls closing of the auxiliary

switch S2 and opening the main breaker S1. A proper combination of LC and CC will create an

oscillation that generates at least one current-zero crossing in the main breaker S1. After an

interruption at current-zero in the main breaker S1, the main current iS will commutate to the

parallel path thereby changing the polarity of the capacitor CC. Oscillation of the commutated

current will create another current-zero crossing in the switch S2 that will be determined by the

upstream line and the commutation parameters. Therefore, the capacitor will be charged up to a

value depending on the initial voltage, the system voltage and a voltage related to the stored

inductive energy in the upstream line. In short, the residual capacitor voltage will depend on the

network parameters to a great extent. When the main breaker S1 is not separated at the first current-

zero, the current interruption can be produced at the second current-zero crossing. If the switch S2 is

Analysis of commutating circuits for hybrid breakers 21

bi-directional, the damped current will oscillate in the circuit until it becomes zero and the capacitor

voltage becomes equal to the supply voltage. As a matter of fact, this oscillation enables the stored

inductive fault energy to be dissipated in the circuit resistance. However, the switch S2 and the

rectifier station are generally uni-directional. As a consequence, after the first current-zero occurs in

the switch S2, it opens and the capacitor CC will have to withstand high voltages. At this instant,

current interruption is achieved. Finally, the load breaker S3 can be opened without any arcing. For

a successful commutation, the main breaker S1 must be able to maintain the isolation between its

electrodes at and after the current -zero creation. This active commutation circuit is known as the

one-stage interruption method. Disadvantages of this method include:

• the need of a continuous external voltage for charging the capacitor CC;

• high overvoltages across the breaker when a current interruption occurs and this requires

voltage limiting devices, such as arresters, MOV’s, etc.;

• CC must have a large capacitance value, consequently, it must have a large size and a high

price;

• the commutation circuit may be unable to fulfill its function after an interruption failure.

Apart from the active mode described above, a passive mode is needed sometimes. In the passive

commutation mode, it can be assumed that a short circuit has been caused on the load-side, resulting

in fault current iS=iB flowing in the circuit. When the fault current iS exceeds the critical limit, the

main breaker S1 will open drawing an arc between its electrodes. The switch S2 subsequently must

be closed in order to initiate a counter-current iC in the branch S1. A proper combination of LC and

CC will create an oscillation that generates at least one current-zero crossing in the main breaker S1.

For the passive mode, the current commutation needs a longer time due to the interaction between

the arc and the LCCC-loop. An oscillatory current will be created by an uncharged capacitor that is

repeatedly charged and discharged by the arc voltage in the course of current interruption. The

condition for current interruption in the main breaker S1 is created solely by passive elements in

parallel with the breaker and by the properties of the arc itself. When the contacts are separated, arc

plasma is formed. The arc voltage will increase further as a result of arc lengthening and the heat

loss increases. During a short period, the current in the LCCC branch will show a growing

oscillation. At a time when its magnitude is equal to the main current, current-zero in the main

breaker S1 can be produced. The main current iS commutates entirely to the parallel path.

Consequently, the source will charge up the capacitor increasing its voltage. At a moment that the

current is zero in the auxiliary switch S2, the capacitor will be fully charged so that its voltage will

reach its highest value. As a result, the interruption succeeds. If the auxiliary switch S2 is bi-

directional, the oscillation can continue until the capacitor voltage is equal to the supply voltage,

otherwise the interruption will occur as soon as the current becomes zero.

Every DC system has a maximum fault current. Obviously, the rate of change of the fault current

depends on the line inductance. Since the energy stored in the commutation capacitor is limited too,

there will be another significant quantity of energy available for creating a successful current-zero.

Therefore, the maximum trip current for recognizing a fault has to be determined carefully for each

DC system. As an illustration of the current interruption procedure, a DC system with a prospective

22 Chapter 2

fault current of 10kA will now be analyzed. For the fault current, a rate of change between 1 and

10A/:s has been assumed. Figure 2.2 shows typical DC faults and their current slopes.

τ =1ms τ =3ms τ =6ms τ =9ms

0 2 4 6 8 100

1

2

3

4

5

6

7

8

9

10

time [ms]

Cur

rent

[kA

]

(a)

τ =1ms τ =3ms τ =6ms τ =9ms

0 2 4 6 8 100

1

2

3

4

5

6

7

8

9

10

time [ms]

di dt__ [

A/µ

s ]

(b)Figure 2. 2 Typical DC faults with Ipros=10kA and 4 different time constants;

(a) the currents and (b) the current slopes.

This study will now concentrate on the active counter-current injection method which is controlled

by a uni-directional solid-state switch. That will lead to the realization of a hybrid breaker with a

current limiting ability using the current commutation principle which can limit a 5kA prospective

DC fault to just 3kA in 1kV/1kA DC systems.

2.2. Analysis of the active commutation circuit

A typical sequence for one-stage DC interruption is illustrated in Figure 2.3. For convenience, the

current is represented by a straight line rising from zero.

t

i

i

1st CZ

t3

tiB

Isp

t

t1

iiS

It1 iC

(a) t0#t#t1

(c) t2#t#t3

(b) t1#t#t2

vC

VCO

t

t

VCE

iS

t2

iS=iC

t2 t3

t1

t2

VCt2

t1

t0

t0

It1

It2

vC

vC

t

2nd CZ

Figure 2. 3 The sequence of one-stage DC fault interruption; CZ current-zero crossing in the main breaker.


At time t1, the source current iS reached a level It1, see (a), the threshold for starting the interruption

process. A counter-current injection iC was applied to oppose the source current iS, see (b). As a

result, the current in the breaker iB would decrease. At instant t2, the current iB became zero and the

voltage across the commutation capacitor reached VCt2. After that, current-zero was produced and

the current iS was completely commutated from the main breaker to the parallel path. During the

interval t1-t2, the source current iS kept increasing. When charging in the interval t2-t3, the source

current was firstly increased due to the stored magnetic energy transfer and that remaining in the

capacitor CC. Subsequently, charging changed to the opposite polarity. At time t3, the source current

iS reached zero when the capacitor CC was fully charged, see (c). The capacitor current was

eventually interrupted and its final voltage (VCE) increased to a higher value but having an opposite

polarity. Hereafter, the load breaker S3 could be opened in order to isolate the fault from the source.

The final voltage across the capacitor CC had to be limited which depended on the magnetic energy

stored in the system, the initial voltage of the capacitor, and the supply voltage. When that voltage

reached the clipping value of the arrester, it limited the overvoltage. This process prevented any

further voltage rise as the arrester partly absorbed the inductive DC-line energy (W Lim = 1 2 2).

Obviously, a proper choice of arrester voltage for the clip was vital. Energy absorption by the

arrester would lead to a decay of the fault current at a certain time depending on the line inductance

and the last current value before the commutation. However, in a very high inductive system, the

arrester might not be capable of absorbing such amounts of energy repetitively. If this energy was

excessive, it might cause permanent damage or even destruction of associated devices (S2, MOV,

capacitor, etc.). Accordingly, the whole breaker would not interrupt the current and it would lose its

ability to function repetitively.

For the sake of clarity, the following analysis does not include circuit resistance. Furthermore, the

line inductance on the source side LT was considerably larger than in the commutation coil LC. The

energy required for a counter-current injection depended on the capacitance value and the initial

voltage (W C VCO C CO= 1 2 2). Such energy had to be prepared and maintained permanently. The larger

currents had to be interrupted so that more energy was needed. Charging energy for the capacitor

could be supplied by the main voltage system itself or by means of an external supply.

In an oscillatory circuit without damping, the maximum counter-current injection could be

determined roughly by the equation (2.1) :

$i VC

LC COC

C

= . (2.1)

Obviously, a high initial voltage would result in a high initial rate of change of the counter-current.

A rough expression for this slope of the current is di dt V LC CO Cmax= − . The following initial

conditions apply; S1 is closed, S2 is open, v t VC t CO1 6 = =0 and the circuit current could be considered

to increase linearly. Assuming, that the current in the source iS reached the trip value, then S2

24 Chapter 2

closed and initiated a counter-current iC . This counter-current can be represented linearly, see

Figure 2.3 (b), so that i t tV LC CO C1 6 1 6= − and the capacitor voltage can be written as :

v tC

i d Vt

L CV VC

CC

t

COC C

CO CO1 6 1 6= + ≈ − +I1

20

2

τ τ

At time t2 , current in the breaker becomes zero; which can be defined as current-zero time tz

i t i t i tB z S z C z1 6 1 6 1 6= − . This current will be i t i t V LC z z z CO C1 6 1 6= = − and the capacitor voltage

changes to v t t V L C VC z z CO C C CO1 6 3 8 1 6= − +2 2 . Subsequently, current from the source will follow the

commutation path, see Figure 2.1. This current obeys the following differential equation:

E v t L Ldi

dtv tS C z T C

CC+ = + +1 6 1 6 1 6 (2.2)

with the initial current i t iC z z1 6 = .

The solution of this differential equation is :

i tE v t

L Lt t i t tC

S C z

o T Co z z o z1 6 1 6

1 6 1 62 7 1 62 7=+

+

− + −

ωω ωsin cos (2.3)

where : ωo

T C CL L C=

+1

1 6 .

Introducing a new parameter :

tan ηω

ω=

++

=+

i L L

E v t

i

C E v tz o T C

S C z

z

o C S C z

1 61 6 1 62 7 (2.4)

and using the trigonometric equivalent, the capacitor current from equation (2.3) can be rewritten

as:

i tE v t

L Lt t

C E v tt t

CS C z

o T Co z

o C S C zo z

1 6 1 61 6 1 62 7

1 62 7 1 62 7

=++

− +

=+

− +

ω ηω η

ωη

ω η

cossin

cossin

(2.5)

By integrating this current, the capacitor voltage becomes : v tC

i d KCC

C

t

t

z

1 6 1 6= +I1 τ τ

and substituting : t tz= , the integration constant can be found : K ES= − .

The capacitor voltage is governed by :

v tE v t

t t ECS C z

o z S1 6 1 6 1 62 7=+

− + −

coscos

ηω η (2.6)

The maximum current of the capacitor obtained from equation (2.5) at tx occurs when :

sin ω ηo x z ot t− + =1 62 7 1, so that iC E v t

Co C S C z

omax

max

cos=

+

ωη

1 62 7.

From equation (2.4), the maximum current iz max can be defined as :


tan max

max

ηωo

z

o C S C z

i

C E v t=

+ 1 62 7 (2.7)

so that :

t ti

C E v tx z

o

z

o C S C z

= + −+

1

2ωπ

ωarctan max

max1 62 7 (2.8)

Further, from the trigonometry, we can define ηoz

C

i

i=

arcsin max

max

or sin max

max

ηoz

C

i

i= .

The time when the capacitor voltage is zero at the instant when v tC y3 8 = 0, can be derived from

equation (2.6), namely coscosω η η

o y zS

S C z

t tE

E v t− + =

+

3 84 9 1 6

so that :

tE

E v tty

o

S

S C zz=

+

−

+1

ωη ηarccos

cos

1 6 (2.9)

The current becomes zero when i tC int1 6 = 0. The time tint is called the total interrupting time and it is

written as :

t

i

C E v tt

z

o C S C z

ozint

arctan

=

−+

+

πω

ω1 62 7

(2.10)

From equation (2.7) : ωηo

z

o C S C z

i

C E v t=

+max

maxtan 1 62 7 .

Substituting this into equation (2.9) and extracting CC , gives :

Ci

E v tE

E v t

t tCz

o S C zS o

S C zo

y z=

++

−

−max

maxtan arccoscosη η η1 62 7 1 6

3 8 (2.11)

By definition : L L LC

L T Co C

= + = 12ω

, therefore : LC E v t

iLo C S C z

z

=+tan max

max

2 η 1 62 7

After substituting (2.11) and performing algebraic manipulation, this becomes :

LE v t t t

iE

E v t

L

o S C z y z

zS o

S C zo

=+ −

+

−

tan

arccoscos

max

max

η

η η

1 62 73 8

1 6(2.12)

To make the expressions (2.11) and (2.12) appropriate, it is necessary to define three new terms:

Ci t

v tt tCo

C z

C zy z= −max

max

1 61 6 3 8 , L

v t

i tt tLo

C z

C zy z= −max

max

1 61 6 3 8 and parameter k

v t

EC z

S

= max1 6.

A per unit basic expression can be obtained by simplifying the above ratio as :

26 Chapter 2

C

C

k

E

E v t

C

Co

oS o

S C zo

=

+

+

−

1

11

tan arccoscosη η η1 6

(2.13)

and

L

Lk

E

E v t

L

Lo

o

S o

S C zo

=+

+

−

tan

arccoscos

η

η η

11

1 6(2.14)

The graphs in Figure 2.4 represent equations (2.13) and (2.14) for two different k values. The

horizontal axis represents the term sin ηo from equation (2.7).

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.91

2

3

4

5

6

7

8

9

10

izmax

icmax

____

C

C

CC

o

____

k=1k=4

(a)

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.90

2

4

6

8

10

12

14

16

18

20

izmax

icmax

____

L

L

LL

o

____

k=1k=4

(b)

Figure 2. 4 (a) The unit base of the capacitor and (b) The unit base of the circuit inductance.

Next, in order to make the circuit analysis more realistic, circuit resistance had to be included in the

analytical solution. Figure 2.5 presents the extended circuit to show the interrupting sequences.

Additionally, discharged energy stored in the commutation capacitor can be taken into account by

extending an energy absorbing circuit across the capacitor. The energy absorbing circuit (LA, and

RA) played a part only after the capacitor’s polarity changed, so that in the idling (waiting) state, the

pre-charged capacitor had to retained its stored energy continuously. Therefore a reverse biased

diode D1 was required. The following new symbols are introduced now : the MS-make switch and

the Thy-thyristor as an auxiliary switch. When considering ideal DC systems, the following

assumptions can be made :


• the DC voltage source ES is constant in time and the internal resistance is negligible;• switches are ideal (no voltage drop or heat loss) and they introduce no transients during

switching;• the lines and devices have linear characteristics without limitation for the rate of change of

current and voltage.Therefore, the interruption process could be separated into intervals in which each interval

represents a linear differential equation. In this way, each differential equation could be solved

successively to give analytical solutions.

+

MS

S1-

Thy

LA

RA

D1

+

-

MS

AB

+

MS

-

Thy

C

+

MS

-

Thy

D

+

MS

-

Thy

E

+

MS

-

RA

LA

D1

ES

ES

ESES

ESES

RS LS

RS LS

RS LSRS LS

RS LS RS LS

CC

LC,RC

CC

CC CC

LC,RC

LC,RC

vCS1 S1

Figure 2. 5 The sequence of the one-stage interruption; MS: make switch, S1: main breaker.

By solving the differential equations that corresponded to each interval, the analytical solution was

obtained, where the end state of the previous interval was introduced as the initial state of the

following interval.

A The first interval 0 1≤ ≤t t

In this interval, when make switch MS was closed, the current can be expressed by the differential

equation :

Ldi t

dtR i t v tS

SS S S

1 6 1 6 1 6+ = , (2.15)

Generally, before a fault occurred, the rated current I R flowed, so that the initial condition becomes:

i t IS t R1 6 = =0 otherwise i tS t1 6 = =0 0 .

The source is defined as a constant voltage source: v t ES S1 6 = for all values of t . The source current

iS can be solved from the expression:

i t I I e IS R

t

R( ) = − −

+∞

−1 6 1 τ (2.16)

where: τ is the time constant (τ = L

RS

S

), LS and RS are the inductance and the resistance at the fault

location relative to the source; I∞ is the steady-state fault current (prospective) determined only

28 Chapter 2

from the resistance and DC voltage system, (IE

RS

S∞ = ). For convenience, it is assumed that I R is

zero. In the commutation path, the capacitor voltage and its current are constants

v t v t VC C CO( ) ( )= =1 and i tC ( ) = 0. Initially, the current in the breaker was equal to the current in the

source until the commutation process occurred during the next interval i t i tB S( ) ( )= . At the end of

the first interval, the source current becomes i t IS t( )1 1− = (where a counter-current injection would

be performed).

B The second interval t t t1 2≤ ≤The counter-current iC was injected during the second interval in which the current in the main

breaker opposed the counter-current. Then the current in the source satisfies the following

differential equation:

Ldi t

dtR i t v tS

SS S S

1 6 1 6 1 6+ = (2.17)

with the initial value : i t i t IS t t S t1 6 1 6= = =1 1 1.

The commutation capacitor discharged its stored energy obeying the following differential equation:

L Cd v t

dtR C

dv t

dtv tC C

CC C

CC

2

2 01 6 1 6 1 6+ + = (2.18)

The resistance of the commutation path was RC; therefore, the initial conditions are v t VC t t CO1 6 = =1

and dv t

dtC

t t

1 6= =

10 .

The counter-current obeys the following relationship:

i t Cdv t

dtC CC1 6 1 6= (2.19)

This can be rewritten as: L Cd i t

dtR C

di t

dti tC C

CC C

CC

2

2 01 6 1 6 1 6+ + = ,

with the initial conditions: i tC t t1 6 = =1

0 and di t

dt

V

LC

t tCO

C

1 6= = −

1.

Applying the superposition theory allows the breaker current to be calculated as:

i t i t i tB S C1 6 1 6 1 6= − (2.20)

Solutions for these differential equations give the following expressions:

The source current increase is given by:

i t I I e IS t

t t

t( ) = − −

+∞

−−

1 111

1 61 6

τ (2.21)

The capacitor voltage and current are given by:

v t V e t t A t tC COt t( ) cos sin= − + −− −α β β1

1 1 11 6 1 62 7 1 62 7 (2.22)

i t A e t tCt t( ) sin= −− −

2 11α β1 6 1 62 7 (2.23)


where: α ω β ω α= = = −R

L L CC

Co

C C

o2

1 2 2; ;

A

AV

LCO

C

1

2

=

= −

αβ

βDuring the commutation process, the current in the main breaker was i t i t i tB S C( ) ( ) ( )= − . This

current would become zero at time t2 , when the source current commutated to the parallel path. The

time required to reach current-zero was T t tz = −2 1. The determination of this time zero Tz can be

obtained from the function f I I e A e TT t

Tz

z

z: sin= − − =∞ ∞

− +−

1

2 01 6

1 6τ α β , where t1 is the instant when

the counter-current began to flow with reference to the beginning of the fault time. This function is

a transcendental equation; so that the solution for Tz can only be found numerically using the

Newton-Raphson method [2.28]. Generally, this method could be used to find the root of the non-

linear equation f by successive linearization, given that: x xf x

df

dxx

n nn

n

= −−−

−

11

1

1 61 6

. From function f ,

the following expression could be derived for the iteration process:

T T

I e A e T

I eA e T T

z new zold

T tT

zold

T t

Tzold zold

zold

zold

zold

zold

= −−

−

+ −

∞

− +−

∞

− +

−

11

1

2

2

1 6

1 6

1 6

1 6 1 62 7

τ α

τα

β

τα β β β

sin

sin cos

(2.24)

The new Tz computation was repeated by back substitution until the function f Tz( ) ≈ 0 was

satisfied.

In order to have current-zero in this interval, the maximum counter-current had to be at least the

same as the fault current; therefore, a maximum trip level for the fault current had to be determined

from the following relationship: I i t TC S trip zmax ≥ +3 8. Generally, t ttrip ≤ 1, in a system without delay

and it is clear that t ttrip = 1. The trip level current Itrip could be obtained from:

I i t I etrip S trip

ttrip

= = −∞

−( ) ( )1 τ . After algebraic manipulation, the maximum trip level is expressed as:

I I e A etrip

T Tz z

≤ − +∞

−( )1 2

2τ τπ α

β . (2.25)

This relationship shows the necessity for matching the network parameters (τ , I∞) and the

commutation parameters (VCO , α and β ) for a successful interruption.

When: i tB ( )2 0− = , the final capacitor voltage v t VC Ct( )2 2− = and current i t i t IS C t( ) ( )2 2 2

− −= = could

be used as the initial inputs for the next interval.

C The third interval t t t2 3≤ ≤ .

30 Chapter 2

In this interval, the current at the source would equal to the current in the capacitor. Both the

capacitor voltage and current would have the following initial values; v t VC Ct( )2 2+ = and

i t i t IC S t( ) ( )2 2 2+ += = .

The differential equation for the capacitor voltage can be expressed as:

C L Ld v t

dtC R R

dv t

dtv t v tC S C

CC S C

CC S+ + + + =1 6 1 6 1 6 1 6 1 6 1 6

2

2(2.26)

with the initial conditions:

v t v t VC t t C Ct1 6 1 6= = =2 2 2 and

dv t

dt

i t

C

I

CC

t tS

Ct t

t

C

1 6 1 6= == =

2 2

2 .

The current in the capacitor satisfies the equation:

i t Cdv t

dtC CC1 6 1 6= (2.27)

which can be written in another form as: C L Ld i t

dtC R R

di t

dti tC S C

CC S C

CC+ + + + =1 6 1 6 1 6 1 6 1 6

2

2 0,

when the initial conditions are:

i t i t i t IC t t S t t S t1 6 1 6 1 6= == = =2 2 2 2 and

di t

dt

E v t

L L

R R

L Li tC

t tS C

S Ct t

S C

S CS t t

1 6 1 62 7 1 6 1 6= = ==−+

−++2 2 2

.

Solving these differential equations led to the following expressions for the capacitor voltage and

current :

v t K e K t t K t tCt t( ) cos sin= + − − −− −

1 2 2 3 22α β β1 6 1 62 7 1 62 7 (2.28)

i t i t e I t t K t tS Ct t

t( ) ( ) cos sin= = − + −− −α β β2

2 2 4 21 6 1 62 7 1 62 7 (2.29)

where : R R R L L LR

L L CT S C T S C

T

To

T C

o= + = + = = = −; ; ; ; ;α ω β ω α2

1 2 2

K E

K V E

K V EI

C

KE V

LI

S

Ct S

Ct St

C

S Ct

Tt

1

2 2

3 22

42

2

1

1

== −

= − +!

"$#

=−

−!

"$#

βα

βα

1 61 6

When the source current became zero at time t3 , the auxiliary switch Thy turned off and time t3 can

be found from the relationship: i t i tS C( ) ( )3 3 0− −= = ,

t t

I

Kt

3 2

2

4= +

−

arctan

β.

So that the final capacitor voltage VCE can be written as :

v t K e KI

KK

I

KC

I

K t tt

( ) cos arctan sin arctanarctan

3 1 22

43

2

4

2

41 1= + −

− −

!

"$##

αβ

β β(2.30)


D The fourth interval t t t3 4≤ ≤The previous intervals show the non-conducting state of the diode D1, but in this interval, the diode

D1 was forward-biased allowing the energy stored in the commutation capacitor to discharge to the

passive absorbing path. Basically, this path would protect against any continuous high voltages that

remained in the capacitor; however this could only be done when the switch Thy had turned off.

The new initial capacitor voltage could be obtained from the final voltage of the previous state:

v t VC Ct( )3 3= . The voltage of the capacitor becomes:

v t K s e s eCs t s t( ) = −1 2 11 2 (2.31)

and its current is :

i t K e eCs t s t( ) = −21 2 (2.32)

where : α ω β α ω α β α β= = = − = − − = − +R

L L Cs sA

Ao

A c

o2

1 2 21 2; ; ; ;

KV

s s

V

Ks s C V

s s

C V

Ct Ct

C Ct C Ct

13

2 1

3

21 2 3

2 1

32 2

2

2

=−

=

=−

=−

β

α ββ

2 7

E The fifth interval t t t4 5≤ ≤In this interval, the fault current was interrupted, so that the make switch MS could be disconnected.

For convenience, the formulas in the intervals C and D have been based on the situation when an

absorbing circuit operates only in the fourth interval. This assumption can only be justified if the

absorbing circuit has very high resistance and inductance values which means that the time constant

is considerably greater than that of the commutation circuit. Otherwise, its contribution has to be

included it in the third interval C too.

The absorbing components had to have high values in order to satisfy the requirement of the

auxiliary switch Thy being turned off naturally. In that way, the voltage between anode and cathode

would be negative reducing the current flow to less than its holding value. If this condition was met,

the switch Thy turned off and at that instant, the source could not continue to maintain the current

flow in the absorbing path. Finally, the commutation capacitor discharged its stored energy.

Theoretically, the discharging process may continue indefinitely, but in practice it was only a few

hundred milliseconds at instant t4 . In other words, the absorbing circuit should not affect the

commutation principle described in the intervals B and C . Low absorbing component values may

cause interruption failures, because the thyristor remained in a conducting state in which case,

another load breaker might be able to suffice interrupt the residual current.

The analytical equations that have been derived in this section can be used for calculating the

required peak device voltage, the device current, the current-zero time, etc., when all of the

32 Chapter 2

component values and the input-output conditions are known. However, a design problem was that

of circuit synthesis in order to calculate the values of the component capacitance and inductance

which were required for circuit operation within the limit of maximum voltage, di dt , dv dt , etc.,

as specified for the components used.

2.3. Dimensions for the components of the parallel circuit

The commutation device values had to be chosen in such a way that the commutation frequency

fCom of 0.5, 1 and 2 kHz was fast enough to make the necessary current-zeros within 500:s. The

circuit resistance of the commutation path was taken to be constant (20mS). The initial capacitor

voltage was chosen to approximate the supply voltage. Figure 2.6 shows the relationship of the

capacitance values and the maximum counter-current produced by two initial voltages (a) -500V

and (b) -1000V for three different commutation frequencies.

fCom =500HzfCom =1kHzfCom =2kHz

500 1000 1500 20000

1

2

3

4

5

6

7

8

9

10

I pea

k [k

A]

CC [µF]

(a)


500 1000 1500 20000

2

4

6

8

10

12

14

16

18

20

I pea

k [k

A]

CC [µF]

(b)Figure 2. 6 The maximum peak currents with three commutation frequencies

as function of commutation capacitance values; (a) VCO=-500V (b) VCO=-1000V.

Figure 2.7 shows the commutation inductance required for realizing these counter-currents.


500 1000 1500 20000

50

100

150

200

250

300

LC [

µ H]

CC [µF](a)

0 50 100 150 200 2500

50

100

150

200

250

300

Number of turns [-]

Indu

ctan

ce [

µ H]

(b)Figure 2. 7 (a) The required commutation coil and (b) its realization with one-layer solenoid.

The inductance of a small single-layer air-core solenoid can be calculated using the following

empirical relationship [2.35] :


Lr N

r ll r r lC =

+>0 394

9 10

2

3

2 2.in H; valid only if ; and are in cmµ

where: r the radii of the solenoid, l the length of the solenoid and N the number of turns (r=5.5cm,

l=N*1cm).

Table 2.1 lists the time required for current-zero from the chosen counter-current frequencies,

calculated from equation (2.24).

Table 2. 1 The relationship between frequency of the counter-current and a current-zero event;(CC=1000:F, VCO=-1kV, RC=20mS, t1=0.5ms, with I∞=10kA).

fCom [kHz] Tz [:s]0.5 1371 282 7

Rapid current commutation required the counter-current to have a high frequency; clearly, this could

be realized by using commutation coil as low as possible. However, that would require more effort

and it can be tedious, due to the limitation of the auxiliary switch (S2 or Thy) having to handle

initial counter-currents. Therefore, the commutation coil had to limit the di dt in order to prevent

internal damage. Furthermore, the switching time at turn-on and turn-off could be quite critical.

Other considerations included the reverse and forward blocking capacities of the auxiliary switch,

particularly after current-zero at the source, when the commutation capacitor had to sustain high

overvoltages. The auxiliary switch should withstand the maximum voltage across the capacitor. In

practice, there could be various technical and economic reasons for preferring one choice to another;

therefore, a compromise would often determine the final decisions.

Depending on the trip level chosen for the fault detection system, the most suitable capacitor and its

initial voltage could be found from Figure 2.8.

VCO =-500VVCO =-1kVVCO =-1.5kVVCO =-2kV

500 1000 1500 2000 2500 30000

2

4

6

8

10

12

14

16

18

20

CC [µF]

Cur

rent

[kA

]

Figure 2. 8 The maximum counter-current as a function of the capacitance values and the initial voltages;the circuit resistance is 20mS and the frequency is 1kHz.

34 Chapter 2

With the aid of those graphs, a choice of initial voltage level and corresponding capacitor value for

a certain DC system could be made. When there was no inductance or resistance in the upstream

line and the source side, the minimum voltage across the capacitor would be at the end of the

commutation equal to the initial voltage, but in reverse polarity, plus the supply voltage. However,

in practice, lines were considered to be inductive which could increase the residual voltage, because

of the energy exchange between the stored magnetic field and the stored electric field in the

capacitor.

Next, an attempt had to be made to reach a solution when interrupting a DC fault which had to be

isolated from the source within 5ms. Depending on the component values and the type of switches

S1 & S2, several current-zero crossings were possible; therefore the current-zero event and the

contact separation had be matched carefully. The current commutation process took place after the

electrodes of the main breaker S1 had opened a certain distance to allow for any overvoltages

afterwards. Since the auxiliary switch S2 was chosen uni-directional, obviously, the counter-current

from a resonant LC-circuit could provide two current-zeros, so giving two opportunities for an

interruption. As criteria, it was intended that a successful interruption should occur in the first

current-zero when the increasing fault current was still small. If this was not possible, then the

second current-zero can be used; however the fault current would be greater. A vacuum breaker

with its excellent ability to interrupt at the current-zero could meet the requirements. By detecting

the fault rapidly and operating the breaker quickly, a fault current could be reduced to zero before it

became too high. With the aid of a quick-acting mechanism, the time difference between detection

and the contact opening could be kept low (in the order of 300:s). If the counter-current was unable

to produce the current-zero at the second time, there no be another opportunity to interrupt the

current. The fault current would become greater and the capacitor polarity would change remaining

less energy than at first, so that, the entire interruption process would fail. Subsequently, this would

cause the upstream breaker in the AC network to clear the fault, although the fault may have

occurred long enough to damage the downstream network.

Depending on the commutation values chosen, a suitable switch S2 might be found from the

available power semiconductors. Solid-state switches were commonly vulnerable to increasing

initial currents. The switch had to be able to withstand surge counter-currents when switching on

and surge voltages when switching off. Basically, power semiconductors allowed high current to be

switched by lowering its frequency and vice-versa.

This one-stage interruption concept could have different variants depending on the switch types,

such as:

1. hybrid breakers: the main breaker was a mechanical breaker and the commutation switch

was a solid-state switch (air breaker - thyristor [2.26], vacuum breaker - thyristor [2.4,5], or

vacuum breaker - GTO thyristor [2.6]);

2. purely mechanical breakers: the main breaker as well as the commutation switch were

mechanically operated (vacuum switch - vacuum switch [2.34], air switch - triggered spark

gap, vacuum switch - triggered spark gap);


3. purely solid-state breakers: both the main breaker and the commutation switch were solid-

state types (thyristor - thyristor [2.7,8], GTO - thyristor or the IGCT alone).

2.4. Simulating one-stage interruptions using MATLAB

The time-dependent patterns of relevant currents and voltages in the electric circuit of Figure 2.5can be calculated analytically, as is done in Section 2.2. However that is laborious due to presenting

their solutions graphically with a succession of different time periods. Therefore, calculations

implemented in MATLAB programming was done instead. The effect of changing the component

values should be seen immediately. The basic differential equations given in the previous section

can be manipulated in their different discretization forms making them suitable for computation

[2.9,10]. First order approximations would be carried out by writing numerical routines. For

simplicity, the trapezoidal integration method [2.11] has been used to solve the linear differential

equations with respect to the associated time intervals in order to give a time domain solution for

the linearized equations. Such a technique was ideal for this application because a very accurate

solution was not required and the method was numerically stable; consequently large step sizes

could be used. Numerical stability more or less meant that the solution did not blow up if the time

step was too large. Instead the higher frequencies would not be correct in the results, but the lower

frequencies at which the chosen time steps provided an appropriate sampling rate would still be

reasonably accurate. Changes in the circuit topology could be monitored at each time step, due to

current-zero events in switches. Therefore, at this event, the numerical routine for the appropriate

topology was executed.

Any set of network equations can be formulated according to the Kirchhoff’s Current Law and

Kirchhoff’s Voltage Law and based on them, the discretization form given by any differential

equations can be constructed. By using the Backward Euler integration rule, the element

relationship in its discretization form can be rewritten as :

Resistor:

Capacitor:

Inductor:

v k R i k

i kC

tv k v k

v kL

ti k i k

+ = +

+ = + −

+ = + −

1 1

1 1

1 1

1 6 1 61 6 1 6 1 62 7

1 6 1 6 1 62 7∆

∆

(2.33)

The solution of such linear networks described above can be found by assuming that all currents and

voltages denoted by k +11 6 are unknown at the k-th time step and all variables denoted by k1 6 are

known. Computer software such as EMTP (Electromagnetic Transient Program) were developed to

implement this method [2.12,13]. The differential equations given in the Section 2.2 are

decomposed at each interval making them ready for numerical implementation as follows :

36 Chapter 2

Algorithm of one-stage interruptionStep 1 : Assign component values and simulation times length

Step 2 : Initialize all states at k = 0, tk = 0 , iS ( )0 , iB ( )0 , iC ( )0 and vC ( )0

Step 3 : Increment the time step t t tk k+ = +1 ∆Step 4 : Set the circuit topology,

If topology is A :

Calculate i tS k +11 6, i tC k +11 6 ,v tC k +11 6Checking a fault event based on the trip level or trip time

If i t IS k trip+ ≥11 6 or t tk trip+ =1 Then Initialize new initial values for topology B

If topology is B :

Calculate i tS k +11 6, i tC k +11 6 , i tB k +11 6 , v tC k +11 6Checking current-zero events in the breaker

If i tB k + ≈1 01 6 Then Initialize new initial values for topology C

If topology is C :

Calculate i tS k +11 6, v tC k +11 6Checking a current-zero event in the thyristor

If i t vS k + ≤ ∨ ≤1 0 01 6 AK Then Initialize new initial values for topology D

If topology is D :

Calculate i tC k +11 6 , v tC k +11 6End states occur

Step 5 : Stop if time t tk end+ ≥1 , otherwise Return to Step 3

Step 6 : Calculate the energy balance (Energy input equals Energy output)

Step 7 : Graphical processing

Step 8 : End.

This algorithm was implemented in the MATLAB program [2.14]. The accuracy of the algorithm

could be verified by calculating the energy balance in the circuit. The law of energy conservation

states that the total energy input is equal to the energy output. This is expressed by the following

relationship :

E t E tin out∑ ∑=1 6 1 6 (2.34)

The total energy input at any particular time tk is defined as :

E t

C V E i t dt

in k

C CO S S

t

t tk

∑

I=

= +=

=

1 61 6

Initial stored energy + delivered energy by the source

1

22

0

(2.35)

By discretization, an approximation is given by :

E k C V E i k tin C CO S Sk

Nk

∑ ∑≈ +=

1 6 1 61

22

1

∆ (2.36)

where t t t Nk k= ∆1 6.


In the same manner, the total energy output can be calculated by :

E t

C V t L i t L i t i t R dt i t R dt

out k

C C k S S k C C k S S

t

t t

C C

t

t tk k

∑

I I=

= + + + +=

=

=

=

1 61 6 1 6 1 6 1 6 1 6

Energy Stored in C + Energy Stored in L’s + Dissipated by R’s

1

2

1

2

1

22 2 2 2

0

2

0

(2.37)

Its numerical approximation is written as :

E k C V N L i N L i N i k R t i k R tout C C k S S k C C k S Sk

N

C Ck

Nk k

∑ ∑ ∑≈ + + + += =

1 6 1 6 1 6 1 6 1 6 1 61

2

1

2

1

22 2 2 2

1

2

1

∆ ∆ (2.38)

Table 2.2 shows the results from two different simulation time steps. Smaller time steps will

improve a numerical energy balance; however, they will need a large memory and will require long

simulation times. By choosing a sufficiently small step size, the trade-off between accumulated

errors and the computing time will be beneficial which results in choosing the time step four times

smaller than the smallest time constant in the system. For verifying of the result of computer

program, several time steps need to be used.

Table 2. 2 The energy balance in the simulated system in relation to the simulation time steps until t=1.5ms

(CC=280:F, VCO=-2kV, LC=85:H, RC=20mS, Itrip=2kA and I∞=10kA).

∆t [:s] Ein [J] Eout [J]

1 2799.39 2800.93

0.1 2797.97 2797.67

Conveniently, the energy balance of the entire simulation time could be determined and rewritten

as:

E

C V E i t dt

in

C CO S S

t

t te

∑

I=

= +=

=

Initial stored energy + delivered energy by the source

1

22

0

1 6 (2.39)

In its discretized form, this becomes :

E k C V E i k tin C CO S Sk

N

∑ ∑≈ +=

1 6 1 61

22

1

∆ (2.40)

and for the output energy

E

C V i t R dt i t R dt i t R R dt

out

C CE S S

t

t t

C C

t t

t t

S S C

t t

t t

∑

I I I=

= + + + +=

=

=

=

=

=

Final energy stored + energy dissipated by circuit resistances

1

22 2

0

2 22

1

2

2

3

1 6 1 6 1 61 6 (2.41)

Its discretized form is :

E k C V i k R t i k R t i k R R tout C CE S Sk

N

C Ck N

N

S S Ck N

N

1 6 1 6 1 6 1 61 6∑ ∑ ∑ ∑≈ + + + += = =

1

22 2

1

2 22

1

2

2

3

∆ ∆ ∆ (2.42)

where : N1, N2, and N3 correspond to the summation indexes associated with the upper and lower

values of the integration, respectively.

38 Chapter 2

Table 2.3 gives the energy balance computation for the entire 5ms of simulation time.

Table 2. 3 The energy balance in the simulated system related to the entire simulation time of 5ms

(CC=280:F, VCO=-2kV, LC=85:H, RC=20mS, Itrip=2kA and I∞=10kA).

∆t [:s] Ein [J] Eout [J]

1 3555 3561

0.1 3553 3554

The implemented algorithm was tested by examining its robustness when computing the following

four cases of one-stage DC interruption:

1. The switch in the commutation path was bi-directional and the interruption was

satisfactory.

2. The switch in the commutation path was uni-directional and the interruption was

satisfactory at the first current-zero in the main breaker.

3. The switch in the commutation path was uni-directional and the interruption was

satisfactory at the second current-zero in the main breaker.

4. Unsuccessful interruption due to a very high trip level.

In the program, implementation of both the linear time step and the automatic time step were

performed. Since a large time step could cause numerical instabilities, free choice was needed to

analyze a system to give a first impression when using the most appropriate devices. Furthermore,

time tripping and current tripping options were also included. Finally, additional snubber circuits

should be integrated across the main breaker S1 and thyristor in order to approach duplicate the

laboratory setup. The simulation was carried out using the following parameters; time step:

∆t s= 2µ , source voltage: ES = 1000V, inductive load: LS = 460µH, limiting resistance:

RS = 100mΩ , commutation capacitor: CC = 280µF with initial voltage: VCO = −2kV, commutation

coil: LC = 85µH, commutation resistance RC = 20mΩ and for the snubber circuit across the

thyristor Rsn = 20Ω and C Fsn = 1µ . The function of the snubber circuit will be presented later in this

chapter. Results of those four cases are presented in the following sub-sections.

2.4.1 Successful interruption using a bi-directional switch

In this case, after the source current was commutated, the current oscillation continued for several

time periods according to the circuit damping, even until the capacitor’s final voltage was equal to

the supply voltage. During oscillation, energy was transferred among the source, the commutation

capacitor, the circuit resistance and inductance. Figure 2.9 shows the simulation results for a short

simulation time of 5ms have been conducted and trip current of 2kA.


is

iS1

iCom

0 1 2 3 4 5 6-3000

-2000

-1000

0

1000

2000

3000

time [ms]

Cur

rent

[A]

(a)

vS1

vCc

vLc

vThy

0 1 2 3 4 5 6-3000

-2000

-1000

0

1000

2000

3000

4000

5000

time [ms]

Vol

tage

[V

]

(b)

Figure 2. 9 Successful interruption with oscillation in an ideal DC system (Itrip=2kA)(a) currents in the source is, the breaker iS1 and the commutation capacitor iCom

(b) voltages across the main breaker vS1, the commutation capacitor vCc, the coil vLc and the thyristor vThy.

2.4.2 Successful interruption at the first current-zero using a uni-directional switch

In practice, the DC source could not let the current through in both directions, because the polarity

of the rectifying diodes and the auxiliary switch S2 (thyristor) in the commutation path only allowed

the current to flow in one direction. The trip current level is 2kA and Figure 2.10 presents the

simulation results.

is

iS1

iCom

0 1 2 3 4 5 6-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(a)

vS1

vCc

vLc

vThy

0 1 2 3 4 5 6-5000

-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

5000

time [ms]

Vol

tage

[V

]

(b)

Figure 2. 10 Successful interruption at the first current-zero in an ideal DC system (Itrip=2kA)(a) currents in the source is, the breaker iS1 and the commutation capacitor iCom

(b) voltages across the main breaker vS1, the commutation capacitor vCc, coil vLc and the thyristor vThy.

With such small capacitance, the maximum capacitor voltage reached 4.5kV and although this

overvoltage was discharged through the absorbing circuit, it was still harmful and too high for 1kV

systems.

40 Chapter 2

2.4.3 Successful interruption at the second current-zero using a uni-directionalswitch

Instead of an interruption occurring only at the first current-zero, this time the program managed to

simulate an interruption at the second current-zero as well. Figure 2.11 shows the simulation

results.

is

iS1

iCom

0 1 2 3 4 5 6-2000

-1000

0

1000

2000

3000

4000

time [ms]

Cur

rent

[A]

(a)

vS1

vCc

vLc

vThy

0 1 2 3 4 5 6-5000

-4000

-3000

-2000

-1000

0

1000

2000

3000

4000

5000

time [ms]

Vol

tage

[V

]

(b)

Figure 2. 11 Successful interruption at the second current-zero in an ideal DC system (Itrip=2kA)(a) currents in the source is, the breaker iS1 and the commutation capacitor iCom


2.4.4 Unsuccessful interruption

In the last example, the trip current level was set to 4kA. The energy stored in the capacitor was not

sufficient to deliver the necessary counter-current at this level. During injection, the source current

fell. Since the current did not drop to zero, the source current increased again and returned to its

prospective value. The counter-current oscillated for half a period and Figure 2.12 shows the

simulation results.

is

iS1

iCom

0 1 2 3 4 5 6-1000

0

1000

2000

3000

4000

5000

6000

7000

8000

time [ms]

Cur

rent

[A]

(a)

vS1

vCc

vLc

vThy

0 1 2 3 4 5 6-4000

-3000

-2000

-1000

0

1000

2000

time [ms]

Vol

tage

[V

]

(b)

Figure 2. 12 Unsuccessful interruption with the oscillation in an ideal DC system (Itrip=4kA)(a) currents in the source is, the breaker iS1 and the commutation capacitor iCom



The capacitor voltage changed its polarity and lost part of its energy due to the commutation

resistance. The fault current was not interrupted due to the very high trip level.

2.5. Protection against excessive overvoltages

Generally speaking, in a network with a lot of switching devices, overvoltages can occur. Those

overvoltages will become excessive if the system is very inductive. In conventional breakers, an

arcing process provides for the energy stored in the system to be released. When the medium

surrounding the arc plasma is capable of absorbing the energy released, the arc plasma will cool

down and extinguish. High temperatures in the arc plasma for long duration can damage contacts.

However, hybrid switching overcomes energy dissipation through arcing because the arcing time in

the main breaker is short or not at all. Instead, the energy does not become dissipated through the

arcing but it changes its state to a stored form. The energy is stored normally in the commutation

path and remains as overvoltages across the capacitor. The commutation capacitor stores the

magnetic energy into electric energy. Usually, a large residual voltage across the capacitor can

damage the system. However overvoltages can be limited to an optimal compromise of between 1.5

and 2 times that of the nominal system voltage. So, if the level of the overvoltages can be estimated,

components and solid-state switches can be chosen and the necessary protection system can be

determined to suppress the overvoltages. Unfortunately, this depends upon the network and in all

circumstances, precautions and protective measures have to be considered as integral parts of any

hybrid breaker application.

The magnetic energy Wm stored in an inductive system could be defined as W t L i tm T1 6 1 6= 1 2 2 ,

where: LT is the total inductance of the system. In Figure 2.13, the magnetic energy stored in the

inductance is given as a function of the line inductance and the circuit current. The graph helps to

select the best components for energy absorption. The magnetic energy stored in the system was

very important for determining which arrester was required and the maximum surge parameters of

the devices used.

10002000

30004000

5000

100

200

300

400

500

6000

2000

4000

6000

8000

i(t) [A]LT [µH]

Wm (

t) [J

oule

]

Figure 2. 13 The magnetic energy stored in a system, as a function of the current and the line inductance.

As mentioned earlier, in hybrid interruption systems, the arcing process was minimized, however,

the switching-off energy would be transferred to the commutation capacitor resulting in high

42 Chapter 2

overvoltages. In the practical examples here, the residual voltages were calculated for a 1kV DC

system in order to determine their values. The variables chosen included :

• the line inductance and resistance values representing variables at fault locations in thetransmission line,

• the trip level of the fault current in which the counter-current was initiated.

Since the energy stored in the capacitor was finite, for each of the chosen capacitors there would be

a limit to the trip current (Itrip parameter) which was just sufficient to produce current-zero.

Therefore, this limit had to be chosen carefully. The algorithm was completed in order to produce

results. It could show the limit for a trip level and the consequences of residual overvoltages across

the commutation capacitor. For the computation, two commutation capacitors (500:F and 1000:F)

were used having initial voltages of -500V and -1kV with respect to a commutation frequency of

1kHz. The line resistance is 100mS. Figure 2.14 and Figure 2.15 present the expected maximum

capacitor voltages for both capacitance values.

500

1000

1500

2000

100

200

300

400

500

6000

500

1000

1500

2000

2500

3000

Itrip [A]LS [µH]

VC

max

[V]

(a)

5001000

15002000

25003000

3500

100

200

300

400

500

6000

1000

2000

3000

4000

5000

Itrip [A]LS [µH]

VC

max

[V]

(b)Figure 2. 14 The 3-D graphs of the maximum residual voltage across the capacitor of 500:F as a function

of the trip current (Itrip) and the source and line inductance (LS); fCom=1kHz ; (a) VCO=-500V (b) VCO=-1000V.

5001000

15002000

25003000

3500

100

200

300

400

500

6000

1000

2000

3000

4000

Itrip [A]LS [µH]

VC

max

[V]

(a)

10002000

30004000

50006000

7000

100

200

300

400

500

6000

1000

2000

3000

4000

5000

Itrip [A]LS [µH]

VC

max

[V]

(b)Figure 2. 15 The 3-D graphs of the maximum residual voltage across the capacitor of 1000:F as a functionof the trip current (Itrip) and the source and line inductance (LS); fCom=1kHz ; (a) VCO=-500V (b) VCO=-1000V.


Considering Figure 2.14 and Figure 2.15, it was possible to determine the current trip level that

should be set for successful interruption. The upper surfaces indicate where successful interruption

occurred and associated critical trip currents can be found along the edges. A minimum current just

above the rated current was used as a trip reference. An electronic detection circuit required such a

reference level in order to select and deliver pulses for discharging the capacitor when opening the

main breaker S1 and for sending a triggering pulse (with or without a delay) to initiate the counter-

current in S1. The energy absorbed by the suppression element could be approximated by:

W V t I t dttr cl tr

t

= I 1 6 1 60

0

. Here, Wtr is the transient energy, Vcl is the clamping voltage, Itr is the transient

current and t0 is the impulse duration of the transient.

The results showed that the residual capacitor voltage after a successful current interruption could

be so high that it exceeded the maximum overvoltage limit for the associated devices. Such

excessive overvoltages could also breakdown the insulating material of the capacitor itself.

Moreover, this residual capacitor voltage could trigger the solid-state switch incorrectly (misfiring)

and lead to defects in the devices. New measures were taken to prevent this by inserting an

overvoltage limiter. Its design conformed to the inductive energy stored in the system. The greater

the clamping voltage, the less the energy that had to be absorbed by the overvoltage suppressor. So,

a compromise had to be found between the capacitance value and the components’ capacities for

withstanding higher overvoltages or absorbing energy. The main characteristics of energy absorbing

devices could be summarized as follows:

• they must absorb enough energy to dissipate the stored energy both with regard to

inductive as capacitive energy;

• they must have a peak current capacity higher than the maximum interrupted current;

• they must give a clamping voltage below the isolation breakdown voltage of devices in

the system.

However in operation, they must not change the main interruption sequence. Therefore, the time

constant of the absorbing circuit must be long enough to allow the thyristor changing to the blocking

state after its natural current-zero.

Furthermore, several transients were considered to be important for components, where applicable,

such as:

• the maximum surge voltage of the commutation capacitor;

• the maximum voltages across the thyristor (anode to cathode) in both blocking and

reverse states;

• the instant when the current inversion begins;

• the maximum di dt for the thyristor at the instant when the current inversion begins;

• the maximum dv dt for the thyristor at the instant when the current inversion (turn-on)

begins and when it ceases conducting (turn-off);

• the instant when current-zero occurs in the main breaker.

44 Chapter 2

In order to keep the capacitor residue voltages below the maximum non-repetitive overvoltage of

the system, the following measures had to be considered :

• applying free-wheeling devices in high inductive systems where possible at the load

side,

• choosing suitable capacitors and solid-state switches, so that they were able to withstand

long lasting non-repetitive high voltages,

• developing overvoltage suppressing/absorbing circuits which enable the residue energy

to be dissipated (coming from an inductive system during a current interruption) in the

capacitor as heat; this circuit will consist of passive linear devices only,

• connecting the terminals of sensitive components with non-linear overvoltage

suppressor devices, such as SiC (Silicon Carbide) or ZnO (Zinc Oxide),

• fitting snubber circuits (carbon resistors and small capacitors), however, they should be

considered as secondary measures, since solid-state switches normally require such

circuits.

The first three choices could require redesigning some features of hybrid breakers, whilst the fourth

required more knowledge of non-linear device behaviors. As a whole, the protection circuit had to

meet the following requirements:

• a rating voltage of at least 1kV and a low leakage current (≈ a few mA),

• a clamping voltage of 2kV,

• an energy absorption of at least 3kJ.

The precautions presented above should be considered only with regard to inductive switching. In a

normal situation, there should be no thermal run off. Each protection measure is explained in detail

in the following sub-sections.

2.5.1 Linear energy absorbing devices as the primary protection

The linear energy absorbing circuit was composed of passive elements and it could be connected in

parallel with the commutation capacitor. Since the capacitor had an initial voltage, a diode should

be used having a reverse biased in order to prevent discharging in the idle state. The resistance

operated as the primary energy absorbing element which converted the electrical energy stored in

the capacitor into heat. The resistance was made from carbon (Morganite) which had a considerable

high heat capacity. Combining those elements provided a dissipation path that prevented any long-

lasting overvoltages in the circuit. After the commutation process was completed, the circuit current

became zero. However, the interruption process was not completed. The current-zero in the thyristor

changed the polarity across the anode-cathode to produce a reverse blocking state. The time required

for this process was finite allowing its majority charge carriers in the depletion. When this process

was completed, the energy absorbing circuit could dissipate the potential energy by discharging it;

however, the energy absorbing elements had to be chosen so that the main interruption process

could continue undisturbed.


A passive circuit could fulfill these requirements so that the absorbing problem would be solved. It

is suggested that simply connecting a resistor, coil and diode in series (RLD) will suffice. Such a

circuit was connected across the commutation capacitor. The discharging current had to be carefully

controlled as an overdamped transient, because that would decrease the capacitor voltage slowly and

the thyristor remained in the blocking state. Rapid discharging would disturb the main interruption

process. Moreover, rapid changes in the capacitor voltage could result in malicious triggering so that

the thyristor returned to its conducting state. As a result, the current is not interrupted but limited.

The requirements of a passive suppressor circuit are the following :

• it should be capable of absorbing the potential energy as heat (written as

1 2 2C V mc TC CE = ∆ ; where m is the mass of the resistor element, c is the heat capacity

of the element and ∆T is the temperature difference between the material and the

ambient),

• the current slope just after the current commutation should be zero (di dt t tc= = 0) or at

least as low as possible,

• it should be a second 2nd-order circuit (if necessary, a higher order might meet the

requirement).

The estimated energy absorption was about 3kJ from the experimental setup, of course, it depended

on the maximum energy stored in the system before the current commutated from the main path to

the parallel path.

The simulation used a resistor of RA=10S and an inductor of LA=10mH. The need for such a large

inductance was necessary to maintain a low di dt in the interval C . With those values, an

overdamped circuit was created. All energy stored in the capacitor would be absorbed in that circuit.

2.5.2 Non-linear energy absorbing elements as the secondary protection

The usual device for dealing with transient overvoltages is a Metal Oxide Varistor (MOV). A

varistor is a voltage-dependent resistor in which any increase of the device’s current in relation to

the voltage across it, will be non-linear. This device has advantages such as: a high current capacity,

relatively low cost and availability in a broad current/voltage spectrum. However, it has the

disadvantage during operation of undergoing gradual degradation which requires more maintenance

tasks and regular replacement. A combination of a MOV and a diode in series may prevent rapid

degradation depending on the diode’s reverse voltage. Most overvoltage suppressors are made from

SiC or ZnO. An arrester made from SiC responds too slowly to the transient, but it is able to absorb

considerably more energy compared with the arrester made from ZnO. Former applications of SiC

included connecting it in series with an air gap to prevent continuous heat losses under normal

conditions.

46 Chapter 2

The zinc oxide particles are compressed together so that the inter-particle contacts act as a

semiconductor junction. Millions of these particles mimic diodes at various voltages; as the voltage

across a MOV increases, more and more junctions start conducting. Excess current is then bled off

through the component, while power is absorbed by the mass of the MOV. The power handling

capacity per unit-volume of varistors is much higher than that of surge suppression diodes. Because

the varistor effect is a feature of all the material volume of a component and not just the

semiconductor junction alone. However, the millions of junctions in a MOV can lead to a much

higher leakage current at low voltages. Response time to impulses is as fast as in a Zener diode and

varistors are mainly used for AC load protection where networks for single-phase and three-phase

supplies are easy to construct [2.23]. Their characteristics include : ‘soft’ voltage clamping and high

leakage current at nominal voltages; however, there is a tendency for both of those characteristics to

deteriorate with temperature changes and repeated pulse diversions. Therefore, MOV’s are used for

the accurate and repeatable protection needed for instrumentation and communications equipment.

The time required for a suppressor to begin operating is very important when it is used to protect

sensitive components. If the suppressor is slow-acting and a fast-rise transient spike appears in the

system, the voltage across the protected device can rise to damaging levels before any suppression

begins.

Care had to be taken when selecting an arrester, as the only energy absorbing element, particularly

when repetitive switching with high energy supplies. Since deterioration would affect the arrester, it

could lead to malicious behavior during continual use [2.24]. Under normal conditions, its current

leakage became very high resulting in excessive heating. From the outside, such deterioration may

not be visible. If such an arrester fails, irreversible damage may occur in associated devices. A diode

in series with the absorbing circuit and an arrester is a combination that would prevent stress under

normal conditions being the alternative.

In short, non-linear devices alone were not sufficient for continual operation; therefore, the MOV

was not intended for such conditions. Overvoltage switching up to 2.5kV could be tolerated by 1kV

systems which meant that all the other devices would have to suffer. However, arresters with a

rating of 900VDC were suitable. Those arresters had clamping voltages of approximately 2.1kV and

they were used to protect the commutation capacitor and the thyristor. Moreover, the arresters had to

be capable of withstanding thermal constraints too, so that capacitor charging would not be

restricted.

2.5.3 Snubber circuits for tertiary protection

Despite the fact that modern power semiconductors have high voltage and current ratings, they still

needed some help during switching processes. The auxiliary circuit which assists power

semiconductors to perform the correct switching functions and reduce the stress in solid-state

switches during operation is called a snubber circuit [2.29,30,31,32,33].


In general terms, the transient behavior of solid-state switches is illustrated in Figure 2.16 in both at

turn-on and turn-off [2.15].

v(t)

t3

a)

0

i(t)

-VR

diF/dt diR/dt

t5t4

trr

Irr

IF

VFP

t1 t2

Von

VR

Vrr

. .

. .0

b)

Figure 2. 16 Typical transient behavior of solid-state switches when turned-on t t1 2→ and

when turned off t t3 5→ ; (a) the current in the device and (b) the voltage across the device.

Solid-state switches have generally low capability of transient overvoltage (breakdown of the

junction) and energy absorption (heat dissipation). A solid-state switch thyristor was used in S2.

The main purpose of protecting thyristors is because only a trigger signal can switch on thyristors

and assists in the switching states. The protection can be classified into different parts:

• protection against too high dv dt during reverse blocking,

• protection against too high dv dt during forward blocking,

• protection against too high di dtF during the turn-on phase,

• protection against too high dv dt during the turn-off phase.The first two were required in static conditions to protect the thyristor from any surges coming from

the other parts of the network. And the latter two were for dynamic switching on its own. From

Figure 2.14 and Figure 2.15, it is possible to estimate the residual voltage across the capacitor CC

that have to be withstood by the thyristor. The commutation coil LC can limit the rate of change of

thyristor currents during a turn-on; however, the maximum rate of change for the forward current

(di dtF ) at the moment of current commutation by triggering the thyristor Thy must not exceed the

manufacturer’s recommendations. So, a combination including LC and CC had to be chosen

carefully. Generally speaking, power thyristors with switching frequencies of 1kHz are widely

available. A suitable snubber circuit would protect the thyristor from very abrupt changes in the

commutation path. A simple RC network provided dv dt protection; Rsn=10S and Csn=2.4:F. An

additional protection measure was applied by connecting an arrester in parallel across the thyristor.

48 Chapter 2

2.5.4 Applications of the freewheeling diode

Generally in DC systems, freewheeling diodes are connected across inductors or inductive circuits,

but in a circuit with switching devices, there is a possibility that current will be chopped off

abruptly. Consequently, the presence of a line inductance will oppose the chopping by producing

high overvoltages in the system. Freewheeling paths are necessary to divert the circuit current when

it is decreased by switching actions. This is a safe way to absorb the stored magnetic energy.

Unfortunately, it could not be used because every power line had stray inductance.

Therefore, if possible, the freewheeling diode DFW should be placed across the limiting inductance

LT (inductive load). It would always have a reversed bias if the circuit current iS was constant or

when it increased during normal operation, otherwise the current would decrease another way

causing a negative rate of change of the source current (di dtS < 0). This would cause the voltage

across the inductance LT to change its polarity. That negative polarity would make the diode DFW

have a forward bias, so that it would conduct instead. The inductive energy stored in the coil

(1 2 2L IT max ) was then dissipated by the total resistance R of the freewheeling path; Imax was the

inductor current at the instant when di dtS changed. The freewheeling diode path had a time

constant of τFW TL R= and this could eventually alleviate the energy absorption problem.

Additional di dt protection using a coil of 12µH if necessary could be connected in series with the

diode DFW in order to soften the surge current through the diode. The inductance value of this coil

should be much smaller than the inductive load (200-500µH).

In the experimental setup, the freewheeling circuit was inserted manually when needed.

2.5.5 Combining all the components

It is generally necessary to use more than one type of protective components in the network in order

to obtain the best possible combination of advantages. The most common combination forming a

multi-protection circuit incorporates a high-current component that is relatively more slow-acting

than a lower power-rated component, in such a way, it is possible to minimize the power

dissipation. The design of such a circuit should also take into account the consequences of surges in

the fragile low power devices of the system.

Finally, before adopting those protective measures in the system, it was advisable to make sure that

any additional components would not change the nature of the main components that they were

intended to protect. Combining all the protection devices would prevent rapid degradation of

devices as well as the hybrid breaker as well as in the system. All those measures will ensure that

repetitive tests can be done with the hybrid breaker.


2.6. Circuit simulation using PSPICE

Up to now, numerical calculations have been performed satisfactorily with MATLAB programming

for the simplified circuits like those in Figure 2.5. However, for a realistic network including the 3-

phase distribution transformer and the double rectifier bridges, it will be better to use programming

software which includes whole components and a choice was made for PSPICE. In this section, 6-

pulse rectifier circuits feeding the commutation circuit are used for simulating DC interruptions; in

this way, the simulation will be closer to the laboratory setup conditions. In the other sections, all

components were previously determined, so that they could be used for simulating the entire circuit

directly. After all the devices had been modeled, similar circuits were arranged as sub-circuits so

that the complete circuit could be simulated. The simulation was performed with PSPICE

[2.16,17,18,19]. By modifying connections and component values, several circuit configurations

could be simulated effectively and used as an aid to understanding how switching transients behave

in those situations.

2.6.1 Device modelling

Behavior of the network can only be simulated if the basic specifications of devices are clear as well

as the relationships between the current in and voltage across those devices. Unfortunately,

modelling non-linear devices can be very tedious due to their complexity. Using fine models will

increase accuracy, but it may require a longer simulation time; however, oversimplified models may

fail due to numerical instability during the computation. Any compromise using simple or complex

models to simulate complex situations have to be considered depending on the network

configuration. In this section, the non-linear devices employed for modelling are described.

The thyristor model

Several thyristor models have been described in literature [2.20,21,22], but the choice depends on

how detailed the behavior of devices has to be and the amount of computational time that will be

acceptable. The basic thyristor model will have a certain minimum electrical behavior such as:

• switching to the ON state with application of a gate signal (positive VGK or IG), only if the

Anode-Cathode voltage (VAK) is positive;

• remaining in the ON state so long as the Anode-Cathode current (IAK) continues to flow;

• switching to the OFF state when IAK goes through zero and VAK changes its polarity.

Basically, two methods are possible. Firstly, models that are based on the physical structure of an

intrinsic three junctions pnpn. They form a four-layer of semiconductor assigned to a three-terminal

device. This configuration is the same as a pnp transistor connected to an npn transistor with

additional diodes between the junctions. The transistors can be represented by an Ebers-Moll model.

The corresponding circuit diagram is shown in Figure 2.17 (a). The Ebers-Moll model requires

precise transistor parameters which, in SPICE, can be more than forty. The parameters define the

50 Chapter 2

transistor’s characteristics, such as, the variation of gain in both the forward and reverse states, the

storage time effects and the non-linear junction behavior. These parameters of the corresponding

transistors will depend on their material and manufacturing processes. Generally, these values will

not be available from the manufacturer, particularly, for high power devices. A practical transistor

model switch for the thyristor may require fewer parameters.

p

p

n

n

Cathode

Gate

Anode

D2

D3Rgk

Q1

Q2

D1GateCathode

Anode

Gate

Anode

Cathode

Dthy

Csw

Ron

SW

Gate

Rgt

Rt Ct

Vx

Vy

+

+

-

- F1

Anode

Cathode

Dthy

Ron

SW

Gate

Rgt

Rt

VA+

-

-Gg

Rsw

+

LeVx Igt

Anode

Cathode

(a) (b)

Figure 2. 17 Thyristor equivalent circuits (a) the transistor model (b) the lumped element models.

Secondly, thyristor models that are based on electrical behavior only in which the state changes

depend on triggering and the Anode-Cathode current can also be used [2.19]. These models contain

elementary electronic devices, such as: diode, resistor, capacitor, voltage-controlled switches,

current control devices and ideal switches. Such models as shown in Figure 2.17 (b) and they are

commonly used for power electronic simulations. The simulation employed in this project used

lumped element models. The first thyristor model required a pulse current while the second used a

pulse voltage.

The main breaker model

Theoretically, the main breaker has a similar behavior to the thyristor, namely it requires current-

zero to be achieved before the main breaker changes its state from conducting to insulating. In

contrast with the thyristor, the main breaker allows the current to flow in either direction. It was

sufficient to use a thyristor model based representing the main breaker in DC circuits.

The arrester model

The IEEE Working Group 3.4.11 suggests a model based on lumped element components [2.25] as

depicted in Figure 2.18. This model requires the voltage-current (vi) properties obtained from the

pulse test.

Ro AiAoC

Lo

Ri

Li

Figure 2. 18 Frequency dependent model of arresters.


Arresters are frequency dependent devices. The voltage across an arrester is a function of both the

rate of increase and the magnitude of the current conducted by the arrester. The non-linear vi-

properties of an arrester are represented by two sections of non-linear resistance and designated by

Ao and Ai. The two sections are separated by an RL-filter. For slow-front surges, the RL-filter has

very small impedance and the two non-linear sections of the model are essentially in parallel. For

fast-front surges, the impedance of the RL-filter becomes more significant and results in a greater

discharge current flowing in Ao than in Ai. Unfortunately, its complexity went against modelling

with this device for the complete circuit simulation.

2.6.2 Simulation diagram

The above models now have to be integrated into the network scheme and simulated with respect to

the system’s behavior during short-circuited and hybrid interruptions. Figure 2.19 shows the

complete circuit for a one-stage interruption.

XZTR22

XZTR23

XZTR21

SW5

XF2

XF1

XDIO11 XDIO13 XDIO15

XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

XFWHEEL

SW1XSCLOAD41 30

VZERO5

Uco

Cc

XABS

XCOMM

XS1

VR

VS

VT

Tr2

14

15

16

Lc

Rc

LA

DA

XRATE4

5

6

3

4

VZERO4

VZCOMM1

XTHY

3

XTRV

Ctrv

Rtrv

XSNUB

Csn

Rsn

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123

XSUP11 XSUP12 XSUP13

XCN1

XCN2

1

3

2

23

21

SW2 SW3

RA

Figure 2. 19 Scheme for complete system simulation.

The simulation network was built starting from the secondary side of two transformers. Two 3-

phase systems in balance supplied the voltage represented by VR, VS and VT, each phase of the

secondary side being connected to an impedance XZTRxx in order to represent the inner impedance

of the transformer. The transformer’s neutral points were earthed by high capacitive impedance

XCN1 and XCN2. Next, continuous loads XSUPxx functioning as overvoltage suppressors were

installed between each phase and the neutral of the transformer. Subsequently, small capacitors and

resistors in series represented the arresters XRxxx on the AC side of the circuit. Then, two Graetz 3-

phase rectifiers (XDIO11...XDIO16 and XDIO21...XDIO26) were connected to each on the AC side

for delivering two rectified voltages at their outputs. Small continuous loads (XF1 and XF2) linked

both DC poles to the ground. Both rectified voltages were connected in series and the connection

52 Chapter 2

was earthed with VZERO2 making a symmetrical source. Finally, the time-controlled switches SW1

and SW5 linked the DC source to the load side. The load side, depending on the simulation, could

be designed in such a way that only the necessary devices were connected and disconnected. It

consisted of a freewheeling circuit XFWHEEL, a limiting inductive load XSCLOAD, a rated load

XRATE, the make switches SW1 and SW5, and the interruption circuit containing of the main

breaker XS1, the commutation circuit XCOMM, the snubber network XSNUB and the absorbing

circuit XABS. The switch SW2 controlled the connection in the freewheeling simulation and the

switch SW3 was used for the rated load. VZEROx’s represented the current sensors. The switch

SW5 were always in a closed position. Closing the switch SW1 simulated the short-circuit situation.

Figure 2.20 depicts the sub-circuit components which simplify the simulation configuration.

R1

C1

R2R3

C2

Cn Rn

XSUPxx

XSCLOAD

Ri

Li

XZTRxxXCNx

XDIOxx XFWHEELXRATE

RR1

CR1

XFx

Rf1

Cf1Rf2

Rload

Lload

Rrate RFW

LFW

DFWRD1

CD1

XRxxx

Lrate

Figure 2. 20 Sub-circuits.

Device values were:XCOMM; Cc:280:F, Lc:85:H, Rc:20mS XSCLOAD; Lload:460:H, Rload:233mS-2SXABS; RABS:10S LABS:10mH XDIOxx; RD1:1kS, CD1:100nFXRxx; RR1:1k CR1:200nF XFWHEEL; RFW: 1mS, LFW:1:HXSUPxx; R1:22S, R2:10k, R3:50S, C1:6:FC2:100:F

XTHY; Csw:1pF, Rgt:50S,Rt:1,Ct:10:F

XZTRxx; Ri:3mS, Li:30:H XFx; Rf1:1k, Rf2:500S, Cf1:200nFXSNUB; Rsn:10S Csn:2.4:F XRATE; Rrate: 2.25S, Lrate:40:HXCN; Cn:500nF, Rn:12kS

2.6.3 Simulation results using PSPICE

A number of possible events are described in the following paragraphs with the help from

simulation results. The following cases are reported:

The simulation of unsuccessful interruptionFirstly, a typical failure interruption will be described which could occur when the fault current is

higher than the counter-current due to slow detection and triggering of the thyristor. A current-zero

in the main breaker will not occur resulting unsuccessful interruption. The simulation results are

shown in Figure 2.21 (simulation time between 0 and 20ms) and Figure 2.22 (simulation time

between 5 and 10ms). Figure 2.21 (a) shows the rectified voltages of the two 3-phase Graetz bridge


(VPO and VNO are the positive and negative poles with respect to the ground potential and VPN is the

voltage between the poles). Figure 2.21 (b) depicts the currents in the DC source IDCS, the main

breaker IS1, and the commutation capacitor ICc, respectively. Figure 2.21 (c) presents the voltages

across the make switch VMS, the main breaker VS1, the commutation capacitor VCc, and the thyristor

VThy, respectively. And Figure 2.21 (d) shows the associated phase currents (IR, IS and IT). Figure2.22 shows the simulation at the more detailed situation during the interruption. Figure 2.22 (a)

presents the voltages across the make switch VMS, the main breaker VS1, the commutation capacitor

VCc, and the thyristor VThy, respectively. Figure 2.22 (b) depicts the currents in the DC source IDCS,

the main breaker IS1, and the commutation capacitor ICc, respectively.

The simulation of a successful hybrid interruption at the first current-zeroThe circuit for a successful hybrid interruption at the first current-zero, no freewheeling but with an

energy absorber; small CC, high VCO; with an absorbing circuit (DA, RA=10S and LA=10mH); big

commutation capacitor and a low initial voltage (CC=320:F, VCO=-800V, LC=80:H). The

simulation results are shown in Figure 2.23 (simulation time between 0 and 20ms) and Figure 2.24(simulation time between 5 and 10ms). Figure 2.23 (a) shows the rectified voltages of the two 3-

phase Graetz bridge (VPO and VNO are the positive and negative poles with respect to the ground

potential and VPN is the voltage between the poles). Figure 2.23 (b) depicts the currents in the DC

source IDCS, the main breaker IS1, the commutation capacitor ICc, and the absorbing circuit IRA,

respectively. Figure 2.23 (c) presents the voltages across the make switch VMS, the main breaker

VS1, the commutation capacitor VCc, and the thyristor VThy, respectively. And Figure 2.24 (d) shows

the associated phase currents (IR, IS and IT). Figure 2.24 shows the simulation at the more detailed

situation during the interruption. Figure 2.24 (a) presents the voltages across the make switch VMS,

the main breaker VS1, the commutation capacitor VCc, and the thyristor VThy, respectively. Figure2.22 (b) depicts the currents in the DC source IDCS, the main breaker IS1, the commutation capacitor

ICc, and the absorbing circuit IRA, respectively.

The simulation of successful hybrid interruption with an anti-parallel diodeThe circuit parameters and conditions are similar with the previous case except a diode DS1 is now

connected across the main breaker S1. Normally, the diode is in a reversed bias state, but its state

will change only after the current-zero occurs in the breaker. This anti-parallel diode DS1 will allow

arcless contacts opening for the main breaker. The simulation results are shown in Figure 2.25(simulation time between 0 and 20ms) and Figure 2.26 (simulation time between 5 and 10ms). The

legends of the graphs are similar with the previous simulation except the absorbing circuit current

IRA will not be shown and instead of it, the current in the reverse diode IDS1 is presented, see Figure2.25 (c) and Figure 2.26 (b).

54 Chapter 2

The simulation graphs of an unsuccessful interruption

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

time [ms]

Vol

tage

[V

]

(a)DC voltages; 2 poles: VPO and VNO and totalvoltage VPN

IDCS

IS1

ICc

0 5 10 15 20-1000

0

1000

2000

3000

4000

5000

6000

7000

8000

9000

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1 andcapacitor ICc

VMS

VS1

VCc

VThy

0 5 10 15 20-2500

-2000

-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]

(c)Device voltages; make switch VMS, main breakerVS1, commutation capacitor VCc and thyristorVThy

IR

IS

IT

0 5 10 15 20-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1x 10

4

time [ms]

Cur

rent

[A]

(d)Phase currents IR, IS and IT

Figure 2. 21 The circuit voltages and currents in an unsuccessful interruption.

VMS

VS1

VCc

VThy

5 6 7 8 9 10-2500

-2000

-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]

(a)Device voltages; make switch VMS, main breakerVS1, commutation capacitor VCc and thyristorVThy

IDCS

IS1

ICc

5 6 7 8 9 10-1000

0

1000

2000

3000

4000

5000

6000

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1 andcapacitor ICc

Figure 2. 22 Window enlargement during an interruption.


The simulation graphs of a successful hybrid interruption at the first current-zero

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

time [ms]

Vol

tage

[V

]

(a)DC voltages; 2 poles: VPO and VNO, and totalvoltage VPN

IDCS

IS1

ICc

IRA

0 5 10 15 20-400

-200

0

200

400

600

800

1000

1200

1400

1600

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1,capacitor ICc and absorbing circuit IRA

VMS

VS1

VCc

VThy

0 5 10 15 20-2000

-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]


IR

IS

IT

0 5 10 15 20-2000

-1500

-1000

-500

0

500

1000

1500

2000

time [ms]

Cur

rent

[A]


Figure 2. 23 The circuit voltages and currents in a hybrid interruption.

VMS

VS1

VCc

VThy

5 6 7 8 9 10-2000

-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]


IDCS

IS1

ICc

IRA

5 6 7 8 9 10-400

-200

0

200

400

600

800

1000

1200

1400

1600

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1,capacitor ICc and absorbing circuit IRA

Figure 2. 24 Window enlargement during a hybrid interruption.

56 Chapter 2

The simulation graphs of successful hybrid interruption with an anti-parallel diode

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

time [ms]

Vol

tage

[V

]

(a)DC voltages; 2 poles: VPO and VNO and totalvoltage VPN

IDCS

IS1

ICc

IDS1

0 5 10 15 20-400

-200

0

200

400

600

800

1000

1200

1400

1600

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1,capacitor ICc, and reverse diode IDS1

VMS

VS1

VCc

VThy

0 5 10 15 20-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]


IR

IS

IT

0 5 10 15 20-2000

-1500

-1000

-500

0

500

1000

1500

time [ms]

Cur

rent

[A]


Figure 2. 25 The circuit voltages and currents in a hybrid interruption.

VMS

VS1

VCc

VThy

5 6 7 8 9 10-1500

-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]


IDCS

IS1

ICc

IDS1

5 6 7 8 9 10-400

-200

0

200

400

600

800

1000

1200

1400

1600

time [ms]

Cur

rent

[A]

(b)Circuit currents; source IDCS, main breaker IS1,capacitor ICc, and reverse diode IDS1

Figure 2. 26 Window enlargement during a hybrid interruption.


2.7. Conclusions

In this chapter, hybrid interruption techniques have been analyzed theoretically and then simulated.

Testing with higher currents required solving overvoltage problems and taking protective measures.

Hence, when coordinating protection devices, well-matched network parameters and breaking

capacity had to be determined accurately. Unfortunately, in order to reduce overvoltage stresses

after a fault interruption, a higher commutation capacitor was necessary and a passive dissipation

path had to be introduced. Obviously, limitation of the fault current required a minimal value for the

commutation capacitor. Simulation models were developed for the purpose of dimensioning the

components of the circuit.

2.8. References and reading lists

[2.1] Greitzke, S., and Lindmayer, M., “Commutation and erosion in hybrid contactor systems”,IEEE Trans. on Components, Hybrids and Manufacturing Technology, Vol. CHMT-8, No.1, March 1985, p. 34-9.

[2.2] Greenwood, A.N. and Lee, T.H., “Theory and applications of the commutation principlefor HVDC circuit breakers”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-91,July-December 1972, p. 1570-4.

[2.3] Kanngiesser, K.W., “The current commutation function of HVDC switching devices”,Electra, No. 124, May 1989, p. 32-9.

[2.4] Premerlani, W.J., “Forced Commutation Performance of vacuum switches for HVDCBreaker Application”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-101, No.8, August 1982, p. 2721-7.

[2.5] Senda, T., et. al., “Development of HVDC circuit breaker based on hybrid interruptionscheme”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-103, No. 3, March1984, p. 545-52.

[2.6] Johnson, D.E., et. al., “Commutating direct current out of a vacuum interrupter with aGTO-thyristor”, IEEE Trans. on Magnetics, Vol. MAG-22, No. 6, November 1986, p.1552-7.

[2.7] Zyborski, J., Czucha, J. and Sajnacki, M., “Thyristor circuit breaker for overcurrentprotection of industrial d.c. power installations”, Proc. IEE, Vol. 123, No. 7, July 1976, p.685-8.

[2.8] McEwan, P.M. and Tennakoon, S.B., “A two stage DC thyristor circuit breaker”, IEEETrans. on Power Electronics, Vol. 12, No. 4, July 1997, p. 597-607.

[2.9] Jensen, R.W. and Watkins, B.O., Network analysis: Theory and computer methods,Prentice-Hall, 1974.

[2.10] Kremer, H., Numerical analysis of linear networks and systems, Artech House 1987.[2.11] Alvarado, F.L., et.al., “Testing of trapezoidal integration with damping for the solution of

power transient problems”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-94,Jan/Febr. 1975, p. 89-96.

[2.12] Dommel, H.W. and Sato, N., “Fast transient stability solutions”, IEEE Trans. on PowerApparatus and Systems, Vol. PAS-91, 1972, p. 1643-50.

[2.13] Dommel, H.W. and Meyer, W. S., “Computation of electromagnetic transients”, Proc. ofthe IEEE, Vol. 62, No. 7, July 1974, p. 983-93.

[2.14] Mathworks, Computer software: Matlab ver. 4.2c, 1994.

58 Chapter 2

[2.15] Mohan, N., et.al., Power electronics: converters, applications, and design, 2nd ed. -Chichester : Wiley, 1995.

[2.16] Nagel, L.W., SPICE2: A computer program to simulate semiconductor circuits,Electronics Research Laboratory, Univ. California of Berkeley, Memorandum, ERL-M520, May 1975.

[2.17] Microsim, Computer software: PSPICE ver. 5.0, 1992.[2.18] Rashid, M.H., SPICE for power electronics and electric power, Prentice Hall, 1993.[2.19] Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits : an

introductory guide, London, Chapman & Hall, 1997.[2.20] McGhee, J., “A transient model of a three terminal p-n-p-n switch and its use in predicting

the gate turn-on process”, Int. J. Electronics, 1973, Vol. 35, No. 1, p. 73-9.[2.21] Losic, N.A., “Computer-aided analysis and design of commutating, di/dt and dv/dt circuits

for thyristors”, IEEE Industry Applications Society Annual Meeting, 1990, Seattle, USA,Cat. No. 90CH2935-5, Vol. 2, p. 1196-201.

[2.22] Williams, B.W., “State-space thyristor computer model”, Proc. IEE, Vol. 124, No. 9,September 1977, p. 743-6.

[2.23] Sakshaug, E.C., et.al., “A new concept in station arrester design”, IEEE Trans. on PowerApparatus and Systems, Vol. PAS-96, No.2, March/April 1977, p. 647-56.

[2.24] Tominaga, S., et.al., “Stability and long term degradation of metal oxide surge arresters”,IEEE Trans. on Power Apparatus and Systems, Vol. PAS-99, No. 4 July/Aug. 1980, p.1548-56.

[2.25] IEEE Working Groups, “Modeling of current-limiting surge arresters”, IEEE Trans. onPower Apparatus and Systems, Vol. PAS-100, No. 8, August 1981, p. 4033-40.

[2.26] Collart, P., and Pellichero, S., “A super high speed intelligent circuit breaker”, GECAlsthom Technical Review, No. 9, 1992, p. 35-42.

[2.27] Holbrook, J.G., Laplace transforms for electronic engineers, - 2nd rev. ed. - New York :Pergamon Press, 1969.

[2.28] Abramowitz, M. and Stegun, I.A., Handbook of Mathematical Functions, DoverPublication Inc., 1965, 17.6, NY: Dover.

[2.29] McMurray, W., “Optimum snubbers for power semiconductors”, IEEE Trans. on IndustryApplications, Vol. IA-8, No. 5, Sept./Oct. 1972, p. 593-600.

[2.30] Lee, C.W., and Park, S.B., “Design of a thyristor snubber circuit by considering the reverserecovery process”, IEEE Tran. on Power Electronics, Vol. 3, No. 4, October 1988, p. 440-6.

[2.31] Steyn, C.G., “Analysis and optimization of regenerative linear snubbers”, IEEE Tran. onPower Electronics, Vol. 4, No. 3, July 1989, p. 362-70.

[2.32] Swanepoel, P.H., and Wyk, J.D. van, “Analysis and optimization of regenerative linearsnubbers applied to switches with voltage and current tails”, IEEE Tran. on PowerElectronics, Vol. 9, No. 4, July 1994, p. 433-42.

[2.33] Steyn, C.G., and Wyk, J.D. van, “Study and application of nonlinear turn-off snubber forpower electronic switches”, IEEE Trans. on Industry Applications, Vol. IA-22, No. 3,May/June 1986, p. 471-7.

[2.34] Bartosik, M., et.al., “New generation of DC circuit breakers”, 3rd International Conf. onElectrical Contacts, Arcs, Apparatus and their Applications (IC-ECAAA), Xian, P.R.China, May 1997, p. 349-53.

[2.35] Kaufman, M., and Seidman, A.H., Handbook of electronics calculations : for engineersand technicians, McGraw-Hill, 1979, p. 4-11.

Chapter 3

Two-stage commutation circuits for direct current interrupters

AbstractThe overvoltage problems like those discussed for one-stage interruption can be reduced by two-

stage interruption methods. This method limits firstly the fault current to a certain level meanwhile

absorbing a part of the inductive energy after which it proceeds to the final interruption procedure.

This method aims at reducing transient surges; however, when using this method, it is necessary to

operate more switching devices. As a consequence, the overall reliability of the breaker decreases;

furthermore, the interruption time becomes longer. Two variants of this method were extensively

studied and analytical and numerical computations were used to test the working of these variants.

In this thesis, they are only reported theoretically.

3.1 Introduction

Chapter 2 dealt with the hybrid interruption process using the basic commutation method (one-stage

interruption). In this method the residual voltage across the commutating capacitor needed special

attention, because in highly inductive systems, the residual voltage could become excessive. Hence,

as a refinement of one-stage commutating circuits, combinations of switching devices and limiting

resistors should be utilized to reduce the switching overvoltages.

The concept of two-stage interruption is an idea of McEwan [3.1] while studying a pure solid-state

DC breaker arrangement of system-stored energy which was transferred to the commutating

capacitor in several steps. This chapter will start with comments on an existing method and then it

will introduce an extension. As with the one-stage commutation, the current interruption process

was initiated by injecting a counter-current in the main breaker from a commutating circuit.

However, for the two-stage commutation method, the commutating path contained a limiting

resistor Rlim and auxiliary switches was added to the LC components. If the counter-current was

large enough to create a current-zero in the main breaker, the fault current was successfully

commutated to this path. Subsequently, it would reach the limiting value Ilim governed by the

limiting resistor. Given that LS was the system inductance, the fault inductive energy in the system

(1 2 2L IS trip ) would be dissipated in this resistor to become 1 2 2L IS lim ; consequently,

I I Itrip proslim < < . At the current limited level, the interruption became easier due to its low system-

stored energy content. When the diverted fault current had dropped to its minimum value, the

second step was proceeded by creating another current-zero using the residual capacitor voltage. If

the current-zero was produced in the main breaker, the commutated current charged the capacitor to

a lower level when compared with the one-stage interruption. As a result, any transient overvoltages

introduced in the system could be minimized but the entire interrupting time was longer.

60 Chapter 3

Figure 3.1 Diagram (a) shows the circuit concept for the two-stage commutation proposed by

McEwan [3.1]. Figure 3.1 Diagram (b) shows a variant. The principle operations will be analyzed

and simulated later in this chapter.

S1iS

LCCC

CathodeAnode

iC

iB

Rlim ilim

S3

Feederside

LoadsideS4

S2

vC

(a) first variant

S1iS

LCCC

CathodeAnode

iC

iB

Rlim ilim

Loadside

Feederside

S3

S2

S4vC

(b) second variantFigure 3. 1 Two-stage commutating circuits; S1: main breaker, S2,S3,S4: uni-directional switches.

Under normal load conditions, only the main breaker S1 was closed while the other switches S2, S3

and S4 were open. The capacitor CC was precharged with a negative initial voltage VCO. Interrupting

the nominal rated current could be realized for the first variant by closing only the switches S2 & S3

simultaneously and only the switch S3 for the second variant. Obviously, those procedures were

similar to the one-stage interruption described earlier. However, for a fault clearance, the

interruption procedure would obey different principles to those for the two concepts described in the

following paragraphs.

First variant

When the fault current iS=iB exceeded a pre-

defined value, the main breaker S1 opened.

When a certain gap had been reached, the

switches S2 and S3 closed simultaneously. Then,

the counter-current iC produced by LCCC

opposed the fault current iB in the main breaker

S1, see the loop CC-LC-S3-Cathode-S1-Anode-

S2-CC. When the injection current reached the

fault current level, a current-zero would occur in

S1 and the fault current then commutated to the

parallel paths: Anode-Rlim-S3-Cathode and

Anode-S2-CC-LC-S3-Cathode. The main breaker

S1 was now separated and it remained so. The

diverted fault current iS would not increase due

to the presence of the limiting resistor Rlim. In

the meantime, the capacitor CC changed its

polarity and its current became zero, thereby

Second variant

When a fault on the load side had to be

interrupted, the main breaker S1 opened. When

a certain gap had been opened, the switch S3

closed enabling a counter-current iC to flow in

the path CC-LC-S3-Cathode-S1-Anode-CC. The

counter-current iC produced by LCCC forced the

current in the breaker iB so that it became zero

when the counter-current was equal to the fault

current. This current-zero occurrence allowed

the main current to commutate to the path:

Anode-CC-S3-Cathode. The main breaker S1

remained open. Subsequently, the switch S2

closed, so that the main current could be

distributed to the path: Anode-Rlim-S2-Cathode

and Anode-CC-LC-S3-Cathode. When the

capacitor CC had changed its polarity, the

switch S3 opened. By closing the switch S4, the

Two-stage commutation circuits for direct current interrupters 61

turning off the switch S2. The current decreased

to a certain level. Subsequently, the switch S4

closed discharging the capacitor CC into the loop

CC-S4-S3-LC-CC. When a current-zero occurred

in S3, it turned off and the main current

commutated again in the path Anode-Rlim-LC-

CC-S4-Cathode. The switch S4 opened when a

current-zero was created resulting in a new

energy balance in which the capacitor was fully

charged.

capacitor CC would change its polarity again

and the current became zero which turned off

the switch S4. Next, switch S3 closed

producing a counter-current in the loop CC-LC-

S3-S2-Rlim-CC. When current-zero occurred in

S2, the main current iS commutated to the path:

Anode-CC-S3-Cathode. The switch S3 opened

when current-zero was created; so, a new

energy balance was achieved in which the

capacitor was fully charged.

Based on those two variants and using appropriate combinations of mechanical and solid-state

switches, the two-stage hybrid breakers could be developed too. Depending on future technological

progress and a breakthrough in the manufacture of solid-state devices for high power applications,

they could be used for fault interruption purposes. Theoretical analysis will be presented in the

following sections and it will be tested later in this chapter to show that there is no need for arresters

because overvoltages will be minimized. Finally, simulation was performed for comparing different

interruption method with prospective DC currents of 10kA. They included continuous fault

computation followed by interrupting the fault using the one-stage method and both variants of the

two-stage method.

3.2 Basic principles of the first variant

In order to improve the understanding of the circuit behavior when current was zero, the auxiliary

switches S2, S3 and S4 were replaced by thyristors Th1, Th2, Th3, respectively. Similar to a one-

stage interruption, the capacitor energy had to be used optimally when producing a counter-current.

This required the discharged current to flow through the lowest resistance path in order to produce a

virtual current-zero in the main breaker S1 during current commutation. The limiting resistance was

connected in series with a diode, so that in total, this variant required four solid-state switches (three

thyristors and one diode), because the one-stage interruption required at least one. Generally

speaking, DC systems can deliver uni-directional currents only; therefore, an ideal DC source ES

and a diode DS when connected in series can represent practical DC systems. The interrupting

sequences of the first variant are presented in Figure 3.2 and its timing diagram in Figure 3.3.

62 Chapter 3

+

ES

MS

S1

RS LS

-

Th1

Th2

Th3

CC

LC

Rlim

D

+

MS

+

MS

+

MS

+

MS

+

MS

+

MS

+

MS

Th1 Th1

Th2 Th2

Th3 Th3 Th3

Th3

F

B C

G

D

E

A

Rlim Rlim

Rlim Rlim

-

- - -

- - -

RS LSRS LS RS LS

RS LS RS LS RS LS

ESES

ESES

ES

ES

ESLC

LC

LC

LC

CC CC

CCCC

RS LS

DS

DS DS

DS

DS

DS

DS

DS

S1

S1

Figure 3. 2 Two-stage interruption sequences of the first variant.

tTh1

tTh2

Th3 t

B

E

t4

t1

Figure 3. 3 Timing diagram of the triggering of thyristors.

Analytical solutions

When considering all switches to be ideal, the solution can be written analytically for each interval.

The switches are assumed having zero and infinite resistance in the closed and open states,

respectively. At each interval, the Kirchhoff’s voltage law for the network equations can be written

in order to solve the differential equations for the circuit current in each branch and the voltage

across the capacitor. Continuity between the intervals is maintained by using the end states of the

previous intervals to be the initial states for the next intervals.


During the fault, the source current iS can be represented by:

i t I I e IS R

t

RS( ) = − −

+∞

−1 6 1 τ (3.1)


where: τS is the time constant (τSS

S

L

R= ), LS and RS are the inductance and the resistance at the

fault as seen from the source; I∞ is the steady-state fault current (prospective) determined only from

the resistance and the DC voltage system ES ( IE

RS

S∞ = ); I R is the rated current. For convenience, it

can be assumed that I R will be zero. In the commutation path, the capacitor voltage and current

remain constant v t VC CO1 6 = and i tC 1 6 = 0. Initially, the current in the breaker is equal to the current

in the source i t i tB S( ) ( )= until injection during the second interval B . At the end of this interval,

the source current becomes i t IS St( )1 1− = and the capacitor voltage remains v t V VC Ct CO( )1 1= = .

B The second interval t t t1 2≤ ≤In the event of the fault current exceeding the pre-defined trip value ( Itrip), a counter-current will be

initiated in the main breaker S1 by triggering the switches Th1 and Th3 simultaneously. This

counter-current flows in the path: CC-LC-Th3-S1-Th1-CC. The injection current will oppose the fault

current in the main breaker S1 thereby reducing the current in the main breaker. When the injection

current meets the fault current, current-zero occurs in S1 which will result in it ceasing to

conduction. Now, the fault current will be commutated to the path: ES-LS-RS-MS-Th1-CC-LC-Th3-

DS-ES. In this interval, the current in the main breaker can be written as i t i t i tB S C( ) ( ) ( )= − . The

counter-current i tC ( ) is applied at the instant that the current in the source i tS ( ) exceeds the trip

value Itrip . In this interval, the current in the main breaker is opposed by the capacitor current. The

source current increases further according to the expression:

i t I I e IS St

t t

StS( ) = − −

+∞

−−

1 111

1 61 6

τ (3.2)

The voltage across the capacitor and the counter-current are expressed below:

v t V e A t t t tC Ctt t( ) sin cos= − + −− −

1 1 1 11α β β1 6 1 62 7 1 62 7 (3.3)


2 11α β1 6 1 62 7 (3.4)

where α ω β ω α= = = −R

L L CC

Co

C C

o2

1 2 2; ; ;

A

AV

LCt

C

1

21

=

= −

αβ

β

When the source current and the counter-currents meet, i tB ( )2 0= . Hence, from the equation

i t i t IS C St( ) ( )2 2 2= = , the current-zero time Tzvcb of the main breaker can be calculated from

T t tzvcb = −2 1 using the following nonlinear equation: f I I e A e TT t

Tzvcb

zvcb

S zvcb: sin= − − =∞ ∞

− +−

1

2 01 6

1 6τ α β .

The solution of this function can be obtained by using numerical iteration so-called Newton-

Raphson method from the following equation:

64 Chapter 3

T T

I e A e T

I eA e T T

z vcbnew zvcbold

T t

Tzvcbold

T t

S

Tzvcbold zvcbold

zvcbold

S zvcbold

zvcbold

S

zvcbold

= −

−

−

+ −

∞

− +−

∞

− +

−

11

1

2

2

1 6

1 6

1 6

1 6 1 62 7

τ α

τα

β

τα β β β

sin

sin cos

Iteration is terminated when the condition f Tzvcbnew1 6 ≈ 0 is satisfied. At the end of that interval, the

capacitor voltage can be obtained from the relationship v t VC Ct( )2 2= and the current in the source

reaches i t IS St( )2 2= .

C The third interval t t t2 3≤ ≤In this interval, the commutated fault current is split into two paths, the limiting path; ES-LS-RS-MS-

Rlim-D-Th3-DS-ES and the oscillatory path: ES-LS-RS-MS-LC-CC-Th3-DS-ES. The first path

continues conducting whilst the second path will only conduct until the voltage across the

commutating capacitor CC changes its polarity and becomes fully charged. Then, the current in the

second path will become zero causing the thyristor Th1 to cease from conducting. In that interval,

the current will be split into two parallel paths: current i tD ( ) flows in the limiting path and current

i tC ( ) flows along the oscillatory path. When the capacitor voltage satisfies the relationship

V v tCt C2 0≤ ≤( ) , then the current i tD ( ) will remain zero, because the diode connected in series still

has a reversed bias. The capacitor voltage and current are written as follows:

v t K e K t t K t tCt t( ) cos sin= + − + −− −

1 2 2 3 22α β β1 6 1 62 7 1 62 7 (3.5)

The current in the source is equal to the current in the oscillatory path and this is represented by


St( ) ( ) cos sin= = − + −− −α β β2

2 2 4 21 6 1 62 7 1 62 7 (3.6)

where: R R R L L LT S C T S C= + = +; ; α ω β ω α= = = −R

L L CT

To

T C

o2

1 2 2; ; ;

K E

K V E

K V EI

C

KL

E V R I

S

Ct S

Ct SSt

C

TS Ct T St

1

2 2

3 22

4 2 2

1

1

22

== −

= − +!

"$#

= − +

βα

β

1 6

1 6These expressions are only valid until t ta= where: v tC a( ) = 0. Time ta can be calculated from the

following equation in order to find its root, f K e K t K ttaold aold

aold: cos sin= + + =−1 2 3 0α β β1 6 1 6 .

Finally, after numerical iteration, the equation becomes:

t tK e K t K t

e K K t K K tanew aold

taold aold

taold aold

aold

aold= +

+ +− + +

−

−1 2 3

2 3 3 2

α

α

β βα β β α β β

cos sin

cos sin

1 6 1 61 6 1 6 1 6 1 6 .

The iteration ends when it satisfies f tanew1 6 ≈ 0. Hence the time ta is found, so that the current in the

source is i t i t IS a C a Sta( ) ( )= = .


Next, the following expressions are valid for the interval t t ta ≤ ≤ 4 . The voltage across the capacitor

changes its polarity and begins to increase. Accordingly, the source current can be written as :

i t i t i tS C D( ) ( ) ( )= + (3.7)

i t I I e ID Sta

t t

Sta( ) limlim= − −

+−

−

1 61 6

12

τ (3.8)

where: IE

RS

totlim = , τ lim = L

RS

tot

, R R Rtot S= + lim

The capacitor current and voltage are given by

i t e I t t K t tCt t

Sta( ) cos sin= − + −− −α β β2

2 5 21 6 1 62 7 1 62 7 (3.9)

v t E e K t t E t tC St t

S( ) sin cos= + − − −− −α β β2

6 2 21 6 1 62 7 1 62 7 (3.10)

where :

KL

E R I

KI

CE

TS tot Sta

Sta

CS

5

6

1

22

1

= −

= −!

"$#

β

βα

1 6

At the end of this interval, the capacitor current becomes zero, i tC ( )3 0= which turns off the switch

Th1. The time can be calculated from t tI

KSta

3 25

1= + −

β

arctan . The time required for turning-off

Th1 is : TI

KzthSta

15

1= −

β

arctan . The capacitor voltage is : v t VC Ct( )3 3= ;

V E e KI

KK

I

KCt S

I

K Sta StaSta

3 25

65

51 1= + −

+ −

!

"$##

αβ

β β

arctan

cos arctan sin arctan (3.11)

Hence, now the source current will become: i t i t IS D St( ) ( )3 3 3= = . In other words, the limiting path

succeeds to take over the current to the oscillatory path completely.

D The fourth interval t t t3 4≤ ≤When the thyristor Thy1 is turned off, the fault current becomes limited by the resistance Rlim in the

path: ES-LS-RS-MS-Rlim-D-Th3-DS-ES. It decreases until it reaches a steady value of about

IE

R RS

Slim

lim

=+

, which means that during the fault, the inductive system-stored energy 1

22L IS trip is

absorbed in Rlim becoming only 1

22L IS lim. In that interval, the current from the source decreases

according to the following expression :

i t i t I I e IS D t

t t

( ) ( ) lim limlim= = − +

−−

3

3

1 61 6

τ (3.12)

where : τ lim = L

RS

tot

, R R Rtot S= + lim and IE

RS

totlim =

66 Chapter 3

At the end of this interval, the current in the source should reach the steady-state limit, namely

i t i t I IS D t( ) ( ) lim4 4 4= = ≈ . In the meantime, the voltage across the commutating capacitor will

remain unchanged as in the previous interval, that is: v t V VC Ct Ct( )4 4 3= = .

E The fifth interval t t t4 5≤ ≤When the fault current reaches its (limited) steady value, the thyristor Th2 is fired and the

commutating capacitor CC discharges its energy through the path: CC-Th2-Th3-LC-CC. In that

interval, the energy stored in the CC has to be sufficient to produce a current-zero in the thyristor

Th3, which also means that the second counter-current injection has to be greater than the steady

current I lim flowing in the thyristor Th3. In that interval, the second current injection uses from the

residual voltage capacitor to produce another current-zero for switching off Th3. The current in the

source just before closing the switch Th2 is written as: i t I IS t( ) lim= ≈4 . By closing switch Th2, the

capacitor voltage and the capacitor current will be given by the following equations:

v t V e A t t t tC Ctt t( ) sin cos= − − −− −

3 1 4 44α β β1 6 1 62 7 1 62 7 (3.13)


2 44α β1 6 1 62 7 (3.14)

where : α ω β ω α= = = −R

L L CC

Co

C C

o2

1 2 2; ; ;

A

AV

LCt

C

1

24

=

= −

αβ

βWhen the limited source current is equal to the counter-current, the current is zero in the switch Th3

turning off Th3. The time when this occurs can be obtained from the function :

f I A e t tStt t: sin= − − =− −

4 2 5 45 4 0α β1 6 1 62 7 , with T t tzth3 5 4= − . The time Tzth3 can be found by iterating

the following function :

T TI A e T

A e T Tzth new zth old

StT

zth old

Tzth old zth old

zth old

zth old3 3

4 2 3

2 3 3

3

3= −

−−

−

−

α

α

βα β β β

sin

sin cos

1 61 6 1 62 7 ,

until the condition f Tzth new3 01 6 ≈ is achieved. Then t t Tzth5 4 3= + and the current in switch Th3

becomes zero. The associated capacitor voltage is written as : v t VC Ct( )5 5= . Now, the limited source

current will commutate along the branch LC-CC-Th2 having a value of : i t i t IS C St( ) ( )5 5 5= = .

F The sixth interval t t t5 6≤ ≤When the current through the thyristor Th3 becomes zero, Th3 ceases to conduct and the limited

fault current commutates along the path: ES-LS-RS-MS-Rlim-D-LC-CC-Th2-DS-ES. In this interval,

the current oscillates in order to charge the capacitor CC with an opposite polarity. When current-

zero occurs in thyristor Th2, the fault current is interrupted. This means that the fault is cleared.

After commutation, the source current will be equal to the capacitor current. The capacitor voltage

and the capacitor current can be represented with the following relationships :

v t E e K t t K t tC St t( ) sin cos= + − + −− −α β β5

1 5 2 51 6 1 62 7 1 62 7 (3.15)



St( ) ( ) cos sin= = − + −− −α β β5

5 5 3 51 6 1 62 7 1 62 7 (3.16)

where : R R R L L LR

L L CT S C T S C

T

To

T C

o= + = + = = = −; ; ; ; ;α ω β ω α2

1 2 2

K V EI

C

K V E

KL

E V R I

Ct SSt

C

Ct S

TS Ct T St

1 55

2 5

3 5 5

1

1

22

= − +!

"$#

= −

= − −

βα

β

1 6

1 6At the end of that interval, the current in the source becomes zero : i t i tS C( ) ( )6 6 0= = at

t tI

KSt

6 55

3

1= + −

β

arctan . Consequently, this current-zero causes the switch Th2 turning-off and the

current-zero time for Th2 will be TI

KzthSt

25

3

1= −

β

arctan

Then, the residual voltage across the commutating capacitor becomes v t VC Ct( )6 6= ;

V E e KI

KK

I

KCt S

I

K St StSt

6 25

31

5

3

5

31 1= + −

+ −

!

"$##

αβ

β β

arctan

cos arctan sin arctan (3.17)

Thereafter, no current flows in the circuit so that, the make switch MS can be opened without

arcing.

G The seventh intervalSince the system now has no current, and the make switch MS can be opened, finally, the end state

will show a successful interruption in which all the switches are open.

3.3 Basic principles of the second variant

In order to understand how the circuit behaves at current-zero, the auxiliary switches S2, S3 and S4

will be represented by thyristors Th1, Th2, Th3, respectively. Furthermore, the source can deliver

uni-directional currents only as represented by an ideal DC source ES and a diode DS connected in

series. The interruption sequences of the second variant are depicted in Figure 3.4 and its timing

diagram appears in Figure 3.5.

Analytical solutions

Considering all the switches to be ideal, the solution can be written analytically for each interval.

68 Chapter 3

+

MS

S1-

Th1Th2

Rlim

Th3

++

MS

-

+

MS

F

B

GE

A

+

MS

C D

+

MS

+

MS

+

MS

+

MS

RS LS

RS LS

RS LS

RS LS

RS LS

RS LSRS LS

RS LS

RlimRlim

Rlim

ESESES

ES ES

ESES ES

CC

LC

CC

CC

LCLC

CC

LC

CCCC

LCLC

-

- -

- - -

-

DS DS

DS DSDS

DSDS DS

Th1

Th1 Th1

Th2

Th2 Th2

Th1

Th3

S1

S1

Figure 3. 4 Two-stage interruption sequences of the second variant.

tTh1

tTh2

Th3 t

B

C

D

E

t1

t2

t3

t4

Figure 3. 5 Timing diagram of triggering the thyristors.


Initially, the main breaker S1 is in its closed position and the make switch MS is in its open

position. All thyristors are in their off-states. By closing the make switch MS, a fault current is

initiated so that it flows along the path: ES-RS-LS-MS-S1-DS-ES. The current increases according to

a time constant given by RS and LS. During the fault, the source current iS can be represented by:

i t I I e IS R

t

RS( ) = − −

+∞

−1 6 1 τ (3.18)

where: τS is the time constant (τSS

S

L

R= ), LS and RS are the inductance and the resistance of the

fault relative to the source; I∞ is the steady-state fault current (prospective) determined only by the

resistance and the DC voltage system: ES ( IE

RS

S∞ = ); and I R is the rated current. For convenience,

it is assumed that I R will be zero. In the commutation path, the capacitor voltage and its current


remain constant: v t VC CO1 6 = and i tC 1 6 = 0. Initially, the current in the breaker equals the current at

the source: i t i tB S( ) ( )= until the counter-current injection occurs during the second interval B . At

the end of this interval, the source current becomes i t IS t( )1 1− = and the capacitor voltage remains

v t V VC Ct CO( )1 1= = .

B The second interval t t t1 2≤ ≤In the event of the fault current exceeding a pre-defined trip value ( Itrip), the counter-current i tC ( )

will be initiated by triggering the switch Th1. In this second interval, the current in the main breaker

is opposed by the capacitor current: i t i t i tB S C( ) ( ) ( )= − . The counter-current flows along the path:

CC-LC-Th1-S1-CC and opposes the fault current in the main breaker S1 in order to reduce the

current in it. When the counter-current is equal to the fault current, current-zero occurs in S1 which

results in S1 ceasing to conduct. Now, the fault current commutates along the path: ES-RS-LS-MS-

CC-LC-Th1-DS-ES.

i t I I e IS t

t t

tS( ) = − −

+∞

−−

1 111

1 61 6

τ (3.19)

The capacitor voltage and current are expressed below:


1 1 1 11α β β1 6 1 62 7 1 62 7 (3.20)


2 11α β1 6 1 62 7 (3.21)

where: α ω β ω α= = = −R

L L CC

Co

C C

o2

1 2 2; ; ;

A

AV

LCt

C

1

21

=

= −

αβ

βAt the end of this interval, the source current and the capacitor current are equal: i t i t IS C St2 2 21 6 1 6= =and the current in the breaker becomes i tB ( )2 0= . Then, the associated capacitor voltage will be

v t VC Ct2 21 6 = .

C The third interval t t t2 3≤ ≤In the third interval, the capacitor CC continues to discharge and its polarity changes due to being

fed from the source. At a given capacitor voltage, the switch Th2 is fired so that a new commutating

path: ES-RS-LS-MS-Rlim-Th2-DS-ES is introduced; while the capacitor current decreases to zero and

turns off the switch Th1; the source current will then decrease further to a value limited by Rlim. At

the end of that interval, the current in Rlim becomes i t IE

R RRS

Slim lim

lim31 6 ≈ =

+ and the time constant

is τ limlim

=+L

R RS

S

. During this interval, the current in the Rlim can be expressed by :

70 Chapter 3

i t I eR

t t

lim lim( ) lim= −

−−

121 6

τ (3.22)

The capacitor current and voltage are given by :

i t e K t t K t tCt t( ) sin cos= − + −− −α β β2

1 2 2 21 6 1 62 7 1 62 7 (3.23)


3 2 4 21 6 1 62 7 1 62 7 (3.24)

where : R R RSC S C= + ; L L LSC S C= + ; α ω β ω α= = = −R

L L CSC

SCo

SC C

o2

1 2 2; ;

KL

E V I R

K I

K V EI

C

K V E

SCS Ct t SC

t

Ct St

C

Ct S

1 2 2 2

2 2 2

3 22 2

4 2

1

22

1

= − −

=

= − +!

"$#

= −

β

βα

1 6

1 6

The current in the source is written as :

i t i t i tS R C( ) ( ) ( )lim= + (3.25)

At the end of this third interval, the source current becomes i t I IE

R RS stS

S3 31 6 = ≥ =

+limlim

, then the

capacitor current will be i tC 3 01 6 = and the capacitor voltage is v t VC Ct3 31 6 = .

D The fourth interval t t t3 4≤ ≤During this interval, the source current is considered to be constant. The switch Th3 turns on so that

the capacitor discharges and changes its polarity until the current becomes zero (half-sine

waveform). The capacitor current is limited only by the negligible circuit resistance RC so that the

capacitor current can attain a very high value.

i t I e I e IS

t t

St

t t

S S( ) lim limlim lim= −

+ ≈−

−−

−

13 3

3

1 6 1 6τ τ (3.26)

The capacitor current and voltage are expressed below:


2 33α β1 6 1 62 7 (3.27)


3 1 3 33α β β1 6 1 62 7 1 62 7 (3.28)

where : α ω β ω α= = = −R

L L CC

Co

C C

o2

1 2 2; ;

A

AV

LCt

C

1

23

=

= −

αβ

β


At the end of this fourth interval, the source current becomes i t I IE

R RS StS

S4 41 6 = ≥ =

+limlim

, and the

capacitor current is i tC 4 01 6 = , thereby turning off the switch Th3. The associated capacitor voltage

becomes v t VC Ct4 41 6 = .

E The fifth interval t t t4 5≤ ≤The source current is still constant. By triggering the switch Th1, a counter-current in the switch

Th2 is generated which results in a change of the capacitor polarity. When a current-zero occurs, the

switch Th2 turns off and the source current commutates along the path ES-RS-LS-MS-CC-LC-Th1-

DS-ES expressed by :

i t I I e I IS St

t t

( ) lim lim limlim= − + ≈

−−

4

4

1 61 6

τ (3.29)

The capacitor current and voltage are expressed below:


2 44α β1 6 1 62 7 (3.30)


3 1 4 44α β β1 6 1 62 7 1 62 7 (3.31)

where: IE

R

L

RR R R R R RS

S

S

SS S C Clim

limlim

limlim lim lim lim; ; ; ;= = = + = +τ

α ω β ω α= = = −R

L L CC

Co

C C

olim ; ;

2

1 2 2

A

AV

LCt

C

1

24

=

= −

αβ

βAt the end of this fifth interval, the source current and the capacitor current are equal:

i t i t IS C St5 5 51 6 1 6= = and the capacitor voltage becomes v t VC Ct5 51 6 = .

F The sixth interval t t t5 6≤ ≤In this interval, the limited fault current charges the capacitor CC with the opposite polarity. When a

current-zero occurs in Th1, the current ceases to flow. The capacitor current and voltage are given

by :

i t i t e K t t K t tS Ct t1 6 1 62 7 1 62 71 6= = − + −− −( ) sin cosα β β5

1 5 2 5 (3.32)


3 5 4 51 6 1 62 7 1 62 7 (3.33)

where : R R RSC S C= + ; L L LSC S C= + ; α ω β ω α= = = −R

L L CSC

SCo

SC C

o2

1 2 2; ;

72 Chapter 3

KL

E V I R

K I

K V EI

C

K V E

SCS Ct St SC

St

Ct SSt

C

Ct S

1 5 5

2 5

3 55

4 5

1

22

1

= − −

=

= − +!

"$#

= −

β

βα

1 6

1 6

At the end of this sixth interval, the source current and the capacitor current are equal

i t i tS C6 6 01 6 1 6= = and the capacitor voltage becomes v t VC Ct6 61 6 = .

G The seventh intervalThe system has no current now, so that the make switch MS can be opened. Finally, at the end state,

a successful interruption shows all the switches are open.

3.4 Computer simulation using PSPICE

The proposed circuits were simulated using PSPICE [3.7,8,9] with a complete circuit containing

double 6-pulse rectifier bridges to provide 1kV DC systems. Four cases have been investigated in

the following paragraphs for comparing the methods described earlier, with a trip current of 5kA;

3.4.1. Continuous short-circuiting of the DC source with a prospective current 10kA (see Figure3.6). The source will be extensively described in Chapter 6.

3.4.2. Interruption of the short-circuit using the one-stage interruption (see Figure 3.8) which has

been extensively described in Chapter 2, but without the absorbing circuit.

3.4.3. Interruption of the short-circuit using the two-stage interruption, 1st variant (see Figure3.10).

3.4.4. Interruption of the short-circuit using the two-stage interruption, 2nd variant (see Figure3.12).

The circuit components are presented in Table 3.1.Table 3. 1 Circuit components.

Limiting load Commutating componentsCase 1: Section 3.4.1 RRATE=500mS

RSC=70mS, LSC=40:H Case 2: Section 3.4.2 idem CC=3mF,VCO=-1kV, LC=12:H,

RC=20mSCase 3: Section 3.4.3 idem idem plus Rlim=500mSCase 4: Section 3.4.4 idem idem

At the time t=0, the simulation starts and the DC load current increases. At the instant when t=5ms,

a short-circuit occurs intentionally. The simulation results of Case 1 show the waveforms of relevant

voltages (VPO and VNO are the positive and negative poles with respect to the ground potential, VPN

is the voltage between the poles and VSW1 is the voltage of the closing switch SW1) of the DC side

in Figure 3.7 (a) and the DC source current (IDCS) and phase currents (IR, IS and IT) in Figure 3.7


(b). In Case 2, the one-stage interruption occurs after the fault current exceeds the trip value of 5kA;

Figure 3.9 (a) shows the DC voltages (VPO and VNO are the positive and negative poles with respect

to the ground potential and VPN is the voltage between the poles); Figure 3.9 (b) depicts the relevant

voltages (VSW1 is the voltage of the closing switch SW1, VS1 is the voltage of the main switch S1

and commutation capacitor VCc); Figure 3.9 (c) shows the relevant currents in the DC side (IDCS is

the DC source current, IS1 is the main breaker current, and ICc is the capacitor current) and Figure3.9 (d) shows the phase currents (IR, IS and IT). Case 3 and Case 4 simulate the two-stage

interruptions of the first and second variants in Figure 3.11 and Figure 3.13, respectively; where:

(a) shows the DC voltages, (b) depicts the relevant voltages in the switches and commutation

capacitor, (c) shows the relevant currents on the DC side including the limiting resistance (IRLIM)

and (d) shows the phase currents.

3.4.1 The short-circuit simulation of a DC source with a prospective current of 10kA

The simulation diagram is depicted in Figure 3.6 and the results are shown in Figure 3.7.

XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

5

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

SW1XSCLOAD41 30

VR

VS

VT

Tr2

14

XRATE4

6

VZERO4

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123


XCN1

XCN2

1

3

2

23

21

Figure 3. 6 Simulation diagram for the short-circuit.

VPO

VNO

VPN

VSW1

0 5 10 15 20-600

-400

-200

0

200

400

600

800

1000

1200

time [ms]

Vol

tage

[V

]

(a) DC voltages; 2 poles: VPO and VNO, total

voltage VPN and make switch VSW1

IDCS

IR

IS

IT

0 5 10 15 20-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1x 10

4

time [ms]

Cur

rent

[A]

(b) The DC circuit current and phase currents IR,

IS and IT

Figure 3. 7 Simulation results for the short-circuit.

74 Chapter 3

3.4.2 The one-stage DC interruption of 10kA with Itrip=5kA


XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

SW1XSCLOAD41 30

VZERO5

Uco

Cc

XCOMM

XS1

VR

VS

VT

Tr2

14

15

16

Lc

Rc

XRATE4

5

6

VZERO4

VZCOMM1

XTHY

3

XSNUB

Csn

Rsn

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123


XCN1

XCN2

1

3

2

23

21

Figure 3. 8 Simulation diagram for the one-stage interruption.

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]

(a) DC voltages; 2 poles: VPO and VNO, and total

voltage VPN

VSW1

VS1

VCc

0 5 10 15 20-1000

-500

0

500

1000

1500

2000

2500

time [ms]

Vol

tage

[V

]

(b) Device voltages; make switch VSW1, main

breaker VS1 and commutating capacitor VCc

IDCS

IS1

ICc

0 5 10 15 20-1000

0

1000

2000

3000

4000

5000

6000

7000

8000

time [ms]

Cur

rent

[A]

(c) Circuit currents; source IDCS, capacitor ICc and

main breaker IS1

IR

IS

IT

0 5 10 15 20-8000

-6000

-4000

-2000

0

2000

4000

6000

8000

time [ms]

Cur

rent

[A]

(d) Phase currents IR, IS and IT

Figure 3. 9 Simulation results for the one-stage interruption.


3.4.3 The first variant of two-stage DC interruption with Itrip=5kA


XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

SW1XSCLOAD41 30

VZERO5

VZERO4

XS1

VR

VS

VT

Tr2

14

15

16

XRATE

Lc

4

XCOMM

XTHY1

3

VZCOMM6

6

Rlim

Uco

Cc

5

Rc

XTHY3

7

8 XTHY2

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123

XSUP11 XSUP12 XSUP13XCN1

XCN2

1

2

3

23

21

Figure 3. 10 Simulation diagram for the first variant of two-stage interruption.

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]


voltage VPN

VSW1

VS1

VCc

0 5 10 15 20-1500

-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]


breaker VS1, and commutating capacitor VCc

IDCS

IS1

ICc

IRLIM

0 5 10 15 20-4000

-2000

0

2000

4000

6000

8000

time [ms]

Cur

rent

[A]

(c) Circuit currents; source IDCS, capacitor ICc ,

main breaker IS1 and limiting resistor Rlim

IR

IS

IT

0 5 10 15 20-8000

-6000

-4000

-2000

0

2000

4000

6000

8000

time [ms]

Cur

rent

[A]


Figure 3. 11 Simulation results for the first variant of two-stage interruption.

76 Chapter 3

3.4.4 The second variant of two-stage DC interruption with Itrip=5kA


XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

SW1XSCLOAD41 30

VZERO5

VZERO4

XS1

VR

VS

VT

Tr2

14

15

16

XRATE

Lc

4

XCOMM

XTHY1

3

VZCOMM7

6

Rlim

UcoCc

5

Rc

XTHY3

7

XTHY2

23

21

1

2

3

XZTR11

XZTR12

XZTR13

XR112

XR123XR113

XSUP11 XSUP12 XSUP13XCN1

XCN2

Figure 3. 12 Simulation diagram for the second variant of two-stage interruption.

VPO

VNO

VPN

0 5 10 15 20-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]


voltage VPN

VSW1

VS1

VCc

0 5 10 15 20-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]


breaker VS1, and commutating capacitor VCc

IDCS

IS1

ICc

IRLIM

0 5 10 15 20-2000

-1000

0

1000

2000

3000

4000

5000

6000

7000

8000

time [ms]

Cur

rent

[A]

(c) Circuit currents; source IDCS, capacitor ICc,

main breaker IS1 and limiting resistor Rlim

IR

IS

IT

0 5 10 15 20-8000

-6000

-4000

-2000

0

2000

4000

6000

8000

time [ms]

Cur

rent

[A]


Figure 3. 13 Simulation diagram for the second variant of two-stage interruption.


3.5 Conclusions

Two variants of the two-stage interruption have been described, analyzed, simulated and compared

with the one-stage interruption. The results are presented in Table 3.2, for circuits with a source

voltage of 1kV, a prospective fault current of 10kA, a trip level of 5kA, commutating inductance of

12:H, commutating capacitor of 3mF, an initial capacitor voltage of -1kV and a limiting resistance

of 500mS.

Table 3. 2 Final state after successful interruption.

VCend [kV] tint [ms] I t2 [kA2s] I R t2lim [kJ]

One-stage 2 ≤2 65 0

Two-stage 1st variant 1 ≤12 106 53

Two-stage 2nd variant 1.9 ≤6 114 57

From the table, it is clear that the one-stage interruption caused a high residual voltage across the

commutating capacitor in comparison with the variants of the two-stage interruption. For the two-

stage variant, as suggested by McEwan, the residual capacitor voltage was limited to 50%; however,

at the expense of having more circuit components, longer interruption time and increased resistor

heating. An attempt to limit the interruption time and thus the Joule energy in the resistance,

however, was at the cost of a higher end value for the capacitor voltage.

3.6 References and reading lists

[3.1] McEwan, P.M., and Tennakoon, S.B., “A two-stage DC thyristor circuit breaker”, IEEE

Trans. on Power Electronics, Vol. 12, No. 4, July 1997, p. 597-607.

[3.2] Mohan, N., Power electronics : converters, applications, and design, 2nd ed. - Chichester :

Wiley, 1995.

[3.3] Baliga, J., Modern power devices, Wiley-Interscience, 1987

[3.4] Holbrook, J.G., Laplace transforms for electronic engineers, - 2nd rev. ed. - New York :

Pergamon Press, 1969.

[3.5] Abramowitz, M. and Stegun, I.A., Handbook of Mathematical Functions, Dover

Publication Inc., 1965, 17.6, NY: Dover.

[3.6] Kreyszig, E., Advanced engineering mathematics, 6th ed., Chichester Wiley, 1988.

[3.7] Microsim, Computer software: PSPICE ver. 5.0, 1992.

[3.8] Rashid, M.H., SPICE for power electronics and electric power, Prentice Hall, 1993.

[3.9] Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits : an

introductory guide, London,Chapman & Hall, 1997.

78 Chapter 3

Chapter 4

Fault identification and direct current measurement

AbstractThe fact that faults are accompanied by changing several other events instantaneously, means that

they can be used for fault discrimination. A detector designed to sense such an event has a crucial

function in distinguishing faults from arbitrary transients. If a fault is detected, a switch-off

command signal is sent to a circuit breaker. Comparing the available detection techniques resulted

in the design of a detector circuit, including the choice of sensor and electronic circuit.

4.1. Introduction

In general, before causing damage, a fault shows abrupt changes in the physical parameters, such as

current flow, current slope, voltage drop, temperature increase and other relevant features.

Therefore, a reliable detector will show when an abrupt change occurs and whether it is a fault or

not which has vital importance. Continual monitoring of the system’s parameters helps to

discriminate between normal operation and a fault. Appropriate sensors should be chosen to watch

over each of these parameters simultaneously. Also note that during normal conditions, some

transients may behave like short-circuits. Switching capacitive loads may lead to high surge currents

which may be interpreted as a fault; so, a reliable sensing method is required which is able to

distinguish between possible faults and transient noise backgrounds after a sequence of logical

checks before the trip mechanism is operated. A method will be presented for continuous

monitoring of the system and performing certain operations in response to the parameters being

exceeded. In addition, an appropriate tripping signal can be produced to trigger the commutation

circuit and the main breaker actuator.

Some detection methods are listed below:

A. Detection of a current level [4.1,2]. When a short-circuit exceeds a prescribed trip value a trip

signal is generated. This very simple method is generally preferred for protecting overhead

power lines. This method has some drawbacks such as: differences between short-circuits, short-

time overloads and switching transients are difficult to distinguish.

B. Detection of the level of rate of current rise [4.2,3]. This method identifies rapid current changes

below the maximum allowable current where this often will cause malicious tripping. Normally,

Rogowski-coils provide the rate of current rise (di dt ) instantly.

C. Detection of the level of rate of current rise sustained during an interval [4.3,4,5,6]. When the

rate of rise of a current exceeds the prescribed trip level during a certain time interval ∆t (50:s),

a trip signal is generated. This avoids false tripping due to transients, short overloads and

starting currents.

80 Chapter 4

D. Detection based on a combination of A and B [4.2,7].

E. Detection of a current leap during an interval [4.2,5]. When the change in current (∆i ) exceeds a

prescribed trip level during a certain time interval ∆t (50:s), a trip signal is generated. After

each interval ∆t , the current is measured and compared with its previous value thus determining

a new ∆i . The time interval can be chosen freely considering whether a fast detection system or

a reliable detection system is wanted. A compromise has to be made. In a network with frequent

transient disturbances, it is clear that the smaller the time interval, the less reliable the fault

detection will be.

When, designing a detection system, it has to match a particular network behavior during faults. If

the network is too complex, a rough estimation may fulfill this need.

Figure 4.1 shows waveforms of a short-circuited direct current system at t=20ms with the

associated current slope.

10 20 30 40 50 600

1

2

3

4

5

6

7

8

9

10

time [ms]

Cur

rent

[kA

]

(a)

10 20 30 40 50 60-1

-0.5

0

0.5

1

1.5

2

time [ms]

di dt__ [

A µ s___]

(b)Figure 4. 1 Waveforms of the short-circuit current (a) and the associated current slope (b).

4.2. Realization of a detection circuit

From the alternatives described in Section 4.1, method E was finally chosen for detecting faults.

Figure 4.2 shows a block diagram of the fault detection circuit based on method E.

fs

S/Hi(t)

Vref

)t

Tripsignal

Figure 4. 2 Block diagram of the detection unit;S/H: sample and hold unit, fS: sample frequency, Vref: reference voltage.

Due to high interference levels, the detection circuit should be kept as simple as possible. From the

block diagram depicted in Figure 4.3, the following detector circuit was built to detect faults.

Fault identification and direct current measurement 81

LM 318

10k

1n+

-

3

2

17

4

86

0

4k7

LM 318+

-

3

2

4

7 186

10k

NE 5552

1

67

84

35

1k

2k7

IR LED

15V

15V VM48

7815

7915

+15

0

+15

M

-15-15

10

10

12

3

12 3

Mon

270

1k

100k

LM 398

LM 398

5

51

4

3

8

6

20k

10k3

8

6

1

4

S/H

S/H

51

47k

1/2 LM 393

7

85

6

3

2

4

1

10k

10k

10k

level

10k

10k

10k 4k7

LM 318

10k

1n

10k

+15

-15

+

-

3

2

17

4

86

IN0

4k7

LM 318+

-

3

2

4

7 186

10k

NE 5552

1

67

84

35

100k

10k

BC4142k7

MPS U52

OUT

Red LED

IR LED

Fuse 250mA

Net filter

Tr 30VA

15V

15V

220V

VM48

7815

7915

+15

0 M+15

M

-15-15

10

12

3

12 3

BC416

270

1k

100k

LEDGreen

5

51

4

3

8

6

20k

10k3

8

6

1

4

A B

S/H

S/H

51

1/2 LM 3937

85

6

3

2

4

1

10k

10k

10k

level

10k

10k

10k 4k7

10k50k

108

9

32

1

4

6

51k

1k5

64 1

2 3 1112

13

108

9

A

B

NE 555

1k4 8

7

63 out1 2

Transfoshunt1000A/0.2A

osc 20kHz

10k33k

4093

4093

13

12

11

Figure 4. 3 The diagram of a practical detector circuit.

A current transducer produces the continuous signal M which can be used to record measurements,

at the same time it acts as a detector. The signal M becomes an input IN to be sampled by S/H

circuits. After amplification and comparison of the sampled signal to a reference voltage, an IC

timer will produce a trip signal OUT when the sampled signal exceeds the predetermined value. The

trip signal has two different forms; electrical and optical. The electrical trip signal will be used for

triggering the thyristor and opening the main breaker in the hybrid breaker setup described in

Chapter 2 and Chapter 7, while the optical signal will be used for turning off the solid-state breaker

(IGCT) as described in Chapter 7. Part of this chapter has been published in [4.8].

4.3. Direct current transducers

There are many current transducers that are suitable for detection circuits, some will be described

below:

Low-resistance shunts [4.9]. This type of transducer is the best known, but it does not provide the

potential separation between the object and the recording device; however, since the circuit is

symmetrical in respect to the ground (±500V), the application of this measuring device was taken

out of the feasibility. Furthermore, this transducer dissipates considerable heat-losses when high

currents are involved (For example 0.1mS shunts dissipate power 2500W of current 5000A).

82 Chapter 4

Kr@mer transformer method [4.10]. To overcome the difficulties with a normal current transformer,

which is only applicable for AC circuits, Kr@mer invented a DC transducer. The transductor consists

of two single phase transformers with the direct current to be measured flowing through the primary

windings in series, while the secondaries are connected to a source

of AC voltage. The secondaries are connected in series and in

opposite phase. The cores are alternately unsaturated and driven far

into saturation in successive half-cycles of the supply. While one of

the cores is unsaturated, the secondary current in it is related to the

primary current by the ratio of turns. So that when a direct current

flows in the primary, the secondary current is approximately a

square-wave at the same frequency as the supply. Over part of the cycle of the AC excitation the

secondary current is slightly too large due to magnetizing current of the cores. Twice per cycle the

secondary current passes through zero, as it reverses. Rectifying this secondary current generates a

direct current which is a measure of the direct current in the primary.

Zero-flux method [4.11]. This method as applied by Holec is based on obtaining a perfect balance

between the magnetic flux generated by the current in the primary current carrier NP and the flux

generated by the current in the secondary winding NS and the auxiliary winding NA1 around the

toroidal T1 ferromagnetic core of the measuring head, see Figure 4.4 (a). The auxiliary winding is

connected to the input of a high gain power amplifier which feeds the secondary winding and a

burden resistor. Any change of current in the primary causes a change of flux through the toroid

which in turn induces a voltage in the auxiliary windings. This voltage is fed to the power amplifier

and the current in the secondary winding produces an opposing flux to counteract the original

change of flux. The balance point is known as the condition of zero-flux. Assuming the amplifier

has infinite gain and zero offset, no change of flux occurs in the toroid. In practice the gain of the

power amplifier can not be infinite. The consequence is that a small voltage is induced in the

auxiliary winding which influences the secondary current. In combination with the power amplifier

it produces an increasing imbalance of flux (drift). To minimize the effect of drift the zero-flux

current transformer is furnished with a magnetic modulator. Two extra cores (T2 and T3) are fitted

in the measuring head. The auxiliary winding NA2 and NA3 around these toroids are wound in the

same direction. They are excited by means of a sinusoidal voltage of fixed frequency generated by

an oscillator. The auxiliary windings are connected in mutually opposite sensing to the oscillator. If

the flux in the core is not zero, the balance between the induced flux in NA2 and NA3 is disturbed.

The peak detector recognizes this and the voltage is fed to the power amplifier in the secondary

circuit. The output current of the amplifier then restores a perfect flux balance so that the necessary

zero-flux condition is maintained. The advantage of this method is its great accuracy of 99.98% but

of course this transducer is expensive.

Ampere-turn compensation. A simplified version of the zero-flux method uses a Hall-sensor (made

by LEM) placed in the air-gap across the core for measuring the field-strength which is used as the

electronic input for generating the compensation current, see Figure 4.4 (b). The advantage of this

method is that only a relatively small field in the core is required, so that problems in saturation and


losses in the core are negligible. Moreover, this method can be used for measuring direct currents

too. Since the current generated in the secondary winding is provided by power amplifiers, they may

restrain for measurement high currents where the electronic part may not be able to generate the

required compensation current.

+

Ip

Oscillator

Peak detector

-IS

NA1 NA2NA3

T1 T2 T3

NP

NS

Burdenresistor

Power amplifier

(a)

iP

nP nS

iS

iH

Ferromagnetic core

Hall-sensor

Power amplifier

Burden resistor

(b)Figure 4. 4 Current transducers; (a) Zero-flux method and (b) Ampere-turn compensation method.

Since the considerable accuracy provided by a zero-flux transformer is not required, in this instance,

the most appropriate one is the LEM current transducer which provides galvanic separation from the

live conducting paths and produces a high output signal that is ready for processing. The rated

current setting range using current transformers is limited because of their saturated current

transformer cores. To extend this range, larger current transformers must be designed. The LEM

transducer gives the corresponding linear value with a high precision (less than 0.1%). A fast

response LEM transducer with a nominal current rating of 1.5kA is preferable. However, the total

circuit current may reach a prospective current of 6kA which may damage the electronics.

Therefore, multiple parallel bars were constructed to split the total circuit current, so that only a part

of the current would be used for the detection. Such a transducer on one branch of the three parallel

copper bars placed in the main current path, was used, see Figure 4.5 (a). Depending on how those

shunt bars are located with respect to the total current and the circuit symmetry, the current in each

shunt may not be shared equally. The measurement of the main current ITot distributed among those

three parallel bars (Ibar1, Ibar2 and Ibar3) is displayed in Figure 4.5 (b).

bar1

bar3bar2

bar1

bar2

bar3

2m

1.5m20cm

I

I

(a)

ITot

Ibar3

Ibar1

Ibar2

10 15 20 25-1000

0

1000

2000

3000

4000

5000

6000

time [ms]

Cur

rent

[A]

(b)Figure 4. 5 (a) Diagram of the main current busbar and the parallel shunts and (b) graphs of the current

distribution.

84 Chapter 4

Since the current distribution shows that it is not shared equally among the parallel bars, that

difference has to be taken into account when setting the detection level of the chosen bar, then a

better insight will be obtained of the total current in the circuit. The LEM transducer would be used

for the detection circuit.

4.4. Rogowski-coils as current transducers

The current transducers in the experimental setup used differentiating and integrating (DI) systems

which contained Rogowski-coils and active electronic integrators. They measured currents in the

main and commutating paths. Measuring direct currents became a problem when high currents were

involved, especially because using a conservative shunt to measure the currents could lead to

excessive heating in the shunt; also isolating problems arose if arbitrary circuit currents were

needed. Hence, isolating the shunt and the measurement recorder was essential. This could be

achieved by introducing indirect measurements. Such methods provided safer measurements

because they were completely isolated from the circuit and easily insulated against high voltages.

Therefore, they could be readily transferred from one branch to another. In general, they could

measure only alternating fields induced by the current itself. A Rogowski-coil should have regularly

spaced turns in a coil-form of constant cross-section A, whereas the field to be measured should

vary only slightly from turn to turn and across the cross-section. Under those conditions, the total

voltage induced into the coil connected in series turns is given by :

V ANdB

dtdlRC = •I

rr

(4.1)

where : N is the number of turns per meter length and N dl is the number of turns of the coil

element dl . Using Maxwell’s law, the relationship becomes :

V ANdi

dtM

di

dtRC = =µ0 (4.2)

where : i is the main current enclosed by the Rogowski-coil.

Rogowski-coils [4.12] measure the B-field around current conductors using a toroidal coil without a

magnetic core, see Figure 4.6. The main current induces a voltage in the coil with respect to the

magnetic coupling between the main current conductor and the coil. By integrating the induced

voltage, it is possible to recover the equivalent waveform of the original current. The integration can

be performed with either analog circuits or discrete calculations. Of course, Rogowski-coils are only

suitable for the measurement of transient currents in DC circuits and not continuous currents.

I

Metal ShieldedRogowski-coil

I

Figure 4. 6 The Rogowski-coil.


A flexible Rogowski-coil was constructed so that it could be wrapped around the conductor under

interest in order to measure the enclosed current. The time integral of the voltage induced in the coil

was long enough and the time constant of the integrator was short enough. An RC integrator was

used and its output signal was in phase with and directly related to the impulse current multiplied by

the integrator constant. The Rogowski-coil had a flexible coil form of area A=4.9cm2 , 400 turns and

total length of 4m which was long enough to wrap around a casing of 15cm outer diameter. The

return conductor of the coil was brought back through the center of the coil form in order to avoid

encircling possible longitudinal fluxes. A metallic shielding was used to minimize any external

disturbances. The output voltage of the Rogowski-coil was integrated by the three integration steps

shown in Figure 4.7.

R3

R1

C1

R4 R2

C2

L

Rc

-

+

out 2Vpp

out 20Vpp47

1k81k8

8

6

1004k7

150n 25n 5n

3

4

100-15V

2k

47k

"gain"

2k7

1u

+15V

27

"offset"

1-

+

20k

4M7 4M7

18

22

10

10

x1x2

x4

x8x16

Rog in

47

47

39 10

10

10

10

10

R1 . C1 = 10 sec

R1 / R2 = 1000

R2 . C1 = R3 . C2

L / Rc = R4 . C2

C2 = 200 nF

R4 = L . 10^5

Figure 4. 7 Schematic of the three-step integration circuit.

The integrator was tested separately using a step function as the input of the integrator and the

resultant integrated signal was recorded. Figure 4.8 shows the step function and its integration

signal in which the distortion was negligible at the beginning of the integrating process.

86 Chapter 4

0 50 100 150 200-0.5

0

0.5

1

1.5

2

2.5

Ste

p-vo

ltage

[V

]time [µs]

0 50 100 150 200-0.01

0

0.01

0.02

0.03

0.04

0.05

0.06

Res

pons

e-V

olta

ge [

V]

time [µs]

Figure 4. 8 A step input with arise time of 20ns and the response of the integrator.

The pulse and frequency characteristics of the integrator are presented in Figure 4.9.

0 50 100 150 200-1

0

1

2

3

4

5

time [µs]

Inpu

t vol

tage

[V

]

(a)

101

102

103

104

105

10-4

10-3

10-2

10-1

100

101

frequency [Hz]

Att

enua

tion

f act

or

(c)

0 50 100 150 200-0.01

0

0.01

0.02

0.03

0.04

0.05

time [µs]

Out

put v

olta

ge [

V]

(b)

102

103

104

105

-100

-80

-60

-40

-20

0

frequency [Hz]

Phas

e an

gle

(d)Figure 4. 9 The electronic integrator measurements;

Pulse response in the left-hand axis and frequency response in the right-hand axis.


It was verified that the Rogowski-coil was also able to measure flux changes in a DC circuit where

both a coaxial-shunt and a Rogowski-coil were used to measure a direct current of 2000A. Before

that test, both current transducers were calibrated separately. The coaxial-shunt had a resistance

value of 2.56mS. The mutual inductance coupling M of the Rogowski-coil was about 85:H and the

results are shown in Figure 4.10. With a shunt it became apparent that the pickup noise was very

small because the sensitivity difference between them was great; the shunt gave 1V/div and the

Rogowski-coil 10mV/div. Obviously, the output signal form of the shunt was greater than the

background noises and that smoothed out the measurement samples. The Rogowski-coil and the

integration process seemed to exhibit more noise due to the fact the low sensitivity setting had to be

used.

0 10 20 30 40 50-500

0

500

1000

1500

2000

2500

Cur

rent

[A]

time [ms](a)

0 10 20 30 40 50-500

0

500

1000

1500

2000

2500

Cur

rent

[A]

time [ms](b)

Figure 4. 10 Direct current of 2kA sensed by (a) the shunt and (b) the Rogowski-coil and its integrator.

Although the shunt was able to give a smooth signal, it could not be used to measure high currents

due to insulation and overheating problems. A comparison of the two devices can be seen in Figure4.10 which shows a good agreement between the waveform currents with regard to each conversion

factor; (a) for the shunt and (b) for the Rogowski-coil and its integrator. So this confirmed that the

Rogowski-coil could be used now for measuring direct current transients. Although the test circuit

described in Chapter 6 produced direct currents, the hybrid breaker tests were categorized as

generating fault currents which produced pulse forms. A prospective current of 5kA would be

generated where the device under test (DUT) could interrupt that current at 3kA. A Rogowski-coil

was very suitable for measuring such pulses. Despite the fact that the Rogowski-coil in this case was

viable, its calibration was essential; therefore, a current measurement with four current transducers

had to be compared. Figure 4.11 shows the measurement for one period of a damped sinusoidal

current using the Rogowski-coil, Shunt, Transfo-shunt (LEM) and Current transformer (Pearson),

respectively.

88 Chapter 4

0.46 0.47 0.48 0.49 0.5

700

750

800

850

900

950

Zoomed Region

0 0.2 0.4 0.6 0.8 1-1500

-1000

-500

0

500

1000

1500

2000

Cur

rent

[A]

time [ms]

Figure 4. 11 Comparing different current transducers when measuring one period of 2kA damped sinus.

4.5. Conclusions

For the operation of a circuit breaker, the method of Ampere-turn compensation was chosen for

current sensing, while Rogowski-coils were chosen for measuring the currents in various branches.

The signal from the current sensor was used as the input value for an electronic detection circuit

which had both electrical and optical outputs. The electrical output could be used directly to trip the

main breaker and the thyristor for the hybrid setup, while the optical output would be used to trigger

solid-state devices.


[4.1] Bartosik, M., et.al., “Arcless DC hybrid circuit breaker”, 8th Int Conf on Switching ArcPhenomena and Electrical Technologis for Environmental Protection, SAP & ETEP’97,Lodz, Poland 3-6 Sept. 1997, Vol. 1 p. 115-19.

[4.2] Stege, M., Kurzschlu8 Erkennungsalgoritmen zum strombegrezenden Schalten, Univ.Carolo-Wilhelmina, Fakultat fur Maschienenbau und Elektrotechnik, Braunschweig,Germany, 1992. (PhD thesis in German)

[4.3] Tennakoon, S.B., DC thyristor circuit breakers: An investigation of current interruptingability, Lancashire Polytechnic, Lancashire, UK, 1986. (PhD thesis)

[4.4] Fernandez, J.A., “A new concept for protecting lines against faults in DC tractionnetwork”, Brown Boveri Review, Vol. 9, 1983, p. 372-8.


[4.5] Morton, J.S., “Circuit breaker and protection requirements for DC switchgear used in rapidtransit system”, IEEE Trans. on Industry Applications, Vol. IA-21, No. 5, Sept./Oct. 1985,p. 1268-73.

[4.6] Glenn, D.J., Cook, C.J., “A new fault-interrupting device for improved medium-voltagesystem and equipment protection”, IEEE Trans. on Industry Applications, Vol. IA-21,1985, p. 1324-32.

[4.7] Kedders, Th., Leibold., A.A., “A current limiting device for service voltages up to 34.5kVAC”, IEEE PES Summer meeting 1976, paper A76-436-6, p. 1-7.

[4.8] Prins, H.A., Kerkenaar, R.W.P., and Atmadji, A.M.S., “Simulated high-speed fault-currentdetection system for DC hybrid circuit-breakers”, 34th Universities Power EngineeringConf., Sept. 1999, Leicester, p. 111-4.

[4.9] Schwab, A.J., “Low-resistance shunts for impulse currents”, IEEE Trans. on PowerApparatus and Systems, Vol. PAS-90, 1971, p. 2251-7.

[4.10] Kr@mer, W., “Ein einfacher Gleichstromwandler mit echten Stromwandlereigenschaten”,Elektrotechnische Zeitschrift ETZ, Bd. 49, 1937, p. 1309-13. (In German)

[4.11] Groeneboom and Lisser, J., “Accurate measurement of d.c. and a.c by transformer”,Electronic & Power, IEE, Vol. 23, January 1977.

[4.12] Pettinga, J.A.J., and Siersema, J., “A polyphase 500kA current measuring system withRogowski coils”, IEE Proc., Vol. 130, Pt. B, No. 5, September 1983, p. 360-3.

90 Chapter 4

Chapter 5

Fast electrodynamic drives for the hybrid breaker

AbstractThe limitation of stored energy in order to produce a current-zero must be accompanied by

minimizing the breaker opening time, so that, the time between a fault’s detection and the contacts

opening can be made as short as possible. Therefore, a fast-acting circuit breaker is an important

part of the hybrid breaker. One of the best known methods for accelerating a metallic disk is that of

using an electrodynamic propulsion drive in which the opening time can be determined. The dead-

time has to be considered after a fault is detected in order to determine that the counter-current is

sufficient for a current-zero creation before the fault current becomes detrimental. To understand

the phenomenon, one of the several methods that can be employed to analyze transient behavior is

needed. Those methods can show how different approaches can be used for a simulation that

includes attempts numerical and symbolical analysis using the coupled coil theory. Since each of

those methods has different advantages, results from them will give different outcomes depending

on objectives.

5.1. Introduction

A satisfactory fast-opening mechanism will play an important role in the success of a hybrid

switching technique. Such a mechanism has been used for electrodynamic propulsion drives which

operate with impulse currents. When a conductor is exposed to a pulsed magnetic field, that field

does not penetrate into the conductor instantaneously. Surface currents, known as eddy currents, are

induced which initially shield out the magnetic field and then gradually permit it to penetrate. This

process causes the movable part of the drive to change its position or state. The impulse current and

electrodynamic force relationship in the electric circuit is associated with what is taking place in the

mechanical system. In turn, the current and the electrodynamic forces affect the mechanical

movements. A mechanical movement causes the electrodynamic force to change and interact with

the current so that energy is interchanged [5.1,2]. The electrodynamic force accelerates the moving

parts; however, this force acts only on a comparatively small initial segment determined by the area

of the electrodynamic interaction with the excitation coil. This induction phenomenon has been

extensively used for both destructible and non-destructible purposes. Induction devices have many

applications; such as mass launchers [5.3,4,5,6], railguns [5.7], metal forming [5.8,9], mass

levitation [5.10,11], plungers [5.12,13,15,18], valves control in pneumatic systems [5.14,15,18], etc.

The difficulty of designing moveable induction devices that are needed for opening switches is

caused by having to coordinate the characteristics of the drive, the moving parts and the clasp, that

reduces the efficiency and limits the operating times. A contradiction between fast opening and

braking mechanisms requires a well-matched catching (clamping) device.

92 Chapter 5

Computer simulation of the electrodynamic driven mechanism has been performed in which the

phenomenon is represented by non-linear differential equations. The energy conversion from

electric energy to kinetic energy in this phenomenon is a non-linear process too. Different

approaches and methods will be employed for simulating the process general point of view by using

first linear lumped parameters to outline where the solution may be found. Then, this is followed by

the application of non-linear lumped parameters to obtain a particular solution. The simulation that

was performed with MATLAB/Simulink computing software [5.31] gave measurement results that

confirmed the validity of such a simulation model.

5.2. Description of the electrodynamic drive system

The electrodynamic drive is illustrated in Figure 5.1. A moveable terminal (26) for the vacuum

contacts is mounted at the top of a nylon rod (12). The excitation coil (22) is connected to a pre-

charged capacitor (set-capacitor) by controllable solid-state switches. Opening of the vacuum

contacts occurs when the nylon rod moves downwards. The rod is fixed to a metallic disk (1) and a

spring 1 (10) is placed in the hole through the disk and it goes inside the rod. The permanent magnet

(14) holds the disk in an open-state of the vacuum contacts. The demagnetization coil (15), springs

1 and 2 (10 and 11) reclose the contact breaker by discharging a pre-charged capacitor (reset-

capacitor).

Principle operations:Opening

When the set-capacitor discharges its stored energy by turning-on the control switch, an impulse

current arises and builds up the magnetic flux lines. Part of this flux links through the metallic

disk. The flux linkage induces eddy currents in the disk that in turn generate secondary flux lines

opposing the primary flux which results in a downward movement of the disk because it is nearly

free to move. Then, this movement changes the flux linkages generating other eddy currents, and

the process repeats itself. Theoretically, these processes will continue repetitively until all the

stored energy in the capacitor has been entirely dissipated. The combination of solid-state

switches allows a damped sine current to flow for one period. Within that period, the disk has

sufficient kinetic energy to move on its own; whilst moving, spring 1 shrinks storing part of the

kinetic energy as potential energy. Some of that kinetic energy is transferred to the damper body

(7), causing the disk velocity to decrease which allows the disk to touch the demagnetization coil

gently but remain attached to the permanent magnet that is fixed to the plexi-glass body. In the

meantime, the damper body moves downwards into the damping chamber (13) which transfers

kinetic energy into air compression and decompression with the aid of spring 2. During this

process, the air in the chamber does work that may take a part of the disk’s kinetic energy to

allow a higher disk speed to be held by the permanent magnet. The kinetic energy of the disk is

shared with the springs and the damper, while a little is absorbed by surface friction.

Fast electrodynamic drives for the hybrid breaker 93

Closing

A different principle is used for closing the contact breaker. By discharging another small pre-

charged reset-capacitor to the demagnetization coil, closing the contacts is possible. A small

impulse current generates a flux line opposing the flux emerging from the permanent magnet,

which results in minimizing the holding force from the magnet so that spring 1 is able to release

the potential energy thus restoring its length; its return moves the disk upwards causing the

vacuum switch to close.

Figure 5. 1 Cross-sectional view of the moving mechanism.

94 Chapter 5

Obviously, by varying the initial capacitor voltage, the kinetic energy of the disk can be regulated.

On the one hand, increasing the initial voltages may cause higher impulse currents that raise

excessive forces acting on the disk, so that it moves faster. However, if the kinetic energy of the

disk is too high just prior to touching the demagnetization coil, the spring 1 would not be able to

store the kinetic energy properly. Subsequently, the disk will attach to the magnet for a while, but

since the collision is near perfect, the disk bounces back in the upward direction. In other words, the

disk is not held by the permanent magnet. It moves back assisted by the released energy of the

spring 1 that leads to the contacts reclosing. On the other hand, insufficient initial capacitor voltages

would not make the disk attach to the magnet. Instead the disk keeps attached to the magnet, it

moves a while and repulses back in the upward direction by the spring 1 resulting in the contacts

reclosing. Shortly, for successful contacts separation, at the instant the disk attaches the magnet, its

velocity has to be minimized to avoid the bouncing phenomenon. An appropriate combination of

springs to store the kinetic energy of the disk in potential energy has to be determined carefully. The

opening time is made to be as short as possible but it must ensure no bouncing. Other devices can be

added for assisting the spring function, such as, the air damper at the bottom as shown in Figure5.1. Normally, mechanical friction between the stationary and moving parts is always present during

the entire process, but its influence is negligible. The copper spirally wound drive coil of diameter

67mm is cast in a mold and has 100 turns with a self-inductance of 85:H and a resistance of 238mSin the closed mode of the breaker.

This design was a modification of a fast opening switch made in Hazemeyer Research laboratory in

the sixties. Since then, electrodynamic drives had been also successfully used as make switches for

high power tests [5.36,37].

5.3. Mathematical analysis of the electrodynamic drive system

Events during operation of the electrodynamic drive described above are transient in nature and they

can be analyzed using a lumped-element method (coupled-circuit theory) [5.3,4,10,14,34] and other

involving field theories [5.15,16,17,18,19,20,21,32,33]. The first method requires an equivalent

network scheme associated with both electrical and mechanical equations. The second method

needs the solution of the Maxwell’s equations with respect to the configuration in space and time.

Both methods contain non-linear differential equations for the electromechanical coupling and each

has advantages and disadvantages. Each method has its own strength and weakness. The lumped-

element method can represent a system composed of passive devices which simplifies the modelling

considerably. Hence, new modifications can be integrated relatively easy; whilst the application of

Maxwell’s laws is difficult and requires an understanding of electromagnetic fields in space and

time. Symbolical calculations from Maxwell’s equations are suitable only for simple configurations.

Therefore, analyzing such complex phenomena, one needs finite or boundary element programs

particularly designed for dealing with 3D-space and time varying systems. Such software is

commercially available. It calculates eddy currents in the disk, acceleration, force, effective circuit


inductance and resistance, etc. Apparently, it would take much effort if the system has to be

modified. Moreover, it generally requires long computing times and computer resources and it is

costly.

5.3.1 Analysis of the electrodynamic drive using the coupled coils theory

This method used lumped elements to describe behavior of the system. For convenience, it was

assumed that the system transferred the energy through coupled coils. The excitation coil had N1

turns and the disk was considered to represent a single coil for the first approximation. Both coils

were axially symmetric and by splitting the disk into coaxial rings, a better approximation could be

achieved, but its computation would be cumbersome.

The drive contained two parts; the actuator comprises a stationary coil, a pre-charged capacitor and

two control switches; whilst the dynamic part consisted of a metallic disk, springs and a damper.

Figure 5.2 shows the diagram for the analysis.

CSW

VCO

Thy

D

i1L1

R1

Zin

x

Disk

Figure 5. 2 Diagram of the electrodynamic drive system.

The system was based upon the principle of a current transformer in which the secondary part (a

good conducting metal disk) was nearly free to accelerate; while the primary part consisted of the

stationary excitation coil L1 , the precharged capacitor CSW as an energy store (W C VCO SW CO= 1 2 2)

and the solid-state switches (thyristor Thy and diode D) which controlled the discharge process. In

the initial position, the disk as the secondary coil, was placed near the excitation coil, so that, they

could be considered to behave as a pair of coupled coils. The thyristor Thy was triggered only once,

causing current to flow into the coil and produce an electrodynamic force on the disk. The diode D

provided an alternative path for the current in the negative half of the cycle. The current built up the

magnetic field in the excitation coil L1 and the flux lines could then cross the disk, because it was

made of metal, eddy currents flowing in the disk opposed the original flux lines. When considering

the disk as a single-turn coil, its current flowed in the opposite direction to the current in the

excitation coil. The expanding nature of the field caused a strong impulsive force to move the disk

downwards. In turn, this movement decreased the rate of change in the mutual coupling between the

96 Chapter 5

disk and the excitation coil; thus, the disk’s motion was caused by energy being discharged from the

excitation coil.

The coupled-circuit theory presents two different formulae for the electrodynamic force based on

the known electrical parameters. The first formula is based on the following equation : [5.3,6,10]

F x t i idM

dxED ,1 6 = 1 2 (5.1)

where : i1 is current in the primary coil, i2 is current in the disk, M is the mutual inductance

between the primary coil and the disk and x is displacement of the disk, respectively. This formula

requires both the coil currents and the differentiation of mutual inductance to be known with respect

to the disk displacement.

Another expression is presented below: [5.8,12,14]

F x t idL

dxEDeq,1 6 = 1

2 12 (5.2)

where : i1 is current in the primary coil and Leq is the equivalent (effective) inductance of the

primary coil in the presence of the disk. In this way, the propulsive force was found to equal one-

half the coil current squared multiplied by the circuit inductance per unit length (inductance

gradient). The circuit inductance increased because of the motion of the disk. Its linear relationship

with the force exerted helped to design the drive. Basically, the drive could be considered as a single

turn motor; therefore, it required a very high current with a relatively low voltage. A high current

could be achieved if the circuit inductance was considerably low. Consequently, the energy

conversion would be less efficient.

In its simplest form, the system can be represented by the coupled coils circuit as shown in Figure5.3.

CSW

VCO

S1

R2L1 L2/i1 i2

R1

Zin CSW

S1

Leqi1

Req

Zin

M

VCO

Figure 5. 3 A coupled electrical circuit and its equivalent.

where : CSW , VCO, R1, L1 , R2 and L2 are the storage capacitor, the initial capacitor voltage, the inner

resistance and self inductance of the coil, the inner resistance and self inductance of the disk,

respectively. When switch S1 closed, current i1 flowed in the primary circuit inducing current i2 in

the secondary circuit. The disk’s motion decreased the coupling between the primary and secondary

circuits that, in turn, affected current i1. Then field lines of the two coupled coils are illustrated in


the left-hand column of Figure 5.4. The coupling factor k represents the fraction of the generated

flux enclosed by the secondary coil; it is defined as k M L L= 1 2 , where : M is the mutual

inductance between those two coils.

W C

Stationary coil

x

Moving coil

a

b

d

xO

(a)

0 2 4 6 8 100.095

0.1

0.105

0.11

0.115

0.12

0.125

distance d [mm]

Mut

ual i

nduc

tanc

e M

[µ H

]

(b)Figure 5. 4 (a) A simplified model of two coupled coils

(b) Mutual inductance of two axis-symmetrical coils (a=48mm, b=57mm).

The mutual inductance of two coaxial thin wire loops is defined as: [5.23]

M ab K E= −

−

!

"$#

21

2

2µα

α α α1 6 1 6 (5.3)

where : α =+ +

2 2 2

ab

a b d1 6 , Kdα θ

α θ

π

1 6 =−I

1 2 20

2

sin

/

and E dα α θ θπ

1 6 = −I 1 2 2

0

2

sin/

;

K α1 6 and E α1 6 are the complete elliptic integrals of the first and second kinds, respectively [5.24].

The solution of the integration can be found with numerical techniques. The stationary coil has N1

turns, so that the total mutual inductance becomes approximately M M NT = 1.

The resistance of the stationary coil R1 and inductance L1 can be calculated from : [5.35]

RN a

Rl l

l1

12

2= ρ(5.4)

L a Na

Rll

l1 1

2 8 7

4=

−

µ ln (5.5)

where : ρl is the coil resistivity, al is the radius of the coil loop and Rl is the radius of the coil cross

section.

By assuming the disk to be a single turn coil, R2 and L2 can be calculated from :

Ra

Rd d

d2 2

2= ρ(5.6)

L aa

Rdd

d2

8 7

4=

−

µ ln (5.7)

where : ρd is the disk resistivity, ad is the effective radius of the disk loop and Rd is the effective

radius of the disk’s cross section. In practice, it is impossible to measure L2 and R2 .

98 Chapter 5

The impedance seen by the capacitor CSW can be found in the s-domain by replacing the capacitor

with a voltage source. To get a visualization of the changed equivalent inductance and resistance,

the following fundamental equations in the time-domain are given for both loops :

V t R i t Ldi

dtM

di

dtS 1 6 1 6= + +1 1 11 2 (5.8)

0 2 2 22 1= + +R i t L

di

dtM

di

dt1 6 (5.9)

Since all the initial conditions are zero, in the s-domain, these equations will become :

V s R sL I s sMI sS 1 6 1 6 1 6 1 6= + +1 1 1 2 (5.10)

0 2 2 2 1= + +R sL I s sMI s1 6 1 6 1 6 (5.11)

From equation (5.11), the current in the secondary loop can be found : I ss M I s

R sL21

2 2

1 6 1 61 6=−

+ and this

allows I2 to be replaced in equation (5.10). Then, the equivalent impedance becomes :

Z sV s

I s

s L L M s R L R L R R

R s LinS1 6 1 61 6

2 7 1 61 6= =

− + + ++1

21 2

21 2 2 1 1 2

2 2

By substituting the coupling factor relationships, the term M is eliminated becoming :

Z s ks L L k s R L R L R R

sL Rin ,1 6 2 7 1 6=

− + + ++

21 2

21 2 2 1 1 2

2 2

1(5.12)

In the frequency domain, the equivalent impedance Z k R k j L kin eq eqω ω ω ω, , ,1 6 1 6 1 6= + can be found

by substituting s j= ω (ω π= 2 f ). The equivalent circuit resistance can be extracted :

R kR R R L L k L R

R Leq ω ω ω

ω,1 6 = + +

+1 2

22 1 2

2 2 22

21

22 2

22 (5.13)

and the equivalent circuit inductance is :

L kL L k R

R Leq ω

ω

ω,1 6 2 74 9

=− +

+1

22

2 22

2

22 2

22

1(5.14)

Figure 5.5 shows the resistance and inductance curves as functions of the coupling factor

(0 0 9≤ ≤k . ) and frequency (0 2000≤ ≤f ). Factual data was used for the computation, namely

CSW = 120µF, VCO = −1800V, R1 150= mΩ, R2 10= mΩ, L1 85= µH and L2 10= µH. The traces for

Req and Leq coincided with an oblique line across the surface starting from high to low frequencies

and high to low coupling factors. The lines with an arrow indicated how the parameters changed

during the disk’s movement.


00.2

0.40.6

0.81

0

500

1000

1500

2000140

160

180

200

220

k [−]f [Hz]

Req

[m Ω

]

(a)

0

0.2

0.4

0.6

0.8

1

0

500

1000

1500

2000

0

20

40

60

80

100

k [−]f [Hz]

Leq

[µH

]

(b)Figure 5. 5 Three-dimensional view of (a) the equivalent resistance and (b) the equivalent inductance,

as functions of coupling-factor and frequency, where the arrow shows their variations with respect to the disk moving.

According to the equivalent drive system shown in Figure 5.3, applying Kirchhoff’s voltage law to

obtain the current in the excitation coil and the voltage across the capacitor by substituting I s2 1 6 and

replacing V sS 1 6 by − = − +

V s

I s

sC

V

sCSW

CO1 6 1 61 ; (the negative sign is consistent with respect to the

reference current) in equation (5.10). After some rearrangement, the capacitor voltage in the s-

domain can be expressed by :

V sC V s L L k s R L R L R R

s L L C k s R L R L C s L R R C RC

SW CO

SW SW SW

1 6 2 7 1 64 92 7 1 6 1 6=

− + + +

− + + + + +

21 2

21 2 2 1 1 2

31 2

2 21 2 2 1 2 1 2 2

1

1(5.15)

and the capacitor current can be written as :

I sC V sL R

s L L C k s R L R L C s L R R C RSW CO

SW SW SW

12 2

31 2

2 21 2 2 1 2 1 2 21

1 6 1 62 7 1 6 1 6=

− +− + + + + +

(5.16)

In the secondary circuit, the current is represented by :

I sskC V L L

s L L C k s R L R L C s L R R C RSW CO

SW SW SW

21 2

31 2

2 21 2 2 1 2 1 2 21

1 6 2 7 1 6 1 6=− + + + + +

(5.17)

The fact that the relationship between the coupling factor k and the speed v of the moving disk is

unknown, it is very unlikely that complete symbolical solutions will be found. Even if this

relationship were known, the coefficients in the expressions would change gradually as functions of

k giving only one unique solution for each coefficient k , as a function of time (assuming that

k f v d t= , ,1 6, where: d is the disk displacement and t is the time). Therefore, the following

equations can be derived by rearranging the equations (5.15), (5.16) and (5.17), so that, the

following convenient expressions can be found :

V sb s b s b

s a s a s aC 1 6 = + ++ + +

22

1 03

22

1 0

(5.18)

I sc s c

s a s a s a11 0

32

21 0

1 6 = ++ + +

(5.19)

100 Chapter 5

I sd s

s a s a s a21

32

21 0

1 6 =+ + +

(5.20)

where : the constants a a a b b b c c2 1 0 2 1 0 1 0, , , , , , , and d1are the appropriate ones normalizing the

coefficient of the highest order. This will allow symbolic solutions to be found after determination

of time-varying poles and zeros. Hence, one of three following cases may occur:

(1) underdamped system

(2) critical damped system

(3) overdamped system

Since the analytical solution is rather laborious, a more implicit way of solving this problem would

be to use the state-space method (SSM) [5.25,27] where high order differential equations are

reduced to multiple first order equations. The state-space approach requires canonical state

equations written in a matrix form as : &x A x BU

y C x

= +=

and the initial state values as : x xo00 5 = .

Time-domain solutions can be obtained by rewriting the respective state-space equations, so that in

this case, the equations become :

dx

dtdx

dtdx

dta a a

x

x

x

U

1

2

30 1 2

1

2

3

0 1 0

0 0 1

0

0

1

!

"

$

######

=

− − −

!

"

$

#####

!

"

$

#####+

!

"

$

#####(5.21)

with the initial condition

x

x

x VCO

1

2

3

0

0

0

0

0

1 61 61 6

!

"

$

#####=

!

"

$

##### and U = 0 .

The capacitor voltage, capacitor current and the disk current can be calculated from :

v t

i t

i t

b b b

c c

d

x

x

x

C 1 61 61 6

1

2

0 1 2

0 1

1

1

2

3

0

0 0

!

"

$

#####=

!

"

$

#####

!

"

$

#####(5.22)

An exact solution of the state-space equations will be [5.28] :

x t e xAto0 5 = (5.23)

where : eAt is the transition matrix that can be expressed by the infinite matrix series [5.26] :

eA t

mAt

m m

m

==

∞

∑ !0

(5.24)

where : A I0 = = identity matrix. Since an approximation of the transition matrix will be uniformly

convergent in any finite interval, the matrix eAt can be evaluated with a prescribed accuracy.


Numerically, an approximation of the transition matrix can be related to a finite m; therefore, a

recursive formula can be derived :

x n t e x n tA t+ =10 51 6 0 5∆ ∆∆ (5.25)

This numerical technique provides a unique solution for a certain k -value by varying the

coefficients in matrices A and C . Figure 5.6 illustrates the state-space computational method.

s

1

+++

+

+

a2

+

+

a1

s

1

a0

b0

b2

b1

c1

c0

d1

+

+

s

1

s

1

+++

+

+

a2

+

+

a1

s

1

a0

b0

b2

b1

c1

c0

d1

+

+

s

1 x3

i1(t)

vC(t)

i2(t)

x2 x1+

+

+

-

U

Figure 5. 6 Simulation diagram for the state-space equations.

The results of this method are shown in Figure 5.7 (a) for the capacitor current and Figure 5.7 (b)

for the capacitor voltage.

Another implicit method was developed by starting from the previous equations (5.15) and (5.16).

Approximating the t -domain solution in the same way as the s -domain in successive steps

overcame the need to calculate zeros and poles of the transfer functions explicitly. The method is

known as the Numerical Inverse-Laplace Method (NILM). More detailed mathematical formulation

is given in [5.29,30]. For given parameter values and a certain coupling factor, the capacitor voltage

and current in the s-domain could be set and computed numerically for a range of time-intervals

under study. The inverse-Laplace f t1 6 of an arbitrary transfer function F s1 6 is defined as :

f ti

e F s dsst

i

i

1 6 1 6=− ∞

+ ∞

I1

2π γ

γ

(5.26)

where : γ is chosen in such a way as to leave all singularities of F s1 6 , s i= +γ ω . In most cases, the

transform could not easily be inverted analytically. This method is based on constructing the

102 Chapter 5

function f t1 6 in its Fourier series by means of a numerical inversion. Since f is a real-value

function for a real t , its mathematical equivalent form can be obtained by manipulating the real and

imaginary parts of (5.26) to give :

f t e F s t dt1 6 1 6< A 1 6=∞I2

0πω ωγ Re cos (5.27)

Then, the series is discretized with the trapezoidal rule to give :

f tT

eF

Fik

Tet

ik t

T

k

1 6 1 6= + +

%&'()*

!

"$##=

∞

∑1

2 1

γπγ

γ πRe

This expression can be approximated numerically to become :

f tT

eF

Fik

Tet

ik t

T

k

M

1 6 1 6≈ + +

%&'()*

!

"$##=

∑1

2 1

2γ

πγγ π

Re (5.28)

where : T is the step size computation and M is the acceptable maximum index after discretization.

The discretized form of equation (5.28) was implemented; however, in operation it took a lot of

computing time because at each specific axial separation (and each coupling factor), a new

numerical inverse-Laplace had to be computed. In a trial run, ten different k ’s were computed and

for each k , the computation was assumed to be static with reference to the capacitor voltage

equation (5.15) and the capacitor current equation(5.16). The results of this method are shown in

Figure 5.7 (c) for the capacitor current and Figure 5.7 (d) for the capacitor voltage.

Figure 5.7 compares the State-space Method (SSM) assigned as (a) and (b) with the Numerical

Inverse-Laplace Method (NILM) assigned as (c) and (d). From a theoretical point of view, the

electrical parameters (v i, ) of the system could indicate where to find boundary solutions of this

situation. Simulation results obtained with these two methods were found to be identical which

suggested how to find and to check the ‘real’ solutions. The calculations for capacitor voltage and

capacitor current indicated that decreasing k decreased the frequency, current amplitude and

effective resistance; therefore, the oscillation lasted longer. These two methods, however, could

only provide qualitative solutions and they were practically unusable since the coupling factor k

was either undefined or indeterminable. However, the practical situation appeared to be more

dynamic, so that in practice, the capacitor current and voltage traces had curves starting from the

coordinates k t0 0 0 9 0, ( . , )1 6 = to k ti i, ( , )1 6 = 0 1ms . As a result, actual voltage and current (v iC C, )

traces were oblique across the k and the t axes (k -t plane) as shown in Figure 5.7.


0

0.2

0.4

0.6

0.8

1 0

0.2

0.4

0.6

0.8

1−2000

0

2000

4000

time [ms] k [−]

Cur

rent

[A]

(a) Capacitor current using SSM

00.2

0.40.6

0.81

0

0.2

0.4

0.6

0.8

1

−2000

−1000

0

1000

2000

time [ms]

k [−]

Volta

ge [V

]

(b) Capacitor voltage using SSM

0

0.2

0.4

0.6

0.8

1 0

0.2

0.4

0.6

0.8

1−2000

0

2000

4000

time [ms] k [−]

Cur

rent

[A]

(c) Capacitor current using NILM

00.2

0.40.6

0.81

0

0.2

0.4

0.6

0.8

1

−2000

−1000

0

1000

2000

time [ms]

k [−]

Volta

ge [V

]

(d) Capacitor voltage using NILMFigure 5. 7 (a) The capacitor current and (b) the capacitor voltage using SSM

(c) The capacitor voltage and (d) the capacitor voltage using NILM.

If the problem could be solved symbolically, the electrodynamic force could be calculated using the

following formulae :

F x t i t i tdM

dxED ,1 6 1 6 1 6= 1 2 (5.29)

dM

dx

x

a b xK

ab

a b xEx x=

+ +− +

− +

!

"

$###

µ α α1 64 9

1 6 1 64 91 6

2 22 2

12

(5.30)

where : dM

dx is the gradient of the mutual inductance between the two current loops given by

equation (5.3) and α x

ab

a b x=

+ +2 2 21 6 .

In the next section, a second approach will be used to eliminate the coupling factor k from the

equations.

5.3.2 Analysis of the electrodynamic drive using equivalent lumped parameters

This method eliminates the need for k -values. After the solution domain has been reduced, non-

linear lumped parameters can be used to describe the electrical and mechanical equations by

104 Chapter 5

rewriting the problem as coupled differential equations in their original forms and solving them

numerically. Then the equations developed can be solved with numerical software, in this case,

MATLAB and Simulink [5.31] are suitable. Clearly, non-linear RL-lumped parameters will arise

due to the disk’s motion, so that, they will vary with reference to the displacement from the initial

position. The RL-lumped parameters can be determined by measuring, at particular distances, the

inductance and resistance related to the coil’s terminal, in the presence of the conducting disk. This

can give the equivalent inductance Leq and resistance Req by finding suitable polynomials, while

these lumped parameter functions can be determined with respect to the displacement.

The following assumptions were made when analyzing the system :

• the material saturation could be neglected and the system was infinitely permeable,

• the friction was considered to be linear increasing with speed,

• the spring force was linearly proportional to the elongation,

• the control switches (Thy and D) were to be considered ideal.

The simulation of electrodynamically driven fast switches must include the determination of the

following system parameters: the capacitor current iC , the capacitor voltage vC , the disk

displacement x , the disk velocity dx

dt, the disk acceleration

d x

dt

2

2, the impulse force Fd at the disk,

and the energy balance in the system.

Having a system like that depicted in Figure 5.2, an impulse current can be generated by triggering

the switch Thy. The impulse current iC in the system will flow in the primary coil, by definition

i iC = 1 and it will obey Kirchhoff’s voltage law :

v t v t v t

R id

dtL i

Ci dt V

R L C

eq C eq CSW

C CO

1 6 1 6 1 63 8

+ + =

+ + + =I0

10

(5.31)

Assuming that the magnetic flux linkage in the disk and the coil had a linear relationship with the

coil current, the flux linkage between coil and disk can be written as ϕ x t L x i t,1 6 1 6 1 6= ; x being the

displacement of the disk relative to a fixed reference point. Given that the inductance followed the

relationship : L L xeq = 1 6 , the rate of change of the inductance can be written as dL

dt

dL

dx

dx

dteq eq= . In

the same way the resistance R R xeq = 1 6 and the rate of change of the resistance can be written as

dR

dt

dR

dx

dx

dteq eq= . Using this expression would make damping of the system less than for only a static

DC coil resistance.

Substituting the terms dL

dteq and

dR

dteq in equation (5.31), then, after differentiating it with respect to

time and performing algebraic manipulation, a non-linear second order differential equation is

obtained :


Ld i

dt

di

dtR

dL

dx

dx

dti

C

dR

dx

dx

dt

dx

dt

d L

dx

dL

dx

d x

dteqC C

eqeq

CSW

eq eq eq2

2

2 2

2

2

221

0+ +

+ + +

+

= (5.32)

The second and the third terms represent mechanical contributions.

Then, some relevant parameters can be defined :

The capacitor voltage :

v tC

i d VCSW

C

t

CO1 6 1 6= +I1

0

τ τ (5.33)

Disk velocity :

v tdx

dtd 1 6 = (5.34)

Disk acceleration :

a tdv

dt

d x

dtdd1 6 = =

2

2(5.35)

Rewriting equation (5.32) using these new parameters will lead to a more comprehensible form :

Ld i

dt

di

dtR v

dL

dxi

Cv

dR

dxv

d L

dxa

dL

dxeqC C

eq deq

CSW

deq

deq

deq

2

2

22

221

0+ +

+ + + +

= (5.36)

Table 5.1 shows the influence of a particular term with respect to its physical effects

Table 5. 1 The coupling terms and their physical effects.

2vdL

dxdeq this term increases the damping of the current

waveform during the disk’s motion

vdR

dxv

d L

dxa

dL

dxdeq

deq

deq+ +2

2

2

these terms decrease the frequency of the current

waveform during the disk’s motion

The mechanical force balance according to Newton’s second law can be obtained by summing the

forces acting on the disk as shown in Figure 5.8.

m

b

FG FM

kx

FED

FS

FF

Figure 5. 8 Forces acting on the disk.

The disk impulse force is written as :

F t m a md x

dtd d d d1 6 = =∑2

2. (5.37)

The net force moves the disk of a mass md with an acceleration ad . The disk will be affected by

forces from six different sources. The forces taken into consideration may include the following :

106 Chapter 5

(1) the electrodynamic exchange force FED due to the current in the actuating coil which is

given by : 1

22i t

dL

dxCeq1 6 , the term

dL

dxeq is known as the inductance gradient;

(2) the spring force FS which is proportional to the displacement of the spring x written as k x ,

where k is the spring constant (modulus of the spring). When the contacts open, the spring

is compressed but when the contacts closed, the spring is relaxed;

(3) the frictional force FF which consists of two parts, mechanical and air friction. The

mechanical friction is known as dry friction and it occurs when a body moves across a dry

surface, its value is proportional to the normal force and the roughness of the surfaces in

contact. Air friction is considered to be the same as the friction in a liquid, it is proportional

to the speed of the disk moving in a fluid (bdx

dt), this is the so-called viscous damping

force, where : b is the coefficient of viscous damping;

(4) the gravitational force is FG (F m gG d= β ), where : β will be the effective contribution of

this force depending on the direction of motion. An upward direction is denoted as a

negative force (β = −1), while, and a downward direction is a positive force (β = +1) and

for horizontal direction β is 0;

(5) the air compression and decompression forces in the chambers of the system are produced

by under- and over-pressures which act as damping forces;

(6) the magnetic force is FM and it is produced by the permanent magnet.

The natural directions of FS and FF always oppose the excitation force and will be negative in the

force equation. A vertical position of the system shows that the FG will have the same direction as

FED . The same goes for FM , but initially its contribution will be negligible when an impulse current

flows, because the maximum displacement will reach only about 2mm from a total moving path of

10mm. Hereby, the net total force on the disk becomes : F F F F Fd ED S F G= − − +∑ .

Substituting the individual forces gives the following differential equation of the disk’s motion :

md x

dtb

dx

dtkx i

dL

dxm gd C

eqd

2

2

21

20+ + − − = (5.38)

The equations (5.36) and (5.38) are coupled and they are non-linear; therefore, explicit solutions

cannot be obtained from them, but a numerical method will give a satisfactory solution. The initial

values that are required are :

iC 0 00 5 = , di

dt

V

L xC

tCO

eq t=

=

=001 6 , and x 0 01 6 = ,

dx

dt t = =0 0.

The two-second order differential equations (5.36) and (5.38) can be split into four non-linear first-

order differential equations and that decomposition will be achieved by introducing the following

new state variables :


i y

i y y

i y

== ==

1

1 2

2

& &

&& &

and

x y

x y y

x y

== ==

3

3 4

4

& &

&& &

.

Hence, the state equations will have the following form :&

&

&

&

y y

yy

LA

y

LA

y y

yb

my

k

my g

m

dL

dxy

eq eq

d d d

eq

1 2

22

11

2

3 4

4 4 3 1

1

22

=

= − −

=

= − − + +

(5.39)

where :

A x R ydL

dxeqeq

1 421 6 = +

A xC

dR

dxy

dL

dx

b

my

k

my g

m

dL

dxy

d L

dxy

SW

eq eq

d d d

eq eq2 3 4 3 1 4

1 1

22

2

221 6 = + + − − + +

+

with the initial conditions :y

yV

L

y

y

CO

eq

1

2

3

4

0 0

00

0 0

0 0

0 50 5 0 50 50 5

=

=

==

.

5.4. Comparison between simulation and measurement results

At each incremental time step, new lumped parameter values ( Leq and Req) can be determined and

then, the associated electrical and mechanical variables can be calculated. New parameters for the

effective inductance and resistance will arise indicating that there will be variations in those circuit

parameters when the disk is moving away. This process lasts successively until reaching the final

simulation time. The accuracy of this method will depend on the size of the time step and the

numerical integration method which can be chosen from the Simulink library. The fourth order

Runge-Kutta algorithm [5.24,31] was chosen for solving these equations numerically, giving : i tC 0 5and x t1 6 simultaneously. Moreover, at each time increment of the integration process, the system’s

energy balance had been calculated. That was very useful for verifying the numerical solutions of

the differential equations. The energy balance can be calculated as follows:

108 Chapter 5

Electric energy stored in the capacitor :

E t C v tC SW C1 6 1 6= 1

22 (5.40)

Magnetic energy stored in the coil :

E t L i tL eq C1 6 1 6= 1

22 (5.41)

Dissipated energy as heat in the circuit resistance :

E t R i dR eq C

t

1 6 1 6= I 2

0

τ τ (5.42)

Kinetic energy of the disk :

E t m v tk d d1 6 1 6= 1

22 (5.43)

Potential energy in the spring :

E t k x tsp1 6 1 6= 1

22 (5.44)

A small part of the energy E tx 1 6 will be lost as sound waves and mechanical friction against the

wall as well as air turbulence in the system; however, they are considered to be negligible. When the

current is being discharged, the potential energy in the spring can be neglected too, because the

displacement is still too small in comparison to the impulse force. Since the law of energy

conservation must be valid, the computation can be verified by using the following expression :

E t E t E t E t E t E t E tC t C L R k sp x1 6 1 6 1 6 1 6 1 6 1 6 1 6= = + + + + +0 . (5.45)

The difference between the original charging voltage to the capacitor and the final voltage has been

called the ‘backswing ratio’. It represents the dissipated energy in the circuit resistance as heat lost,

kinetic energy of the moving disk and the potential energy in the spring. Any unused energy will

return to the storage capacitor where it can be used again during the next operation. The mechanical

efficiency of the system can be defined by the ratio between the kinetic energy of the disk and the

initial energy stored in the capacitor:

η = E

Ek

CO

max (5.46)

Static measurements were made at different distances of the disk with respect to the excitation coil

in order to obtain the required equivalent (effective) inductance and resistance. Then, the data could

be interpolated using third order polynomials in order to determine the R xeq 1 6 and L xeq 1 6 functions

as shown in Figure 5.9.


measured curve-fitted

0 5 10 15 20 2590

100

110

120

130

140

150

160

170

180

190

displacement x [mm]

Equi

vale

nt in

duct

anc e

Leq

[µ H

]

(a)

measured curve-fitted

0 5 10 15 20 25180

190

200

210

220

230

240

displacement x [mm]

Equi

vale

nt r

esis

tanc

e R

eq [

mΩ

]

(b)Figure 5. 9 (a) The measured equivalent inductance and

(b) The equivalent resistance, as functions of the disk displacement.

Curve fitting based on polynomial approximation gave the following relationships:

L x a x a x a x aeq 1 6 = + + +33

22

1 0 and R x b x b x b x beq 1 6 = + + +33

22

1 0 , where the coefficient values were

a3 = 6.334 , a2 = -0.3883, a e1 = 9.17 - 3, a0 55e= 9 - 5. , b e3 5 90 3= − . , b2 326 6= . , b1 6 76= − . and

bo = 0 236. . Obviously, these relationships could provide the first and second derivatives with

respect to x for use with the simulation; however, they would only be valid in the measured

distance interval.

The circuit parameters were: capacitor drive CSW = 120µF, initial voltage of the capacitor

VCO = −1800 V, mass of the disk md = 1kg , gravitational constant g = −10 2ms , spring constant

k = 5270 N/m and friction coefficient 0 ≤ ≤b 3000 N.s/m.

It will be proved later that the generated impulse force was so high (up to 20kN) that any restraining

forces lower than 200N could be considered insignificant in relation to the total moving force. In

addition, the working principle of an air damping mechanism in the lower chamber could not be

verified experimentally due to possible leakage in the system. This was confirmed by making a hole

in the lower chamber, but regardless of whether the hole was closed or not, there was no difference

between several initial capacitor voltages for a successful operation. The set-capacitor CSW had a

capacitance of 120:F with an initial voltage of 1800V and the reset-capacitor was 100:F with an

initial voltage of 200V. The axial separation of the VCB contacts after the disk had become attached

to the magnet, was approximately 10mm.

Obviously, for a reliable operation of the hybrid breaker system, reclosing the contact due to

excessive high or low initial voltages had to be avoided in all cases. Experiments showed that the

disk did not rebound when the initial capacitor voltages were in the range of 1700V to 2200V.

Below 1700V, the disk had insufficient velocity, whilst when it was higher than 2200V, the velocity

was too great which resulted in the contacts reclosing. The result of the measurement is presented in

Table 5.2.

110 Chapter 5

Table 5. 2 Contact separation time as function of the initial voltages.

Initial voltage of the CSW [V] Contact separation time [:s] Switch state<1700 - spring bouncing1700 314 open1800 290 open1900 262 open2000 282 open2100 300 open

>2200 - magnet bouncing

The following Simulink block diagram [5.31] is depicted in Figure 5.10 and it shows the

interconnections for the differential equations (5.36) and (5.38) when solving them numerically.

+

+

+

Sum

.

Prod1

-b/m

const5acceleration

m

const6

.

Prod12 Force

fdisk

WS6

.

Prod11

wkdisk

WS7f(u)

v*v.

Prod9

vc

WS

ic

WS2

Ic(t)

.

Prod10

f(u) inv

s

1

Int3

WL WS10

. Prod8

0.5

Gain4

.

Prod6

+

+

Sum2+

+Sum1 f(u) vc*vc

0.5*C

Gain3

WC

WS9

. Prod7

2

Gain1

.

Prod4

.

Prod3

1/(2*m)

const3

.

Prod

-k/m

const2velocity

vdisk

WS3

f(u)

L

adisk

WS5

Vc(t)s

1

Int4

1/C

const4

.

Prod5

+ + + +Sum3

. Prod14

f(u) i*i

? simdccb2.m

t

WS1tdisplacement

xdisk

WS4 .

Prod15

k/2

const9 Wsp

WS11f(u)

x*x

s

1

Int

s

1

Int1

f(u)

d2L/dx2

f(u)

R

.

Prod13

0.5*m

const7Ekinetic

f(u)

dL/dx

1/C const8

f(u)

dR/dx

.

Prod16

s

1

Int5

WR

WS8

.

Prod17

s

1

Int2

Figure 5. 10 Block diagram of the electrodynamic drive simulation.

Results of the simulations are presented in Figure 5.11 where both the electrical parameters

(voltage and current of the capacitor ) and mechanical parameters (displacement, velocity,

acceleration and force of the disk) are included. Verification of the results was done by calculating

the energy balance during the simulation runtime.


vC

iC

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7-2000

-1500

-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

], C

urre

nt [

A]

(a)

xvd

0 0.1 0.2 0.3 0.4 0.5 0.6 0.70

0.5

1

1.5

2

2.5

3

3.5

4

4.5

time [ms]

Dis

plac

emen

t [m

m],

Vel

ocit

y [m s__

]

(b)

ad

Fd

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7-0.5

0

0.5

1

1.5

2

2.5x 10

4

time [ms]

Acc

eler

atio

n [m s2__

], F

orce

[N

]

(c)

ER

EL

EC

Ek

0 0.1 0.2 0.3 0.4 0.5 0.6 0.70

20

40

60

80

100

120

140

160

180

200

time [ms]

Ene

rgy

[J]

(d)Figure 5. 11 Simulation results; (a) Capacitor voltage and current, (b) Disk displacement and velocity,

(c) disk acceleration and force, (d) Energy balance of the system.

Looking at Figure 5.11 (d) and equation (5.46), it can be seen that the efficiency of this drive was

about 5%. Unfortunately, the construction of the experimental setup had made measurement of the

mechanical parameters impossible and only the electrical parameters were measured. Figure 5.12compares the measured and the simulated results of the electrical parts.

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7−1500

−1000

−500

0

500

1000

1500

2000

Simulated

Measured

time [ms]

Cu

rren

t [A

]

(a)

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7−2000

−1500

−1000

−500

0

500

1000

1500

Simulated

Measured

time [ms]

Volta

ge [

V]

(b)Figure 5. 12 Comparison of the measurement and the simulation:

(a) Capacitor current (b) Capacitor voltage.

112 Chapter 5

After the second current-zero occurred, switch Thy was in the reversed blocking state, so that the

electrodynamic drive ceased to function. At that instant, the disk had reached an axial opening of

about 2mm, from then onwards, only mechanical equations were involved with calculations for the

system. The next 8mm movement was expressed by the following relationship :

F mad = =∑ 0 (5.47)

There could be no disk acceleration because there was no current change. The law of energy

conservation says that finally the kinetic energy of the disk would be partly stored in the spring and

lost in the air moving in the chamber and through mechanical friction at the chamber wall :

E t E t E t Ek sp sp loss1 1 21 6 1 6 1 6+ = + (5.48)

1

2

1

2

1

22

12

12

2mv t k x t k x t Ed air1 6 1 6 1 6+ = + (5.49)

where : t1 is the time when the second current-zero occurs (the disk has its maximum velocity) and

t1 is the time when the disk is attached and kept by the magnet.

The electrical parameters of the model developed in the previous sections were validated by

measuring the coil current and the capacitor voltage, but unfortunately, neither the measurement of

the displacement nor the velocity of the moving part (disk) in the case of the vacuum circuit breaker

shown in Figure 5.1 could be made without making extensive alterations. Consequently, the

mechanical part of the model developed has not been validated. Therefore, to validate the

mechanical part of the model, another drive had to be used having the same principles for its

opening-mode. So, an experimental setup for a twin-drive breaker was developed and it could

validate both the electrical and mechanical parameters of the opening-mode model by measuring the

capacitor voltage, the coil current and the displacement of the moving part.

Table 5. 3 The relevant parts of the twin-drive.

Part name Part Material Part Numbers

1 Moving-plate Holder Copper 4

2 Moving plate Copper 2

3 Coil Various 1

4 Coil insulation Celeron 1

A diagram of the twin-drive is shown in Figure 5.13, where two moving plates 2 and 2‘ can be seen

on either sides of the coil 3. These plates moved within the path of the plate holder of each; since

the edge of the moving plate holder was elastic, the moving plate could go through under the high

produced electrodynamic force. When thyristor Thy was triggered, a current would flow and

discharge the precharged capacitor. The electrodynamic force generated could separate the two

moving plates. The original design of the drive was suitable for making purposes but redesigning it

for opening purposes is conceivable.


4

3

2‘21

Figure 5. 13 The twin-drive construction (coil and moving plates).

As the drive of the twin-drive was based on the same principle as the vacuum circuit-breaker drive,

the model that was developed could be adapted from it easily. Therefore, all the parameters required

should be determined for that new drive, such as : the mass of the moving plates, the equivalent

inductance and the resistance of the drive circuit.

The equivalent inductance Leq and resistance Req were measured when some parts of the twin-drive

were removed whilst the two plates were moving symmetrically with respect to the coil. In order to

fix the moving plates 2 and 2‘ symmetrically with respect to the excitation coil, the plates were

clamped through the coil hole. In practice, the motion of the two moving plates with respect to the

coil would not be exactly symmetrical due to the tolerance needed for manufacturing the plates. The

results are shown in Figure 5.14.

0 5 10 15 20 25 30 35 40400

500

600

700

800

900

1000

displacement [mm]

Equ

ival

ent i

nduc

tanc

e L

eq [

µ H]

(a)

0 5 10 15 20 25 30 35 40600

650

700

750

800

850

900

displacement [mm]

Equ

ival

ent r

esis

tanc

e R

eq [

mΩ

]

(b)

Figure 5. 14 (a) The measured equivalent inductance and(b) The equivalent resistance, as functions of the plate displacement.

114 Chapter 5

An experimental setup was made for measuring: the capacitor voltage, the coil current and the

displacement of the moving plate. The mass of the plates was 1kg.

Contact

CT

i

ThyDf

Uc

Re

x

Plate2

x

Plate2

\

Le

C, Uc(0)

MVD

Oscilloscope

Computer

R

Ub

Figure 5. 15 The experimental setup for the drive circuit of the twin-drive;CT: current transformer and Ub: battery.

Measuring the capacitor voltage was done by using a mixed voltage divider MVD. A current

transformer CT of the Person type were used to measure the coil current as shown in Figure 5.15.

To measure the displacement, a copper contact were made and located in the path of the moving-

plate. This copper contact was free to be adjusted at certain distances measured from the coil. By

adjusting the copper contact at a distance x from the moving plate, a circuit consisting of a battery

Ub and a resistance R was closed when the moving plate touched the copper contact. At that

moment, the moving plate covered the distance x. The time of the first contact between the moving

plate and the copper contact was recorded by an oscilloscope. Repeating this experiment with

different values of the distance x resulted in a number of points, which represented the displacement

x as a function of time. As shown in Figure 5.15, the terminals of R, CT and MVD were connected

to the oscilloscope in order to get the capacitor voltage and coil current wave forms and also to

measure the system operating time. During the experiments, the initial capacitor voltage Uc(0) was

kept constant. The experimental setup parameters are given in Table 5.4.

Table 5. 4 The experimental set-up parameters for the twin-drive.

Parameter ValueC 120 µF

Uc(0) 2.1 kVRe(0) 0.8 ΩLe(0) 485 µH


A comparison of the measured and simulated capacitor voltages is shown in Figure 5.16 (a) and for

the coil currents is shown Figure 5.16 (b).

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

-1.5

-1

-0.5

0

0.5

1

1.5

2

2.5

3

Time, ms

Vo

ltag

e,

kV

measured simulated

(a)

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

Time, msC

urr

en

t, k

A

measured simulated

(b)Figure 5. 16 The measurement and simulation results of the twin drive;

(a) The capacitor voltages (b) The coil currents

The measured and simulated displacements of the moving part are depicted in Figure 5.17, where

the time delay was about 0.3 ms after triggering the thyristor Thy.

0 1 2 3 4 5 6 7 8 9 1 00

5

1 0

1 5

2 0

2 5

3 0

T im e , m s

Dis

pla

ce

me

nt,

mm

S im u la t e d M e a s u re d -1M e a s u re d -2M e a s u re d -3

Figure 5. 17 The measured and simulated displacement of twin-drive.

At the end of the discharging process, see Figure 5.16 (a), the capacitor voltage was not yet zero,

which meant that not all the initial energy stored in the capacitor had been used to actuate the

system. The rest of that energy could be used during the next operation. The measured displacement

116 Chapter 5

is shown in Figure 5.17. The frequency decreased with increasing time and displacement. The coil

current flowed through the thyristor Thy during the first positive half cycle and through the diode Df

in the first negative half cycle, after that, the coil current became zero because the thyristor Thy was

triggered only once. The differences between the measured and the simulated capacitor voltages and

coil currents (see Figure 5.16) were due to the fact that the equivalent inductance and resistance

could not be measured under the same operational conditions, because some metallic parts had to be

removed in order to fit and fix the moving plates at a particular distance. The differences made the

measured values of the equivalent inductance smaller than the actual values; consequently, the

simulated coil current and capacitor voltage were different from the measured values of the

frequencies and amplitudes: the frequency of the simulation being higher. The maximum difference

between the measured and simulated displacements was almost 10%. In addition to the above

explanation concerning the equivalent inductance and resistance measurements, the differences

between the measured and simulated displacements could also be due to the inaccurate times

corresponding to the measuring points. With this procedure of measuring the time, two time

durations were ignored: the time for the free contact to start moving after the first collision with the

moving plate and the time for the subsequent electrical signal to appear on the oscilloscope. The

efficiency of this twin-drive system was about 3% according to equation (5.46) and Figure 5.17. As

the maximum difference between the measured and simulated displacements was about 8%, the

model developed was able to give very good results for both the electrical and mechanical

parameters.

5.5. Conclusions

In this chapter, the role of the moving disk as part of the hybrid breaker’s opening mechanism was

discussed. The drive mechanism was constructed and it operated at peak currents of 2kA in order to

provide a total charge of 0.25 Coulomb. The opening times for the drive were measured within an

order of 300:s at speeds up to 4m/s. Two different approaches were shown to analyze the transient

behavior of the drive mechanism; the first included analysis and simulation using two coupled coils

as outlined in the linear circuit theory for the general solution. After that the non-linear circuit

theory was applied where the equivalent inductance and resistance parameters were introduced to

calculate particular electrical and mechanical parameters. The results showed that the model gave an

excellent conformity with the measured values. Despite the effort of constructing a twin-drive

system, comparing the efficiencies of the two drive systems showed that the first drive had higher

values than the twin-drive and that could have been due to the higher resistance of the twin-drive

coil. Developing of fast contact systems for high nominal current ratings still remains a challenge.


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Mechanical Science, Pergamon Press, 1968, Vol. 10, p. 491-500.[5.9] Stewardson, H.R., et.al., “Fast exploding-foil switch techniques for capacitor bank and flux

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[5.10] Smith, W.E., “An electromagnetic force theorem for quasi-stationary currents”, AustralianJournal of Physics, 1965, No. 18, p. 195-204.

[5.11] Smith, W.E., “Electromagnetic levitation forces and effective inductance in axiallysymmetric systems”, British Journal of Applied Physics, 1965, Vol. 16, p. 377-83.

[5.12] Rogers, P.J., and H.R. Whittle, “Electromagnetically actuated, fast-closing switch usingpolythene as the main dielectric”, Proc. IEE, Vol. 116, No. 1, January 1969, p. 173-80.

[5.13] Bleys, C.A., et.al., “A simple, fast-closing, metallic contact switch for high voltage andcurrent”, The Review of Scientific Instruments, Vol. 46, No. 2, February 1975, p. 180-2.

[5.14] Compter, J.C., and Hamels, D., “Analysis of an actuator system consisting of a coil and amovable conducting disk, using network representations”, Electric Machines andElectromechanics, 5, 1980, p. 257-71.

[5.15] Shi-Quan Zheng and Degui Chen, “Analysis of transient magnetic fields coupled tomechanical motion in solenoidal electromagnet excited by voltage source”, IEEE Trans. onMagnetics, Vol. 28, No. 2, March 1992, p. 1315-7.

[5.16] Begg, M.C., et.al., “Application of layer theory to transient electromagnetic problems inlinear media”, IEE Proc., Vol. 135, Pt. A, No. 3, March 1988, p. 188-92.

[5.17] Freeman, E.M., “Computer-aided steady-state and transient solutions of field problems ininduction devices”, Proc. IEE, Vol. 124, No. 11, November 1977, p. 1057-61.

[5.18] Brauer, J.R., et. al., “Coupled nonlinear electromagnetic and structural finite elementanalysis of an actuator excited by an electric circuit”, IEEE Trans. on Magnetics, Vol. 31,No. 3, May 1995, p. 1861-4.

[5.19] Kawase, Y., et.al., “3-D nonlinear transient analysis of dynamic behavior of the clappertype DC electromagnet”, IEEE Trans. on Magnetics, Vol. 27, No. 5, September 1991, p.4238-41.

[5.20] Basu, S., and Srivastava, K.D., “Electrodynamic forces on a metal disk in an alternatingmagetic field”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-88, No. 8,August 1969, p. 1281-5.

[5.21] Basu, S., and Srivastava, K.D., “Analysis of fast acting circuit breaker mechanism Part I:Electrical aspects and Part II, Thermal and mechanical aspects”, IEEE Trans. on PowerApparatus and Systems, Vol. PAS-91, No. 3, May/June 1972, p. 1197-1210.

[5.22] Rajotte, R.J., and Drouet, M.G., “Experimental analysis of a fast acting circuit breakermechanism - electrical aspects”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-94, Jan/Febr. 1975, p. 89-96.

118 Chapter 5

[5.23] Grover, F.W., Inductance calculations, Working formulas and tables, Dover PublicationInc., 1973, NY: Dover.

[5.24] Abramowitz, M., and Stegun, I.A., Handbook of Mathematical Functions, DoverPublication Inc., 1965, 17.6, NY: Dover.

[5.25] Semlyen, A., “A state variable approach for the calculation of switching transients on apower transmission line”, IEEE Trans. on Circuits and Systems, Vol. CAS-29, No. 9,September 1982, p. 624-33.

[5.26] Ness, J.E. van, and Kern, F.B., “Use of the exponential of the system matrix to solve thetransient stability problem”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-89,No. 1, January 1970, p. 83-88.

[5.27] Kremer, H., Numerical analysis of linear networks and systems, Artech House, 1987.[5.28] Liou, M.L., “A novel method of evaluating transient response”, Proc. IEEE, Vol. 54, No.

1, January 1966, p. 20-3.[5.29] Bellman, R.E., Numerical inversion of the Laplace transforms, American Elsevier Publ.

Co., 1966.[5.30] De Hoog, F.R., et.al., “An improved method for numerical inversion of Laplace

Transforms”, SIAM Journal of Scientific and Statistical Computing, Vol. 3, No. 3,September 1982, p. 357-66.

[5.31] Mathworks, Computer Software: Matlab ver. 4.2.c1, 1994 and Simulink ver. 1.3c, 1994.[5.32] Bowley, R.M., et.al., “Production of short mechanical impulses by means of eddy

currents”, IEE Proc., Vol. 130, Pt. B, No. 6, November 1983, p. 415-23.[5.33] Tegopoulos, J.A., and Kriezis, E.E., Eddy currents in linear conducting media, Elsevier

Science Publishers, 1985.[5.34] Salama, H.E.A, Kerkenaar, R.W.P., Atmadji, A.M.S., “Modelling the opening mode of a

fast acting electrodynamic circuit-breaker drive”, 34th Universities Power EngineeringConf., Sept. 1999, Leicester, p. 539-42.

[5.35] Schieber, D., Electromagnetic induction phenomena, Springer - Berlin : 1986.[5.36] Damstra, G.C., “Synthetic testing techniques for three phase making tests”, Holec

Techniek, Vol. 3, No. 3, 1973, p. 140-44.[5.37] Damstra, G.C., “Extension of the Hazemeyer Short-Circuit Laboratory”, Holec Techniek,

Vol. 4, No. 2, 1974, p. 51-7.

Chapter 6

Test circuit for DC breakers

AbstractOne of the devices for protecting a system against faults is the circuit breaker. All circuit breakers

have to be tested intensively before being installed into real networks and then the test results must

meet all the relevant requirements. Proper sources for delivering short-circuit power need to be

built to match the ratings of breakers under test. This chapter presents the characteristics of a

direct current short-circuit source for testing the breakers rated at 750V found in traction systems.

This source was built from two 3-phase Graetz-rectifiers connected in series where each rectifier

was fed by a 10kV/380V transformer directly from the public electricity grid. Special measures were

taken for the protection of the semiconductor components which were embedded in this source

against overvoltages and overcurrents. That source was capable of producing short-circuit currents

up to 7kA representing real fault currents. A short-circuit test could be carried out safely for 20ms

and the validity of the simulations was confirmed by the experimental results obtained.

6.1. Introduction

Testing a circuit breaker is necessary in order to learn its interruption capability, but the tests require

a power supply that is strong enough to deliver energy corresponding to realistic faults. There are

two types of short-circuit testing: the field type test and the laboratory type test.

In a field type test, the experiments have to be carried out with power taken directly from the grid.

While that test provides the most convincing method of testing circuit breakers, the main drawback

is that flexibility is limited. That is not suitable for research and development work, because it is not

always possible to repeat the test again and again without disturbing public supplies. A field type

test will use existing networks and a precise (decisive) operational time to limit the released fault

energy which is taken from the public network. Clearly, the network must be strong enough to

supply the short-circuit current and tests must be completed within a predetermined time. This time

must be short in order to avoid damage to components and to prevent other protection devices in the

network from interrupting the test accidentally. Generally speaking, this method allows only one

voltage rating. Some reference publications [6.1,2] describe circuit breakers being tested directly on

public networks.

A laboratory type test consists of two methods which are using a short-circuit generator and

synthetic tests. Both methods store the fault energy in a special storage system. When using a short-

circuit generator, the short-circuit power has to be supplied by specially designed generators driven

by induction machines [6.3]. On the other hand, indirect testing is a practical and economical

120 Chapter 6

solution for testing circuit breakers without actually employing the corresponding short-circuit

capacity of the network. The synthetic circuit is designed to simulate as accurately as possible the

electrical stresses on the circuit breaker during the interruption of fault current under operating

conditions. The indirect test method can be sub-divided into: capacitive [6.4], inductive [6.5] and

synthetic [6.6] methods. The short-circuit generator provides both the voltages and currents

involved during the interruption, but the indirect test method requires two separate sources: one for

a current rise associated with the fault current and the other one for voltage recovery. Voltage

recovery always takes place across the breaker after a successful current interruption. The laboratory

test type offers advantages such as: safety because the overall energy is limited in the system, and

opportunities for adjusting voltages and currents to comply with test requirements. Nevertheless,

these tests would need both large energy storage capacity and considerable physical space. Most

tests of circuit breakers have been done in the laboratory.

This chapter presents the development of a test procedure for DC breakers directly in an AC-system

using properly designed rectifiers. There were two important requirements to be taken into account

when developing a test procedure: safety and reliability.; these requirements are :

• maximum testing time : a strict time limit during which the entire short-circuit test must take

place;

• maximum current : a prospective current produced by the source., must not be excessive.

Both requirements should be met to permit breaker tests without damaging the system caused by

excessive overcurrents. The short-circuit source had to be designed, built and simulated, in

accordance with those requirements. Computer simulation programs should support the design and

analysis of source characteristics. Both the simulation and measurement results are also presented in

this chapter.

6.2. Analysis of rectifier circuits for a direct current short-circuit source

A Direct Current Short-Circuit Source (DCSCS) contained rectifiers fed by a 3-phase AC system

and the rectification was completed by a 3-phase Graetz diode bridge in order to give a 6-pulse

rectification every cycle [6.7]. The demands of such a DCSCS were as follows :

• the source must be able to supply 1kV DC voltage at its rated load,

• the source must be capable of producing a maximum current of 7kA for 20ms without

suffering either transients associated with the operation itself, or an interruption of the

current by some other means.

The first requirement could be fulfilled by connecting two 3-phase Graetz bridges in series: while,

the second requirement meant that sufficient power must be available for delivering the equivalent

power of a short-circuit. Then, load limiting and protective devices for meeting the demands had to

be chosen.

Test circuit for DC breakers 121

6.2.1 One 3-phase rectifier

The best known basic form of a 3-phase rectifier consists of six diodes to form the so-called Graetz

bridge. Since the AC system is in balance, each phase voltage offers at each interval a homogenous

line-to-line voltage to conduct at least two of the diodes at the same time, so that, the crest value of

the line-to line voltage would be 2 3 E , where E is the effective value of the line to neutral

voltage source.

A 3-phase Graetz bridge comprises six-pulse rectifier diodes as shown in Figure 6.1. The diodes of

the bridge are numbered according to their commutation sequence.

V1

V2

V3

D3D D5

D4 D6

Lc

D2

Load

Rc

VdVd0

+

-

D1

Lc

LcVd

+

-

Figure 6. 1 A diagram of the 3-phase Graetz bridge and its equivalent circuit.

In order to understand the rectifying behavior of this bridge, the following assumptions have to be

made:

• the diodes must be considered to form an ideal switch (valve) which conducts when the

anode voltage is higher than the cathode voltage, but it is isolated instantaneously after

the current ceases or becomes negative; there is no voltage fall and current limitation.

• there must be only a resistive load and no inductance or capacitance in the system, so

that there is no transient behavior and the system is considered to have a steady-state.

• the voltage system sources must be in balance and ideally strong with a frequency of

50Hz.

Table 6.1 and Table 6.2 summarize the ideal switching behavior of a diode.Table 6. 1 Ideal diode behavior.

Previous state,H

Sign of current Sign of voltage Next state,h

0 no current 1 10 no current 0 01 + no voltage 11 - no voltage 0

122 Chapter 6

If a diode is turned off, the next time to turn it on will occur when the forward bias is applied. If the

diode is on, it will remain so until a current-zero crossing occurs. An ideal diode can be

implemented by using logic gates [6.8] in order to control the switching state. A Boolean function

representing this behavior can be written as :

h = H. . u[i ] . . . H. . u[v ]AK AKAND OR NOT AND0 5 0 5 (6.1)

where :

H is the previous state of the switch

h is the next state of the switch

u is the Heaviside step function defined as u(x) = 1, x > 0

0, x 0≤%&'

iAK is the current flowing from the Anode to the Cathode

vAK is the voltage from the Anode to the Cathode

Table 6. 2 Logic table for ideal diode behavior.H u[iAK] u[vAK] h

0 X 1 1

0 X 0 0

1 1 X 1

1 0 X 0

Logic state "1" means that the device is turned on; logic state "0’’ signifies that the device is turned

off and logic state "X" refers to a “don’t care” condition. Figure 6.2 shows the equivalent circuit of

an ideal diode.

%

&

%

&

ð

Anodeu[i]

u[v]

hH

Comp1

Comp2

Roff

Ron

Anode’

Cathode

Figure 6. 2 Diode emulating block diagram developed from equation (6.1).

Comparator Comp1 can sense the current when a current-zero occurs and comparator Comp2

observes the different voltage between the Anode and the Cathode. Two output signals u[i] and u[v]

which are the logical operators for on state "1" when the variable is positive and the off-state "0’’

elsewhere. Those signals will determine the next state (h) of the diode by completing the operation

with OR, INV and AND gates. This diode block diagram is known have to been used in EMTP

(ElectroMagnetic Transient Program) for simulating power electronics circuits [6.9]. Modifying that

circuit, makes simulation of an ideal thyristor, triac, IGBT, etc. feasible.


The 3-phase voltage balance system will be given by the next relationship with regard to its own

neutral star connection at the transformer.

V E t

V E t +

V E t +

1

2

3

=

=

=

2

22

3

24

3

sin

sin

sin

ω

ω π

ω π

0 5(6.2)

The voltages V1, V2 and V3 represent the line to neutral voltages of a 3-phase balance system.

Every phase voltage over a certain interval provides a homogenous line voltage causing at least two

diodes to conduct at the same time. An analysis of such a bridge appears in [6.7,21]. An ideal DC

output voltage from the bridge is expressed by equation (6.3).

V VX

Id doc

d= −cosαπ

3(6.3)

Where : Vdo is the average value of the direct voltage when there is no load defined as

V Edo = 3 6 π. Lc is the inductance of the source. X c represents the transformer commutating

reactance ( ωLc ) per phase, it will be referred to the secondary, plus any AC system inductance. The

term 3Xc π can be substituted by Rc , which does represent an ohmic resistance however without

heat loss associated with it. The term I Rd c represents the voltage drop due to commutation; α is the

delay angle (for an uncontrolled switch (diode), this is 0°). Equation (6.3) will help to set up an

equivalent circuit representing the steady-state behavior of the rectifier on the DC side, as shown in

Figure 6.1. For low voltage systems, the total rectified voltage will be Vd =514V.

6.2.2 Two 3-phase rectifiers in series

By connecting two 3-phase rectifiers in series, as shown in Figure 6.3, a 1kV DC systems can be

made.

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Figure 6. 3 A double 3-phase Graetz bridge arrangement.

124 Chapter 6

The middle of the rectifier has been chosen to have a ground potential that provides symmetrical

voltages between the upper and lower terminals; therefore, both neutral points of the transformer

can float.

In general, rectifiers operate between two or three conducting valves at the same time, but more than

three conducting valves may cause failure or overloading situations. Two conducting valves occur

when the system load is purely resistive or unloaded. The last condition is listed and illustrated in

Table 6.3 and Figure 6.4 where it occurs within one period.

Table 6. 3 Conduction order in one period.

Interval Conducting valve Commutation order

¶ Tt0 ! Tt1 D1, D2 & D7, D8

D2 ! D6 & D8 ! D12

· Tt1 ! Tt2 D1, D6 & D7, D12

D1 ! D5 & D7 ! D11

¸ Tt2 ! Tt3 D5, D6 & D11, D12

D6 ! D4 & D12 ! D10

¹ Tt3 ! Tt4 D5, D4 & D11, D10

D5 ! D3 & D11 ! D9

º Tt4 ! Tt5 D3, D4 & D9, D10

D4 ! D2 & D10 ! D8

» Tt5 ! Tt6 D3, D2 & D9, D8

D3 ! D1 & D9 ! D7

¼ Tt6 ! Tt7 D1, D2 & D7, D8

Figure 6.4 shows a systematic conducting order visually where, at every angle interval, the cycle is

depicted sequential.


V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Ê

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Ë

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Ì

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Í

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Î

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Ï

V1

V2

V3

D3D D5

D4 D6

D1

D2Rload

V1

V2

V3

D9 D11

D10 D12

D7

D8

Ð

Figure 6. 4 The sequence of two conducting valves in one period.

126 Chapter 6

Therefore, rectification of the symmetrical double 3-phase balance systems will produce the

terminal waveforms shown in Figure 6.5 where the upper and lower traces represent the positive

and negative counterparts, respectively.

0 2 4 6 8 10 12 14-600

-400

-200

0

200

400

600

phi [rad]

¶ · ¸ ¹ º » ¼

0 5 10 15 20 25 30 35 40-600

-400

-200

0

200

400

600

Am

plitu

de [V

]

t [ms]

Figure 6. 5 Waveforms of the rectified voltages for two 3-phase systems in balance; (a) in radians and (b)in time.

Where :at interval ¶, V13 becomes positive and V31 negative; at Interval ·, V12 becomes positive and V21 negativeat interval ¸, V32 becomes positive and V23 negative; at interval ¹, V31 becomes positive and V13 negativeat interval º, V21 becomes positive and V12 negative; at interval », V23 becomes positive and V32 negative.

The two bridges in series were analyzed using Kirchhoff’s voltage law to obtain a set of equations

from the diagram in Figure 6.6.

Zl

V2

V3

Z1Za

Za

Za

Zb

Zb

Zb

V1

2

1

3

4

5

6

8

7

9

11

10

i1+i3+i5

Z3Z5

Z4 Z6 Z2

Z7 Z9 Z11

Z8Z12Z10-i1-i3-i5-i10-i12

-i1-i3-i5-i10+i11-i12

i1+i4

i9+i12

i3+i6

i1+i3+i5-i9+i10-i11

-i1-i3-i4-i6

i1+i3+i5-i9-i11

i9

i12

i11

i10

i3

i6

i5

i1

i4

-i1-i3-i4-i5-i6

V2

V3

V1

Figure 6. 6The network for two 3-phase rectifiers connected in series; Za and Zb represent the inner impedance of thesources while the diodes are represented by the impedance Z1...Z12 and Zl stands for the load impedance.


Assuming that all the diodes are in conducting to describe a general topology for the network; the

two 3-phase bridges connected in series have 17 nodes (N) and 25 branches (B); the number of

independent currents is 9 which conforms to the relationship B-N+1 [6.10]. These nine equations

describe the minimum matrix network equation. A generalized impedance matrix for that circuit can

be calculated after determining the freely chosen independent currents and using the network tree in

Figure 6.7. The dashed lines represent the independent currents and with the help of a dashed line,

fundamental loop can be made from which the network equations can be determined. The network

equation for this particular tree can be expressed with Kirchhoff’s voltage law as v Z ii ij i= ;

where : Zij is the loop impedance matrix or the generalized impedance matrix for the network and

ii is the vector of the independent currents from equation (6.5). The relationships are only valid in

that instance when all diodes are in their conducting states. However, the sinusoidal sources will

prevent that situation and the topology of the network will alter when any of the diodes in the

bridges change state. It is clearly necessary to allow for a big impedance when replacing the non-

conducting diodes and a small impedance for the conducting diodes. The basic principle of the

dynamic simulation method is modification of the matrix Zij . A new topology for the network

must be created whenever switching occurs [6.11]. Now, a new matrix Cij will be introduced for

the primitive transformation tensor in order to obtain the current in each branch ik using the

relationship i C ik ij i= ; where: vector ik has a dimension of 25x1 and matrix Cij has 25x9.

The new topology network can be represented by a new matrix Zkij which is simply expressed by

Zk C Z Cij ij

T

ij ij= .

Since: Zk R sLij ij ij= + , the differential equations of the system can be expressed as follows:

si L V R ii ij i ij i= −−1

(6.4)

where: st

= ∂∂

This expression shows the standard form of a N one-order differential equation: ∂∂y

tf x y= ,1 6 .

Solving these equations will give the voltages and the currents [6.12]. Then, the diode voltages and

currents can be computed. A new tensor matrix Cij must be recalculated and new differential will

be computed in order to account for the new network topology. This process has to be repeated until

the final simulation time is attained.

2 1 3

2 1 2 3

1 3

1 3

2 3

2 1

1 3

3 1

2 3

2 2 1 2 7 8 2 8 7 2 2 2 2 7 8 2 2 7 2 8 2 7 8

2 8

( )V V

V V V

V V

V V

V V

V V

V V

V V

V V

Za Zb Z Z Z Z Zl Zb Zl Z Z Z Za Za Z Zl Zb Z Z Z Z Za Zb Z Zb Z Zb Z Zb Z

Zb Zl Z

−

+ −

−

−

−

−

−

−

−

=

+ + + + + + + + + + + + + + + + + − − + − − +

+ + +

!

"

$

############

Z Z Za Za Zb Z Z Z Z Zl Z Za Zb Zl Z Z Z Za Z Zb Z Zb Z Zb Z Zb Z

Za Z Za Z Za Z Z Z Za Z

Zb Zl Z Z Z Zb Zl Z Z Z Z Zb Z Z Z Z Zl Z Zb Z Zb Z Zb Z

7 2 2 2 3 2 7 8 2 2 8 7 2 2 2 7 2 8 2 7 8

2 2 2 2 2 4 2 2 0 0 0 0

2 8 7 2 2 8 7 2 2 2 5 2 7 8 2 7 2 8 2

+ + + + + + + + + + + + + + − − + − − +

+ + + + +

+ + + + + + + + + + + + + − − + − − 7 8

2 2 2 2 2 2 2 6 0 0 0 0

7 70 7 0 2 7 9 7

2 82 8 0 2 8 0 2 8 10 2 8

2 7 2 7 0 2 7 0 7 2 2 7 11

8 8 0 8 0

Zb Z

Z Za Za Z Z Za Z Za Z Z

Zb Z Zb Z Zb Z Zb Z Z Zb Zb Z Zb

Zb Z Zb Z Zb Z Zb Zb Z Z Zb Zb Z

Zb Z Zb Z Zb Z Zb Z Zb Zb Z Z Zb

Zb Z Zb Z Zb Z Zb Z

+

+ + + + +

− − − − − − + + − +

+ + + − + + − +

− − − − − − + − + + −

+ + + b Z Zb Zb Z Z

i

i

i

i

i

i

i

i

i+ − + +

!

"

$

############

!

"

$

############8 2 8 12

1

3

4

5

6

9

10

11

12

(6.5)

i1

i3 i5

i4

i2

i9i11

i10

i12

5

2

1

34

7

6

8

9

10

11

Figure 6. 7 The graph network of two 3-phase rectifiers connected in series showing their tree and the fundamental loops.


6.3. Realization of the direct current short-circuit source (DCSCS)

The practical realization for the DCSCS is shown in Figure 6.8.

F1Dy5

Tr1 DB1

S1

F2Dy5

Tr2 DB2

DUT

Load

Control

S2

Timer

10kV Feeder

Figure 6. 8 Layout of the DCSCS and other circuit components;Where :S1 : SF6 AC contactor (12kV/400A)S2 : make-switchTr1, Tr2 : transformers (10kV/380V, 600kVA and 400kVA)F1, F2 : slow fuses (400A/500V)DB1, DB2 : 3N Graetz-diode bridges (2kV/2kA)DUT : Device Under TestControl : Control circuit unit of DUTLoad : Inductive limiting load (Idc=7kA,τ=3-6ms).

The 3-phase AC supply came from a 10kV feeder taken directly from the public electrical grid. The

feeder supplied the DCSCS with a maximum power of 250MVA and it was connected to two 3-

phase transformers Tr1 and Tr2 in parallel with a contactor S1, both transformers being rated at

10kV/380 and Dy5 connected. Tr1 had a rated power of 600kVA with a short-circuit voltage of

εk=3.56% and Tr2 was 400kVA and εk=3.37%. Then, each transformer’s voltage was separately

rectified. Rectifying a 3-phase low voltage system produced a DC voltage of 514V and with two

bridges in series, a 1kV DC power supply system could be obtained. Earthing the middle of the two

bridges produced a pair of DC voltages: +514V and -514V with regard to the earth potential. The

contactor S1 acted as a total backup in every test cycle. Furthermore, if the contactor S1 failed

during a test, overcurrent protection would be provided by fuses F1 and F2 on each phase. The fuses

were mounted between the secondary side of the transformers and the diode bridges DB1 and DB2.

Beyond the bridges, a make switch S2 was installed, which allowed currents to be interrupted by the

Device Under Test (DUT). A DUT would be categorized as a successful fault current interrupter, if

the interruption process was completed, before the backup switch S1 disconnected the DCSCS from

130 Chapter 6

the feeder. Furthermore, a suitable inductive load had to be installed to limit the current increase up

to 6-7kA.

With respect to the 1kV voltage rating, a peak rating of 2kV reverse voltage was adequate for the

diode in the bridges giving a voltage safety factor of two. The diode that was used had a disc form

(capsule) in which water cooling bodies could be mounted on either side (anode and cathode). The

diodes were assembled with a specially designed clamper between the pairs of heat sinks in copper

bars regarding the firmness as given by the manufacturer.

6.3.1 Sequential timing operation

The sequence of operations for the DCSCS are summarized in Table 6.4.

Table 6. 4 Switched timing regulations

time S1 S2 DUT Note

t0- Open Open Close initial condition

t0+ Close Open Close damped out inrush current

t1 Close Close Close begin test

t2 Close Close Open/Close test time duration

t3 Open Close Open/Close end test

t4 Open Open Open preparation for next test

Where:t0- : initial timet0+ : closing time of contactor S1 (energizing the circuit)t1 : closing time of make switch S2 (fault current arises in the circuit)t2 : interruption time by the DUTt3 : opening time of contactor S1 (de-energizing the circuit)t4 : opening (resetting) time of the make switch S2 and DUT

During the few seconds between t0+ and t1, the transient behavior of the transformers could be

damped out; consequently, testing could go ahead without any disturbance signals. Then, the make

switch S2 would close at time t1, which initiated a current flow. At time t3, the contactor S1

disconnected the DCSCS from the feeder and the time difference between t3 and t1 will be the test

time. The DUT had to prove its function within this time interval, at an arbitrary time t2, (t1<t2<t3).

A pre-programmed timer would determine the precise test time ∆t=t3-t1=20ms. This test time is the

difference between the opening time for contactor S1 at t3 and the closing time for the make switch

S2 at t1. Finally, after every test, the make switch S2 and the DUT had to be opened (reset) at t4. In

order to anticipate an unintentional faulty test, a test condition was applied; if the make switch S2

was still in the closed position, then it would not be possible to switch on contactor S1. The timing

diagram for the switches is depicted in Figure 6.9.


to-

to+

S1

t3

S2

t4t1

20ms

DUT

t2

t

t

t

Figure 6. 9 The timing diagram;Contactor S1 closes first followed by the make switch S2, a delayed opening of contactor S1 has to be takeninto account in such a way that allows the test to occur within a maximum time of 20ms. The device undertest must prove its function within this interval at an instant t2.

This DCSCS should be very suitable for testing DC breakers which are designed to interrupt a fault

current in less than 20ms. Those breakers could have current limiting functions.

6.3.2 Overvoltage suppression

During a test, the diodes might be affected by surge currents. Even with a normal 50Hz power

system, the diode switching-off could lead to dangerous transient overvoltages. For producing a

viable design, considerations had to be taken into account, particularly the forward surge currents,

reverse voltage duty, the on-state current duty and the two transitional states of turn-on and turn-off.

The stresses on the diodes arose from the operating conditions in the rectifier as a result of the

transients which originated on the AC and DC sides. Unanticipated voltage transients exceeding the

rated blocking voltage of solid-state power devices, probably would be the most frequent single

cause of unreliability. Depending on the severity of the overvoltage, the energy which it represented

and its repetitive frequency, the device might fail immediately or it might progressively deteriorate.

Since any voltage breakdown would tend to occur on the surface of the device rather than within the

silicon, the energy required to cause permanent damage could be relatively small.

Most voltage transients could be traced to an inductor, either internal or external to the system, in

which a current had been initiated or interrupted abruptly. Obvious cases included removing the

load to a rectifier having a large smoothing inductor in the DC circuit, for example, by blowing a

fuse. Other cases, would be more subtle, because they involve hidden inductance such as the

leakage inductance reactance from a transformer or unintentional currents such as the rapid

cessation of reversed current (sweep-out) in a diode or thyristor (which could occur each cycle).

132 Chapter 6

Other transient overvoltages might be caused by the capacitive coupling of a high voltage circuit to

a low voltage circuit (transformer networks) and the energizing of an RLC-circuit when the

capacitor would charge up to twice the peak line voltage. Protecting against destructive overvoltage

transients could be provided by one of four general procedures [6.25]:

• redesigning a circuit operation or physical location in order to remove or minimize the

cause of a transient.

• suppressing a transient by absorbing its energy in an appropriately designed RC-circuit

located across the source of the transient.

• shunting power devices by non-linear resistive elements (selenium transient suppressor,

zener diode, ceramic suppressors, Metal Oxide Varistors etc.), they could reduce (clip)

the transient voltage to a safe level.

• restricting the occasional severe transients by using a solid-state “crow-bar” circuit

which shorts out the line and absorbs its transient energy.

A sudden interruption of the primary side of a transformer could lead to a current chopping when

any magnetic energy remaining in the transformer changed from nature into overvoltages to

surrounding stray (parasitic) capacitors. Owing to the capacitive coupling between the primary and

secondary windings of a transformer, a sudden steep-fronted rise or fall in the primary voltage could

cause a surge in the potentials to earth of rectifier circuits on the secondary side. Sudden rises in the

primary voltage could occur every time the transformer was energized or de-energized. Such

transient overvoltages had to be kept below the maximum permitted value for the components

connected. A simple way of keeping transients down was by inserting a continuous small capacitive

load on the secondary side of the transformer. It would prevent the magnetizing energy from

changing abruptly because it offered a continuous path where the energy could be dissipated into the

load or downstream lines. Furthermore, power semiconductor devices were not able to change their

states abruptly from a forward conduction to a reversed blocking or vice versa. Overvoltages that

were generated at the end of a conducting period might have been one of the normal features that

had to be taken into account. A charge-storage condition could occur before the reversed blocking

state was maintained [6.18]. Diodes in the rectifier bridge could function as current-switching

devices that were inherently capable of producing overvoltages, particularly, when the circuit

contained high inductive elements or dealt with high currents. High current tests could increase

steep current slopes leading to voltage spikes at the time when the current commutated from one

diode to another. Without any precautionary measures, the voltage spikes could damage the

equipment connected in the circuit; hence, overvoltage suppression was indispensable.

Current and voltage surges however had to be limited to values below the safe level of the diodes

used and the following measures could be taken on the low voltage side of the DCSCS :

(1) On the AC side, a continuous resistive load accompanied by Resistance- Capacitance

networks in parallel could be put on each phase to the neutral of the transformers. In

addition, a non-linear resistor ZnO could be also inserted between the phases.

(2) The neutral of each transformer could be earthed through a capacitive impedance.


(3) On the DC terminal side, a small continuous resistive load and ZnO could be connected

in parallel.

(4) If needed, a free-wheeling path could be placed in parallel with the load on the DC load

side, to provide a commutation path for the current from the main circuit during an

interruption.

Measures (1) and (2) had been experimentally conducted and they were suitable for minimizing

transient overvoltages when the primary side was switched on or off. During the experiments, the

diode bridges obviously had to be disconnected from the transformers. After overvoltages had been

minimized, the bridges could be reconnected and tested. Measure (3) allowed a small continuous

current in the bridge before a short-circuit test could be started. At the same time it would provide

sufficient electrical charges in those diodes to deliver a high current during the test. Finally, measure

(4) would provide a continuous current path on the downstream side after the current had been

interrupted on the upstream side by the DUT, by contactor S1, or in the worst case, by protection

fuses which were commonly found in DC circuits.

The basic consideration for determining the size of a snubber capacitor was that it had to be capable

of absorbing the magnetic energy from the inductive circuit elements, without exceeding a

maximum voltage of the solid-state power devices. The Resistance-Capacitance networks on the

AC side could be adapted for that purpose while another method was to mount an RLC-network on

each of the solid-state power devices as suggested in [6.13]. The higher the current to be tested, the

more protection measures that had to be taken into account. The DCSCS was designed to produce a

maximum test current of 7kA. The overvoltage circuit is shown in Figure 6.11 as part of the entire

circuit.

When the neutral of the transformer floated and contactor S1 opened, high transient overvoltages up

to 3000V could occur on the secondary side of the transformer. The measurement of such

overvoltages is shown in Figure 6.10 (a). Considering a trial and error method and evaluating the

overvoltages, they could be reduced below 500V. The measurement graphs are presented in Figure6.10 (b).

0 10 20 30 40 50 60 70 80-3000

-2000

-1000

0

1000

2000

3000

4000

Vol

tage

[V

]

time [ms]0 5 10 15 20

-400

-300

-200

-100

0

100

200

300

400

Vol

tage

[V

]

time [ms]Figure 6. 10 Secondary phase voltages (a) before (b) after application of overvoltage suppressors.

A prospective short-circuit current of 7kA was expected by inserting a limiting resistor of 130mΩ in

134 Chapter 6

the circuit. The rate of rise of the current was determined by the inductance value of the source and

the load. Therefore, a toroidal coil was made with a value of 460µH. With those resistance and

inductance values, short-circuit currents with a time constant of 3ms could be generated. Finally,

copper connections were made to link the bridges together with the DUT, the make switch and the

load, respectively. Figure 6.11 shows the final DCSCS starting from the secondary side of the

transformer.

R1

ZnO

C1

R2R3

CCCCCC

C2

Ri

LiRi

Ri

Li

Li

VR

VS

VT

D3D1 D5

D4 D6 D2

ZnO

Test Objects:- Backup switch- Make Switch- Device Under Test- Freewheeling circuit- Limiting load- Control & current sensing- Voltage and current probes

Rf

Cn Rn

D3D1 D5

D4 D6 D2

ZnO

Rf

F1

F2

F3

R1

ZnO

C1

R2R3

C2

Ri

LiRi

Ri

Li

Li

VR

VS

VT

Cn Rn

F1

F2

F3

CCC CCC

Cn: 0.5µF, Rn:12kSC1: 6µF, R1:22SR2: 10kSR3: 50SC2: 100µFRf: 500S

Tr2

Tr1

Tr1: 600kVATr2: 400kVAF1..3: 400A/500V

Figure 6. 11The full diagram of the DCSCS. The AC side contains the two transformers (Tr1 and Tr2) of a 3-phasebalance system and their neutrals are earthed with a high capacitive impedance (Rn and Cn). Overvoltagesuppressors (R1,R2,R3,C1 and C2) are mounted between every phase to the neutrals providing continuousloads and followed by arresters (ZnO) among the phases. A continuous load Rf and arrester ZnO areconnected on each DC side. Then, it is completed by the necessary devices and equipment for tests.

6.3.3 Surge phase-currents in the transformer secondary when switching on

The incorporation of overvoltage suppressors caused new transients to occur as surge currents in all

the phases when the transformer was energized. Obviously, that depended on the phase angle

switching on. Calculations could show how surge currents could be found for each phase assuming

that all the AC poles would close at the same time. From Figure 6.11, the continuous impedance

(AC load) on each phase could be determined and written in the s-domain as a transfer function :


Z sV s

I s

a s a s a s a

b s b s bti1 6 1 61 6= = + + +

+ +3

32

21 0

22

1 0

(6.6)

where :

a R R R L C C

a R R L C R R L C R R L C R R L C R R R R C C

a R L R L R L R R R C R R R C R R R C R R R C R R R C

a R R R R R R R R R R

b R R R C C

b R R C R

i

i i i i i

i i i i i i i

i i i

3 1 2 3 1 2

2 2 3 1 1 2 1 2 3 2 1 3 2 1 2 3 1 2

1 1 2 3 1 2 1 2 3 2 1 2 3 1 1 3 2 2 3 1

0 2 3 2 3 1 3 1

2 1 2 3 1 2

1 1 2 1 1

== + + + += + + + + + + += + + + +== + R C R R C R R C

b R R R3 2 2 3 2 2 3 1

0 1 2 3

+ += + +

At the frequency fo = 50Hz, the continuous AC impedance is Z jt = −133 219. . or Zt = ∠ − °25 7 58.

representing a capacitive load. The term admittance Y Zt t= 1 can be used conveniently, because the

order of the numerator is higher than the denominator when analyzing its frequency characteristic.

The frequency characteristic and the root loci of this AC load admittance are shown in Figure 6.12.

101

102

103

104

105

106

-50

0

50

Frequency [Hz]

Gai

n [d

B]

101

102

103

104

105

106

-100

0

100

Frequency [Hz]

Phas

e [d

egre

e]

(a)

-4 -3 -2 -1 0 1 2 3 4

x 104

-4

-3

-2

-1

0

1

2

3

4x 10

4

Real Axis

Imag

Axi

s

(b)

Figure 6. 12 The frequency characteristic of the AC load admittance;

(a) the diagram bode; (b) the root loci.

The 3-phase AC voltage sources in balance are represented in the time-domain as :

R

S

T

V t = E t

V t = E t +

V t = E t +

0 5 0 50 5

0 5

2

22

3

24

3

sin

sin

sin

ω ϕ

ω π ϕ

ω π ϕ

+

+

+

(6.7)

A standard way of calculating transients is with the Laplace transformations method and these

voltages. From the standard Laplace transformation [6.27] and after algebraic manipulation these

voltages in the s-domain could be expressed as :

136 Chapter 6

R

S

T

V s = Es

s

V s = E s

s

V s = E s

s

0 5 0 5

0 5

0 5

2

26 6

23 3

2 2

2 2

2 2

sin cos

cos sin

sin cos

ϕ ω ϕω

π ϕ ω π ϕ

ωπ ϕ ω π ϕ

ω

++

+

− +

+

−+

+ +

+

(6.8)

where: E is the effective phase voltage value of the source, ω π= 2 fo is the angular frequency with

fo = 50Hz and ϕ is the closing phase angle with respect to the R-phase.

The fact that the transformer was energized arbitrarily regardless of the phase angle at that time and

because the continuous AC load was capacitive, the initial phase currents would contain surges;

however, the inner transformer impedance would limit them. Therefore, the phase currents in the s-

domain are written as: I s Y s V si t i1 6 1 6 1 6= . ; where: the index i means the i -th phase voltages (R, S and

T), which are :

I s Es

s

b s b s b

a s a s a s a

I s E s

s

b s b s b

a s a s a s a

I s E s

s

b s b s

R

S

T

0 5 0 52 7

2 72 7

0 5 2 72 7

2 7

0 5 2 7

=++

+ ++ + +

=+

− +

++ +

+ + +

= −+

+ +

++

2

26 6

23 3

2 2

22

1 0

33

22

1 0

2 2

22

1 0

33

22

1 0

2 2

22

1

sin cos

cos sin

sin cos

ϕ ω ϕω

π ϕ ω π ϕ

ω

π ϕ ω π ϕ

ω+

+ + +b

a s a s a s a0

33

22

1 0

2 72 7

(6.9)

Since the AC system is in balance, the phase currents can be calculated individually in the time-

domain using Matlab [6.20] for solving the Numerical Inverse Laplace Method (NILM) of the

equations (6.9) as described in Chapter 5.

Figure 6.13 presents the surge currents at each phase when energizing (switching on) occurred at

different closure phase angles; ϕ = °0 , ϕ = °30 ,ϕ = °60 and ϕ = °90 with respect to the R-phase. In

the left-hand column, the maximum surges of the phase currents are given with the superposition of

the fundamental frequency of 50Hz. The capacitor C2 had the ability to operate despite those current

surges. After 15ms, the system damping reduced the high frequency components so that their

steady-state values were reached. In the right-hand column of Figure 6.13, the transients are shown

at the window enlargement during the first 1ms only. By neglecting resistance, the frequency of the

surge current was about : fL Ci

= =1

22 9

2π. kHz.


0 2 4 6 8 10 12 14 16 18 20−500

−400

−300

−200

−100

0

100

200

300

400

500

time [ms]

Cur

rent

[A]

(a)ϕ = 0

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1−500

−400

−300

−200

−100

0

100

200

300

400

500

time [ms]

Cur

rent

[A]

(b) ϕ = 0

0 2 4 6 8 10 12 14 16 18 20

−600

−400

−200

0

200

400

600

time [ms]

Cur

rent

[A]

(c) ϕ π=6

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1−600

−400

−200

0

200

400

600

time [ms]

Cur

rent

[A]

(d) ϕ π=6

0 2 4 6 8 10 12 14 16 18 20−500

−400

−300

−200

−100

0

100

200

300

400

500

time [ms]

Cur

rent

[A]

(e) ϕ π=3

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1−500

−400

−300

−200

−100

0

100

200

300

400

500

time [ms]

Cur

rent

[A]

(f) ϕ π=3

0 2 4 6 8 10 12 14 16 18 20

−600

−400

−200

0

200

400

600

time [ms]

Cur

rent

[A]

(g) ϕ π=2

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1−600

−400

−200

0

200

400

600

time [ms]

Cur

rent

[A]

(h) ϕ π=2

Figure 6. 13 Surge currents in the phases depending on the closing angle ϕ ;on the left-hand side in one period and on the right-hand side up to 1ms.

Then, Figure 6.14 shows the phase currents after one period following the steady-state condition.

138 Chapter 6

20 22 24 26 28 30 32 34 36 38 40−15

−10

−5

0

5

10

15

time [ms]

Cur

rent

[A]

Figure 6. 14 The steady-state phase currents.

6.3.4 Overcurrent protection by I2t fusing

During this test, the DCSCS suffered from surge currents. The worst case estimation of the

increased DC short-circuit value could be found from the relationship as used in a one-phase short-

circuits near the transformer’s secondary. This is expressed by :

i ti

t escp t1 6 1 6=

+− + −

11

2δ

ω ϕ ϕω δsin sin/ (6.10)

where : iU

Xp

l

T

= 2

3 and δ ω ϕ= =L

RT

T

tan .

Ul is the line voltage, XT is the short-circuit impedance of the transformer consisting of resistance

RT and inductance LT . The current was limited only by the inner impedance of the transformer;

however, the rate of rise of current for the experiment was limited by the inner impedance of the

transformer and the inductive load. It helped to reduce the surge current stress. Overcurrent

protection of the power diodes was provided by fuses installed on each phase of the secondary side

of the transformer. Since the experiments used a limiting load, the I t2 fusing could not be

determined by using equation (6.10).

An experiment with a maximum duration of 20ms allowed tests to be conducted safely in order to

avoid excessive overcurrents as well as in the diodes as in the fuses, and to minimize the operational

disturbances in the network. The Joule-integral (I dt2I ) for the fuse was chosen lower than that of

the diode during short-circuit tests. According to the manufacturer’s data, the I t2 value of the fuse

was about 2×106 A2s and of the power diode it was about 4.88H106 A2s (tested for a half sine wave).

The power diode had a rated current of 2000A.


The I dt2I values shown in Table 6.5 were obtained from the simulation described in the next

section using the equivalent numerical expression : I dt I . tt

t

k=1

N

k22

0

1I ∑= ∆ ; where : Ik denotes the

instantaneous current through the diode, t0 is the time when the diode starts conducting, t1 is the

time when the diode ceases conducting, ∆t is the simulation time step, k is the k -th step, and N is

the total number of steps obtained from the simulation. Obviously, the linear relationship is

t t N t1 0− = ∆ . The Joule-integral for each diode depends upon the current through during the interval

t t1 0− . The values listed in Table 6.5 were obtained with a discretizing time step of ∆t = 10µs.

Table 6. 5 The calculation of I2t values for 20ms testing.

I2t of line phases [A2s] I2t of diodes [A2s]Tr1 phase R 773 103 DB1 diode 1 276 103

Tr1 phase S 678 103 DB1 diode 2 117 103

Tr1 phase T 581 103 DB1 diode 3 279 103

DB1 diode 4 497 103

DB1 diode 5 466 103

DB1 diode 6 398 103

Tr2 phase R 764 103 DB2 diode 1 285 103

Tr2 phase S 651 103 DB2 diode 2 119 103

Tr2 phase T 579 103 DB2 diode 3 252 103

DB2 diode 4 478 103

DB2 diode 5 462 103

DB2 diode 6 399 103

A diode failure short-circuits the transformer so that the fuses in the branch will melt indicating

which diode had failed in the circuit. An incorrect fusing may cause the diode to explode if it cannot

carry the high fault current before it is cleared by the backup contactor on the 10kV side. Another

way of protecting the diode from overcurrents is reported in [6.14] where each diode arm is fused

individually. The very fast types of fuses were chosen because they had been specially designed for

the protection of power semiconductors. Fusing of every diode arm was obviously convenient to

find which diode had failed.

6.3.5 Protection from overheating

Another problem with power semiconductor devices is that of heat production during current

conduction. The high current rating (several kA) involved then made it necessary to provide forced

cooling on both sides of the disk diode. A normal feature of similar silicon devices is the presence a

voltage drop of about 2V when conducting rated currents which in a high power rectifier system, the

power losses can be as high as a few thousand Watts. Based on past experience, the temperature rise

should be negligible because the short-circuit tests were limited to short times of less than

140 Chapter 6

20ms;thus water cooling was not required. Nevertheless, for future research with direct current

systems, every diode should be equipped with a water-cooled heat sink on both sides, so that each

diode would be clamped between two heat sinks. The water as cooling medium should have

adequate dielectric properties to withstand capability with respect to the operational voltage.

6.4. Simulation results

Analysis of rectifier bridges can be very difficult when exact solutions are required; particularly,

when various secondary effects, such as non-perfect switching behavior and non-linear

characteristics of model devices, must be included in the analysis. Moreover, additional protective

components would increase the complexity of a network. Hence, the evaluation of the transient

behavior of rectifying bridges required computer simulation programs. A technique for solving

differential equations, such as those governing this circuit configuration involved a numerical

method based on a time stepping basis, was suitable for understanding the behavior of a bridge

short-circuit. The currents through and voltages across each device were tested at each time

increment during the simulation in order to determine whether switching had occurred in the diodes

or not. When switching did occur, a new circuit configuration (topology) was generated; the initial

inputs to branches and nodes being obtained from the previous currents and voltages, at each time

step. A method based on tensor analysis for reformulating the circuit equations automatically after

each switching, was proposed in the previous section. Modern computer simulation programs are

capable of changing matrix circuit equations automatically. One of them is ElectroMagnetic

Transient Program (EMTP) [6.9,19], but it considers the diode to be an ideal switch. Another one is

Simulation Program with Integrated Circuit Emphasis (SPICE) [6.15,22,23,24] which is intended

for simulating electronic circuits, although it does seem to be suitable for the simulation described

here. It has a built-in model for electronic diodes and by extending it to include power diode models

have been developed and published in [6.16,17,18]. They include reports of transient behavior with

a real diode during turn-on and turn-off times. Typical turn-on and turn-off times for power diodes

are measured in tens of microseconds. Using that model for the bridge circuit, which had a long

time constant, would lead to an unnecessarily long simulation time and the transient effects might

not be observed. Apparently, that model had been used for designing snubber and damping circuits

for power diodes.

Here, the purpose of the simulation was to improve the understanding of a bridge’s behavior during

the short-circuit tests. Actually, this simulation made use of the features provided by the SPICE

computer program with an electronic diode model added to it and this allowed the measurement

results to be explained. Nevertheless, details of the behavior of diodes had to be known when

dealing with designs at high frequencies. However, instability problems could occur during the

simulations, but they could be overcome by changing the internal accuracy of the simulation, and

placing small capacitors across the secondary side of the AC system and the bridge output. In fact,

having those capacitors present in the simulation not only helped to solve the convergence problems

but also made it more representative of a real system. Non-convergence problems might occur when


a switching device such a diode changed its state instantaneously (a diode had an infinite off-state

resistance and zero on-state resistance) which could result in a large di dt for an inductor creating a

large voltage, or in a large dv dt across a capacitor creating a large current. For that reason, an RC

snubber circuit should have been put parallel with the diode or in the AC side.

All 3-phase sources can be represented by an ideal balanced sinusoidal source with a short-circuit

impedance defined by Ri and Li. There will be no limitation to current flowing through each diode;

however, the necessary breakdown voltage and its associated current can be obtained from the

manufacturers.

6.4.1 Simulation of a 10kA prospective short-circuit current

A 10kA prospective short-circuit current could be created by using a resistance value of 80mS and

in series with the resistance, an inductance of 460:H had been chosen. The short-circuit was

initiated at time t=10ms. Figure 6.15 presents the results from the simulation of the circuit depicted

in Figure 6.11.

VPN

VPO

VNO

0 5 10 15 20 25 30 35 40-600

-400

-200

0

200

400

600

800

1000

1200

time [ms]

Vol

tage

[V

]

(a) DC voltages; two poles: VPO and VNO

and total voltage VPN.

ID1

ID3

ID5

0 5 10 15 20 25 30 35 400

1000

2000

3000

4000

5000

6000

7000

8000

9000

10000

time [ms]

Cur

rent

[A]

(b) Diode currents ID1, ID3 and ID5,

respectively.

IDCS

IR

IS

IT

0 5 10 15 20 25 30 35 40-1

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1x 10

4

time [ms]

Cur

rent

[A]

(c) Circuit currents; rectified current IDCS,

phase currents IR, IS and IT, respectively.

ID2

ID4

ID6

0 5 10 15 20 25 30 35 40-10000

-8000

-6000

-4000

-2000

0

2000

time [ms]

Cur

rent

[A]

(d) Diode currents ID2, ID4 and ID6,

respectively.

Figure 6. 15 Simulation of a 10kA inductive load where a short-circuit at t=10ms is initiated.

Figure 6.15 (a) shows the rectified voltages of the two 3-phase Graetz bridge (VPO and VNO are the

positive and negative poles with respect to the ground potential and VPN is the voltage between the

142 Chapter 6

poles), Figure 6.15 (b) and Figure 6.15 (d) present the diode currents in the upper diodes (1,3,5)

and lower diodes (2,4,6) of the bridge and Figure 6.15 (c) shows the short circuit direct current IDCS

and the associated phase currents (IR, IS and IT).

6.4.2 A short-circuit current directly after the bridge

Figure 6.16 shows the results for a simulated short-circuit between two poles after the bridge poles.

IR

IS

IT

IDCS

0 5 10 15 20 25 30 35 40-4

-3

-2

-1

0

1

2

3

4

5x 10

4

time [ms]

Cur

rent

[A]

(a) Circuit currents; the rectified current IDCS,

phase currents IR, IS and IT, respectively

ID1

ID3

ID5

0 5 10 15 20 25 30 35 40-0.5

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5x 10

4

time [ms]

Cur

rent

[A]

(b) Diode currents ID1, ID3 and ID5,

respectively.

0 5 10 15 20 25 30 35 40-8

-6

-4

-2

0

2

4

6

8

10

12

time [ms]

Cur

rent

slo

pe [

A/µ

s]

(c) Rate of the rectified current rise.

ID2

ID4

ID6

0 5 10 15 20 25 30 35 40-4

-3.5

-3

-2.5

-2

-1.5

-1

-0.5

0

0.5x 10

4

time [ms]

Cur

rent

[A]

(d) Diode currents ID2, ID4 and ID6,

respectively.

Figure 6. 16 Simulation of a short-circuit directly after the bridge poles.

Figure 6.16 (a) shows the short circuit direct current IDCS and the associated phase currents (IR, IS

and IT), Figure 6.16 (b) and Figure 6.16 (d) present the diode currents in the upper diodes (1,3,5)

and lower diodes (2,4,6) of the bridge and Figure 6.16 (c) shows the current slope of the direct

current IDCS.


6.5. Measured and simulated results

The complete diagram for the two 3-phase Graetz-bridges as described earlier in this chapter can

now be simplified by using two DC sources VDC1 and VDC2 as shown in Figure 6.17. Photos of the

setup are shown in Appendix A.1 and A.3.

RT

DCCB

MS

+

-

VDC2

ScopeI

LT

Rogowski-coil

+

-

ScopeVD1

Vpo

ScopeVD2

Vno

VDC1

Figure 6. 17 Measurement setup; VDC1 and VDC2 are the output voltages of six-pulse rectifiers,DCCB is a backup DC circuit breaker, MS is a make switch, RT and LT are limiting loads.

In Figure 6.17, a Direct Current Circuit Breaker (DCCB) with a nominal rated current of 800A

represents the device under test. The DCCB is a conventional breaker having the ability to create an

arc voltage in its arc chute chambers. The load, consisting of RT and LT, provides current limitation

in the circuit. An electrodynamic make switch MS [6.29] connects the source-side with the load-

side and closing the make-switch will initiate the high current which has to be interrupted by the

DCCB. The current will cause the electromagnetic drive of the DCCB to open the electrodes and

move the arc to the extinguishing chamber where the arc will be cooled down by blowing in air at a

pressure of 6 atm. In the arc chutes, the arc voltage will increase, thereby suppressing the circuit

current. This process continues until the arc voltage becomes higher than the supply voltage which

then forces the current down to zero. Finally, the current is interrupted. The circuit current is

measured with a Rogowski-coil [6.26]. Subsequently, the two voltages are recorded; at the positive

and negative poles of the two bridges in series, using resistive voltage dividers 50kS/50S with a

rise time of 600ns. In the event that the make switch MS should close, its cathode voltage will jump

from negative to positive and that voltage jumping is used as a trigger signal for measurement

recording.

144 Chapter 6

6.5.1 An open circuit test

Open-circuit tests are performed in order to observe the continuous rectified voltages in the

unloaded state. All voltages are measured with respect to a ground potential. Theoretically rectified

3-phase waveforms as described in the previous section, are shown below. The lower trace is for the

negative pole voltage (VNO), the middle trace is for the positive pole voltage (VPO), and the upper

trace is for the voltage difference (VPN) between the other two voltages, see Figure 6.18.

VPN

VPO

VNO

0 5 10 15 20 25 30 35 40-600

-400

-200

0

200

400

600

800

1000

1200

Vol

tage

[V

]

time [ms]

(a)

VPN

VPO

VNO

0 5 10 15 20 25 30 35 40-600

-400

-200

0

200

400

600

800

1000

1200

time [ms]

Vol

tage

[V

]

(b)

Figure 6. 18 Rectified voltages for the unloaded test circuit; (a) measured and (b) simulated.

6.5.2 Short-circuit test

Figure 6.19 depicts the test with a limiting load of RT=130mS and LT=460:H when the make

switch MS was closed at t=10ms. The air breaker interrupted at t=26ms followed by the AC

contactor disconnecting at t=40ms.

VPN

VPO

VNO

0 10 20 30 40 50-1000

-500

0

500

1000

1500

Vol

tage

[V

]

time [ms]

(a) DC voltages; 2 poles: VPO and VNO

and total voltage VPN.

0 10 20 30 40 50-1000

0

1000

2000

3000

4000

5000

6000

7000

Cur

rent

[A]

time [ms]

(b)

Figure 6. 19 Current interruption with air breaker DCCB; (a) voltages and (b) current.

Figure 6.19 (a) shows the rectified voltages of the two 3-phase Graetz bridge (VPO and VNO are the

positive and negative poles with respect to the ground potential and VPN is the voltage between the

poles) and Figure 6.19 (b) is the maximum short circuit direct current ever tested in the DCSCS.


Figure 6.20 compares the measured and the simulated results at the current growth.

Measured Simulated

VPN

VPO

VNO

0 5 10 15 20-600

-400

-200

0

200

400

600

800

1000

1200

Vol

tage

[V

]

time [ms]

VPN

VPO

VNO

0 5 10 15 20-600

-400

-200

0

200

400

600

800

1000

1200

time [ms]

Vol

tage

[V

]

(a)

0 5 10 15 20-1000

0

1000

2000

3000

4000

5000

6000

7000

Cur

rent

[A]

time [ms]

(b)

(c)

0 5 10 15 20-1000

0

1000

2000

3000

4000

5000

6000

7000

time [ms]

Cur

rent

[A]

(d)Figure 6. 20 The maximum direct current short-circuit test; the rectified voltages and current.

Measured results in the left-hand column and simulated results in the right-hand column.

Part of this chapter has been published in [6.28].

6.6. Conclusions

A test facility comprising two 3-phase rectifiers has been described already and it was constructed in

order to examine the characteristics of fast acting DC interrupters. The setup could deliver currents

up to 7000A at 900V. The system could recover from any transient that occurred during a test

without damaging itself. Stress on the upstream AC supply system was considerable small due to

the short testing time. The operating characteristics were illustrated by the experimental and

computer generated results and they verified the success of the test. High power direct currents of

both the transient and steady-state supplies were then feasible so that they could be investigated in

order to learn about the interaction between the AC and DC sides.

146 Chapter 6


[6.1] Hofmann, G. A., et.al., “Field Test of HVDC Circuit Breaker: Load Break and FaultClearing on the Pacific Intertie”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-95, No. 3, May/June 1976, p. 829-38.

[6.2] Gallagher, H.E., et. al., “145-kV Current limiting device- field tests”, IEEE Trans. onPower Apparatus and Systems, Vol. PAS-99, No. 1, Jan./Feb. 1980, p. 69-77.

[6.3] Kriechbaum, K., “A half cycle air blast generator breaker for high power testing fields”,IEEE Trans. on Power Apparatus and Systems, Vol. PAS-91, 1972, p. 747-53.

[6.4] Voshall, R. E. and Lee, A., “Capacitor Energy Storage Synthetic testing of HVDC CircuitBreaker”, IEEE Trans. on Power Delivery, Vol. PWRD-1, No. 1, January 1986, p. 185-90.

[6.5] Hofmann, G. A., Long, W.F. and Knauer, W., “Inductive test circuit for a fast actingHVDC Interrupter”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-92,Sept./Oct. 1973, p. 1605-14.

[6.6] Mukutmoni, T., Parsons, W.M. and Woodson, H.H., “A new synthetic test installation fortesting vacuum interrupter”, IEEE Trans. on Power Apparatus and Systems, Vol. PAS-95,July/August 1976, p. 1311-7.

[6.7] Schaefer, J., Rectifier circuits theory and design, Wiley, London, 1965.[6.8] Krein, P.T. and Bass, R.M., “Autonomous control technique for high-performance

switches”, IEEE Trans. on Industrial Electronics, Vol. 39, No. 3, June 1992, p. 215-22.[6.9] Dommel, H.W., Electromagnetic Transients Program Reference Manual, Bonneville

Power Administration, Portland, USA, August 1986.[6.10] Jensen, R.W. and Watkins, B.O., Network analysis: Theory and computer methods,

Prentice-Hall, 1974.[6.11] Williams, S., and Smiths, I.R, “Fast Digital Computation of 3-phase thyristor bridge

circuits”, Proc. IEE, Vol. 120, No. 7, July 1973, p. 791-5.[6.12] Kremer, H., Numerical analysis of liner networks and systems, Artech House 1987.[6.13] Beausejour, Y., and Karady, G., “Valve damping circuit design for HVDC systems”, IEEE

Trans. on Power Apparatus and Systems, Vol. PAS-92, No. 2, Sept./Oct. 1973, p. 1615-21.[6.14] Howe, A.F., et. al., “DC fusing in semiconductor circuits”, IEEE Trans. on Industry

Applications, Vol. IA-22, No. 3, May/June 1986, p. 483-9.[6.15] Nagel, L.W., SPICE2: A computer program to simulate semiconductor circuits,

Electronics Research Laboratory, Univ. California of Berkeley, Memorandum, ERL-M520, May 1975.

[6.16] Tatakis, E., “Modelling power diodes for power electronic circuits simulation withSPICE2”, EPE Journal, Vol. 2, No. 4, December 1992, p. 259-68.

[6.17] Strollo, A.G.M., “A New SPICE Subcircuit Model of Power P-I-N Diode”, IEEE Trans. onPower Electronics, Vol. 9, No. 6, November 1994, p. 553-9.

[6.18] Berz, F., “Ramp recovery in p-i-n diodes”, Solid-state Electronics, Vol. 23, 1980, p. 783-92.

[6.19] Dommel, H.W.and Meyer, W. S., “Computation of electromagnetic transients”, Proc. ofthe IEEE, Vol. 62, No. 7, July 1974, p. 983-93.

[6.20] Mathworks, Computer software: Matlab ver. 4.2c, 1994[6.21] Mohan, N., et.al., Power electronics: converters, applications, and design, 2nd ed. -

Chichester : Wiley, 1995.[6.22] Microsim, Computer software: PSPICE ver. 5.0, 1992[6.23] Rashid, M.H., SPICE for power electronics and electric power, Prentice Hall, 1993.[6.24] Ramshaw, R. and Schuurman, D., Pspice simulation of power electronics circuits, 1995.[6.25] Sakshaug, E.C., et.al., “A new concept in station arrester design”, IEEE Trans. on Power


Apparatus and Systems, Vol. PAS-96, No.2, March/April 1977, p. 647-56.[6.26] Pettinga, J.A.J. and Siersema, J., “A polyphase 500kA current measuring system with

Rogowski coils”, IEE Proc., Vol. 130, Pt. B, No. 5, September 1983, p. 360-3.[6.27] Abramowitz, M., and Stegun, I.A., Handbook of Mathematical Functions, Dover

Publication Inc., 1965, 17.6, NY: Dover.[6.28] Atmadji, A.M.S., et.al., “Building a 750V direct current short-circuit source”, 8th Int.

Symp. on Short-Circuit Currents on Power Syst., Oct. 1998, Brussels, p. 249-54.[6.29] Damstra, G.C., “Synthetic testing techniques for three phase making tests”, Holec

Techniek, Vol. 3, No. 3, 1973, p. 140-44.

148 Chapter 6

Chapter 7

Experimental and modelling results

AbstractThree different experimental circuits were studied in order to compare the interruption behavior of

air breakers, hybrid breakers and solid-state breakers. A commercial air breaker was tested in the

laboratory built direct current short-circuit source which was later used as a backup breaker for

other tests. The design aspects of hybrid switching techniques were demonstrated by applying the

one-stage current commutation technique. In this technique, the main breaker was a vacuum type

and the control switch in the commutating path was a solid-state type. The latter test concerned a

solid-state breaker IGCT as a new invention in power switching technology. Finally, complete

systems were simulated and they confirmed the experimental transient behaviors that had been

observed.

7.1. The air breaker experiment

The interruption capacity of a conventional air breaker was investigated first. The breaker had a

nominal voltage of 900V, nominal continuous current of 800A and short-circuit current of 20kA

and it was able to lengthen the arc between the contacts as can be seen in Figure 7.1. As soon as the

contacts opened, an arc initially struck across the shortest distance between the electrodes. Then, it

was driven steadily upwards by heating the air during arcing and the Lorentz force which was

related to its own current. When the arc moved to the arc chambers, it was split into a number of

smaller arcs, thereby creating a total arc voltage greater than the supply voltage.

Steel splitter plates

Series arcs

Moving arc contactto open position

Arc runners

Current

Arc shields

I

I

Figure 7. 1 Arc chutes of a conventional air breaker.

150 Chapter 7

Figure 7.2 shows the experimental setup for the air breaker test. The Direct Current Circuit Breaker

(DCCB) represents the device under test in which the trip level was set to 1.8kA. Two 6-pulse

rectifiers (VDC1 and VDC2) as described in Chapter 6 were used to feed the test circuit [7.1] where

two DC poles were connected symmetrically with respect to the ground potential and they delivered

a system voltage of 1kV. Subsequently, the make switch MS connected the DCCB to the limiting

load composed of inductance LT=460:H and resistance RT=153mS. That load limited the current in

the circuit. Then, a copper bar linked the load to the source and a Rogowski-coil [7.2] measured the

current in the circuit. A differential attenuator measured the voltage across the DCCB.

RT

DCCB

MS

+

-

VDC2

ScopeI

LT

Rogowski-coil

+

-

ScopeVD1

VPO

ScopeVD2

VPO

VDC1

)V

Figure 7. 2 The air breaker measuring setup;VDC1 and VDC2 are 6-pulse rectifiers, DCCB is DC the circuit breaker under test and MS is a make switch.

Figure 7.3 shows some typical measurement graphs.

0 10 20 30 40 50-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]

(a)

0 10 20 30 40 50-1000

0

1000

2000

3000

4000

5000

6000

time [ms]

Cur

rent

[A]

(b)Figure 7. 3 The voltage across (a) the conventional DC air breaker and (b) the limited current.

Experimental and modelling results 151

Figure 7.3 (a) shows the voltage across the air breaker and Figure 7.3 (b) depicts the current in the

circuit. The make switch closed at 10ms. At t=20ms, the contacts of the breaker opened after which

the arc voltage began to increase gradually at first. For about 3ms, the arc voltage remained higher

than the supply voltage which resulted in a successful current interruption at t=28ms. Due to a

current-zero, the voltage across the breaker fell back to the open voltage of the source. After 45ms,

the contactor in the 10kV side switched off the power supply. The sequence of operations was

described in Chapter 6. The rather slow operation of a conventional air breaker has been shown

clearly. An effective current limitation process only started when the fault current had almost

reached a prospective value of 5kA. In fact, the short-circuit current was only limited by time and

not by amplitude.

7.2. The hybrid breaker experiment

After the test with the air breaker, as described in Section 7.1, the air breaker was then used as a

backup breaker in the setup to investigate a hybrid breaker. The hybrid breaker was tested in two

different situations, namely, with and without an anti-parallel diode across the vacuum breaker. The

reason for using an anti-parallel diode was to provide an arcless interruption.

7.2.1 Hybrid breaker test without anti-parallel diode across the vacuum breaker

In this experiment, the elementary setup reported in [7.3] was used without an anti-parallel diode.

Figure 7.4 shows the circuit diagram. Photos of the setup are shown in Appendix A.2 and A.3.

ZnO

LT

MS

+

-

+

-

VDC1

VDC2

I

RC2Scope

VCB

VCO

CVCBDA

LC

Thy

RA

LA

ZnO

Rsn

Csn

RC1

ScopeVD2

ScopeVD1

Scope

Shunt

Comparator

Direct triggering

DCCB RT

VNO

VPO

LEM

CC

CTRV

RTRV

LVCB

Threshold

+

-VCVCB

Figure 7. 4 The hybrid breaker measuring setup without anti-parallel diode;VDC1 and VDC2 are 6-pulse rectifiers, DCCB is the backup DC circuit breaker, MS is a make switch,

VCB is a vacuum circuit breaker, RC1,2 are Rogowski-coils.

152 Chapter 7

Two 6-pulse rectifiers (VDC1 and VDC2) like those described in Chapter 6 were used to feed the test

circuit [7.1] in which two DC poles were connected symmetrically with respect to the ground

potential in order to deliver a system voltage of 1kV. The system included the backup DC breaker

DCCB and the limiting load (LT=460:H and RT=153mS). Finally, the make switch MS connected

the limiting load to the hybrid breaker under test. The hybrid breaker was a combination of a

vacuum circuit breaker VCB and a commutating path connected in parallel across the VCB. For the

VCB, a fast electrodynamic drive mechanism was constructed in order to fulfill its rapid opening

requirement. The drive was energized by a pre-charged capacitor CVCB with an initial voltage VCVCB

and an actuating coil LVCB. The special opening mechanism has been described in Chapter 5,

Section 5.2. The commutating path comprised: the capacitor CC, coil LC and thyristor Thy. The

absorbing circuit (RA=10S, LA=10mH) was connected across the capacitor CC. A diode DA was

placed in series with the absorbing circuit. In normal continuous situation (idling states), the

capacitor CC was charged at VCO with the diode DA in its reverse state so that the voltage of the

capacitor CC could be maintained. Moreover, a snubber circuit (Rsn=10S, Csn=2.4:F) protected the

thyristor Thy which assisted the turn-off process. As an additional protection, some ZnO elements

were put across the capacitor CC and thyristor Thy. If the capacitor polarity changed, the absorbing

circuit would provide a dissipation path for the excess energy stored in the capacitor CC in order to

avoid a continuous stress on the thyristor Thy when it was in a reversed blocking state. The transient

recovery voltage (TRV) after creation of the current-zero in the main breaker VCB was determined

by the components RTRV=1S and CTRV=1:F. Those components were used to lower the recovery

frequency although, in principle, it was unnecessary for a vacuum breaker.

The current transducers were completely galvanicly separated from the live conducting paths.

Rogowski-coils RC1 and RC2 and their associated integrators could measure the current in the

vacuum breaker and in the commutating path, respectively; while a LEM current transducer could

be used to measure part of the total current. The transducer gave an output signal that could be used

in a detection circuit; unfortunately, the LEM that was available had a limitation when measuring

currents higher than 1.5kA. Therefore, this transducer had to be used on one branch of the parallel

copper bars that were placed in the main current path. Resistive voltage dividers VD1 and VD2

could determine the voltages of rectifier bridges (over the positive and negative poles) and

differential attenuators could measure the voltage across the capacitor CC and across the vacuum

breaker VCB.

The circuit shown in Figure 7.4 contains several solid-state devices which were only suitable for

limited repetitive operations. Table 7.1 summarizes the maximum parameters permitted.


Table 7. 1 Maximum solid-state key parameters permitted.

Parameters Symbol Fast thyristor Phasediode

Freewheelingdiode

Forward blocking voltage VFRM [kV] 3.5 - -Reverse blocking voltage VRRM [kV] 3.5 2 2.5

Rated current IF [kA] 1.35 3.4 2Forward surge current IFSM [kA] 13 31.5 24Forward current slope di dt max [A/:s] 500 - 100

Reverse voltage slope dv dt max [V/:s] 500 - -

Joule-Integral I t2 [A2s - 4.8 106 2.8 106

Measurements were recorded with two LeCroy 300Mhz scopes each having four channels, so that

the system in total could be studied with eight measurement inputs simultaneously. When the make

switch MS closed, the voltage jumped from a positive to negative potential which was used to

trigger the scopes externally.

A successful interruption could only be obtained if the current-zero forced by the counter-current

injection, occurred at the instant when the contacts in the continuous current conducting path had

opened. Since the reaction time of the solid-state switch was much shorter than that of the

mechanically operated vacuum breaker VCB, the trigger signals had to be arranged in such a way

that they could coordinate successively. To ensure that the VCB opened before the solid-state

switch Thy was triggered, insertion of a delay circuit to the thyristor triggering was required. The

higher the frequency of the counter-current, the faster the current-zero could be realized; however,

an instantaneous value of the circuit current should be measured after the delay. During the delay,

the fault current would increase further which meant a heavier task for the commutation circuit

(when compared with a commutation without delay). The forced current-zero in the VCB could be

retarded by choosing a slower counter-current growth which could be realized by decreasing the

initial voltage of the capacitor CC or increasing the commutating inductance LC. In either case, a

delay circuit was not needed, due to a mechanical dead-time of around of 300:s; a counter-current

with frequency of 500Hz was sufficient since a quarter of its period was 500:s. Therefore, the LC

commutating components (CC=960:F and LC=110:H) were chosen in order to produce a frequency

of 500Hz, by increasing the capacitance and inductance values. The fault current had an initial rate

of change of 2A/:s and a prospective fault current of 5kA. The trip level was set at Itrip=1.8kA.

Figure 7.5 shows the measurement results for the hybrid interruption process.

Figure 7.5 (a) includes the voltages across the vacuum breaker VVCB and the capacitor VCc; whilst

Figure 7.5 (b) displays the associated currents in the vacuum breaker IVCB and commutating paths

ICom, respectively. Figure 7.5 (c) shows the recovery voltage across VCB (like Figure 7.5 (a)) on a

shorter time scale. Initially, the capacitor voltage was charged up to -1kV and the thyristor was in

the forward blocking state. At the instant when t=2ms, the make switch MS closed and the circuit

current IVCB increased. As soon as the current reached the trip level of 1800A, the switch Thy was

triggered in order to discharge the stored capacitor energy and that initiated the main current

154 Chapter 7

commutation. When a current-zero occurred in the VCB, the commutation process ended, but the

commutated circuit current ICom continued charging the capacitor by reversing its polarity until the

circuit current became zero at t=5.3ms and the capacitor voltage reached a final value of

VCE=+2.7kV. At that time, the switch Thy changed into the reversed blocking state and completed

the current interruption. Finally, the capacitor completely discharged the stored energy (1 2 2C VC CE )

gradually into the absorbing circuit. The transient recovery voltage in Figure 7.5 (c) shows a

damped oscillation with a frequency of 17kHz in superposition with the capacitor voltage. In this

experiment, the main current was interrupted at the first current-zero, whereupon reignition in the

VCB, there was a second chance when the next current-zero occurred. In both cases, interruption by

the main switch VCB was not free of arcing.

VVCB

VCc

0 2 4 6 8 10-1500

-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

]

(a)

IVCB

ICom

0 2 4 6 8 10-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(b)

2 2.5 3 3.5 4 4.5-1000

-500

0

500

1000

1500

2000

time [ms]

Vol

tage

[V

]

(c)Figure 7. 5 Measurement results;

(a) The voltages across vacuum breaker VVCB and the capacitor VCc, (b) The currents in the main breakerIVCB and the commutating path ICom (c) The transient recovery voltage across the vacuum breaker.

Verification of the experimental results and a further analysis of the commutation behavior, were

carried out with the simulation model in PSPICE [7.5] as described in Chapter 2 and using the setup

depicted in Figure 7.6.


XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

XFWHEEL

SW1XSCLOAD41 30

VZERO5

Uco

Cc

XABS

XCOMM

XVCB

VR

VS

VT

Tr2

14

15

16

Lc

Rc

LA

DA

XRATE4

5

6

3

4

VZERO4

VZCOMM1

XTHY

3

XTRV

Ctrv

Rtrv

XSNUB

Csn

Rsn

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123


XCN1

XCN2

1

3

2

23

21

SW2 SW3

RA

Figure 7. 6 Diagram of the hybrid breaker simulation without anti-parallel diode.

A comparison of the measured and simulated results is shown in Figure 7.7. The most interesting

electrical parameters are the voltages across the main breaker VVCB and the commutating capacitor

VCc and the currents in the main breaker IVCB and the commutating path ICom. Figure 7.7 (a) and (b)

show the measured results while Figure 7.7 (c) and (d) show the simulated results.

156 Chapter 7

Measurement Simulation

VVCB

VCc

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

]

(a) Voltages

VVCB

VCc

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

]

(c) Voltages

IVCB

ICom

2 2.5 3 3.5 4 4.5 5 5.5 6-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(b) Currents

IVCB

ICom

2 2.5 3 3.5 4 4.5 5 5.5 6-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(d) CurrentsFigure 7. 7 Comparison between the measured results for (a) voltages and (b) currents and

the simulation results for (c) voltages and (d) currents.

Differences between the measured and the simulated situations were less than 5%.

7.2.2 Hybrid breaker test with anti-parallel diode across the vacuum breaker

In the experiment described in Section 7.2.1, the vacuum breaker contacts eroded unavoidably due

to the arcing. The arcing could be eliminated completely by adding of an anti-parallel reversed diode

DVCB across the breaker VCB, see Figure 7.8. As soon as a counter-current was generated by

discharging the capacitor CC and the commutating inductance LC, most of that current flowed

through the main breaker, because it had a lower resistance than the diode. The diode provided an

alternative path after the contacts opened but only under the condition that the contacts opened after

the first current-zero. Therefore, when the diode was in the conducting state, the current in the main

path became negative for a while until the current in the main path measured by RC1 became zero.

From that time, the diode changed to the reversed state, while no current flowed the main path;

subsequently, the transient recovery voltage appeared across the VCB contacts. The main current

was then commutated to flow along the parallel path and the final interruption was achieved when

the capacitor became fully charged allowing a current-zero event. This current-zero changed the

thyristor state from a forward conducting state to a forward blocking state.


ZnO

MS

+

-

+

-

IRC1

Scope

RC2Scope

VCB

VCO

CVCB

CC

DVCB

Thy

RA

LA

ZnO

Rsn

Csn

ScopeVD2

ScopeVD1

Shunt

Comparator

Direct triggering

DCCB

LC

VPO

VNO LEM

DARTRV

LT RT

LVCB

VDC1

VDC2

CTRV

Threshold

+

-VCVCB

Figure 7. 8 The hybrid breaker measurement setup with anti-parallel diode;VDC1 and VDC2 are 6-pulse rectifiers, DCCB is backup DC circuit breaker, MS is make switch,

VCB is vacuum circuit breaker, RC1,2 are Rogowski-coils and DVCB: reverse diode.

Figure 7.9 (a) presents the measured voltages VVCB and VCc across the vacuum breaker and the

capacitor. Figure 7.9 (b) displays the associated currents Imain and ICom in the main path and in the

commutation path, respectively. Initially, the capacitor voltage was charged up to -1kV. At t=2ms,

the make switch MS closed and the circuit current Imain increased. When the current reached the trip

level, the switch Thy was triggered discharging the stored capacitor energy to initiate commutation

of the main current. As soon as the main path current Imain equalled ICom, the current in the VCB was

interrupted at the current-zero. Subsequently, a counter-current flowed through the reverse diode

DVCB. The current in the main path Imain then became negative and it ceased to flow when the

current became zero in the diode DVCB. At that instant, transition from the main path to the

commutation path was complete. The commutated current ICom then charged the capacitor CC until

the current ICom reached a current-zero. At that instant t=5.6ms, the thyristor Thy finally interrupted

the current while the capacitor voltage reached VCE=+2.8kV. Eventually, the capacitor discharged

all the stored energy (1 2 2C VC CE ) into the absorbing circuit. In Figure 7.9 (c) when the current-zero

in the DVCB occurs, the transient recovery voltage across the main breaker VCB jumps with a

damped oscillation at a frequency of 17kHz in superposition with the capacitor voltage.

158 Chapter 7

VVCB

VCc

0 2 4 6 8 10-1500

-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

]

(a)

Imain

ICom

0 2 4 6 8 10-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(b)

2 2.5 3 3.5 4 4.5-200

0

200

400

600

800

1000

1200

1400

1600

1800

time [ms]

Vol

tage

[V

]

(c)Figure 7. 9 Measured results;

(a) The voltages across vacuum breaker VVCB and the capacitor VCc, (b) The currents in the main path Imain

and the commutating path ICom, (c) The transient recovery voltage across the vacuum breaker.

For verification of the experimental results and further analysis of the commutation behavior, a

simulation model in PSPICE was setup as shown in Figure 7.10.

XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

4

5

6

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

XFWHEEL

SW1XSCLOAD41 30

VZERO5

Uco

Cc

XABS

XCOMM

XVCB

VR

VS

VT

Tr2

14

15

16

Lc

Rc

LA

DA

XRATE4

5

6

3

4

VZERO4

VZCOMM1

XTHY

3

XSNUB

Csn

Rsn

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123


XCN1

XCN2

1

3

2

23

21

DVCB

SW2 SW3

RA

XTRV

Ctrv

Rtrv

VZERO6

17

Figure 7. 10 Diagram of the hybrid breaker simulation with an anti-parallel diode.

A comparison between measured and simulated results is shown in Figure 7.11. The most

important electrical parameters are the voltages across the main breaker VVCB and the commutating


capacitor VCc and the currents in the main path Imain and in the commutating path ICom. Figures 7.11(a) and (b) show the measured results while Figure 7.11 (c) and (d) show the simulated results.

Measurement Simulation

VVCB

VCc

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

]

(a) Voltages

VVCB

VCc

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Vol

tage

[V

](c) Voltages

Imain

ICom

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(b) Currents

Imain

ICom

2 2.5 3 3.5 4 4.5 5 5.5 6-1000

-500

0

500

1000

1500

2000

2500

3000

time [ms]

Cur

rent

[A]

(d) CurrentsFigure 7. 11 Comparison between the measured results for (a) voltages and (b) currents and

the simulation results for (c) voltages and (d) currents.

The difference between the measured current and the simulated current was less than 8%.

7.3. The solid-state breaker experiment

For a reasonable comparison of the different concepts of current limitation, a purely solid-state

device was investigated with the experimental setup. An IGCT was chosen as a representation of the

latest technology. The introduction of IGCT opens an opportunity for many different applications

such as in medium voltage networks for static compensators, active filters, converter stations and

static breakers.

160 Chapter 7

7.3.1 A brief description of the Integrated Gate Commutated Thyristor (IGCT)

Since their introduction in the late 1950’s, the use of power silicon switches has increased steadily

to give greater capacity with more complexity. Research into finding ideal switches led to the

development of new power semiconductor switches. The IGCT combined the high nominal current

rating of GTO (Gate Turn-Off) Thyristors and the fast switching behavior of Insulated Gate Bipolar

Transistors (IGBT). It could switch more quickly and had lower losses than either GTO thyristors or

IGBT’s [7.4]. However, GTO thyristors do require to turn off high gate-current pulses of 20-30% of

the main current [7.6]. When the main current reached a fault trip level, much more gate-current

would be needed; consequently, a special gating circuitry would be needed. The fundamental

difference between a conventional GTO and the IGCT was the very low inductance gate driver

system inherent to an IGCT which could be as low as 2.7 to 3.5nH [7.7]. An important feature of the

IGCT development was focusing on direct triggering using a light trigger circuit for on and off

switching. Light triggering was preferred to the more conventional triggering with electrical signals,

primarily, because it improved immunity to electromagnetic interference, at the same time it

simplified the triggering circuits. Table 7.2 lists the operational characteristics of an IGCT. Because

the IGCT had no reversed voltage capacity, an external series diode had to be included; however

that introduced thermal losses.

Table 7. 2 IGCT characteristics.state device

conduction thyristor

turn-off pnp-transistor

turn-on npn- transistor

blocking pnp-transistor

A turn-off snubber can be specified to limit the dv dt of the recovery voltage to the device. The

maximum turn-off current of an IGCT depends a great deal on the snubber network [7.4]. At the

instant when the current in an IGCT ceases to flow, the circuit current will commutate to the dv dt

limiting circuit of the IGCT and the voltage across the IGCT will start to increase. Snubberless

switching can only be used if any unclamped stray inductance remains below 300nH [7.7,8].

However, the circuit under study had an inductance of 460:H so that a supplementary network for

limiting of di dt and dv dt had to be incorporated.

A commercial IGCT device was chosen to demonstrate the current limitation behavior of purely

solid-state breakers; its nominal rating current was 1.5kA, its maximum switching ability was 4kA.

Other specifications can be found in Table 7.3.


Table 7. 3 Maximum IGCT key parameters permitted.

Parameters Symbol ValueForward blocking voltage VDC [kV] 2.8

Peak off-state voltage VDRM [kV] 4.5Rated breaking current IF [kA] 4Forward surge current IFSM [kA] 25

Turn-on time tdon [:s] <3Turn-off time tdoff [:s] <3

Forward current slope di dt max [A/:s] 500

Recovery voltage slope dv dt max [V/:s] 1000

Joule-Integral I t2 [A2s] 3q106

7.3.2 Experimental and simulated results using IGCT

The designed of the experimental setup is shown in Figure 7.12 and photos of the setup are shown

in Appendix A.1 and A.4.

Control circuit

+

-

VDC1

LT

MS

IGCT

VD1

DCCB RT

LEM1

Cp

Rir

DR ZnO

DirLir

Signal conversionand Logic circuitElectrical signal

Optical signal

LEM2

+

-

VDC2

Scope

VD2

Threshold

Comparator

Figure 7. 12 The hybrid breaker measuring setup with anti-parallel diode;VDC1 and VDC2 are 6-pulse rectifiers, DCCB is a backup DC circuit breaker, MS is a make switch and

IGCT is the solid-state breaker under test.

Two rectifier bridges (VDC1 and VDC2) as described in Chapter 6 fed the test circuit giving a total

supply voltage of VDC=1kV. The test circuit comprised a backup DC breaker (DCCB), a limiting

load (LT=460:H, RT=550mS), a make switch MS and a combination of IGCT and a fast switching

diode DR. The limiting load ensured a prospective current of 2kA. The diode DR was required

because the IGCT did not have the ability to withstand the recovery voltage. Therefore, the diode

162 Chapter 7

DR was connected in series with the IGCT. In, parallel with the IGCT and DR, a protection circuit

(Rir=47S, Lir=4:H, Cp=10:F, Dir and ZnO) was added in order to aid the IGCT switching process.

The protection circuit functioned in both transient states (switching on and off). Rir limited the

discharge current from the parallel capacitor Cp when the IGCT was turned on, thus preventing the

formation of hot-spots which would damage the device. The parallel capacitor Cp had to be

discharged within the minimum turn-on time determined by the application in hand.

The trip level was set at Itrip=700A. The experiment started when the make switch MS was closed

and that resulted in the capacitor Cp charging up to VCpo. When the IGCT was switched on, the

parallel network limited the current increase to di dt ≈ 200 A/:s from the parallel capacitor Cp. The

energy stored in Cp was E C VCp p Cpo= 1 2 2; it was dissipated mainly to the inrush resistor Rir. The

limiting inductance LT, in series with the IGCT, limited di dt to approximately V LDC T .

In the IGCT turned off mode, the anode current Io fell usually at a rate of a few hundred amps per

microsecond; since the inductive current remained constant, it commutated into the parallel circuit

with the same high di dt . The inductive energy stored in the system was E L IL T o= 1 2 2 which at

turning-off of current Io would cause an overvoltage ∆V I L Co T p= . The parallel circuit had to

have a very low impedance in order to satisfy its role of limiting the rate of voltage rise. In the

forward direction, the inrush resistor Rir was short-circuited by the diode Dir so that, in principal,

only the capacitor Cp was present across the IGCT in order to provide a dv dt of approximately

I Co p . Capacitor Cp limited the voltage rise to dv dt ≈ 100 V/:s. Of course, an objective was to

minimize the capacitor Cp for economic reasons; however if Cp became too small, an excessive

dv dt could arise across the IGCT damaging the wafer. A larger parallel capacitor, however, was

very undesirable, because it would increase the turn-on losses and thus limit the performance of the

whole breaker.

When the make switch MS closed, it charged up the parallel capacitor Cp. Two LEM current

transducers were used to sense currents at the source and in the IGCT. Furthermore, an auto-

detection mechanism was constructed and installed in order to start interrupting the circuit current

on time. An electronic comparator processed the output voltage from the LEM and then it decided

whether to send a trigger signal or not, but the IGCT would switch off only if the circuit current

exceeded a pre-determined trip value. The IGCT itself was provided with optical control

connections, so that practically, the whole device could float in the circuit providing a potential-free

control. In order to turn on the IGCT and keep it in the conducting state, an optical signal was given

continuously. When the optical signal stopped, the IGCT immediately suppressed the current to

zero. A control circuit provided an electrical trigger signal to the IGCT after the make switch MS

closed. That trigger signal was converted to an optical signal in order to switch on the IGCT.

Together with the signal converter, another logic circuit could overrule the continuous trigger

signal, by stopping the optical signal after the overcurrent had been detected. Therefore, the IGCT

could be turned off by the auto-detection circuit. A simulation model was used to verify the


experimental results and to enable further study of the IGCT’s performance with the PSPICE

simulation and it is shown in Figure 7.13.

XZTR22

XZTR23

XZTR21

SW5

XF2

XF1


XDIO12

XDIO16XDIO14



XSUP22XSUP21 XSUP23

VZERO3

VZERO2

VZERO1

XR213

XR212

XR223

5

7

8

9

11

12

13

10

20

40

22

50

VR

VS

VT

Tr1

XFWHEEL

SW141 30

VZERO5

VR

VS

VT

Tr2

14

XLOAD

4

6

XZTR11

XZTR12

XZTR13

XR112

XR113 XR123


XCN1

XCN2

1

3

2

23

21

15

XIGCT

XSNUB

Lsn

Rsn Dsn

CsnVZERO4

16

SW6

XRATE

17

Figure 7. 13 Simulation diagram for the IGCT test.

The simulation network above is seen from the secondary side of the transformers. Two 3-phase

systems in balance are the supply voltages represented by VR, VS and VT. Each phase of the

secondary side is subsequently connected to an impedance XZTRxx representing the inner

impedance of the transformer. The transformers’ neutral points are earthed by the high capacitive

impedance XCN1 and XCN2. Next, the continuous loads XSUPxx function as overvoltage

suppressors being installed between each phase and the neutral of the transformer. Subsequently, a

small capacitor and resistor in series to represent the arresters XRxxx completes the AC side of the

circuit simulation. Then, two Graetz 3-phase rectifiers (XDIO11...XDIO16 and XDIO21...XDIO26)

connect to each AC side for delivering two rectified voltages. Small continuous loads (XF1 and

XF2) link the two DC poles to the earth. Both of the rectified voltages are connected in series and

the middle of them is earthed with VZERO2 to make a symmetrical source. Finally, the time-

controlled switches SW1 and SW5 join the DC source to the load side. The load side, depending on

the simulation being performed, can be arranged in such a way that only essential devices are

connected and disconnected. The load side consists of the freewheeling circuit XFWHEEL, the

limiting inductive load XLOAD, the rated load XRATE, the make switches SW1 and SW5 and the

interrupter circuit containing the IGCT subcircuit, XIGCT and the snubber network, XSNUB. The

switch SW6 controls the connection for freewheeling simulation. VZEROx’s represent the current

sensors. The switch SW5 provides the unloading and short-circuiting simulations. Closing switch

SW1 simulates the circuit described in the previous section. Figure 7.14 compares the simulation

results without the arrester with the experimental results using a protective arrester for the IGCT.

This simulation illustrates that without the appropriate arrester, the IGCT can be destroyed, since

164 Chapter 7

the expected recovery voltage is as high as 5.5kV. From Table 7.3, it can be seen that the maximum

peak voltage is 4.5kV. Simulation without arrester Measurement with arrester

4 4.5 5 5.5 6 6.5 70

1000

2000

3000

4000

5000

6000

time [ms]

Vol

tage

[V

]

(a) Voltage.

4 4.5 5 5.5 6 6.5 7-500

0

500

1000

1500

2000

2500

Vol

tage

[V

]

time [ms](c) Voltage.

4 4.5 5 5.5 6 6.5 7-100

0

100

200

300

400

500

600

700

800

time [ms]

Cur

rent

[A]

(b) Current.

4 4.5 5 5.5 6 6.5 7-100

0

100

200

300

400

500

600

700

800C

urre

nt [A

]

time [ms](d) Current.

Figure 7. 14 Comparison between simulated (a,b) and measured (c,d) results for the voltage across an IGCTand current in the source.

Further experiments with a prospective current of 5kA and a trip level of 2kA are under preparation

now. This is still in the specification of the IGCT.

7.4. Conclusions

In this chapter, three different test circuits for direct current interruption have been experimentally

investigated. The air breaker provided current interruption without introducing high overvoltages in

the circuit; however, its reaction time was rather slow, because the peak current was reached before

a considerable high arc voltage could be generated. The air breaker released the stored inductive

energy through an arcing process, while it limited the fault time but not the peak current. Although

the air breaker had a long interruption time, a fault detection monitor was built into the drive. Its

opening mechanism could be improved with a special drive. After operation, the breaker could be

reclosed easily; moreover, during operation, the breaker did not produce excessive overvoltages and

it was robust.


The hybrid breaker on the other hand, provided a short interrupting time, but it introduced high

overvoltages because the stored inductive energy had to be transferred to the commutating

capacitor. The overvoltages could endanger the rectifier and the circuit. Unfortunately, in order to

reduce the overvoltage stresses after a fault interruption, a higher commutation capacitor and a

passive dissipation path had to be introduced. Therefore, well-designed overvoltage prevention

measures had to be considered carefully, in particular, when testing with high currents. The

mechanical dead-time of the main breaker had to be as short as possible to ensure that the

interruption occurred at the first or second current-zero. At the instance of a current-zero in the

vacuum breaker, both of its contacts had to have opened to a sufficient distance to withstand any

overvoltages between them afterwards. Obviously, sufficient counter-current had to be produced by

increasing the value of the commutating capacitor. The higher the current to be forced to zero, the

larger the capacitor or the higher the initial voltage that was required. Accordingly, this needs more

space and higher rating of components. An arcless interruption can be achieved by mounting a

reversed diode across the main breaker. The interruption behavior was successfully predicted and

the simulation results agreed with the experimental ones. The hybrid breaker had the nominal rating

of 1kV/1kA and it was tested by interrupting a prospective short-circuit current of 5kA, with a time

constant of 3ms and a detection level of 1.8kA, with a sensing time of less than 5:s and a total

interruption time of less than 3ms. The hybrid breaker sharply reduced the peak current as well as

the fault time. However, excessive overvoltages could occur unless special measures were taken. A

ready capacitor bank would be both expensive and space consuming. After a fault interruption, the

hybrid breaker required a considerable time in order to recharge the capacitor for the next operation.

The solid-state breaker IGCT was tested in a 1kV DC circuit having a prospective current of 2kA

and a detection level of the current at 700A. The interrupting time was less than 500:s and the

protection network limited the overvoltage to only 2.1kV. Contrary with the air breaker and hybrid

breaker, the IGCT was very compact, it operated very fast and it caused no noise nuisance, but it

was very vulnerable to transient surges. The necessary protective circuits had to be well-designed in

order to improve their reliability. Furthermore, thermal problems could occur under normal

conditions; therefore, an efficient cooling system for many kilowatts would be needed to protect the

IGCT from overheating.


[7.1] Atmadji, A.M.S., et.al., “Building a 750V direct current short-circuit source”, 8th Int.Symp. on Short-Circuit Currents on Power Syst., Oct. 1998, Brussels, p. 249-54.

[7.2] Pettinga, J.A.J. and Siersema, J., “A polyphase 500kA current measuring system withRogowski coils”, IEE Proc., Vol. 130, Pt. B, No. 5, September 1983, p. 360-3.

[7.3] Atmadji, A.M.S., et.al., “Interruption of 4kA DC with current commutation principles”,34th Universities Power Engineering Conf., Sept. 1999, Leicester, p. 517-20.

[7.4] Mohan, N., et.al., Power electronics: converters, applications, and design, 2nd ed. -Chichester : Wiley, 1995.

[7.5] Microsim, Computer software: PSPICE ver. 5.0, 1992.

166 Chapter 7

[7.6] Carroll, E., et.al., “Integrated Gate-Commutated Thyristors: A new approach to high powerelectronics”, ABB Semiconductors AG. Press Conference, IEMDC Milwaukee, May 201997.

[7.7] Linder, S., et.al., “A new range of reverse conducting gate-commutated thyristors for highvoltage medium power applications”, Conf. Proc. EPE, Trondheim, Sept. 1997.

[7.8] Carroll, E., et.al., “IGBT or IGCT: Considerations for very high power applications”,Forum Europeen des Semiconducteurs de Puissance, Clamart, October 22, 1997.

Chapter 8

General conclusions and future developments

This thesis has described how to analyze and implement direct current breakers based on hybrid

switching techniques.

8.1. General conclusions

In Chapter 2, hybrid interruption techniques were analyzed and simulated. The interruption of high

fault currents requires solving overvoltage problems and taking protective measures. Hence, when

coordinating a number of protection devices, well-matched network parameters and breakers

capabilities have to be considered carefully. Unfortunately, reducing overvoltage stresses after a

fault interruption, needs the use of a higher commutation capacitor and the introduction of a passive

dissipation path. Obviously, limiting the fault current successfully requires a minimal value for the

commutation capacitor. Simulation models were developed in order to provide the dimensions for

the circuit components.

In Chapter 3, two variants of two-stage interruption were described, analyzed, simulated and

compared with one-stage interruption. For the two-stage variants, as McEwan had suggested, the

percentage of residual capacitor voltage was limited to 50%; however that was at the expense of

more circuit components, longer interruption time and increased resistor heating. An attempt to

limit the interruption time and thus the Joule energy in the resistance, however, was at the expense

of a higher end value for the capacitor voltage.

In Chapter 4, the function of circuit breakers was described saying that the method of Ampere-turn

compensation had been chosen for sensing the current. Rogowski-coils were chosen for measuring

the currents in different branches, while the signal from a current sensor was used as the input for an

electronic detection circuit. The latter had electrical as well as optical outputs; the electrical output

being used directly in order to trip the main breaker and the thyristor for the hybrid setup, and the

optical output being used for triggering solid-state devices. In order to achieve an improved

protection and to prevent faulty tripping during operation, the setting values for the detection level

had to be carefully determined, which necessitated tests, statistic counts of the breaking operations

and so on. Different current transducers were investigated in order to verify their response to direct

currents. Furthermore, it was shown that the Rogowski-coil and the electronic integrator were quite

suitable for measuring pulsed direct currents as applied in the hybrid breaker experiments.

In Chapter 5, the significance of a moving disk as part of the hybrid breaker’s opening drive was

discussed. The drive had been built and it operated at peak currents of 2kA in order to pass a total

charge of 0.25 Coulomb. The opening time of the drive was measured and found to be 300:s with a

168 Chapter 8

velocity of up to 4m/s. Two different approaches were considered for analyzing the transient

behavior of the drive system; the first approach included analysis and simulation using the two

coupled coils described in the linear circuit theory, in order to outline a general solution. Then,

followed the non-linear circuit theory in which equivalent inductance and resistance parameters

were introduced to calculate particular electrical and mechanical parameters. The results showed

that the model developed gave an excellent agreement with the measured results. Despite the effort

of constructing a twin-drive system, comparing efficiencies of the two drive systems showed that

the first drive had a higher value than the twin-drive. That could be explained by the higher

resistance of the twin-drive coil.

As described in Chapter 6, a test facility was built up from two 3-phase rectifiers in order to

examine the characteristics of fast-acting DC interrupters. That facility could deliver currents up to

7000A at 900V and the system could recover from the transient produced during the test without

causing any damage to itself. The stress on the primary AC supply system caused by the brief test

time was very small. The operating characteristics of the facility were illustrated by the

experimental and calculated results which verified that the test facility operated satisfactorily.

Investigations involving high power direct currents for both transient and steady-state would be

feasible, including interactions between both AC to DC and vice versa.

In Chapter 7, three different circuit breakers for direct current interruption were compared

experimentally. A conventional air breaker could interrupt the current without introducing high

overvoltages, however, its reaction time was rather slow, because the peak current was allowed to

occur before a considerable high arc voltage had been generated. The air breaker released the stored

inductive energy through an arcing process.

The hybrid breaker on the other hand, provided fast interruptions, but it introduced high

overvoltages because the stored inductive energy was transferred to the commutating capacitor.

Those overvoltages would endanger the rectifier and the circuit. Unfortunately, in order to reduce

the overvoltage stresses after a fault interruption, high commutation capacitance was required and a

passive dissipation path had to be introduced. Therefore, well-designed overvoltage prevention

measures (resistor and metal oxide arrester) had to be considered carefully when testing particularly

high currents. The mechanical dead-time of the main breaker had to be reduced as much as possible

to ensure an interruption at the first current-zero in the main breaker. At the current-zero event in

the vacuum breaker, both contacts had to be opened sufficiently to withstand any overvoltages

afterwards. Obviously, any limitation of the counter-current had to be solved by increasing the value

of the commutating capacitor. The higher the current to be forced to zero, the larger the capacitor or

the higher the initial voltage would be needed. Accordingly, that would need a greater space and

higher rated components. Interruption behavior had been successfully predicted and the simulation

results fitted the experimental ones. The hybrid breaker that was designed, had nominal continuous

ratings of 1kV/1kA. It was tested by interrupting a prospective short-circuit current of 5kA with a

time constant of 3ms and a detection level of 1.8kA; it required a sensing time less than 5:s while a

total interruption time was less than 3ms.

General conclusions and future developments 169

As a representative of solid state switching, the IGCT was tested in a 1kV DC circuit having a

prospective current of 2kA and a detection current level of 700A. The interrupting time was less

than 500:s and the protective network limited the overvoltage to just 2.1kV. Clearly, for

coordinating the protection devices, some well-matched network parameters and the breaker

capacity had to be determined for all three breakers.

8.2. Future developments

Until now, the ideal switch has been a figment of the imagination. Switching devices can be

developed and constructed having features that approach the ideal switch; however, they can fulfill

all practical network requirements and current levels up to the highest voltages. Searching for the

ideal breaker must continue. In the last decade, some new power semiconductors have been

invented that satisfy the requirements of power electronic applications and that has stimulated them

being used as solid-state breakers too. The fact that they are vulnerable, means that additional

circuits will still be needed. Meanwhile, hybrid switching devices are also in great demand,

especially for DC traction systems, but that will have to be accompanied also by the availability of

high power rated semiconductors having turn-on and turn-off times of microseconds.

One objective of investigating hybrid breaker concepts was to reduce the costs of the whole breaker

and its associated hardware like triggering and control circuits. Reducing the number of parts in a

system was also likely to improve its reliability. There are trade-off, however, in achieving this

objective, because increasing the trip level in high-rated nominal current systems, would mean that

the commutation capacitance would have to be increased too. The greater the capacitor, the lower

the initial voltages that would be needed, and that could reduce the residual voltage and prevent

overvoltage problems. However, large capacitance values may be unacceptable economically.

Furthermore, in two-stage commutation circuits, EMC and EMI problems will appear that must be

solved since auxiliary switches must be operated in the right order. Using them in medium voltage

DC networks will need utmost care and it is a challenge to breaker designers. Higher voltage and

current systems may require multi-stage interrupters. All the time that there is slow progress in

applying hybrid breakers for high-rated systems, conventional breakers will continue to be

unchallenged for network protection. Even conventional breakers can be improved and updated but

the number of research project is on the decrease.

A tendency exists to change DC traction systems to AC systems switched by non current limiting

AC vacuum interrupters both in the substation and in the train. DC systems are still in operation

have three nominal operating ranges: 750V/6kA, 1500V/6kA and 3000V/3kA with the maximum

short-circuit current as much as 50kA and a rate of current rise up to 15A/:s. Therefore developing

breakers for those ranges is required. However, a bottleneck to designing high current systems is the

short contact breaker opening times needed, their mechanical contact problems will have to be

solved first. Since no vacuum breaker has yet been produced for 6kA nominal currents, parallel

vacuum breakers each for 3kA with a low jitter time still have to be used and, consequently, the

170 Chapter 8

contact’s mass will increase. A rapid opening mechanism (less than 500:s) for the heavy contacts

mass for 6kA will be rather problematic. This implies that the only solution will be to use an

electrodynamic drive, but the fact that the impulse forces generated by such a drive can be

excessive, future investigations will have to include the improvement of the adequate mass damping

system to counteract such high impulse forces in a very short time. Therefore, hybrid breakers using

vacuum interrupters will be suitable for protecting the medium voltage DC systems. The need to

solve the contact mass problem may push solid-state technology to fulfill the requirements for high

current systems. Solid-state breakers have not been applied to replace breakers in Dutch traction

vehicles, however, about 3% of the DC breakers are of the hybrid types in railway substations with

high current contacts for 6kA in air.

Both hybrid breakers and IGCT’s need supervision of protection function which will complicate the

related safety measures and make them sensitive for malfunctioning. Before being applied in the

system, the complexity, failure rate, number of components and overload capacities of the breaker

must be considered carefully.

Further research is still required in order to develop a fast and intelligent monitoring system, to

optimize capacitor banks (either for the counter-current or a fast switch drive), and to model the best

energy absorbers. Then, research on superconducting materials will help to motivate the

development of fault current limiters, particularly, for high voltage systems. Until they are

industrially economic, they will be available only in the laboratory. Last but not least, PTC resistors

will be frequently used in low-rated industrial AC systems. Therefore, searching for suitable

materials will have to continue and further investigations will be necessary.

171

Appendix A Photos of the measurement setup

A.1 The Direct current short-circuit source

A.2 The vacuum circuit breaker as the main breaker

172

A.3 Measurement setup of the hybrid breaker.

A.4 Measurement setup of the IGCT

173

List of Symbols

Symbol Quantity Unitα phase control angle degreeα damping constant 1/sβ damped natural frequency 1/sε permittivity Farad/meterεr dielectric constant -µ permeability Henry/meterµr relative permeability -D resistivity Ω /meterµ commutating (overlap) angle degreeϕ magnetic flux Weber

ω , ωo angular frequency 1/s

σ conductivity mho/meterτ time constant second

τFW freewheeling time constant second

∆t time step second

∆V differential attenuator -ad disk acceleration meter/second2

f frequency HertzfCom commutating frequency Hertz

g gravity constant meter/second2

i electric current AmpereiB breaker current AmpereiC capacitor current Ampere

iCmax maximum capacitor current AmpereiSC short-circuit current AmpereiS source current Amperek magnetic coupling factor -l length meter

md mass kgr radius metert time second

tint interrupting time secondttrip trip time second

tz, TZ current-zero time secondtzmax maximum current-zero time second

x displacement mv,V voltage VoltvC capacitor voltage Voltvd disk velocity meter/secondA cross-sectional area meter2

C capacitance FaradCij tensor matrix -Cp parallel capacitance FaradCsn snubber capacitance Farad

174

CC commutating capacitance FaradCCo normalized commutating capacitance Farad

CSW, CVCB switch capacitor, actuating capacitor FaradDir inrush diode -EC electrical energy in the capacitor JouleECO initial electrical energy in the capacitor JouleEL magnetic energy in the coil JouleER dissipated energy in the resistance JouleEk kinetic energy in the disk Joule

Ekmax maximum kinetic energy in the disk JouleEsp potential energy in the spring Joule

Es,ES supply voltage VoltEin input energy JouleEout output energy JouleF force NewtonFd force in the disk Newton

FED electrodynamic force NewtonFF frictional force NewtonFG gravitational force NewtonFM magnetic force NewtonFS spring force NewtonI electrical current Ampere

ICc commutation capacitor current AmpereICom commutated current AmpereIVCB current in the VCB AmpereIDCS main source current AmpereIDS1 reversed diode current AmpereIlim limited current AmpereImain main path current AmpereImax maximum main current Ampere

I∞ , Ipros prospective current AmpereIR,IS,IT phase currents (AC side) Ampere

IR rated current AmpereIRA absorbing circuit current AmpereIS1 main breaker current AmpereItrip trip current AmpereItr transient current AmpereL self-inductance Henry

Leq equivalent (effective) inductance HenryLi inner inductance of the transformer HenryLir inrush coil HenryLLo normalized commutating inductance Henry

LLoad load inductance HenryLsn snubber inductance HenryLsn snubber coil HenryLA absorbing reactor HenryLC commutating inductance Henry

LFW freewheeling inductance Henry

175

LS, LT line inductance HenryLVCB excitation coil of the VCB HenryM mutual-inductance Henry

MB main breaker -MOV Metal Oxide Varistor -MS make switch -N number of turns -P power Watt

R, RS, RT resistance ΩReq equivalent (effective) resistance ΩRir inrush resistor ΩRlim limiting resistance ΩRload load resistance ΩRsn snubber resistance ΩRA absorbing resistor ΩRC commutating resistor Ω

RFW freewheeling resistance ΩRi inner resistance of the transformer ΩS the rate of rise of the switching arc voltage Volt/second

S, SW switch -T temperature Kelvin

∆T temperature difference KelvinThy,Th thyristor -

V1, V2, V3 phase voltages VoltVCB vacuum circuit breaker -

VD1, VD2 resistive voltage divider -VCB switching arc voltage VoltVCc capacitor voltage VoltVCE capacitor final voltage VoltVCl clamping voltage VoltVCO capacitor initial voltage Volt

VCVCB initial voltage of the CVCB VoltVd rectified voltage VoltVdo unloaded rectified voltage VoltVMS make switch voltage VoltVNO negative pole voltage VoltVPO positive pole voltage VoltVPN the difference pole voltage Volt

VR, VS, VT phase voltages VoltVS1 main breaker voltage VoltVThy thyristor voltage (Anode-Cathode) VoltVVCB voltage across the VCB Volt

W energy JouleWm magnetic energy JouleWtr transient energy JouleWCO capacitor initial energy JouleWR dissipated energy in the resistance JouleWCB dissipated energy in the breaker Joule

176

WTot total dissipated energy JouleXT inner reactance of the transformer ΩYt total AC load admittance SiemensZij impedance matrix ΩZin input impedance ΩZt total AC load impedance Ω

177

Acknowledgements

It is a great pleasure for me to have the opportunity to participate in the activities of the ElectricalEnergy System Group (EVT), Department of Electrical Engineering, Eindhoven University ofTechnology. My truly thanks are due to the following persons from whom I got much help for thecompletion of this thesis work.

I especially like to thank my promoter and coach Prof. G.C. Damstra for his enthusiastic supportand expertise in switchgears. I have benefited a great deal from you not only on the specific subjectbut also on the rigorous way of doing scientific research. Further to my second promoter for hisreview, comments and discussion.

I am very indebted to Mr. J.G.J. Sloot for the constant supports, fruitful discussions and promptlycritical comments which often stimulated new ideas.

I express my thanks for skillful and excellent technical assistance from Hans Vossen, RobKerkenaar, Ton Wilmes, Arie van Staalduinen who all of them contributed to the technicalrealization from well-thought ideas.

I would like to thank students Frans van Erp, Harald Prins and Hilmy El-Sayed Awad Salama fortheir contribution. Our gratitude goes to HMA Power Systems B.V. (Ridderkerk, The Netherlands)for their courtesy in providing the conventional DC overhead-line breaker and Holec B.V. (Hengelo,The Netherlands) for providing the capacitor bank.

Mr. Masttop (FOM) for lending fast thyristors. Discussions of device characteristics were veryuseful with Mr. Wessels (GEC-Plessey), Mr. B. Tabak and Mr. W. van Dijk (ABB), Mr. K.Bouwknegt (HITEC), Mr. K. Hartung (Calor-Emag), Mr. H. Meinarends (Hogeschool Rotterdam),Mr. W. Kolkert (TNO), Mr. J. Hellinghuizer (Holland Railconsult) and Mr. H. Geitenbeek(Semikron).

Furthermore, I like to thank all my colleagues and other people who made working at EindhovenUniversity of Technology an enjoyable experience.

179

Biography

Ali Atmadji was born on April 19, 1968 in Semarang, Indonesia. In June 1987 he finished

secondary school in Makassar, Indonesia. In September 1989 he started studying Electrical

Engineering at Eindhoven University of Technology and in December 1995 received his M.Sc.-

degree on a “Fault voltages and currents in low voltage networks with coupled neutral conductors”.

From March 1996 to May 2000 he worked on a Ph.D. research project in the field of “Hybrid

switching techniques” at the Electrical Energy System Group (EVT), Department of Electrical

Engineering, Eindhoven University of Technology. During this project he attended several

conferences and published papers on this subject. This research project has led to this dissertation.

Statements

accompanying the dissertation



by

Ali Mahfudz Surya Atmadji

Eindhoven, 4 May 2000.

1. A reverse diode parallel across the main breaker can provide arcless directcurrent interruption in the hybrid switching technique.

(This thesis Chapter 2 and Chapter 7) 2. Multi stage commutation circuits mitigate the direct current interruption

hardness, although they require more components. (This thesis Chapter 3) 3. There is nothing so useless as doing efficiently that which should not be done at

all. (Parts of Chapter 3 and Chapter 5 in this thesis) 4. The zinc-oxide arrester is an effective means for overvoltage suppression,

energy absorption and residual current interruption. (This thesis Chapter 7) 5. Mixed marriage does not reduce ethnical conflicts since children from such a

marriage generally choose a certain ethnic group or they form a new minorityexcluded from their parents’ ethnic groups.

6. Obtaining a PhD degree harms the health, the social life and everything

concerning dreams of childhood. 7. Lower flight fares increase the noise nuisance and do not contribute to a better

environment. 8. The introduction of a democratic system in a country where a certain ethnic

group dominates the population, decreases the opportunity of a leader from anon dominant ethnic group.

9. As PC hardware and software become more complex, it is inevitable that once

their use will result in digitally chaos and work as unpredictable as the weather. 10. In order to limit the search results internet search engines should be obliged

using an intended choice button for excluding sex indexes. 11. ... it is more important to have beauty in one’s equations than to have them fit

experiment. [Since further developments may clear up the discrepancy] Paul Adrien Maurice Dirac, Scientific American, May 1963

12. For every complex problem there is a solution that is concise, clear, simple, and

wrong. L.H. Mencken

Direct current hybrid breakers : a design and its realization

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