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Digital Electronics - Test bank of Questions and Problems
1. In order to function, each electrical loop (or circuit) requires:a. Voltage, current, resistanceb. Power, watts, capacitance, inductancec. Source, path and loadd. Proton, neutron, electron
2. Draw the pie chart for Ohm’s Law:
3. A resistor having a color code of Red, Red, Brown, Silver is rated at how many ohms of resistance?
a. 20000 ohmsb. 220000 ohmsc. 22 ohmsd. 220 ohms
4. The same resistor, when measured with a multi-meter, is found to provide 180 ohms. Should it be used (is the resistor in tolerance?)
5. An insulator has ______ electrons in it’s valence shell and _______ allow electricity to flow through it.
a. 0-3/will notb. 5-8/willc. 0-3/willd. 5-8/will not
6. The digital multimeter you have used in the lab will measure the following: (check all that apply)
a. Voltageb. Powerc. Wattsd. Currente. Protonsf. Neutronsg. Resistanceh. Inductancei. Sourcej. Tolerance
7. Batteries will typically provide what type of current?a. Ampsb. Alternatingc. Digitald. Direct
8. A series circuit is one in whicha. There is only one path through the circuitb. There are multiple paths through the circuitc. There is no path through the circuit
9. A parallel circuit is one in whicha. There is only one path through the circuitb. There are multiple paths through the circuitc. There is no path through the circuit
10. An open circuit is one in whicha. There is only one path through the circuit b. There are multiple paths through the circuitc. There is no path through the circuit
11. In the following circuit us Ohm’s Law to find the voltage
V1
R2
500Ω
XMM1
R1
1kΩ
8.000m A
12. In the following circuit use Ohm’s Law to find the current.
V124V
R2
50Ω
XMM1
R1
250Ω
13. Use Ohm’s Law to find the Resistance.
V112V
XMM1
R1
2kΩ
6.000 m A
14. In order to measure voltage, the multi-meter must be placed in series/parallel to the circuit.
15. In order to measure current, the multi-meter probes must be placed in series/parallel to the circuit.
16. If a logic state is said to be true, how is it represented in binary terms?a. Highb. Lowc. Zerod. One
17. If a logic statement is said to be false, how is it represented in digital terms?a. Highb. Lowc. Zerod. One
18. In what role does the path play in a circuit?
19. What role does the load play in a circuit?
20. Which of the following terms can be described as the pressure forcing the electricity through the circuit?
a. Currentb. Voltagec. Resistanced. Capacitance
21. Which of the following terms can be best described as the total opposition to current flow in a circuit?
a. Currentb. Voltagec. Resistanced. Capacitance
22. Which of the following terms can best be described as the total amount of electrons flowing through a circuit at a given time?
a. Currentb. Voltage
c. Resistanced. Capacitance
23. Name a digital system: __________________________________________________
24. The major difference between digital and analog signals lie in the fact thata. Digital Signals can vary between many values and analog cannotb. Digital signals do not yet existc. Digital signals vary only between two valuesd. Analog signals can be only either high or low
25. The ____________ is a common tool to examine the waveform of a given signal
26. Which tool can instantly tell you the logic state existing anywhere in a circuit?a. Logic Probeb. Oscilloscopec. Ammeterd. Radial Arm Saw
27. Binary 11011 is equal to decimala. 13b. 9c. 27d. 15
28. What is the BCD Equivalent of the decimal number 492a. 1001 1110 1010b. 0100 1001 0010c. 1100 1000 0010d. 0100 1101 0100
29. What is the hexadecimal equivalent of binary 10?a. 4b. 3c. 2d. 1
30. How many hexadecimal digits are needed to represent an 8 bit binary number?a. 4b. 3c. 2d. 1
31. Which of the following BCD number equals 763 in decimal form?a. 0111 0110 0011b. 1011 0101 0100c. 1010 1101 1110d. 1010 1011 1100
32. In binary addition, 1101 + 1011 equalsa. 10001b. 11100c. 11000d. 10000
33. The hexadecimal equivalent of a decimal 13 isa. Ab. Bc. Cd. D
34. When the bits of a four bit binary word are all shifted simultaneously from a high order position to a lower order position the number is
a. Saved in its current formb. Multiplied by 2c. Divided by 2d. Changed to it’s one complement
35. Digital electronics is based on which number system?a. Decimalb. Binaryc. Hexadecimald. Octal
36. BCD number 1001 0011 corresponds to the decimal numbera. 93b. 10013c. 43d. 32
37. A groups of bits is called a a. Numbering systemb. Circuitc. Wordd. Byte
38. A digital BCD encoder converts aa. Binary number to a decimal numberb. Decimal number to a binary numberc. A hexadecimal number to a binary numberd. Binary number to a BCD number
39. The ___________ number system uses only digits 0 thru 7a. Hexadecimalb. Octalc. Decimald. Binary
40. The one carry results at the output of an adder when ________ are added together.a. 10b. 01c. 00d. 11
41. If the binary numbers 1001 and 0110 are added together the BCD answer isa. 0001 0101b. 01111c. 1100 0111d. 0101 0001
42. The one’s complement of binary 1010 isa. 1011b. 1010 + 1c. 1111d. 0101
43. The Two’s complement of binary 1100 isa. 0011b. 1100 + 1c. 0100d. 0101
44. The binary equivalent of hexadecimal 22 isa. 100010b. 10110c. A5d. 101001
45. BCD used a ______ bit word to represent decimal digits 0 through 9a. 1b. 2c. 4d. 8
46. The Octal number 23 corresponds to the binary numbera. 0010 0011b. 11011c. 10011d. 10111
47. Complete the following conversion chart
Decimal Binary Octal Hexadecimal
22
1100111
54
A2
48. The circuit to the right is equivalent to a(n) a. OR gateb. AND gatec. NOR gated. NAND gate
49. If both inputs to a NAND gate are one, the output isa. Logic oneb. Logic zeroc. GNDd. An indeterminate state
50. A 2 input OR gate has a logic zero output whena. One input is lowb. Both inputs are lowc. One input is highd. Both inputs are high
51. An OR gate with inverters at all inputs and output performs what function?a. ANDb. ORc. NORd. NAND
52. An AND gate with inverters at all of the inputs is equivalent to a(n)a. NORb. NANDc. ANDd. Not circuit
53. An _____________ gate is equivalent to an OR gate with an inverted outputa. NOR gateb. NAND gatec. AND gated. NOT Circuit
54. A NAND gate has an output of of logic 1 whena. At least one input is a oneb. All inputs are 1c. At least one input is 0
55. A 2 input exclusive OR gate compares two inputs and has a logic 1 output whena. One input is 0b. One input is 1c. Both inputs are the samed. Both inputs are different
56. In the circuit Below, What input combination would cause the output to be high?
A
B
a. 00b. 01c. 11d. Any combination
57. The circuit above performs the same function as:
a.
b.
c.
d.
58. A logic gate is the equivalent of a(n)a. Amplifierb. Oscillatorc. Bufferd. Electromechanical switch
59. The logic OR gate is equivalent toa. Switches in seriesb. Switches in parallelc. A series parallel mixd. None of the above
60. A single input logic gate whose output is the complement of the input is a a. Bufferb. Inverterc. NAND gated. NOR gate
61. In the circuit below, the output is 1 when
a. Both inputs are 1b. Both inputs are 0c. Either input is 1d. The inputs are different
62. The circuit is question 62 is equal to
a.
b.
c.
d.
63. The truth table below is for a(n)a. AND gateb. OR gatec. NAND gated. NOR gate
64. A four input NAND gate with a 0 output indicates thata. One input is 1b. One input is 0c. All inputs are 1d. All inputs are 0
65. A four input exclusive OR gate has a high input whena. An odd number of inputs are highb. An even number of inputs are highc. An odd number of inputs are lowd. An even number of inputs are low
66. The truth table below is for a(n)a. XOR gateb. OR gatec. NAND gated. NOR gate
67. The symbol for an AND gate is
a.
b.
c.
d.
68. For each of the following gates, draw the logic symbol, write the Boolean expression and complete the truth table for a two input gate
AND OR NAND NOR
69. Describe enable and inhibit as they pertain to logic gates
70. What is the function of the following integrated circuitsa. 4030=__________________________b. 4002=__________________________c. 4001=__________________________d. 7402=__________________________e. 7404=__________________________f. 7432=__________________________
71. How do you convert an OR gate to an AND gate?
72. What three input logic gates would you use if you wanted a high output ONLY when one of more inputs was low?
73. What input logic gate would you use if you wanted a low output when an odd number of inputs were high?
74. Fanout is a term that refers toa. An indication of a high level outputb. The number of loads that a device can drivec. A type of surface mount technologyd. Time delay
75. When 1.8 V is applied to a TTL input it is interpreted by the integrated circuit as a logic level
a. High
b. Lowc. Undefinedd. None of the above
76. A TTL gate with a high output would typically be about _______ Voltsa. 0.2b. 0.9c. 2.2d. 3.6
77. Unwanted voltages induced in the connecting wires and the printed circuit board traces of a digital system that might possibly affect its operation are called
a. Junkb. Noisec. Fluxd. Clutter
78. The logic family with excellent noise immunity isa. CMOSb. TTLc. DDLd. RTL
79. When storing CMOS family integrated circuit chips the pins should be ina. Conductive foamb. Waterc. Alcohold. Styrofoam
80. The standard TTL family of integrated circuits chips has verya. Low propagation delays and low power consumptionb. High propagation delays and high power consumptionc. Low propagation delays and high power consumptiond. High propagation delays and low power consumption
81. A TTL output can drive a CMOS input with the addition of aa. Pull-up resistorb. Input capacitorc. Debounce switch
d. Decoder
82. On a standard TTL data sheet which of the following is not founda. Supply voltageb. Pin layoutc. Recommended operating conditionsd. Component cost
83. ______________ is the design of circuitry between devices that shift voltage and current levels to make them compatible
a. Propagation delayb. Operating conditionsc. Logic levelsd. Interfacing
84. This particular type of integrated circuit is sensitive to static electricitya. TTLb. CMOSc. ECLd. MOS
85. A TTL output of 0.6 V is considered aa. Low outputb. High outputc. Undefinedd. None of the above
86. A 4000 series CMOS output can drive a standard TTL inout with the addition of a a. Buffer (such as a 4049)b. Pull-up resistorc. Pull-down resistord. Debounce switch
87. The switching threshold when applied to the inputs for a standard TTL logic gate inputs is
a. About 1.0 Vb. Exactly 0.5 V
c. Between 0.5 and 1.0 Vd. Exactly 2.4 V
88. The fan out for standard TTL is ___________ when driving other TTL gates.a. 2b. 6c. 8d. 10
99. Using the simulator, design a circuit which interfaces a standard TTL device to a buzzer.
One Example:
VCC5V
100. Design, simulate and construct a circuit that when the key is in the ignition of a car a buzzer will go off, until the seatbelt is buckled and the doors are closes. (There will be a high output from the sensors when the key is in the ignition and the doors are closed.) Develop a truth table which would indicate when the alarm sounds (a high condition). From the truth table develop the Boolean expression, simplify that equation, and verify the circuit using the simulation software. Construct and test the circuit by breadboarding.
101. Which is the correct truth table for the Boolean expression A + B?a.
A B A + B
0 0 1
0 1 0
1 0 0
0 0 0
b.
A B A + B
0 0 0
0 1 1
1 0 1
0 0 1
c.
A B A + B
0 0 0
0 1 1
1 0 0
0 0 1
d.
A B A + B
0 0 0
0 1 0
1 0 0
0 0 1
102. Which is the correct truth table for the Boolean expression A * B?a.
A B A + B
0 0 1
0 1 0
1 0 0
0 0 0
b.
A B A + B
0 0 0
0 1 1
1 0 1
0 0 1
c.
A B A + B
0 0 0
0 1 1
1 0 0
0 0 1
d.
A B A + B
0 0 0
0 1 0
1 0 0
0 0 1
103. Which is the correct truth table for the Boolean expression (A + B)?a.
A B (A + B)
0 0 1
0 1 0
1 0 0
0 0 0
b.
A B (A + B)
0 0 0
0 1 1
1 0 1
0 0 1
c.
A B (A + B)
0 0 0
0 1 1
1 0 0
0 0 1
d.
A B (A + B)
0 0 0
0 1 0
1 0 0
0 0 1
104. Which is the correct truth table for the Boolean expression A + B’?a.
A B A + B
0 0 1
0 1 0
1 0 1
0 0 0
b.
A B A + B
0 0 0
0 1 1
1 0 1
0 0 1
c.
A B A + B
0 0 1
0 1 0
1 0 1
0 0 1
d.
A B A + B
0 0 0
0 1 0
1 0 0
0 0 1
105. Which is the correct truth table for the Boolean expression A’ * B’?a.
A B A + B
0 0 1
0 1 0
1 0 0
0 0 0
b.
A B A + B
0 0 0
0 1 1
1 0 1
0 0 1
c.
A B A + B
0 0 1
0 1 0
1 0 1
0 0 1
d.
A B A + B
0 0 0
0 1 0
1 0 0
0 0 1
106. Which is the Boolean expression corresponding to the truth table shown in the diagram?
A B OUT
0 0 0
0 1 1
1 0 0
0 0 0
a. A*Bb. A’+Bc. A’*Bd. A*B’
107. Which is the Boolean expression corresponding to the truth table
A B OUT
0 0 1
0 1 1
1 0 0
0 0 1
a. A*Bb. A’+Bc. A’*Bd. A*B’
108. A simplified version for the Boolean expression A+A’ is:a. 1b. 0c. A’*Ad. A*A’
109. A simplified version for the Boolean expression A*A’ is:a. 1b. 0c. Ad. A*A
110. A simplified version for the Boolean expression A+A*A is:a. A*Bb. A’+Bc. A’*Bd. A
111. The simplified version for the Boolean expression A*B*B*A+A*A+B*B is:a. A*Bb. A+Bc. A’*B
d. (A*B)’
112. The Boolean expression corresponding to this circuit is:
BA C
a. AC+AB+BCb. AC+AB+BAc. ABC+A+B+BCd. AC+AB+B’C
113. The Boolean expression corresponding to this circuit is:
BA C
a. ABCb. A+B+Cc. (A+B+C)’d. (ABC)’
114. The Boolean expression corresponding to this circuit is
A
B
C
a. A’+B’+Cb. A+(B+C)’c. (A+B+C)’d. (ABC)’
115. Which clock signal has the highest frequency?
A
B
C
a. Ab. Bc. C
116. Clock input A and B are inputs to a gate. The output of the gate is signal C. Which gate produces the waveform shown below.
a. AND gateb. OR gatec. NAND gated. NOR Gate
117. A carry results when which of the following two numbers are added?a. 1 1b. 1 0c. 0 1d. 0 0
118. If the binary Number 0111 and 1010 are added, the result will bea. 11000b. 10001c. 101010d. 11110
119. Which of the following is true of a half adder?a. It can add two digits with a carryb. It doesn’t have a carry outc. It works on three bits at the same timed. It can be connected to another half adder to add two bits to two other bits
120. The one’s complement of 0110 isa. 1001b. 1100c. 0011d. Indeterminate
121. Which two gates are needed to make a half adder?a. AND and ORb. XOR and NANDc. XOR and ANDd. Two NOR gates
122. The Boolean expression for a half adder isa. A XOR Bb. A AND Bc. A OR Bd. Two NOR gates
123. The Boolean expression for the carry bit of a half adder is:a. A XOR Bb. A AND Bc. A OR Bd. A AND B or G
124. The two’s compliment of 0110 is:a. 1001b. 1100c. 1010d. Indeterminate
125. The half adder addsa. Two inputsb. Three inputsc. Two inputs and a carryd. 4 inputs
126. A full addera. Has three inputsb. Consists of two half addersc. Can add two inputs and a carryd. All of the above
127. Which of the following circuits is a half adder?
a.
SUM
CARRY
b.
SUM
CARRY
c.
SUM
CARRY
d.
SUM
CARRY
128. The difference between a serial adder and a parallel adder is:a. Parallel adders add one bit at a timeb. Serial adders are fasterc. Parallel adders add all bit at the same timed. Parallel adders do not use half adder circuits
129. The “∑” symbol representsa. Sumb. Productc. Dividendd. Equal
130. Which is the following symbol for a half adder?
a.
b.
c.
A
B
∑
Co
A
B∑
CO
CI
R
S
Q
Q’
d.
131. Which of the following is a full adder
a.
b.
c.
d.
132. The circuit below is a:a. 3 bit adderb. Full adderc. Digital adder
>D
A
B
∑
Co
A
B∑
CO
CI
R
S
Q
Q’
>D
d. Four bit adder
IC1133. In the circuit below, what data is present at point W?
a. Bit 1 sumb. Bit 2 sumc. The MSBd. The carry bit
134. In the circuit for the question above, what data is present at point X?a. Bit 1 sumb. Bit 2 sumc. The MSBd. The carry bit
A2
B2
CO
CI
A3
B3
CO
CI
B1
∑
Co
W
∑
∑
X
Y
Z
135. In the circuit for the question 132 above, what data is present at point Z?a. Bit 1 sumb. Bit 2 sumc. The MSBd. The carry bit
136. What logic function is performed by IC1?a. Full adderb. Half adderc. Carry bit processord. MSB generator
137. Add the following binary numbers:a. 101 + 010 =b. 001 + 101 =c. 111 + 11 =d. 011 + 101 =
138. Subtract the following binary numbers using the two’s compliment method:a. 1100 – 0010 =b. 1101 – 1110c. 1110 – 0011 =d. 1111 – 0110 =
139.SUM
AB
CARRY OUT
Draw the Logic symbol for a half adder, label all inputs and outputs
140. Draw the logic symbol for a full adder, label all the inputs and outputs
141. The basic building block for sequential logic is the a. Flip-flopb. Multiplexerc. Sequentiald. Timer
142. When a D flip-flop is used temporarily to store a bit of data and hold it until needed, is commonly call a
a. Counterb. Timerc. Delayd. Latch
143. The normal output Q of a flip-flop is a logical____ when the nit is at rest.a. Ob. 1c. None of the above
144. The particular type of flip-flop is considered the universal flip-flopa. RS flip-flopb. D flip-flopc. JK flip-flopd. None of the above
145. This particular type of flip-flop has only one input besides the clock input.a. RS flip-flopb. D flip-flopc. JK flip-flopd. None of the above
146. A positive-edge-triggered flip-flop changes state on the _____ transition of the clock pulse.
a. Zero to oneb. One to zeroc. All of the aboved. None of the above
147. A negative-edge-triggered flip-flop changes state on the _____ transition of the clock pulse.
a. Zero to oneb. One to zeroc. All of the aboved. None of the above
148. Two crossed NAND gates can form this type of flip-flopa. RS flip-flopb. D flip-flopc. JK flip-flopd. None of the above
149. A 555 timer can be used as the following types of clocks:a. Monostable multivibrator (one shot)b. Free-running multivibrator (astable)c. Both A and Bd. All of the above
150. When the outputs of the RS flip-flop change only on a clock pulse we say that the flip-flop operates in step with the clock. Another term for this is:
a. Synchronouslyb. Asynchronouslyc. Latchedd. Unilaterally
151. A flip-flop is said to ________ when the Q outputs change states on each clock pulse
a. Feedbackb. Latchc. Toggle
d. Set152. A circuit that belongs to the flip-flop family but which has only one stable state
(normally Q=0)a. One shotb. Monostable multivibratorc. Both A and Bd. None of the above
153. A digital circuit accepts binary data from some input sourceand then shifts this data through a series of flip-flops one at a time.
a. Flip-flopb. Latchc. Multivibratord. Shift register
154. Another name for a flip flopa. Bistable multivibratorb. BCD adderc. Decoderd. Data line
155. To operate a JK flip-flop as a clocked RS flip-flop youa. Add the inverter between the K and K inputsb. Cross-couple the outputs ( Q and Q’) to the K and K inputsc. Operate as is but avoid the J and K inputs both being high d. None of the above
156. To operate a JK flip-flop as a D flip-flop youa. Add an inverter between the J and K inoutsb. Operate as is but avoid the J and K inputs both being high c. Make the J and K inputs both high and pulse the clock outputd. None of the above
157. When the output of the flip-flop changes anytime the input changes the condition is said to be
a. Asynchronouslyb. Synchronouslyc. Positive transition of the clockd. Negative transition of the clock
158. The action of clearing a flip-flop can also be referred to asa. Clockingb. Outputc. Setting d. Resetting
159. Flip-flops can be applied in the following applicationsa. Ripple countersb. Ring countersc. Debounce circuitsd. Memory devicese. All of the above
160. When JK flip-flops are wired as a ripple counter the pulses are tallied, and the total appears in ________ form at the outputs of the circuit
a. Decimalb. Binaryc. Hexadecimald. Octal
161. A decoder is used with an alphanumeric readout toa. Convert binary inputs to hexadecimal readoutb. Increase the current flow to each segmentc. Reduce current flow to the segmentsd. Convert hexadecimal inputs to binary outputs
162. The Ripple clock and maximum/minimum outputs on a BCD countera. Are used to increase the count length by cascading the countersb. Produce a pulse whenever an overflow or underflow occursc. Have opposite trigger levels when an overflow or underflow occursd. All of the above
163. In a synchronous countera. All of the flip-flops are toggled at the same time by the same clock pulseb. The data changes bit by bitc. Each flip-flop receives its clock pulse from the previous flip-flopd. Each flip-flop is toggled by separate clock signals
164. A ripple counter isa. Asynchronous counterb. Parallel counterc. BCD counterd. Synchronous counter
165. A binary counter having a maximum count of 63 requires how many flip-flopsa. 4b. 5c. 6d. 7
166. The maximum count of a mod 16 counter isa. One less than the modulus (15)b. One more than the modulus (17)c. The same as the modulus (16)d. 2N-1
167. The decade counter has____ statesa. 16b. 2c. 8d. 5e. 6
168. When using the decode and clear method to construct a mod 8 counter how many inputs are needed on the control gate?
a. 1b. 2c. 3d. 4
169. The circuit shown below is a(n)a. Ripple counterb. Serial counterc. Synchronous up counter d. Asynchronous down counter