Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the...

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Die Hard 7: Passwords Plz Extracting secrets from hardware

Transcript of Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the...

Page 1: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Die Hard 7: Passwords PlzExtracting secrets from hardware

Page 2: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Intro to the talk

•No time for $whoami!•How to make a chip•How to break a chip•Demo•How to protect a chip•Fin

Page 3: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Physical Security Matters

Page 4: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Define the chip and describe it

-- Here we define the AND gate that we need for

-- the Half Adder

library ieee;

use ieee.std_logic_1164.all;

entity andGate is

port( A, B : in std_logic;

F : out std_logic);

end andGate;

architecture func of andGate is

begin

F <= A and B;

end func;

--*============================

-- Here we define the XOR gate that we need for

-- the Half Adder

library ieee;

use ieee.std_logic_1164.all;

entity xorGate is

port( A, B : in std_logic;

F : out std_logic);

end xorGate;

architecture func of xorGate is

VHDL Code

Page 5: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Simulate the design and timings

--import std_logic from the IEEE library

library ieee;

use ieee.std_logic_1164.all;

entity fullAdder_tb is

end fullAdder_tb;

architecture tb of fullAdder_tb is

component fullAdder is

port( A, B, Cin : in std_logic;

sum, Cout : out std_logic);

end component;

signal A, B, Cin, sum, Cout : std_logic;

VHDL Test Bench Timing Simulation

Page 6: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Break each functional part into standard blocks

Page 7: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Join the blocks and create the chip layout

http://web.eece.maine.edu/research/vlsi/2007/Bellamine/

Page 8: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Get Sand (like, really pure sand)

Page 9: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Get the chip doped up and metalled \o/

Page 10: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Get the chip doped up and metalled \o/

http://images.tutorvista.com/cms/images/81/metal-oxide-

semiconducto.png

Page 11: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Slice and Dice

https://upload.wikimedia.org/wikipedia/commons/d/d7

/Wafer_2_Zoll_bis_8_Zoll_2.jpg

http://electronics.stackexchange.com/questions/4

2765/orientaion-flat-on-semiconductor-wafer

Page 12: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Bond out the wires into the chosen package

Page 13: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Package and Sell, Sell, Sell!

http://www.soselectronic.com/a_info/img_data/Taiwan_Semiconductor/reel.jpg

Page 14: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

So why did I go through this

•Because it makes me feel like a real man

•You need to know how a chip is constructed to then attack it effectively.

• Identifying common structures in a chip allows you to reverse its functionality.

•And knowing these structures allow you to identify areas to attack

Page 15: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Reversing a silicon chip

Page 16: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Step 1. Get samples to research!

Page 17: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Get all the infos needed for the chip.

Page 18: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Decapsulate (decap) the chip!

Page 19: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Look a chip – look at it.

Page 20: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Safety is important*

*maybe not that safe…

Page 21: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Don’t inhale deeply… (snare)

Page 22: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Use Scanning Electron Microscope to work out how many metal layers the chip has

http://m.eet.com/media/1158119/120420_techinishgts1.jpg

Page 23: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Dissolve each layer using scary stuff and image using high resolutions

John McMaster is awesome – watch this:

https://www.youtube.com/watch?v=ZKT2Giq-lbQ

https://www.youtube.com/watch?v=ZKT2Giq-lbQ
Page 24: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Stitch it together using geo-mapping software.

Image courtesy Olivier THOMAS @ Texplained

Dmitry Nedospasov (@nedos on the twitter)

http://www.texplained.com/

http://www.texplained.com/
Page 25: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Identify the components

Olivier THOMAS Texplained

Dmitry Nedospasov

http://www.texplained.com/

http://www.texplained.com/
Page 26: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Reconstruct the circuit

Olivier THOMAS Texplained

Dmitry Nedospasov

http://www.texplained.com/

http://www.texplained.com/
Page 27: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Image the ROM and read of – if the chip is >40uM size (i.e from the 90’s)

Image courtesy Travis Goodspeed – Read POC||GTFO for more goodness

https://www.flickr.com/photos/travisgoodspeed/3425845978/in/album-72157616476990240/

https://www.flickr.com/photos/travisgoodspeed/3425845978/in/album-72157616476990240/
Page 28: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Microprobe key signals

https://www.flickr.com/photos/travisgoodspeed/3422351458/in/album-72157616476990240/

https://www.flickr.com/photos/travisgoodspeed/3422351458/in/album-72157616476990240/
Page 29: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Reset protection fuses with UV

Image courtesy Bunnie Huang – google everything his does!

http://www.bunniestudios.com/blog/?page_id=40

http://www.bunniestudios.com/blog/?page_id=40
Page 30: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Edit the chip using a Focused Ion Beam

Image courtesy Andrew Zonenberg – who is way smarter then the presenter

http://siliconexposed.blogspot.com.au/2014/03/getting-my-feet-wet-with-invasive_31.html

http://siliconexposed.blogspot.com.au/2014/03/getting-my-feet-wet-with-invasive_31.html
Page 31: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Glitch areas of the chip using a laser

Image courtesy Dr Sergei Skorobogatov @ University of Cambridge England

https://www.cl.cam.ac.uk/~sps32/ECRYPT2011_1.pdf

https://www.cl.cam.ac.uk/~sps32/ECRYPT2011_1.pdf
Page 32: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

So how do we protect chips

Page 33: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Integrate a metal layer mesh over critical areas

Image courtesy Oliver Kommerling

https://www.usenix.org/legacy/events/smartcard99/full_papers/kommerling/kommerling.pdf

https://www.usenix.org/legacy/events/smartcard99/full_papers/kommerling/kommerling.pdf
Page 34: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Obfuscate the layout of critical areas of the chip

•Couldn’t find a good image •Just thing of a VLSI chip that looks like spaghetti•Make it hard to automatically decode a chip area.

Page 35: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Scramble/Encrypt on-chip memories

• Helps protect memories from static memory dumping attacks

• However if you can probe the encryption engine you might be able to dump

• Helps – but is not a “Silver Bullet”

Page 36: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Generate and roll unique crypto keys for each device.

• Attacks are physical in nature

• And take time

• And equipment

• And money

• So if you (securely) roll the crypto keys

• You’ll force the attacker to work quickly

• and they’ll only have a small time window to exploit

• And since keys are should be unique per device – they can’t take one “Master” key and break all your stuff.

Page 37: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Have active tamper detection mechanisms

• Used in banking terminal – High Security Modules

• External meshes

• Cryptographic keys wiped if tamper detected

• Environmental protections

• Side channel protections.

Page 38: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

So the Fedz Vs Apple…

• Apple did a pretty good job considering threat model of 2+ years ago

• Unique keys per user/device! Not accessible in software mechanisms, Encrypted Memory!

• But memory wipe counter is stored in the flash

• So this can be “reset” by reflashing it with a good image.

• From iPhone 6 (A7 processor) they added a “Secure Enclave” block.

• Which is used to hold fingerprints and the counter.

• But physical attacks are also practical and feasible.

Page 39: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

“Secure Element” for banking

NXP65V10 NFC controller and secure element

Page 40: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

So iPhone 7

•Will probably add “Secure Element” style protections on the die.

•And active tamper responses to deter attack

•And a pony

Page 41: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Wrapping Up.

• Physical attacks are pretty cool

• And feasible given time and equipment

• But can be mitigated!

• Break stuff and look at it.

• Just don’t breathe the acid it in.

• Or touch it – well room temp. 70% nitric is fine (just makes your skin turn yellow for a little bit)

• Read and watch http://www.murdochspirates.com/

http://www.murdochspirates.com/
Page 42: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

People I stole stuff from/references

• Andrew Zonenberg - http://siliconexposed.blogspot.com.au/

• Dmitry Nedospasov - http://www.nedos.net/about/

• Oliver Thomas - http://www.texplained.com/

• Oliver Kömmerling/Markus Kuhn

• Dr Sergei Skorobogatov - http://www.cl.cam.ac.uk/~sps32/

• Bunnie Huang - http://www.bunniestudios.com/

• Travis “Good Neighbour” Goodspeed –http://travisgoodspeed.blogspot.com.au/

• John McMaster - http://uvicrec.blogspot.com.au/

And all the other I missed

http://siliconexposed.blogspot.com.au/
http://www.nedos.net/about/
http://www.texplained.com/
http://www.cl.cam.ac.uk/~sps32/
http://www.bunniestudios.com/
http://travisgoodspeed.blogspot.com.au/
http://uvicrec.blogspot.com.au/
Page 43: Die Hard 7: Passwords Plz - bsidesau.com.au · Define the chip and describe it-- Here we define the AND gate that we need for -- the Half Adder library ieee; use ieee.std_logic_1164.all;

Definitely a Con’s

http://unrestcon.org/https://wrongisland.org/


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