Introduction · CMOS devices and manufacturing technology. ... • Time-to-Market • Millions of...

ECE 659

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Digital Integrated Digital Integrated CircuitsCircuitsA Design PerspectiveA Design PerspectiveA Design PerspectiveA Design PerspectiveJan M. RabaeyAnantha ChandrakasanBorivoje Nikolic

EE141© Digital Integrated Circuits2nd Introduction1

IntroductionIntroductionJuly 30, 2002

What is this book all about?What is this book all about?

Introduction to digital integrated circuits.CMOS devices and manufacturing technology. CMOS inverters and gates. Propagation delay, noise margins, and power dissipation. Sequential circuits. Arithmetic, interconnect, and memories. Programmable logic arrays. Design methodologies.

What will you learn?


What will you learn?Understanding, designing, and optimizing digital circuits with respect to different quality metrics: cost, speed, power dissipation, and reliability

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Digital Integrated CircuitsDigital Integrated Circuits

Introduction: Issues in digital designTh CMOS i tThe CMOS inverterCombinational logic structuresSequential logic gatesDesign methodologiesInterconnect: R, L and CTiming


TimingArithmetic building blocksMemories and array structures

IntroductionIntroduction

Why is designing digital ICs different today than it was before?

Will it change in future?


future?

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The First ComputerThe First Computer

The BabbageDifference Engine


Difference Engine(1832)

25,000 partscost: £17,470

ENIAC ENIAC -- The first electronic computer (1946)The first electronic computer (1946)


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The Transistor RevolutionThe Transistor Revolution


First transistorBell Labs, 1948

The First Integrated Circuits The First Integrated Circuits

Bipolar logicp g1960’s


ECL 3-input GateMotorola 1966

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Intel 4004 MicroIntel 4004 Micro--ProcessorProcessor

19711000 transistors1 MHz operation


Intel Pentium (IV) microprocessorIntel Pentium (IV) microprocessor


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Moore’s LawMoore’s Law

In 1965 Gordon Moore noted that theIn 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.

He made a prediction that semiconductor technology will double its ff i 18 h


effectiveness every 18 months

Moore’s LawMoore’s Law

1615IO

N

1413121110

9876543L

OG

2 O

F T

HE

NU

MB

ER

OF

ON

EN

TS

PE

R I

NT

EG

RA

TE

D F

UN

CT

I


210

195

9

196

0

196

1

196

2

196

3

196

4

196

5

196

6

196

7

196

8

196

9

197

0

197

1

197

2

197

3

197

4

197

5

CO

MP

O

Electronics, April 19, 1965.

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Evolution in ComplexityEvolution in Complexity


Transistor CountsTransistor Counts

1,000,000K

1 Billion 1 Billion TransistorsTransistors

1,000,000

100,000

10,000

1,000

10080286

i386i486

Pentium®Pentium® Pro

Pentium® IIPentium® III


10

11975 1980 1985 1990 1995 2000 2005 2010

8086Source: IntelSource: Intel

ProjectedProjected

Courtesy, Intel

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Moore’s law in MicroprocessorsMoore’s law in Microprocessors

100

1000

2X growth in 1.96 years!

80808085 8086

286386

486Pentium® proc

P6

0.01

0.1

1

10

100T

ran

sist

ors

(M

T)

2X growth in 1.96 years!

Transistors on Lead Microprocessors double every 2 years


40048008

0.001

1970 1980 1990 2000 2010Year

Courtesy, Intel

Die Size GrowthDie Size Growth100

)

40048008

80808085

8086286

386486 Pentium ® proc

P6

1

10

Die

siz

e (m

m)

~7% growth per year~2X growth in 10 years


1

1970 1980 1990 2000 2010Year

Die size grows by 14% to satisfy Moore’s Law

Courtesy, Intel

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FrequencyFrequency

1000

10000

hz)

Doubles every2 years

P6Pentium ® proc

486386

28680868085

8080

80084004

0 1

1

10

100

Fre

qu

ency

(M

hy


0.1

1970 1980 1990 2000 2010Year

Lead Microprocessors frequency doubles every 2 years

Courtesy, Intel

Power DissipationPower Dissipation

P6Pentium ® proc

100

s)

486

3862868086

80858080

80084004

0.1

1

10

Po

wer

(W

atts


0.1

1971 1974 1978 1985 1992 2000Year

Lead Microprocessors power continues to increase

Courtesy, Intel

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Power will be a major problemPower will be a major problem

5KW 18KW

1.5KW 500W1000

10000

100000

ts)

500W

40048008

80808085

8086286

386486

Pentium® proc

0.1

1

10

100

1000P

ow

er (

Wat

t


1971 1974 1978 1985 1992 2000 2004 2008Year

Power delivery and dissipation will be prohibitive

Courtesy, Intel

Power densityPower density

1000

10000

W/c

m2) Rocket

Nozzle

400480088080

8085

8086

286386

486Pentium® proc

P6

1

10

100

Po

wer

Den

sity

(W

Hot Plate

NuclearReactor


1

1970 1980 1990 2000 2010Year

Power density too high to keep junctions at low temp

Courtesy, Intel

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Not Only MicroprocessorsNot Only Microprocessors

CellPhone

Digital Cellular Market(Phones Shipped)

1996 1997 1998 1999 2000

PowerManagement

Small Signal RF

PowerRF


Units 48M 86M 162M 260M 435M Analog Baseband

Digital Baseband

(DSP + MCU)

(data from Texas Instruments)(data from Texas Instruments)

Challenges in Digital DesignChallenges in Digital Design

∝ DSM ∝ 1/DSM

“Microscopic Problems”• Ultra-high speed design• Interconnect• Noise, Crosstalk• Reliability, Manufacturability• Power Dissipation• Clock distribution

“Macroscopic Issues”• Time-to-Market• Millions of Gates• High-Level Abstractions• Reuse & IP: Portability• Predictability• etc.

DSM 1/DSM


Clock distribution.

Everything Looks a Little Different…and There’s a Lot of Them!

?

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Productivity TrendsProductivity Trends

1,000,000

10,000,000

10,000,000

100,000,000

Logic Tr./ChipTr./Staff Month.

10,000

1,000

er C

hip

(M)

10,000

100,000

Mo

.

1

10

100

1,000

10,000

100,000

33 5 3 5 5

10

100

1,000

10,000

100,000

1,000,000

xxx

xxx

x

21%/Yr. compoundProductivity growth rate

x

58%/Yr. compoundedComplexity growth rate

100

10

1

0.1

0.01

0.001

Lo

gic

Tra

nsi

sto

r p

e

0.01

0.1

1

10

100

1,000

Pro

du

ctiv

ity

(K)

Tran

s./S

taff

-M

Co

mp

lexi

ty


2003

1981

198 3

1985

1987

1989

1991

199 3

1995

1997

1999

2001

2005

2007

2009

Source: Sematech

Complexity outpaces design productivity

Courtesy, ITRS Roadmap

Why Scaling?Why Scaling?Technology shrinks by 0.7/generationWith every generation can integrate 2x more functions per chip; chip cost does not increase significantlyCost of a function decreases by 2xBut …

How to design chips with more and more functions?Design engineering population does not double every


Design engineering population does not double every two years…

Hence, a need for more efficient design methodsExploit different levels of abstraction

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Design Abstraction LevelsDesign Abstraction Levels

SYSTEM

+

CIRCUIT

GATE

MODULE


n+n+S

GD

DEVICE

Design MetricsDesign Metrics

How to evaluate performance of a digital circuit (gate block )?digital circuit (gate, block, …)?

CostReliabilityScalabilitySpeed (delay, operating frequency) P di i ti


Power dissipationEnergy to perform a function

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Cost of Integrated CircuitsCost of Integrated Circuits

NRE (non-recurrent engineering) costsdesign time and effort, mask generation

one-time cost factor

Recurrent costssilicon processing, packaging, test


proportional to volume

proportional to chip area

NRE Cost is IncreasingNRE Cost is Increasing


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Die CostDie Cost

Single dieSingle die

Wafer

EE141© Digital Integrated Circuits2nd Introduction29From http://www.amd.com

Going up to 12” (30cm)

Cost per TransistorCost per Transistor

cost:cost:

0.000010.00001

0.00010.0001

0.0010.001

0.010.01

0.10.111

cost: cost: ¢¢--perper--transistortransistor

Fabrication capital cost per transistor (Moore’s law)


0.00000010.0000001

0.0000010.000001

0.000010.00001

19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012

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YieldYield%100

per wafer chips ofnumber Total

per wafer chips good of No.×=Y

costWafer costDie =

yield Dieper wafer Diescost Die

×=

( )area die2

diameterwafer

area die

diameter/2wafer per wafer Dies

2

×

×π−

×π=


DefectsDefects

α−

⎟⎞

⎜⎛ ×+=

area dieareaunit per defects1yielddie


⎟⎠

⎜⎝ α+1yield die

α is approximately 3

4area) (die cost die f=

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Some Examples (1994)Some Examples (1994)Chip Metal

layersLine width

Wafer cost

Def./ cm2

Area mm2

Dies/wafer

Yield Die cost

386DX 2 0.90 $900 1.0 43 360 71% $42 0.90 $900 1.0 43 360 71% $4

486 DX2 3 0.80 $1200 1.0 81 181 54% $12

Power PC 601

4 0.80 $1700 1.3 121 115 28% $53

HP PA 7100 3 0.80 $1300 1.0 196 66 27% $73

DEC Alpha 3 0 70 $1500 1 2 234 53 19% $149


DEC Alpha 3 0.70 $1500 1.2 234 53 19% $149

Super Sparc 3 0.70 $1700 1.6 256 48 13% $272

Pentium 3 0.80 $1500 1.5 296 40 9% $417

Reliability―Reliability―Noise in Digital Integrated CircuitsNoise in Digital Integrated Circuits

i(t)

Inductive coupling Capacitive coupling Power and ground

v(t) VDD


p g p p g gnoise

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DC OperationDC OperationVoltage Transfer CharacteristicVoltage Transfer Characteristic

V(y)

VOH = f(VOL)V

OH

VOL

VM

fV(y)=V(x)

Switching Threshold

VOH = f(VOL)VOL = f(VOH)VM = f(VM)


V(x)

OL

VOH

VOL

Nominal Voltage Levels

Mapping between analog and digital signalsMapping between analog and digital signals

Slope = -1V

VoutVOH“ 1”Slope 1

Slope = -1

V OH

VIL

VIH

UndefinedRegion


V IL V IH V in

p

V OL“ 0” VOL

IL

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Definition of Noise MarginsDefinition of Noise Margins

"1"

Noise margin high

Noise margin low

VIH

VIL

UndefinedRegion

VOH

VOL

NMH

NML


"0"

Gate Output Gate Input

Noise BudgetNoise Budget

Allocates gross noise margin to expected sources of noise

Sources: supply noise, cross talk, interference, offset

Differentiate between fixed and ti l i


proportional noise sources

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Key Reliability PropertiesKey Reliability Properties

Absolute noise margin values are deceptive

a floating node is more easily disturbed than a node driven by a low impedance (in terms of voltage)

Noise immunity is the more important metric –the capability to suppress noise sources

Key metrics: Noise transfer functions Output


Key metrics: Noise transfer functions, Output impedance of the driver and input impedance of the receiver;

Regenerative PropertyRegenerative Property

v

outv

out

v1

v3

finv(v)

f (v)

v3

v1

f (v)

finv(v)

v3


v0 v2 in

Regenerative Non-Regenerativev2 v0 in

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Regenerative PropertyRegenerative Property

v v v v v v v

A chain of inverters

v0 v1 v2 v3 v4 v5 v6

(Vol

t) v03

5


2

V

4

v1v2

t (nsec)0

2 1

1

6 8 10Simulated response

FanFan--in and Fanin and Fan--outout

NM


Fan-out N Fan-in M

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The Ideal GateThe Ideal Gate

V out

Ri = ∞

Ro = 0Fanout = ∞NMH = NML = VDD/2 g = ∞


V in

An OldAn Old--time Invertertime Inverter

NM L4.0

5.0

NM H

Vout(V)

V M

1 0

2.0

3.0


V in (V)0.0

1.0

1.0 2.0 3.0 4.0 5.0

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Delay DefinitionsDelay DefinitionsVin

Vout

tpHL tpLH

t

90%

50%


tf trt10%

50%

Ring OscillatorRing Oscillator

v0 v1 v5

v1 v2v0 v3 v4 v5


T = 2 × tp × N

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A FirstA First--Order RC NetworkOrder RC Network

Rvout

vin C

R


tp = ln (2) τ = 0.69 RC

Important model – matches delay of inverter

Power DissipationPower Dissipation

Instantaneous power:Instantaneous power: p(t) = v(t)i(t) = Vsupplyi(t)

Peak power: Ppeak = Vsupplyipeak


Average power:

( )∫ ∫+ +

==Tt

t

Tt

t supplysupply

ave dttiT

Vdttp

TP )(

1

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Energy and EnergyEnergy and Energy--DelayDelay

Power-Delay Product (PDP) =owe De ay oduct ( D )

E = Energy per operation = Pav × tp

Energy-Delay Product (EDP) =

li i f E


quality metric of gate = E × tp

A FirstA First--Order RC NetworkOrder RC Network

voutR

E0 1 P t( )dtT

∫ Vdd i l t( )dtT

∫ Vdd CLdV

Vdd

∫ CL Vdd• 2= = = =

vin CL


E0 1→ P t( )dt

0∫ Vdd isupply t( )dt

0∫ Vdd CLdVout

0∫ CL Vdd

Ecap Pcap t( )dt

0

T

∫ Vouticap t( )dt

0

T

∫ CLVoutdVout0

Vdd

∫12---C

LVdd•

2= = = =

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SummarySummaryDigital integrated circuits have come a long way and still have quite some potential left for th i d dthe coming decadesSome interesting challenges ahead

Getting a clear perspective on the challenges and potential solutions is the purpose of this book

Understanding the design metrics that govern digital design is crucial


digital design is crucialCost, reliability, speed, power and energy dissipation

Introduction · CMOS devices and manufacturing technology. ... • Time-to-Market • Millions of...

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Transcript of Introduction · CMOS devices and manufacturing technology. ... • Time-to-Market • Millions of...