Device Description - hilscher.com
Transcript of Device Description - hilscher.com
Device Description
NXHX 51-ETM
Development Board
Hilscher Gesellschaft für Systemautomation mbH
www.hilscher.com DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public
Table of Contents 2/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Table of Contents
1 INTRODUCTION.........................................................................................................4
1.1 About This Manual......................................................................................................4 1.1.1 List of Revisions ...................................................................................................4 1.1.2 Conventions in this Manual ..................................................................................4 1.1.3 Reference to Hardware ........................................................................................5
1.2 Other Relevant Documentation ..................................................................................5
2 DESCRIPTIONS AND DRAWINGS ............................................................................6
2.1 Description of the NXHX 51-ETM ...............................................................................6
2.2 Drawings.....................................................................................................................7 2.2.1 Block Diagram ......................................................................................................7 2.2.2 Printed Circuit Board ............................................................................................8
2.3 Operating Elements ..................................................................................................10 2.3.1 Push Buttons ......................................................................................................10 2.3.2 Switches .............................................................................................................10 2.3.3 Host Interface Configuration Jumper (X10)........................................................14
2.4 Interfaces ..................................................................................................................16 2.4.1 Host Interface (X3) .............................................................................................16 2.4.2 Mini-B USB Connector (X2, 5-pin) .....................................................................22 2.4.3 microSD Card Reader (X4) ................................................................................22 2.4.4 Fieldbus Connector (X5 - 10-pin) .......................................................................23 2.4.5 Fieldbus Connector (X6 - 10-pin) .......................................................................23 2.4.6 Serial Connector (X7 - 10-pin)............................................................................24 2.4.7 USB Connector HI TOP (X8)..............................................................................24 2.4.8 ETM Connector (X9)...........................................................................................25 2.4.9 2*RJ45 RT-Ethernet (X50) .................................................................................26 2.4.10 Power Supply +24 V (X100) ...............................................................................26
2.5 LEDs .........................................................................................................................27
3 USING EXTERNAL DEBUGGERS ...........................................................................28
4 ACCESSORIES ........................................................................................................29
4.1 Devices for Host Interface ........................................................................................29 4.1.1 I/O Device at Host Interface (NXHX-IO).............................................................30 4.1.2 SDRAM Device at Host Interface (NXHX-SDR).................................................31 4.1.3 PHY and Serial Dual-Port Memory Device at Host Interface (NXHX-PHY).......32 4.1.4 PHY and SDR Memory Device at Host Interface (NXHX-PHYSDR) .................34 4.1.5 Parallel Dual-Port Memory at Host Interface......................................................35 4.1.6 Using NXHX 6-RE or NXHX 52-RE as Extension Bus at Host Interface...........35 4.1.7 Accessory Cables and Connectors for Host Interface .......................................36
4.2 Fieldbus and Serial Adapters/Interfaces...................................................................37 4.2.1 NXHX-DP ...........................................................................................................38 4.2.2 NXHX-CO...........................................................................................................38
Table of Contents 3/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
4.2.3 NXHX-DN ...........................................................................................................39 4.2.4 NXHX-RS ...........................................................................................................39 4.2.5 NXHX-CC ...........................................................................................................40
4.3 NXAC-Power ............................................................................................................40
4.4 NXAC-JTAG-ETM.....................................................................................................40
5 REFERENCE ............................................................................................................41
5.1 Schematics ...............................................................................................................41
5.2 Bill of Materials .........................................................................................................51 5.2.1 NXHX 51-ETM....................................................................................................51 5.2.2 NXHX-IO.............................................................................................................53 5.2.3 NXHX-SDR.........................................................................................................53 5.2.4 NXHX-PHY.........................................................................................................54 5.2.5 NXHX-PHYSDR .................................................................................................55
6 TECHNICAL DATA ...................................................................................................56
6.1 NXHX 51-ETM ..........................................................................................................56
7 APPENDIX ................................................................................................................57
7.1 Matrix Label ..............................................................................................................57
7.2 List of Figures ...........................................................................................................57
7.3 List of Tables ............................................................................................................58
7.4 Contacts....................................................................................................................60
Introduction 4/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
1 Introduction
1.1 About This Manual
This manual describes the NXHX51-ETM development board.
1.1.1 List of Revisions
Index Date Chapter Revision
1 2012-09-03 All Created
2 2013-03-21 All
2.3.2.1
2.4.1
4.2
Structure of document revised.
Description of boot strap options (S1) revised.
Tables with pin assignments for DPM and SDRAM Modes, Extension Bus Modes, MII Mode added.
Section Fieldbus and Serial Adapters/Interfaces: graphics added.
3 2013-07-08 4.1.7 Section Accessory Cables and Connectors for Host Interface added.
4 2013-07-16 2.3.2.1
4.1
Description of Configuration of Boot Strap Options – Switch (S1) revised.
Section Devices for Host Interface revised (formerly section Host Interfaces).
5 2013-10-28 2.3.2.2
5.1
Description of the Host Mode Configuration Switch (S2) updated for hardware revision 4.
Schematics updated for hardware revision 4.
Table 1: List of Revisions
1.1.2 Conventions in this Manual
# means active low signal.
Notes are marked as follows:
Important: <important note>
Note: <note>
<note, where to find further information>
Positions in Figures
The Positions , , ... or , , ... or , , ... refer to the figure used in that section. If the numbers reference to a section outside the current section then a cross reference to that section and figure is indicated.
Introduction 5/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
1.1.3 Reference to Hardware
Hardware Revision Part Number
NXHX51-ETM 4 7763. 200
Table 2: Reference to Hardware
1.2 Other Relevant Documentation
Besides this device description, the following documents are also relevant for the user of the NXHX 51-ETM development board:
Manual Contents Document Name
NXHX 51-ETM Getting Started Guide
Describes typical use cases of the NXHX 51 ETM Development Board.
NXHX 51-ETM Getting Started GS XX EN.pdf
Migration Guide netX 50 to netX 51/52
Describes the differences between the netX 50 and netX 51/52.
Migration_netX50_to_netX5152_MG03EN.pdf
Programming Reference Guide netX 51/52
Describes all available registers of the netX 51.
netX 51 52 Programming Reference Guide PRG xx EN.pdf
User Manual NXPCA-PCI
Describes the coupling of the parallel dual-port memory with a PC.
User Manual NXPCA-PCI_Rev_2_EN.pdf
Table 3: Additional Documentation
Descriptions and Drawings 6/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2 Descriptions and Drawings
2.1 Description of the NXHX 51-ETM
The NXHX 51-ETM is a development board for the netX 51 controller. It is equipped with an netX 51 and features:
Host interface, usable in different interface modes: 8/16/32 bit parallel dual-port memory, 16 bit TI multiplexed parallel dual-port memory, serial dual-port memory (SPI Slave), MII and PIO
2-port RJ45 Real-Time Ethernet interface
DIP switch to configure boot mode and host interface mode
Power supply and diagnostic via USB interface
MMIO signals and I2C interface
ETM interface for debugging
System status and communication status LEDs
Quad SPI flash for Fast Start-Up feature of PROFINET IO Device
microSD Card slot
3 interfaces for additional Fieldbus and RS-232 modules
HiTOP USB debugging interface
Descriptions and Drawings 7/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.2 Drawings
2.2.1 Block Diagram
Figure 1: NXHX51-ETM Block Diagram
Descriptions and Drawings 8/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.2.2 Printed Circuit Board
Figure 2: NXHX51-ETM Printed Circuit Board
No. in figure
Name Description For details see section Page
X5 Fieldbus interface CH0 Fieldbus Connector (X5 - 10-pin) 23
X6 Fieldbus interface CH1 Fieldbus Connector (X6 - 10-pin) 23
V30 Communication status LED 0
(green / red) LEDs 27
V31 Communication status LED 1
(green / red) LEDs 27
S1 Boot strap options Configuration Boot Strap Options -
Switch (S1) 10
X9 ETM-Interface netX 51 ETM Connector (X9) 25
X7 UART0 interface Serial Connector (X7 - 10-pin) 24
SW30 4 pol. DIL switch as general input MMIO General Input - Switch (S30 13
V15 LED yellow, MMIO27 as general output LEDs 27
V14 LED yellow, MMIO26 as general output LEDs 27
V13 LED yellow, MMIO25 as general output LEDs 27
V12 LED yellow, MMIO24 as general output LEDs 27
X4 microSD Card connector microSD Card Reader (X4) 22
X8 USB connector Typ B, HiTOP USB Connector HI TOP (X8) 24
X100 24 V power connector for board Power Supply +24 V (X100) 26
Descriptions and Drawings 9/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
No. in figure
Name Description For details see section Page
X50 2 x RJ45 connector 2*RJ45 RT-Ethernet 26
- Matrix label Matrix Label 57
V1 System status LED (yellow / green) LEDs 27
T1 Power on reset Reset 10
X2 Mini-B USB connector Mini-B USB Connector (X2, 5-pin) 22
X3 Host interface Host Interface (X3) 16
S2 Host interface mode Configuration Host Mode - Switch
(S2) 13
X10 Host interface configuration jumper Host Interface Configuration
Jumper (X10) 14
Table 4: List of Positions on Printed Circuit Board
Descriptions and Drawings 10/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.3 Operating Elements
2.3.1 Push Buttons
2.3.1.1 Reset (T1)
T1 Function
When button is pushed, system initiates power-on reset.
Table 5: Push Button T1
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.3.2 Switches
2.3.2.1 Configuration Boot Strap Options - Switch (S1)
Boot strap options.
S1 SW Signal Connect to Functions
1 RDY# with 390 Ω to GND
2 RUN# with 390 Ω to GND
Boot mode
3 SPI_MOSI with 1.5 kΩ to +3.3 V
4 SPI_CLK with 1.5 kΩ to +3.3 V
5 SPI_MISO with 1.5 kΩ to +3.3 V
Host interface mode
6 RUN# SDA of Security
Memory Access to Security Memory
ON = Enable OFF = Disable
Note that the Security Memory will only be accessed if SW 1 and SW 2 (RDY# and RUN#) are set to OFF !
Table 6: Boot Strap Options Configuration Switch S1
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
The boot mode and the host interface mode are evaluated by the ROM loader during boot.
Descriptions and Drawings 11/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Boot Mode
If S1.6 is ON and S1.1 and S1.2 are both set to OFF, the boot mode is read from the security memory. The boot mode defined in the security memory is the FLASH boot mode (see No. 4 in the table below).
If S1.6 is set to OFF or one or both of the S1.1 and S1.2 switches are set to ON, the security memory will not be accessed. In this case, the boot mode is determined by S1.1 and S1.2 as described in the following table:
No. Selection S1.1 S1.2 Boot Sequence
1 FLASH/Ethernet boot mode off off 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found.
2. Boot from SD card, if bootloader code is found.
3. Boot from Ethernet CH_A with DHCP and TFTP, if bootloader code is found.
2 Serial – UART0 and USB boot mode on off Boot from serial interface: UART0 or USB.
3 FLASH/Dual-Port Memory boot mode
off on 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found.
2. Boot from SD card, if bootloader code is found.
3. Boot from dual-port memory. Select the host interface mode with S1.3, S1.4 and S1.5 (as described in Table 8 on page 12).
4 FLASH boot mode on on 1. Boot from serial FLASH using Quad SPI and XIP (CS0), if bootloader code is found.
2. Boot from SD card, if bootloader code is found.
Table 7: Boot Mode Settings
Note: If you use boot mode 1, 2 or 4, set host interface mode to “Ignore host interface during boot” (see following table).
Descriptions and Drawings 12/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Host Interface Mode
The Host Interface Mode is selected by the signals SPI_MOSI (S1.3), SPI_CLK (S1.4) and SPI_MISO (S1.5). The ROM code reads these signals and uses them to initialize the Host Interface during the boot process. This means that depending on the selected mode, signals are driven actively from netX or from the host.
To select the right Host Interface Mode consider the following:
1. specify the device that is physically connected to the host interface of the netX and
2. specify which device netX has to use as source or destination device during boot.
S1.3 S1.4 S1.5 Description Usable with boot mode No.
Note
netX boots from the connected memory
off off off Ignore host interface during boot Use this setting, if netX should not boot from the host interface.
1, 2, 4 -
off off on SDRAM 16 bit data / 4 MByte Use this setting, when using the module NXHX-PHYSDR. SDRAM is used as destination device.
1, 3, 4
off on off SRAM 16 bit data / 4 MB Use this setting, if you have connected parallel Flash (CS0) at the host interface and netX has to boot from it. The parallel Flash is used as source device. - or - Use this setting, if you have connected static RAM (CS0, 1, 2 or 3) at the host interface. The static RAM is used as destination device.
1, 3, 4
on off on SDRAM 32 bit data / 4 MB Use this setting, when using the module NXHX-SDR. SDRAM is used as destination device.
1, 3, 4
Using this mode requires additionally that the destination device in the boot block of the bootable image is set properly.
Host CPU supported: Host CPU boots netX via Dual-Port Memory
off on on Serial dual-port memory (SPM) mode Use this setting, if you have connected a serial dual-port memory at the host interface and netX has to boot from it. The serial dual-port memory is used as source device.
3
on off off Parallel dual-port memory (DPM) 8 bit data / 2 KB Use this setting, if you have connected a parallel dual-port memory at the host interface and netX has to boot from it. The parallel dual-port memory is used as source device.
3
on on on Parallel dual-port memory (DPM) 8 bit data / 64 Kbyte Use this setting, if you have connected a parallel dual-port memory at the host interface and netX has to boot from it. The parallel dual-port memory is used as source device.
3
The dual-port memory is used for booting netX. The netX waits for the Host CPU, which has to transfer the bootable image (e. g. Second Stage Bootloader). Therefore the Host CPU has to use the mailboxes of netX for transferring the boot code.
Reserved
on on off Do not use this setting! - -
Table 8: Host Interface Mode at X3 (Settings)
Descriptions and Drawings 13/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.3.2.2 Configuration Host Mode - Switch (S2)
The host mode is evaluated by the Second Stage Bootloader during boot. The Second Stage Bootloader uses this setting to initialize the selected Dual-Port Memory Mode in the host interface.
Note: The S2 Switch was altered in the hardware revision 4 of the NXHX board. Please note the different settings relating to hardware revisions ≤ 3 and 4 shown in the tables below.
Hardware Revisions 1 – 3:
S2 1 2 Function
ON ON
OFF
Serial Dual-Port Memory Mode (SPI Slave Mode 3)
OFF ON Parallel Dual-Port Memory Mode 16 bit mode
OFF OFF Parallel Dual-Port Memory Mode 8 bit mode
Table 9: Configuration - Switch S2, Host Mode (valid for Hardware Revisions 1 – 3)
Since Hardware Revision 4:
S2 1 2 Function
ON ON
OFF
Serial Dual-Port Memory Mode (SPI Slave Mode 3)
OFF ON Parallel Dual-Port Memory Mode 8 bit mode
OFF OFF Parallel Dual-Port Memory Mode 16 bit mode
Table 10: Configuration - Switch S2, Host Mode (valid since Hardware Revision 4)
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.3.2.3 MMIO General Input - Switch (S30)
These four signals can be used by the user software.
S30 SW Signal Connected to Description
1 MMIO36 with 1.5 kΩ to +3.3 V
2 MMIO37 with 1.5 kΩ to +3.3 V
3 MMIO38 with 1.5 kΩ to +3.3 V
4 MMIO39 with 1.5 kΩ to +3.3 V
ON = Pull-up connected
OFF = No Pull-up connected
Table 11: DIL-Switch S30
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 14/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.3.3 Host Interface Configuration Jumper (X10)
These jumpers configure a few signals at the host interface according to the connected extension modules and DPM modes.
X10 Pin Description
1 MMIO02 (netX 51)
2 MMIO05 (netX 51)
3 DPM_SIRQ# (X3 pin 4)
4 DPM_DIRQ# (X3 pin 11)
5 DPM_SIRQ# (netX 51)
6 DPM_DIRQ#/PI047 (netX 51)
7 RSTIN# (X3 pin 7)
8 DPM_A16 (netx 51)
9 RSTIN# (X3 pin 7)
10 RSTIN# (netx 51)
Table 12: Pin Assignment X10
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Use the following setting, if dual-port memory is connected:
X10 DPM Description
DPM_DIRQ# signal is connected to X3 pin 11
DPM_SIRQ# signal is connected to X3 pin 4
RSTIN# signal is connected to X3 pin 7
Table 13: X10 – Setting for Dual-Port Memory at Host Interface X3
Use the following setting, if Extension bus is connected:
X10 EXT Description
If NXHX 6-RE or NXHX 52-RE Board is connected to the host interface and used as extension bus!
MMIO02 signal is connected to X3 pin 4 (configure MMIO02 as interrupt input for DPM_SIRQ#)
MMIO05 signal is connected to X3 pin 11 (configure MMIO05 as interrupt input for DPM_DIRQ#)
DPM_A16 signal is connected to X3 pin 7 (256 KB address range at HIF)
Table 14: X10 - Setting for Extension Bus at Host Interface X3
Descriptions and Drawings 15/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Use the following setting, if the NXHX-IO Board is connected:
X10 DPM Description
DPM_DIRQ#/PIO 47 is connected to X3 pin 11
Table 15: X10 - Setting for NXHX-IO Board at Host Interface X3
Use the following setting, if the NXHX-SDR Board is connected:
X10 SDRAM Description
SDRAM_CLK is connected to X3 pin 4
SDRAM RAS# is connected to X3 pin 7
Table 16: X10 - Setting for NXHX-SDR Board at Host Interface X3
Use the following setting, if the NXHX-PHY Board is connected:
X10 PHY Description
DPM_DIRQ# is connected to X3 pin 11
DPM_SIRQ# is connected to X3 pin 4
Table 17: X10 - Setting for NXHX-PHY Board at Host Interface X3
Use the following setting, if the NXHX-PHYSDR Board is connected:
X10 PHYSDR Description
SDRAM_CLK is connected to X3 pin 4
MII_RXD0 to X3 pin 11
SDRAM RAS# is connected to X3 pin 7
Table 18: X10 - Setting for NXHX-PHYSDR Board at Host Interface X3
Descriptions and Drawings 16/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4 Interfaces
2.4.1 Host Interface (X3)
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.4.1.1 DPM and SDRAM Modes
Host Interface Modes X3 Pin Signal
PIO SDRAM 32 Bit
DPM 32 Bit
DPM 8/16 Bit
DPM 16 Bit TI Multiplex
1 +3V3
2 GND
3 PIO59 SDRAM_CASn DPM_A17 DPM_A17
4 DPM_SIRQ# SDRAM_CLK
5 GND
6 RSTOUTn
7 RSTIN# or PIO58 SDRAM_RASn DPM_A16
8 PIO85 SDRAM_D15 DPM_D31
9 PIO40 SDRAM_D10 DPM_D18
10 PIO36 SDRAM_D8 DPM_D16
11 MMIO05 or PIO47 DPM_DIRQ DPM_DIRQ
12 PIO46 SDRAM_CKE DPM_RDY DPM_RDY DPM_RDY
13 GND
14 PIO52 SDRAM_DQM2n DPM_RDn DPM_RDn DPM_RDn
15 PIO44 SDRAM_DQM3n DPM_BE3n
16 PIO45 SDRAM_WEn DPM_WRn DPM_WRn DPM_WRn
17 WDG_ACT
SDRAM_D11 DPM_D19
18 PIO35 SDRAM_D9 DPM_D17
19 PIO43 SDRAM_DQM1n DPM_BE1n DPM_BHEn DPM_BE1n
20 GND
21 PIO84 SDRAM_D14 DPM_D30
22 PIO79 DPM_D28 DPM_D28
23 PIO80 DPM_D29 DPM_D29
24 PIO51 SDRAM_CSn DPM_CSn DPM_CSn DPM_CSn
25 GND
26 PIO72 SDRAM_D13 DPM_D27
27 PIO71 SDRAM_D12 DPM_D26
28 PIO68 SDRAM_D25 DPM_D25
29 PIO67 SDRAM_D24 DPM_D24
30 PIO63 SDRAM_D23 DPM_D23
31 PIO62 SDRAM_D22 DPM_D22
32 PIO59 SDRAM_D21 DPM_D21
33 GND
34 PIO55 SDRAM_BA1 DPM_A15 DPM_A15
35 PIO54 SDRAM_BA0 DPM_A14 DPM_A14
36 PIO48 SDRAM_DQM0n DPM_A13 DPM_A13
37 PIO49 SDRAM_A12 DPM_A12 DPM_A12
Table 19: Pin Assignment X3 Host Interface DPM and SDRAM Modes (Part 1)
Descriptions and Drawings 17/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Host Interface Modes X1 Pin Signal
PIO SDRAM 32 Bit
DPM 32 Bit
DPM 8/16 Bit
DPM 16 Bit TI Multiplex
38 PIO50 SDRAM_A11 DPM_A11 DPM_A11
39 PIO53 SDRAM_A10 DPM_A10 DPM_A10
40 PIO56 SDRAM_A9 DPM_A9 DPM_A9
41 PIO57 SDRAM_A8 DPM_A8 DPM_A8
42 PIO60 SDRAM_A7 DPM_A7 DPM_A7
43 PIO61 SDRAM_A6 DPM_A6 DPM_A6
44 PIO64 SDRAM_A5 DPM_A5 DPM_A5
45 PIO65 SDRAM_A4 DPM_A4 DPM_A4
46 PIO66 SDRAM_A3 DPM_A3 DPM_A3
47 PIO69 SDRAM_A2 DPM_A2 DPM_A2
48 PIO70 SDRAM_A1 DPM_BE2n DPM_A1 DPM_ADV
49 PIO73 SDRAM_A0 DPM_BE0n DPM_A0 DPM_BE0n
50 GND
51 PIO41 SDRAM_D31 DPM_D15 DPM_D15 DPM_AD15
52 PIO42 SDRAM_D30 DPM_D14 DPM_D14 DPM_AD14
53 PIO37 SDRAM_D27 DPM_D13 DPM_D13 DPM_AD13
54 PIO38 SDRAM_D26 DPM_D12 DPM_D12 DPM_AD12
55 PIO39 SDRAM_D19 DPM_D11 DPM_D11 DPM_AD11
56 PIO33 SDRAM_D18 DPM_D10 DPM_D10 DPM_AD10
57 PIO34 SDRAM_D17 DPM_D9 DPM_D9 DPM_AD9
58 PIO32 SDRAM_D16 DPM_D8 DPM_D8 DPM_AD8
59 PIO74 SDRAM_D7 DPM_D7 DPM_D7 DPM_AD7
60 PIO75 SDRAM_D6 DPM_D6 DPM_D6 DPM_AD6
61 PIO76 SDRAM_D5 DPM_D5 DPM_D5 DPM_AD5
62 PIO77 SDRAM_D4 DPM_D4 DPM_D4 DPM_AD4
63 PIO78 SDRAM_D3 DPM_D3 DPM_D3 DPM_AD3
64 PIO81 SDRAM_D2 DPM_D2 DPM_D2 DPM_AD2
65 PIO82 SDRAM_D1 DPM_D1 DPM_D1 DPM_AD1
66 PIO83 SDRAM_D0 DPM_D0 DPM_D0 DPM_AD0
67 +3V3
68 PIO58 SDRAM_D20 DPM_D20
Table 20: Pin Assignment X3 Host Interface DPM and SDRAM Modes (Part 2)
Descriptions and Drawings 18/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.1.2 Extension Bus Modes
Host Interface Modes
Extension Bus 8/16 Bit Mode
X1 Pin Signal
Extension Bus 8/16/32 Bit Mode
SPM Extension
MMIO Extension
1 +3V3
2 GND
3 EXT_A17 EXT_A23
4 DPM_SIRQ#
5 GND
6 RSTOUTn
7 RSTIN# or EXT_A16 EXT_A22
8 EXT_D15
9 EXT_D10
10 EXT_D8
11 MMIO05 or EXT_CS1n EXT_INTn
12 EXT_BUSYn
13 GND
14 EXT_RDn
15 EXT_BE3n EXT_CS3n EXT_A24
16 EXT_WRn
17 EXT_D11
18 EXT_D9
19 EXT_BE1n EXT_BHEn
20 GND
21 EXT_D14
22 EXT_D28 EXT_CS2n
23 EXT_D29 EXT_CS1n
24 EXT_CS0n EXT_CS0n
25 GND
26 EXT_D13
27 EXT_D12
28 EXT_D25 EXT_A21
29 EXT_D24 EXT_A20
30 EXT_D23 EXT_A19
31 EXT_D22 EXT_A18
32 EXT_D21 EXT_A17
33 GND
34 EXT_A15
35 EXT_A14
36 EXT_A13
37 EXT_A12
Table 21: Pin Assignment X3 Host Interface Extension Bus Modes (Part 1)
Descriptions and Drawings 19/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Host Interface Modes
Extension Bus 8/16 Bit Mode
X1 Pin Signal
Extension Bus 8/16/32 Bit Mode
SPM Extension
MMIO Extension
38 EXT_A11
39 EXT_A10
40 EXT_A9
41 EXT_A8
42 EXT_A7
43 EXT_A6
44 EXT_A5
45 EXT_A4
46 EXT_A3
47 EXT_A2
48 EXT_A1 EXT_BE2n
EXT_A1
49 EXT_A0 EXT_BE0n
50 GND
51 EXT_D31 extendible by SPM or MMIO
SPM_SIO3 MMIO47
52 EXT_D30 extendible by SPM or MMIO
SPM_SIO2 MMIO46
53 EXT_D27 extendible by SPM or MMIO
SPM_SIRQ MMIO45
54 EXT_D26 extendible by SPM or MMIO
SPM_DIRQ MMIO44
55 EXT_D19 extendible by SPM or MMIO
SPM_CLK MMIO43
56 EXT_D18 extendible by SPM or MMIO
SPM_CSn MMIO42
57 EXT_D17 extendible by SPM or MMIO
SPM_MOSI MMIO41
58 EXT_D16 extendible by SPM or MMIO
SPM_MISO MMIO40
59 EXT_D7
60 EXT_D6
61 EXT_D5
62 EXT_D4
63 EXT_D3
64 EXT_D2
65 EXT_D1
66 EXT_D0
67 +3V3
68 EXT_D20 EXT_A16
Table 22: Pin Assignment X3 Host Interface Extension Bus Modes (Part 2)
Descriptions and Drawings 20/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.1.3 MII Mode
Host Interface Modes
MII Mode, extendible
X1 Pin Signal
SPM Extension
MMIO Extension
1 +3V3
2 GND
3
4 DPM_SIRQ#
5 GND
6 RSTOUTn
7 RSTIN#
8
9
10
11 MMIO05
12 MII_RXCLK
13 GND
14
15
16
17
18
19 MII_RXER
20 GND
21
22
23
24
25 GND
26
27
28
29
30
31
32
33 GND
34
35
36 MII_TXDCLK
37 MII_TXDEN
Table 23: Pin Assignment X3 Host Interface MII Mode (Part 1)
Descriptions and Drawings 21/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
Host Interface Modes
MII Mode, extendible
X1 Pin Signal
SPM Extension
MMIO Extension
38 MII_TXD3
39 MII_TXD2
40 MII_TXD1
41 MII_TXD0
42 MII_RXDV
43 MII_RXD3
44 MII_RXD2
45 MII_RXD1
46 MII_RXD0
47 MII_CRS
48 MII_COL
49 MII_TXER
50 GND
51 MII_MDC (MMIO47)
MMIO47
52 MII_MDIO (MMIO46)
MMIO46
53 extendible by SPM or MMIO
SPM_SIRQ MMIO45
54 extendible by SPM or MMIO
SPM_DIRQ MMIO44
55 extendible by SPM or MMIO
SPM_CLK MMIO43
56 extendible by SPM or MMIO
SPM_CSn MMIO42
57 extendible by SPM or MMIO
SPM_MOSI MMIO41
58 extendible by SPM or MMIO
SPM_MISO MMIO40
59
60
61
62
63
64
65
66
67 +3V3
68
Table 24: Pin Assignment X3 Host Interface MII Mode (Part 2)
Descriptions and Drawings 22/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.2 Mini-B USB Connector (X2, 5-pin)
Diagnostic interface for the netX 51.
USB Socket Pin Signal Description
1 USB_EXT Power supply USB Bus (+5 V, from externally)
2 D- Data -
3 D+ Data +
4 ID
5 GND Ground
Table 25: Pin Assignment Mini-B USB Connector (5-pin)
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.4.3 microSD Card Reader (X4)
X4 Pin netX51 Signal Description
1 -
2 SPI_CS1#
3 SPI_MOSI
4 +3V3
5 SPI_CLK
6 GND
7 SPI_MISO
8 -
9 -
10 PE
11 PE
12 -
13 COM
14 CD
Use only micro SD cards, no SDHC and no SDXC cards.
Required format: FAT Size: max. 2 GByte File names: 8.3 file format convention
Table 26: Pin Assignment X4 SD / MMC Card Reader
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 23/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.4 Fieldbus Connector (X5 - 10-pin)
Plug connector for additional fieldbus interface adapter, see also section Fieldbus and Serial Adapters/Interfaces on page 37.
X5 Pin netX51 Signal Description
1 MMIO01 XM0_Tx
2 MMIO00 XM0_Rx
3 MMIO03 XM0_IO0
4 MMIO02 XM0_IO1
5 GND
6 +3V3
7 MMIO28 PIO0 / V30 green
8 MMIO29 PIO1 / V30 red
9 RSTOUT#
10 - -
Table 27: Pin Assignment X5
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.4.5 Fieldbus Connector (X6 - 10-pin)
Plug connector for additional fieldbus interface adapter, see also section Fieldbus and Serial Adapters/Interfaces on page 37.
X6 Pin netX51 Signal Description
1 MMIO04 XM1_Tx
2 MMIO06 XM1_Rx
3 MMIO07 XM1_IO0
4 MMIO05 XM1_IO1
5 GND
6 +3V3
7 MMIO30 PIO0 / V31 green
8 MMIO31 PIO1 / V31 red
9 RSTOUT#
10
Table 28: Pin Assignment X6
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 24/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.6 Serial Connector (X7 - 10-pin)
Plug connector for additional serial NXHX-RS adapter, see also section Fieldbus and Serial Adapters/Interfaces on page 37.
X7 Pin netX51 Signal Description
1 MMIO35 TxD0
2 MMIO34 RxD0, 10kΩ pull up
3 MMIO33 RTS0
4 MMIO32 CTS0
5 GND
6 +3V3
7 MMIO36 S30.1
8 MMIO37 S30.2
9 MMIO24 V12 yellow
10 MMIO25 V13 yellow
Table 29: Pin Assignment X7
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.4.7 USB Connector HI TOP (X8)
Debug interface to netX 51, USB plug connector Type B.
X8 Pin Signal
1 U USB
2 USBDM
3 USBDP
4 GND
Table 30: Pin Assignment X8 USB Type B
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 25/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.8 ETM Connector (X9)
X9 Pin Signal Description
1 -
2 -
3 -
4 -
5 GND Ground
6 ETM_TCLK
7 ETM_DREQ
8 ETM_DACK
9 POR#
10 -
11 JT_TDO
12 +3V3
13 -
14 +3V3
15 JT_TCK
16 ETM_TPKT7
17 JT_TMS
18 ETM_TPKT6
19 JT_TDI
20 ETM_TPKT5
21 JT_TRSTN
22 ETM_TPKT4
23 ETM_TPKT15
24 ETM_TPKT3
25 ETM_TPKT14
26 ETM_TPKT2
27 ETM_TPKT13
28 ETM_TPKT1
29 ETM_TPKT12
30 ETM_TPKT0
31 ETM_TPKT11
32 ETM_TSYNC
33 ETM_TPKT10
34 ETM_PSTAT2
35 ETM_TPKT9
36 ETM_PSTAT1
37 ETM_TPKT8
38 ETM_PSTAT0
39 GND Ground
40 GND Ground
41 GND Ground
42 GND Ground
MICTOR-Connector 38pol.SMD
43 GND Ground
Table 31: Pin Assignment X9 ETM Connector
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 26/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.4.9 2*RJ45 RT-Ethernet (X50)
Ethernet on RJ45 pin assignment
Ethernet Pin Signal Description
1 TX+ Transmit data positive
2 TX– Transmit data negative
3 RX+ Receive data positive
4 Term 1
5 Term 1
Connected and terminated to PE via RC combination*
6 RX– Receive data negative
7 Term 2
8 Term 2
Connected and terminated to PE via RC combination* RJ45 socket,
female * Bob Smith Termination
Table 32: Ethernet RJ45 pin assignment
PE is to be contacted directly at the metal casing!
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
2.4.10 Power Supply +24 V (X100)
The NXHX51-ETM development board has to be supplied by DC. VIN is from 18 V to 30 V. The typical supply voltage is 24 V. Power consumption is approx. 2.6 W.
Pin Description
1 GND Ground
2 VIN 18 - 30 V DC Table 33: Pin Assignment X100 Power Supply
Position in Figure 2: NXHX51-ETM Printed Circuit Board on page 8.
Descriptions and Drawings 27/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
2.5 LEDs
The NXHX 51-ETM is equipped with the following LEDs:
No. in device drawing
LED naming in device drawing
LED function Color Signal name
(green) RUN#
V1
(yellow / green)
SYS
System Status (yellow) RDY#
COM0 (green) MMIO28
V30
(red / green) Communication
status (red) MMIO29
COM1 (green) MMIO30
V31
(red / green) Communication
status (red) MMIO31
V12 (yellow) General output (yellow) MMIO24
V13 (yellow) General output (yellow) MMIO25
V14 (yellow) General output (yellow) MMIO26
V15 (yellow) General output (yellow) MMIO27
Table 34: LEDs on the NXHX 51-ETM
The meaning of the COM LEDs (V30 and V31) depends on the communication protocol used on the NXHX 51-ETM board.
LED SYS (V1)
The subsequent table describes the meaning of the system LED.
LED Color State Meaning
Duo LED yellow/green
(yellow) Static Bootloader netX (= romloader) is waiting for second stage bootloader
(green/ yellow)
Blinking green/ yellow
Second stage bootloader is waiting for firmware
(green) On Operating System running
SYS
(off) Off Power supply for the device is missing or hardware defect.
Table 35: System Status LED
Position in Figure 2: NXHX51-ETM Printed Circuit Board page 8.
Using external Debuggers 28/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
3 Using external Debuggers Instead of using the onboard debugger of the NXHX 51-ETM along with the HiTOP software, an external debugger with either ETM or JTAG interface can be connected to the NXHX 51-ETM. If an ETM debugger is used, simply connect the debugger to the ETM connector (X9) of the NXHX 51-ETM. If a JTAG debugger is used, connect the ETM-to-JTAG adapter (NXAC-JTAG-ETM) that came with your NXHX 51-ETM board to the ETM connector and then connect your JTAG debugger to the 20 pin shrouded header as shown below.
Only one debugger, either the onboard unit or an external debugger may be active at a time, otherwise the debugger signals may drive against each other, which may result in damage of the onboard debugger and / or the external debugger!
When using an external debugger, the USB port for the Development PC (X8) must not be connected! Further, any adapter board (e.g. RS-232) must be removed from X7.
When using the onboard debugger, an external debugger must not be connected to the ETM connector (X9)!
Figure 3: NXHX 51-ETM with JTAG-ETM Adapter
Hardware Damage!
Accessories 29/60
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4 Accessories
4.1 Devices for Host Interface
The following devices can be mounted on X3:
NXHX-IO
NXHX-SDR
NXHX-PHY
NXHX-PHYSDR
NXPCA-PCI
NXHX 6-RE
NXHX 52-RE
Figure 4: NXHX 51-ETM with Possible Devices for the Host Interface
Accessories 30/60
NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
4.1.1 I/O Device at Host Interface (NXHX-IO)
NXHX-IO offers 16 digital inputs signals (DIL switch) and 16 digital outputs signals (LED) and can be connected at the host interface.
NXHX-IO Value
Input 2*8 DIL Switch
Output 16 LED
Host Interface Connector 68 pin, female (at bottom side)
Interface Not isolated
Dimensions 65 x 33 x 20 mm
Order Number 7703.010
Figure 5: NXHX-IO Printed Circuit Board
X1 Host Interface
Pin Signal Pin Signal
1 +3.3 V 35 -
2 GND 36 -
3 - 37 -
4 - 38 -
5 GND 39 -
6 - 40 -
7 - 41 -
8 - 42 -
9 S2.8 (PIO40) 43 -
10 S1.4 (PIO36) 44 LED 0 (PIO64)
11 S2.1 (PIO47) 45 LED 1 (PIO65)
12 S2.2 (PIO46) 46 LED 2 (PIO66)
13 GND 47 LED 5 (PIO69)
14 - 48 LED 6 (PIO70)
15 S2.4 (PIO44) 49 LED 9 (PIO73)
16 S2.3 (PIO45) 50 GND
17 - 51 S2.9 (PIO41)
18 S1.5 (PIO35) 52 S2.6 (PIO42)
19 S2.5 (PIO43) 53 S1.3 (PIO37)
20 GND 54 S1.2 (PIO38)
21 - 55 S1.1 (PIO39)
22 LED 15 (PIO79)
56 S1.7 (PIO33)
23 - 57 S1.6 (PIO34)
24 - 58 S1.0 (PIO32)
25 GND 59 LED10 (PIO74)
26 LED 8 (PIO72) 60 LED 11 (PIO75)
27 LED 7 (PIO71) 61 LED 12 (PIO76)
28 LED 4 (PIO68) 62 LED 13 (PIO77)
29 LED 3 (PIO67) 63 LED 14 (PIO78)
30 - 64 -
31 - 65 -
32 - 66 -
33 GND 67 +3.3 V
34 - 68 -
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXHX-IO at the host interface see: Table 15: X10 - Setting for NXHX-IO Board at Host Interface X3 on page 15.
Accessories 31/60
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4.1.2 SDRAM Device at Host Interface (NXHX-SDR)
NXHX-SDR is a 32-bit SDRAM with 64 MBit and can be connected at the host interface.
NXHX-SDR Value
SDRAM 64 MBit 3.3V
Data width 32 bit
Host Interface Connector 68 pin, female (at bottom side)
Interface Not isolated
Dimensions 65 x 20 x 16 mm
Order number 7703.020
Figure 6: NXHX-SDR Printed Circuit Board
X1 Host Interface
Pin Signal Pin Signal
1 +3.3 V 35 SD_BA0
2 GND 36 SD_DQM0
3 SD_CAS# 37 SD_A12
4 SD_CLK 38 SD_A11
5 GND 39 SD_A10
6 - 40 SD_A9
7 SD_RAS# 41 SD_A8
8 SD_D15 42 SD_A7
9 SD_D10 43 SD_A6
10 SD_D8 44 SD_A5
11 - 45 SD_A4
12 SD_CKE 46 SD_A3
13 GND 47 SD_A2
14 SD_DQM2# 48 SD_A1
15 SD_DQM3# 49 SD_A0
16 SD_WE# 50 GND
17 SD_D11 51 SD_D31
18 SD_D9 52 SD_D30
19 SD_DQM1# 53 SD_D27
20 GND 54 SD_D26
21 SD_D14 55 SD_D19
22 SD_D28 56 SD_D18
23 SD_D29 57 SD_D17
24 SD_CS# 58 SD_D16
25 GND 59 SD_D7
26 SD_D13 60 SD_D6
27 SD_D12 61 SD_D5
28 SD_D25 62 SD_D4
29 SD_D24 63 SD_D3
30 SD_D23 64 SD_D2
31 SD_D22 65 SD_D1
32 SD_D21 66 SD_D0
33 GND 67 +3.3 V
34 SD_BA1 68 -
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXHX-SDR at the host interface see Table 16: X10 - Setting for NXHX-SDR Board at Host Interface X3 on page 15.
Accessories 32/60
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4.1.3 PHY and Serial Dual-Port Memory Device at Host Interface (NXHX-PHY)
NXHX-PHY is PHY interface as well as a Serial Dual-Port Memory Interface and can be connected at the host interface.
NXHX-PHY Value
Ethernet connector 1 * RJ 45
Host Interface Connector
68 pin, female (at bottom side)
Interface Not isolated
Dimensions 65 x 30 x 23 mm
Order Number 7703.030
Figure 7: NXHX-PHY Printed Circuit Board
No Name Description
X2 1 x RJ45 Connector
Matrix label
X1 Host interface, soldered side
S1
AOI manufacturing label
X3 SPM Host interface
X1 Host Interface
Pin Signal Pin Signal
1 +3.3 V 35 -
2 GND 36 MII_TXCLK
3 CLKOUT 37 MII_TXDEN
4 DPM_SIRQ# 38 MIITXD3
5 GND 39 MII_TXD2
6 RSTOUT# 40 MII_TXD1
7 - 41 MII_TXD0
8 - 42 MII_RXDV
9 - 43 MII_RXD3
10 - 44 MII_RXD2
11 DPM_DIRQ# 45 MII_RXD1
12 MII_RXCLK 46 MII_RXD0
13 GND 47 MII_CRS
14 MII_MDC 48 MII_COL
15 - 49 MII_TXER
16 MII_DIO 50 GND
17 - 51 -
18 - 52 -
19 MII_RXER 53 SPM_SIRQ#
20 GND 54 SPM_DIRQ#
21 - 55 SPM_CLK
22 - 56 SPM_CS#
23 - 57 SPM_MOSI
24 - 58 SPM_MISO
25 GND 59 -
26 - 60 -
27 - 61 -
28 - 62 -
29 - 63 -
30 - 64 -
31 - 65 -
32 - 66 -
33 GND 67 +3.3 V
34 - 68 -
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NXHX 51-ETM | Development Board DOC120606HW05EN | Revision 5 | English | 2013-10 | Released | Public © Hilscher, 2012 - 2013
X3 Serial Dual-Port Memory Interface
Pin Signal Pin Signal
1 SPM_SIRQ# 7 SPM_CS#
2 +3.3 V 8 GND
3 SPM_DIRQ# 9 SPM_MOSI
4 GND 10 GND
5 SPM_CLK 11 SPM_MISO
6 GND 12 GND
The settings of the S1 host mode switch (see position in the figure above) on the NXHX-PHY module are read by the Second Stage Bootloader during boot:
SW Setting Function
ON SPM mode S1.1
OFF DPM mode
ON 16 bit DPM mode S1.2
OFF 8 bit DPM mode
Note that a switch for configuring the host mode is also implemented on the NXHX 51-ETM development board, i. e. the S2 switch, which is described in the Configuration Host Mode - Switch (S2) section on page 13. The settings of the S1 switch on the NXHX-PHY module and the settings of the S2 switch on the development board can be combined according to the following table:
S1 Switch on NXHX-PHY S2 Switch on NXHX 51-ETM
SW Setting SW Setting
Description
OFF OFF DPM mode Do not use this setting, because the NXHX-PHY can not use the DPM on the NXHX 51-ETM board.
ON OFF
OFF ON SPM mode
S1.1
ON
S2.1
ON Do not use this setting, because two pull-down resistors will be used at the same time, leading to malfunction.
OFF OFF 8 bit DPM mode (not relevant, because the NXHX-PHY can not use the DPM on the NXHX 51-ETM board)
ON OFF
OFF ON
16 bit DPM mode (not relevant, because the NXHX-PHY can not use the DPM on the NXHX 51-ETM board)
S1.2
ON
S2.2
ON Do not use this combination, because two pull-down resistors will be used at the same time, leading to malfunction.
Table 36: Combination of Host Mode Switches
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXHX-PHY at the host interface see Table 17: X10 - Setting for NXHX-PHY Board at Host Interface X3 on page 15.
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4.1.4 PHY and SDR Memory Device at Host Interface (NXHX-PHYSDR)
NXHX-PHYSDR is a 16-bit SDRAM with 64 MBit as well as a PHY interface and can be connected at the host interface.
NXHX-PHYSDR Value
Ethernet Connector 1 * RJ 45
SDRAM 64 MBit 3.3V
Data width 16 bit
Host Interface Connector
68 pin, female (at bottom side)
Interface Not isolated
Dimensions 65 x 30 x 24 mm
Order Number 7703.040
Figure 8: NXHX-PHYSDR Printed Circuit Board
No Name Description
X2 1 x RJ45 Connector.
Matrix label.
X1 Host interface, soldered
side.
AOI manufacturing label.
X1 Host Interface
Pin Signal Pin Signal
1 +3.3 V 35 SD_BA0
2 GND 36 SD_DQM0#
3 SD_CAS# 37 SD_A12
4 SD_CLK 38 SD_A11
5 GND 39 SD_A10
6 RST_OUT 40 SD_A9
7 SD_RAS 41 SD_A8
8 SD_D15 42 SD_A7
9 SD_D10 43 SD_A6
10 SD_D8 44 SD_A5
11 MII_RXD0 45 SD_A4
12 SD_CKE 46 SD_A3
13 GND 47 SD_A2
14 IRQ# 48 SD_A1
15 MII_RXDV# 49 SD_A0
16 SD_WE# 50 GND
17 SD_D11 51 MII_RXD3
18 SD_D9 52 MII_RXD2
19 SD_DQM1# 53 MII_RXD1
20 GND 54 MII_MDC
21 SD_D14 55 MII_DIO
22 MII_RXCLK 56 MII_TXER
23 MII_RXER 57 MII_CRS
24 SD_CS# 58 MII_COL
25 GND 59 SD_D7
26 SD_D13 60 SD_D6
27 SD_D12 61 SD_D5
28 MII_TXDEN 62 SD_D4
29 MII_TXD3 63 SD_D3
30 MII_TXD2 64 SD_D2
31 MII_TXD1 65 SD_D1
32 MII_TXD0 66 SD_D0
33 GND 67 +3.3 V
34 SD_BA1 68 MII_TXCLK
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXHX-PHY at the host interface see Table 18: X10 - Setting for NXHX-PHYSDR Board at Host Interface X3 on page 15.
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4.1.5 Parallel Dual-Port Memory at Host Interface
The NXHX 51-ETM can be accessed from the PC via the NXPCA-PCI Card (order number: 7902.100), using the host interface as parallel dual-port memory.
Figure 9: NXHX 51-ETM Connected to NXPCA-PCI Board
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXPCA-PCI at the host interface see Table 13: X10 – Setting for Dual-Port Memory at Host Interface X3 on page 14.
For further information on the NXPCA-PCI board, please refer to the User Manual NXPCA-PCI.
4.1.6 Using NXHX 6-RE or NXHX 52-RE as Extension Bus at Host Interface
Figure 10: NXHX 51-ETM Connected to NXHX 6-RE Board
For the setting of the X10 jumper on the NXHX 51-ETM required for operating the NXPHX 6-RE or the NXHX 52-RE at the host interface see Table 14: X10 - Setting for Extension Bus at Host Interface X3 on page 14.
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4.1.7 Accessory Cables and Connectors for Host Interface
4.1.7.1 CAB-NXPCA-PCI
The CAB-NXPCA-PCI cable can be used to connect the X3 host interface of the NXHX 51-ETM (see Host Interface (X3) section on page 16) with the Hilscher NXPCA-PCI Card (see Parallel Dual-Port Memory at Host Interface section on page 35) or other host devices.
CAB-NXPCA-PCI Value
Part number 4400.000
Cable length 45 cm
Connectors 68 pin socket connector
Table 37: Technical Data CAB-NXPCA-PCI
4.1.7.2 CAB-NXEB5
The CAB-NXEB5 cable can be used to connect the X3 host interface of the NXHX 51-ETM (see Host Interface (X3) section on page 16) with the Hilscher NXPCA-PCI Card (see Parallel Dual-Port Memory at Host Interface section on page 35) or other host devices.
CAB-NXEB5 Value
Part number 4400.001
Cable length 6.35 cm
Connectors 68 pin socket connector
Table 38: Technical Data CAB-NXEB5
4.1.7.3 CON-NXHIF/M
The CON-NXHIF/M male host interface socket can be used as connector for PCB in hardware development.
CON-NXHIF/M Value
Part number 4400.003
Connector 68 pin male socket connector
Table 39: Technical Data CON-NXHIF/M
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4.2 Fieldbus and Serial Adapters/Interfaces
Figure 11: NXHX 51-ETM with possible Field-Bus-Modules
Fieldbus Adapter/Interface with Duo Status LED (Ready/Error).
Pin Signal Pin Signal
1 XMAC TX 6 +3,3V
2 XMAC RX 7 PIO 4
3 XMAC IO 0 8 PIO 5
4 XMAC IO 1 9 RSTOUT
5 GND 10 n.c.
Table 40: Connector to NXHX Fieldbus Adapter
Figure 12: Fieldbus Connector (Dimensions in mm)
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4.2.1 NXHX-DP
NXHX-DP is a PROFIBUS interface (RS-485).
NXHX-DP Value
Interface PROFIBUS, RS-485
Connector D-Sub, 9 pin, female
Isolation Not isolated
Part number 7923.410
Table 41: NXHX-DP Technical Data
RS-485 PROFIBUS Pin Assignment
PROFIBUS Pin Signal Description
3 Rx/Tx + Receive- / Transmit data positive.
5 GND Data ground.
8 Rx/Tx - Receive- / Transmit data negative.
9 pin, D-Sub, female
1, 2, 4, 6, 7, 9
n.c. -
Table 42: PROFIBUS RS-485 Pin Assignment
4.2.2 NXHX-CO
NXHX-CO is a CAN interface.
NXHX-CO Value
Interface CAN/CANopen
Connector D-Sub, 9 pin, male
Isolation Not isolated
Part number 7923.500
Table 43: NXHX-CO Technical Data
CANopen Pin Assignment
CANopen Pin Signal Description
2 CAN L CAN bus low.
3 GND Ground.
7 CAN H CAN bus high.
9 pin, D-Sub, male
1, 4, 5, 6, 8, 9
n. c. -
Table 44: CANopen Pin Assignment
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4.2.3 NXHX-DN
NXHX-DN is a DeviceNet interface.
NXHX-CO Value
Interface DeviceNet
Connector COMBICON MSTBA 2,5
Isolation Not isolated
Part number 7923.510
Table 45: NXHX-DN Technical Data
DeviceNet Pin Assignment
DeviceNet Pin Signal Description
1 DGND Ground.
2 CAN L CAN Low signal.
3 n. c. -
4 CAN H CAN High signal.
COMBICON Socket, female
5 DN V+ +24 V DeviceNet-power supply.
Table 46: DeviceNet Pin Assignment
4.2.4 NXHX-RS
NXHX-RS is a RS-232 interface.
NXHX-RS Value
Interface RS-232
Connector D-Sub, 9 pin, male
Isolation Not isolated
Part number 7923.010
Table 47: NXHX-RS Technical Data
RS-232 Pin Assignment
RS-232 Pin Signal Description
2 RxD Receive data
3 TxD Transmit data
4 DTR Data Terminal Ready
5 GND Reference potential
7 RTS Request to send
8 CTS Clear to send
9 pin, D-Sub, male
1, 6, 9 n. c. -
Table 48: RS-232 Pin Assignment
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4.2.5 NXHX-CC
NXHX-CC is a CC-Link interface.
NXHX-CC Value
Interface CC-Link
Connector COMBICON MSTBA 2,5
Isolation Not isolated
Part number 7923.740
Table 49: NXHX-CC Technical Data
CC-Link Pin Assignment
CC-Link Pin Signal Description
1 DA Data positive.
2 DB Data negative.
3 DG Data ground.
4 SLD Shield, internally connected to FG and PE. Internally connected via 3,3 nF to DG.
COMBICON Socket, female
5 FG Field ground, internally connected to SLD and PE. Internally connected via 3,3 nF to DG.
Table 50: CC-Link Pin Assignment
4.3 NXAC-Power
The power supply NXAC-POWER has the following technical data:
NXAC-POWER Value
Part number 7930.000
Input 100-240 V ~0,4 A (47-63 Hz)
Output 24 V / 0,625 A, short-circuit-proof
Cable length 1,8 m
Connector With barrel connector, sizes in mm
Figure 13: Sizes of Barrel Connector NXAC-POWER
Table 51: Technical Data Power Supply NXAC-POWER
4.4 NXAC-JTAG-ETM
ETM-to-JTAG adapter
Order Number: 2400.200
Reference 41/60
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5 Reference
5.1 Schematics
See the schematics on the following pages.
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Figure 14: NXHX 51-ETM Schematics (Part 1)
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Figure 15: NXHX 51-ETM Schematics (Part 2)
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Figure 16: NXHX 51-ETM Schematics (Part 3)
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Figure 17: NXHX 51-ETM Schematics (Part 4)
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Figure 18: NXHX 51-ETM Schematics (Part 5)
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Figure 19: NXHX-IO Schematic Diagram
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Figure 20: NXHX-SDR Schematic Diagram
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Figure 21: NXHX-PHY Schematic Diagram
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Figure 22: NXHX-PHYSDR Schematic Diagram
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5.2 Bill of Materials
5.2.1 NXHX 51-ETM
Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
C53 C54 C55 C56 Ceramic capacitor SMD0603 4 CKSS10NV50-0603 Samsung
C50 C51 C107 C130 C131 C150
Ceramic capacitor SMD0805 6 CKSS10UV10-0805 Samsung
C100 C101 C102 Ceramic capacitor SMD1210 3 CKSS10UV50-1210 Taiyo Yuden
C3 C4 C16 C20 C21 C22 C23 C52 C57 C106 C132 C133 C134 C135 C136 C151 C152 C153
Ceramic capacitor SMD0603 21 CKSS100NV25-0603 Samsung
C103 C105 Ceramic capacitor SMD0805 2 CKSS100NV50-0805 Samsung
C1 C2 Ceramic capacitor SMD0603 2 CKSS22PV50-0603 Samsung
C108 C110 C111 Ceramic capacitor SMD0805 4 CKSS22UV6.3-0805 Novacap
C104 Ceramic capacitor SMD0603 1 CKSS2.2NV50-0603 Samsung
D2 EEPROM ser. 1kBit encrypted 1 AT88SC0104C-SU Atmel
D20 SDRAM 64MBit 7ns TSOP86 1 SDRAM64M32-3V3I7T Micron
D26 FLASh ser. 32MBit 1 W25Q32VSSIG Winbond
D1 NETX 51 1 Part number 2231.000 Hilscher
D23 D24 D25 Bus driver 1BIT 3 74LVC1G125GW NXP, Phillips
G1 Quartz 25MHz SMD 1 ABM7-25M Abracon
L50 L51 Ferrite filter chokes. SMD1206 2 LEFS600RA1-1206 Würth
L100 Storage throttle SMD 1 LSFS10UA4 Sumida
N110 DCDC-Converter SMD 1 EN5312Q Enpirion
N100 Switching regulator stepdown 1 MIC2198YML Micrel
N2 Voltage monitoring 1 NCP303LSN29T1 ON Semiconductor
R103 Resistor SMD 1206 1% 1 RKRS0.018W250M-1206 Yageo
Reference 52/60
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Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
R15 R21 R22 R31 Resistor SMD 0603 6 RKRS10KW63M-0603 Samsung
R53 R54 R55 R56 Resistor SMD 0603 1% 4 RKRS10W63M-0603 Yageo
R14 Resistor SMD 0603 1 RKRS100KW63M-0603 Samsung
R52 Resistor SMD 0603 1% 1 RKRS12.4KW63M-0603 Samsung
R9 R19A R19B R102 Resistor SMD 0603 4 RKRS1.5KW63M-0603 Samsung
R3 R4 Resistor SMD 0603 4 RKRS22W63M-0603 Samsung
R34 R35 R100 Resistor SMD 0603 4 RKRS2.2KW63M-0603 Firstohm
R16 R18 Resistor SMD 0603 2 RKRS390W63M-0603 Samsung
R8 Resistor SMD 0603 1 RKRS470W63M-0603 Samsung
R101 Resistor SMD 0603 1 RKRS4.7KW63M-0603 Royalohm
R1 R2 Resistor SMD 0603 1% 2 RKRS560W63M-0603 Yageo
R17 Resistor SMD 0603 1 RKRS680W63M-0603 Samsung
R19 R30 Resistor network SMD 2 RSES1.5KX4-1206 Firstohm
R32 R33 R57 Resistor network SMD 3 RSES270X4-1206 Firstohm
R50 R51 Resistor network SMD 2 RSES50X4-1206 Bourns
S2 Slide switch SMD CHS-02 1 CHS-02 Copal
S1 Slide switch SMD CHS-06 1 CHS-06 Copal
S30 Coding switch 4fach straight 1 DS-04 Apem
T1 Push-button Tyco 1 FSMSM Tyco/AMP
V106 V107 Transistor MOSFET N-Kanal 2 FDC5612 Fairchild
V30 V31 LED red/green SMD 2 LEDSRG-0603 Agilent-/Avago-Technologies
V1 LED red/green SMD 1 LEDSYG-1210 Agilent-/Avago-Technologies
V12 V13 V14 V15 LED yellow SMD0805 4 LEDSY-0805 Everlight
V4 Schottky diode SMD 1 MBR0540T1 ON Semiconductor
V104 V105 Schottky diode SMD 2 PMEG4005AEV NXP (Philips)
V3 Transient Suppressor USB-Port 1 SN65220DBVT Texas Instruments
X9 MICTOR-Connector 38pol.SMD 1 AMP2-767004-2 AMP
X50 Western socket 8pin. 2 Ports tilted 1 ERNI-203313 Trxcom Technology
X100 Power supply socket 1 LUM1613_13 Lumberg
X10 Jumper panel. 2*5pol., RM:2,0mm 1 XJLZ50SG-2.0 Haxel
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Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
X4 micro SD Card Connector 1 XSDCARDMICRO Amphenol
X3 Multipoint connector 68pol. 1 XSLP68SG-0.635 Haxel
X8 USB-Socket 4pol. Typ B tilted 1 XUSBB4BW Kycon
X2 MiniUSB-Socket 5 pol. tilted SMD 1 XUSBS5BW-MINI Molex
X5 X6 X7 Multi-pin connector 2*5pol. 3 XWLZ10SG FJH Steckerverbindung GmbH
5.2.2 NXHX-IO
Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
R1 R2 Resistor SMD 0603 1% 2 076610 513-0 SMD 1% 100 R
R7 R8 R9 R10 R11 R12 R13 R14
Resistor network SMD 8 YAGYC164JR0710KL YC16-4, 10K Yageo
R3 R4 R5 R6 Resistor network SMD 4 31.98.23 4*220 Ohm, SMD1206 Samsung
S1 S2 Coding switch 8-fold even 2 17G562 DS–08, 8 switch, A 21,84 mm Apem
V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16
LED yellow SMD0805 16 1013103 17-21/Y2C-AN1P2-3T Everlight
X1 Connector strip 68pol. 1 12C09-068SB SL-RM1,27-68pol.(2x34) Haxel
Table 52: Bill of Material for NXHX-IO (7703.010 Revision 2)
5.2.3 NXHX-SDR
Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
C1 C2 Ceramic capacitor SMD0805 2 35.70.05 10uF 10V SMD0805 X5R 15% Samsung
C3 C4 C5 C6 Ceramic capacitor SMD0603 4 32.91.65 100nF 50V SMD 0603 X7R 10% Samsung
D1 SDRAM 64MBit FBGA90 3,3V 1 IS42S32200E-7BLI ISSI
X1 Socket terminal strip 68 pin 1 127ST-068SB BL "1.27x2.54" 68 pin (2x34)
Table 53: Bill of Material NXHX-SDR (7773.020 Revision 1)
Reference 54/60
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5.2.4 NXHX-PHY
Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
C1 C2 Ceramic capacitor SMD0603 2 31.17.23 0603 22pF 50V C0G 5 % Samsung
C15 Ceramic capacitor SMD1206 1 H1206X7R102K2KVTRPLP 1nF 2000V 10% SMD 1206 X7R
NIC Components Europe
C3 C4 Ceramic capacitor SMD0603 2 31.18.73 10nF 50V SMD0603 X7R 10% Samsung
C5 C6 C7 C8 Ceramic capacitor SMD0805 4 35.70.05 10uF 10V SMD0805 X5R 15% Samsung
C9 C10 C11 C12 C13 C14 Ceramic capacitor SMD0603 6 32.91.65 100nF 50V SMD 0603 X7R 10% Samsung
D1 Industrial Ethernet PHY 1 UPD60610 Renesas
L1 Ferrite noise suppression choke. SMD0805
1 742 792 040 600 Ohm, 2A, SMD0805, RoHS Würth
Q1 Crystal 25MHz SMD 1 ABM7-25.000MHZ-D2Y-T Abracon, 1K/Reel Abracon
R1 R2 Resistor SMD 0603 2 34.07.40 2.2K 63mW 1% SMD 0603 TK50 Firstohm
R10 Resistor network SMD 1 CAY16-51R0F4LF YC16-4 SMD 1% 51R Bourns
R3 Resistor SMD 0603 1% 1 32.38.12 12,4k 63mW 1% SMD0603 Samsung
R4 Resistor network SMD 1 84E924 YC16-4, 4K7 Yageo
R5 R6 Resistor SMD 0603 2 31.30.45 270R, 1%, 63mW, SMD0603, TK100 Samsung
R7 R8 Resistor SMD 0603 1% 2 YAGRC0603FR0710RL 10R, 1%, 63mW, SMD0603 Yageo
R9 R11 Resistor SMD 0603 2 6950011 RC0603 FR-07 4,7K 1% Royalohm
S1 Slide switch SMD CHS-02 1 70110385 CHS-02A1 Copal
X1 Connector 68 pin 1 12C09-068SB SL-RM1,27-68 pin (2x34) Haxel
X2 Western socket 8 pin angled with LEDs 1 203199 MJIM IM 1X1 S 88 GF5 Erni
X3 Strip 2*6 pin test 1 XWLZ12SG Haxel
Table 54: Bill of Material NXHX-PHY (7773.030 Revision 2)
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5.2.5 NXHX-PHYSDR
Schematics – Reference Description Quantity Manufacturer – Product Description Manufacturer
C15 Ceramic capacitor SMD1206 1 H1206X7R102K2KVTRPLP 1nF 2000V 10% SMD 1206 X7R
NIC Components Europe
C3 C4 Ceramic capacitor SMD0603 2 31.18.73 10nF 50V SMD0603 X7R 10% Samsung
C5 C6 C7 C8 Ceramic capacitor SMD0805 4 35.70.05 10uF 10V SMD0805 X5R 15% Samsung
C9 C10 C11 C12 C13 C14 Ceramic capacitor SMD0603 6 32.91.65 100nF 50V SMD 0603 X7R 10% Samsung
C16 C17 Ceramic capacitor SMD0603 2 32.91.65 100nF 50V SMD 0603 X7R 10% Samsung
C1 C2 Ceramic capacitor SMD0603 2 31.17.23 0603 22pF 50V C0G 5 % Samsung
D2 SDRAM 64MBIT FBGA54 3.3V 1 IS42S16400F-6BLI ISSI
D1 Industrial Ethernet PHY 1 UPD60610 Renesas
L1 Ferrite choke SMD0805 1 742 792 040 600 Ohm, 2A, SMD0805, RoHS Würth
Q1 Crystal 25MHz SMD 1 ABM7-25.000MHZ-D2Y-T Abracon, 1K/Reel Abracon
R7 R8 Resistor SMD 0603 1% 2 YAGRC0603FR0710RL 10R, 1%, 63mW, SMD0603 Yageo
R3 Resistor SMD 0603 1% 1 32.38.12 12,4k 63mW 1% SMD0603 Samsung
R5 R6 Resistor SMD 0603 2 31.30.45 270R, 1%, 63mW, SMD0603, TK100 Samsung
R9 R11 Resistor SMD 0603 2 6950011 RC0603 FR-07 4,7K 1% Royalohm
R4 Resistor network SMD 1 84E924 YC16-4, 4K7 Yageo
R10 Resistor network SMD 1 CAY16-51R0F4LF YC16-4 SMD 1% 51R Bourns
X2 RJ45 female connector 8 pin, 1 port angled with LED
1 203199 MJIM IM 1X1 S 88 GF5 Erni
X1 Connector 68 pin 1 12C09-068SB SL-RM1,27-68 pin. (2x34) Haxel
Table 55: Bill of Material NXHX-PHYSDR (7773.040 Revision 1)
Technical Data 56/60
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6 Technical Data
6.1 NXHX 51-ETM
Item NXHX 51-ETM
Supply Voltage 24 V DC
Processor netX 51
Memory 8 MByte SDRAM,
4 MByte serial SPI Flash
LED SYS, V1; COM0, V30; COM1, V31; V12; V13;; V14; V15
Operating Elements Reset push-button, memory switch, boot switch
USB Mini-B configuration / diagnostic
USB Typ B Development PC connection
RJ45 Ethernet
Dimensions (L x W x D) 100 x 69 x 20 mm
Operating Temperature 0 … 55 °C
Table 56: Technical Data NXHX 51-ETM
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7 Appendix
7.1 Matrix Label
A matrix label is on the device. It contains 3 items:
1. Part number
2. Hardware Revision
3. Serial number
The figure shows part number 7763.000, hardware revision 2 and serial number 23457.
Part number
Hardware Revision
Serial number
Figure 23: Matrix Label
7.2 List of Figures Figure 1: NXHX51-ETM Block Diagram 7 Figure 2: NXHX51-ETM Printed Circuit Board 8 Figure 3: NXHX 51-ETM with JTAG-ETM Adapter 28 Figure 4: NXHX 51-ETM with Possible Devices for the Host Interface 29 Figure 5: NXHX-IO Printed Circuit Board 30 Figure 6: NXHX-SDR Printed Circuit Board 31 Figure 7: NXHX-PHY Printed Circuit Board 32 Figure 8: NXHX-PHYSDR Printed Circuit Board 34 Figure 9: NXHX 51-ETM Connected to NXPCA-PCI Board 35 Figure 10: NXHX 51-ETM Connected to NXHX 6-RE Board 35 Figure 11: NXHX 51-ETM with possible Field-Bus-Modules 37 Figure 12: Fieldbus Connector (Dimensions in mm) 37 Figure 13: Sizes of Barrel Connector NXAC-POWER 40 Figure 14: NXHX 51-ETM Schematics (Part 1) 42 Figure 15: NXHX 51-ETM Schematics (Part 2) 43 Figure 16: NXHX 51-ETM Schematics (Part 3) 44 Figure 17: NXHX 51-ETM Schematics (Part 4) 45 Figure 18: NXHX 51-ETM Schematics (Part 5) 46 Figure 19: NXHX-IO Schematic Diagram 47 Figure 20: NXHX-SDR Schematic Diagram 48 Figure 21: NXHX-PHY Schematic Diagram 49 Figure 22: NXHX-PHYSDR Schematic Diagram 50 Figure 23: Matrix Label 57
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7.3 List of Tables Table 1: List of Revisions 4 Table 2: Reference to Hardware 5 Table 3: Additional Documentation 5 Table 4: List of Positions on Printed Circuit Board 9 Table 5: Push Button T1 10 Table 6: Boot Strap Options Configuration Switch S1 10 Table 7: Boot Mode Settings 11 Table 8: Host Interface Mode at X3 (Settings) 12 Table 9: Configuration - Switch S2, Host Mode (valid for Hardware Revisions 1 – 3) 13 Table 10: Configuration - Switch S2, Host Mode (valid since Hardware Revision 4) 13 Table 11: DIL-Switch S30 13 Table 12: Pin Assignment X10 14 Table 13: X10 – Setting for Dual-Port Memory at Host Interface X3 14 Table 14: X10 - Setting for Extension Bus at Host Interface X3 14 Table 15: X10 - Setting for NXHX-IO Board at Host Interface X3 15 Table 16: X10 - Setting for NXHX-SDR Board at Host Interface X3 15 Table 17: X10 - Setting for NXHX-PHY Board at Host Interface X3 15 Table 18: X10 - Setting for NXHX-PHYSDR Board at Host Interface X3 15 Table 19: Pin Assignment X3 Host Interface DPM and SDRAM Modes (Part 1) 16 Table 20: Pin Assignment X3 Host Interface DPM and SDRAM Modes (Part 2) 17 Table 21: Pin Assignment X3 Host Interface Extension Bus Modes (Part 1) 18 Table 22: Pin Assignment X3 Host Interface Extension Bus Modes (Part 2) 19 Table 23: Pin Assignment X3 Host Interface MII Mode (Part 1) 20 Table 24: Pin Assignment X3 Host Interface MII Mode (Part 2) 21 Table 25: Pin Assignment Mini-B USB Connector (5-pin) 22 Table 26: Pin Assignment X4 SD / MMC Card Reader 22 Table 27: Pin Assignment X5 23 Table 28: Pin Assignment X6 23 Table 29: Pin Assignment X7 24 Table 30: Pin Assignment X8 USB Type B 24 Table 31: Pin Assignment X9 ETM Connector 25 Table 32: Ethernet RJ45 pin assignment 26 Table 33: Pin Assignment X100 Power Supply 26 Table 34: LEDs on the NXHX 51-ETM 27 Table 35: System Status LED 27 Table 36: Combination of Host Mode Switches 33 Table 37: Technical Data CAB-NXPCA-PCI 36 Table 38: Technical Data CAB-NXEB5 36 Table 39: Technical Data CON-NXHIF/M 36 Table 40: Connector to NXHX Fieldbus Adapter 37 Table 41: NXHX-DP Technical Data 38 Table 42: PROFIBUS RS-485 Pin Assignment 38 Table 43: NXHX-CO Technical Data 38 Table 44: CANopen Pin Assignment 38 Table 45: NXHX-DN Technical Data 39 Table 46: DeviceNet Pin Assignment 39 Table 47: NXHX-RS Technical Data 39 Table 48: RS-232 Pin Assignment 39 Table 49: NXHX-CC Technical Data 40 Table 50: CC-Link Pin Assignment 40 Table 51: Technical Data Power Supply NXAC-POWER 40
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Table 52: Bill of Material for NXHX-IO (7703.010 Revision 2) 53 Table 53: Bill of Material NXHX-SDR (7773.020 Revision 1) 53 Table 54: Bill of Material NXHX-PHY (7773.030 Revision 2) 54 Table 55: Bill of Material NXHX-PHYSDR (7773.040 Revision 1) 55 Table 56: Technical Data NXHX 51-ETM 56
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7.4 Contacts
Headquarters
Germany Hilscher Gesellschaft für Systemautomation mbH Rheinstrasse 15 65795 Hattersheim Phone: +49 (0) 6190 9907-0 Fax: +49 (0) 6190 9907-50 E-Mail: [email protected]
Support Phone: +49 (0) 6190 9907-99 E-Mail: [email protected]
Subsidiaries
China Hilscher Systemautomation (Shanghai) Co. Ltd. 200010 Shanghai Phone: +86 (0) 21-6355-5161 E-Mail: [email protected]
Support Phone: +86 (0) 21-6355-5161 E-Mail: [email protected]
France Hilscher France S.a.r.l. 69500 Bron Phone: +33 (0) 4 72 37 98 40 E-Mail: [email protected]
Support Phone: +33 (0) 4 72 37 98 40 E-Mail: [email protected]
India Hilscher India Pvt. Ltd. New Delhi - 110 065 Phone: +91 11 26915430 E-Mail: [email protected]
Italy Hilscher Italia S.r.l. 20090 Vimodrone (MI) Phone: +39 02 25007068 E-Mail: [email protected]
Support Phone: +39 02 25007068 E-Mail: [email protected]
Japan Hilscher Japan KK Tokyo, 160-0022 Phone: +81 (0) 3-5362-0521 E-Mail: [email protected]
Support Phone: +81 (0) 3-5362-0521 E-Mail: [email protected]
Korea Hilscher Korea Inc. Seongnam, Gyeonggi, 463-400 Phone: +82 (0) 31-789-3715 E-Mail: [email protected]
Switzerland Hilscher Swiss GmbH 4500 Solothurn Phone: +41 (0) 32 623 6633 E-Mail: [email protected]
Support Phone: +49 (0) 6190 9907-99 E-Mail: [email protected]
USA Hilscher North America, Inc. Lisle, IL 60532 Phone: +1 630-505-5301 E-Mail: [email protected]
Support Phone: +1 630-505-5301 E-Mail: [email protected]