Development of the ARM Architecture

7/25/2019 Development of the ARM Architecture

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Development of the ARMArchitectureARM has introduced many processors. Each set or groups of processors

are having dierent core and dierent Features. Development of the ARM

Architecture is started with 26 it processors and nowadays it reach upto

6! it. we can not classify general development of ARM products on any

particular fact" there is only one way to understand ARM ased productsis

on its Architectural version pro#le.

ARM Classicseries

$he classical ARM series refers to processors starting from ARM% to

ARM&&. $his is the series which gives mar'et oost to ARM ecause of its

core features li'e Data $ightly (oupled memory" cache" MM)" M*)" etc.$ypical e+amples of this series are ARM%$DM," ARM-26E/0" ARM&&

M*(ore" etc.

Cortex-A series: A/pro#le" the 1Application pro#le

,n this (orte+ architecture" we port dierent emedded 30 and

design emedded system y 30 system programming. $he core feature of

this pro#le is 4ighest performance at low power" $rust5one and aelle/

R($ for a safe and e+tensile system. *ractical development platform of

this types of pro#le is FriendlyARM" Rasperry *i" etc. Cortex-R series: R/pro#le" the 1Real/time pro#le7
http://www.firmcodes.com/microcontrollers/arm/introduction-of-arm-lpc21xx/http://www.firmcodes.com/microcontrollers/arm/introduction-of-arm-lpc21xx/http://www.firmcodes.com/microcontrollers/arm/introduction-of-arm-lpc21xx/http://www.firmcodes.com/microcontrollers/arm/introduction-of-arm-lpc21xx/


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$his is (orte+ architecture which mostly used for real time purpose where

application aort is critical situation contain core features li'e *rotected

memory 8M*)9" :ow latency and predictaility ;real/time< needs.

Cortex-M series: M/pro#le" the 1Microcontroller pro#le7

$his pro#le is specially dedicated for microcontroller purpose only. $he

core feature of this pro#le is li'e :owest gate count entry point"

Deterministic and predictale ehavior a 'ey priority" Deeply emedded

use. $ypical e+ample of this 'ind of pro#le architecture is 4ercules

$M0!%=M" 0$M>2F!2-" etc.

Processor Modes

All these mode indicates its special wor' and e+ecute under certain

condition with its own stac' and a dierent suset of registers. Modes

other than )ser mode are collectively 'nown as privileged modes. your

program or application generally runs under )ser mode. *rivileged modes

are used to service interrupts or e+ceptions" or to access protected

resources.

The ARM Register Set
http://www.firmcodes.com/microcontrollers/arm-cortex-m4-stm32f-discovery-board/introduction-arm-cortex-m-microcontrollers-stm32f4-discovery/http://www.firmcodes.com/microcontrollers/arm-cortex-m4-stm32f-discovery-board/introduction-arm-cortex-m-microcontrollers-stm32f4-discovery/


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(*0( ? (urrent program status register

0*0R ? 0aved program status register

:R ? :in' register

0* ? 0tac' *ointer

*( ? *rogram (ounter

Current/State Program

Status Register CPSR /SPSR!

Condition code "ags #it $% to &'!

@ A:) operation o(erBowed

( A:) operation Carried out

5 )ero result from A:)

C *egative result from A:)

Stic+, ver"o. "ag 0 "ag #it

$1!

Architecture $E and later only

,ndicates if saturation has

occurred

2 3it #it $4!

Architecture $E and later only

&7 *rocessor in aelle state

T #it #it 5!

$ =7 *rocessor in ARM state

$ &7 *rocessor in $hum state

,ntroduced in Architecture !$

Mode 3its #it 6 to 4!

0pecify the processor mode

*e. 3its in (7 #it '6 to '8!

E>7=G used y some 0,MD

instructions

E it controls loadHstore endianness

A it disales imprecise data aorts

,$ acdeG ,F $4EC conditional

e+ecution of $hum/2 instruction


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9nterrupt Disa3le 3its #it 7 #it 1!

, &7 Disales ,RI ; ':

Disa3les 90

groups

ARM 9nstruction Set All instructions are >2 its long H many e+ecute in a single cycle

,nstructions are conditionally e+ecuted

A load H store architecture

E+ample data processing instructions

S2ML range9

E+ample memor, access instructions

?DR r6=r' :oad word at address r& into r=

STR*@# r$=r&=r4,F CE condition true" store ottom yte of r2 to address

r>Jr!

STMD spE=Fr4-r%=lrG0tore registers r! to r and lr on stac'. $hen update

stac' pointer

Thum3 9nstruction Set $hum is a &6/it instruction set

3ptimied for code density from ( code 8N6O of ARM code sie9

,mproved performance from narrow memory

0uset of the functionality of the ARM instruction set

$hum is not a 1regular instruction set ecause that targeted at

compiler generation" not hand coding.


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An application code compiled in $hum is >=O smaller on average

than the same code compiled in ARM and normally >=O faster when

using narrow &6/it memory systems.

Thum3-$ 9nstruction Set $hum/2 is a maPor e+tension to the $hum ,0A

Adds >2/it instructions to implement almost all of the ARM ,0A

functionality

Retains the complete &6/it $hum instruction set

(ompiler automatically selects mi+ of &6 and >2 it instructions

The 9nstruction Pipeline$he ARM%$DM, uses a >/stage pipeline in order to increase the speed ofthe Bow of instructions to the processor which allows several operations to

e performed simultaneously" rather than seQuentially. $he asic steps of

any operation is

etch :- ,nstruction fetched from memory

Decode :- Decoding of registers used in instruction

@xecute :- Register8s9 read from Register Lan'" 0hift and A:)

operation" rite register8s9 ac' to Register Lan'.

,n ARM architecture" pipe/lining is possile ecause of its R,0( feature in

which all instruction sie is same so we can ta'e advantage of pipe/lining.
http://www.firmcodes.com/difference-risc-sics-architecture/http://www.firmcodes.com/difference-risc-sics-architecture/


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As you can see on aove #gure when ADD instruction is e+ecuting we

fetched and start decoding ne+t instruction 0)L and at the same time we

fetched the 3RR instruction. 0o in the time of single instruction e+ecution"

we performing > instruction. $herefore" this is called three stage pipe/

lining.

@xception Handling

Ihen an exception occurs= the core:

(opies (*0R into 0*0RSTmodeU

0ets appropriate (*0R its

(hange to ARM state

(hange to e+ception mode

Disale interrupts 8if appropriate9

0tores the return address in :RSTmodeU

0ets *( to vector address


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To return= exception handler needs to:

Restore (*0R from 0*0RSTmodeU

Restore *( from :RSTmodeU

Terms associated .ithARM

EmbeddedICE

,n order to provide a powerful deugging environment for ARM/ased

applications the Emedded,(E logic was developed and integrated into

the ARM core architecture. ,t is a set of registers providing the aility to

set hardware rea'points or watch/points on code or data.

$he Emedded,(E logic monitors the ARM core signals every cycle to

chec' if a rea'/point or watch/point has een hit. (ommunication with the Emedded,(E logic from the e+ternal

world is provided via the test access port or $A*" controller and a standard

,EEE &&!-.& $A connection. $he advantage of on/chip deug solutions is

the aility to rapidly deug software" especially when the software resides

in R3M or Flash.

AMBA Bus

$he 1Advanced Micro/controller #us Architecture on/chip us is freely

availale from ARM and oers an estalished" open speci#cation that

serves as a framewor' for 0o( designs.


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Reference ? www.arm.com

$he design of the AMLA us speci#cation is focused on low power

consumption and high performance. A typical AMLA/ased 0o( consists of

an advanced high/performance system us8A4L9" and an advanced low

power peripheral us8A*L9. As seen in aove pic

3n the performance critical side of the us is the ARM core" Memory(ontroller" $est ,nterface (ontroller 8$,(9" the :(D (ontroller" on/chip ,*"

custom logic" and specialied functions.

3n the low power side of the us is the 0mart (ard interface" audio

codec" )AR$" *M" $imers" *,3" etc.

$his is an e+cellent e+ample of how the A4L and A*L uses wor' in

conPunction to provide a complete system solution.

$hese us protocols are independent of the ARM processor

and generalied for 0o( application. $he AMLA test methodology provides

a mechanism to give an e+ternal tester access to the on/chip AMLA us.

$his enales the tester to ta'e control of the us and chec' each

component separately.

MMU

$he Memory Management


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permission chec's for the instruction and data ports of *rocessors. An

MM) mitigates the prolem of fragmentation of memory too.

MPU

A separate Memory Protection cores which provide a way to control memory access rights

to applications. $his prevents a ug within a process from aecting other

processes" or the operating system itself" and instead results in a

segmentation fault or storage violation e+ception" generally causing

termination of the process. ,n ARM core" separate registers are provided

y which you can con#gure certain portion of memory and its access

rights.

Why beginning with LPC2148 to start AM !

ARM% is greatest success family in emedded system application.

0o here we learn ARM%$DM, ased CV*s controller.

ARM% is alance etween new (orte+ series and old start up. it is

neither too old technology nor latest

ARM% family is e+cellent for eginners as per my opinion" ecause it

gives real depth idea aout hardware and software implementation W

integration y using appropriate ,DE.

"eatures o# LPC2148


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:*(2&!is the widely used ,( from ARM/% family. ,t is manufactured y

*hilips 8CV*9 and it is pre/loaded with many inuilt peripherals ma'ing it

more eXcient and a reliale option for the eginners as well as high end

application developer.

to != 'L of on/chip static RAM

>2 to &2 'L of on/chip Bash program memory.

&2 it wide interfaceHaccelerator enales high speed 6= M4operation.

,n/0ystemH,n/Application *rogramming 8,0*H,A*9 via on/chip oot/

loader software.

Emedded ,(E R$ and Emedded $race interfaces oer real/time

deugging with the on/chip Real Monitor software and high speed

tracing of instruction e+ecution.

)0L 2.= Full 0peed compliant Device (ontroller with 2 YL of

endpoint RAM. ,n addition" the :*(2&!6H provides 'L of on/chip RAM

accessile to )0L y DMA.

3ne or two 8:*(2&!&H2 vs. :*(2&!!H6H9 &=/it AHD converters

provide a total of 6H&!analog inputs" with conversion times as low as

2.!! us per channel.

0ingle &=/it DHA converter provides variale analog output.

$wo >2/it timersHe+ternal event counters 8with four capture and

four compare channels each9" *M unit 8si+ outputs9 and watchdog.

:ow power real/time cloc' with independent power and dedicated

>2 '4 cloc' input.


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Multiple serial interfaces including two )AR$s 8&6(=9" two Fast

,2(/us8!== 'ps9" 0*, and 00* with uering and variale data length

capailities.

@ectored interrupt controller with con#gurale priorities and vector

addresses.

)p to ! of @ tolerant fast general purpose ,H3 pins in a tiny

:IF*6! pac'age.

)p to nine edge or level sensitive e+ternal interrupt pins availale.

*ower saving modes include ,dle and *ower/down.

*rocessor wa'e/up from *ower/down mode via e+ternal interrupt"

)0L" Lrown/3ut Detect 8L3D9 or Real/$ime (loc' 8R$(9.

0ingle power supply chip with *ower/3n Reset 8*3R9 and L3D

circuits7 (*) operating voltage range of >.= @ to >.6 @ 8>.> @ Z &= O9with @ tolerant ,H3 pads.

Pin$out o# LPC 2148


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AM identi%&ation

For E+ample 7 ARM % $DM, 8:*(2&!9


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AM ' modes

&. )ser mode ? all normal application run under this mode

2. F,I mode ? all fast interrupt data transfer or channel process service

provided under this mode>. ,RI mode ? vectored8priority ased9 interrupt handler

!. 0upervision mode ? protected mode for the operating system

. 0ystem mode ? all operating related tas'

6. Aort mode ? entered after a data or instruction *re/fetch Aort

e+ception

%. )nde#ned mode ? entered when an unde#ned instruction is

e+ecuted.

All these mode indicates its special wor' and e+ecute

under certain condition. Modes other than )ser mode are collectively

'nown as privileged modes. your program or application generally runs

under )ser mode. *rivileged modes are used to service interrupts or

e+ceptions" or to access protected resources.


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,nterfacing ARM% with :ED7

(ircuit Diagram7

[includeTlpc2&++.hU HH header #le for lpc2&! controller

void delay89\ HH initialiation of delay function

int main89 ] *,C0E:==V========\ HH 0E:E($ *3R$= *,C= $3 *,C & A0 *,3M3DE

,3=D,R=VFFFFFFFF\ HH MAYE *3R$= *,C A0 3)$*)$ M3DE while8&9 ] ,3=0E$=VFFFFFFFF\ HH 0E$ $4E *3R$= *,C0 delay89\ HH 4A):$ F3R 03ME $,ME ,3=(:R=VFFFFFFFF\ HH (:EAR $4E *3R$= *,C0 delay89\ HH4A):$ F3R 03ME $,ME ^ ^

void delay89 HH initialiation of delay function

] int i"P\


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for8i=\iT&===\iJJ9 for8P=\PT&===\PJJ9\ ^

,nterfacing seven segment display7

[includeT:*(2&VV.4U HH header #le for lpc2&!

void delay89\ HH delay function

unsigned int i"P"'\ HH glole variale

unsigned intar&=G]=+c="=+f-"=+a!"=+="=+--"=+-2"=+2"=+f"=+="=+-= ^\ HH arraydata

int main89 ] *,C0E:==V========\ HH select port= as gpio mode ,3=D,R =V======FF\ HH ma'e starting pin as output and other asinput of port= while8&9 ]

for8i=\iT&=\iJJ9 ]


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,3=0E$ ariG\ delay89\ ,3=(:R ariG\ ^ ^

return =\ ^void delay89 ] for8P=\PT&===\PJJ9 for8'=\'T!==\'JJ9\ ^

,nterfacing :(D with ARM%7

[includeTlpc2&++.hU

[de#ne :(D 8=+TT&69[de#ne R0 8&TT&>9[de#ne R 8&TT&!9[de#ne EC 8&TT&9

void delaySfv8unsigned int +"int y9\void lcdSdisplay8unsigned int +9\void cmd8unsigned char m9\void lcdSini89\

int main89


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] *,C0E:==V========\ ,3=D,R=VFFFFFFFF\ lcdSini89\ while8&9

] lcdSini89\ lcdSdisplay8_ _9\ lcdSdisplay8__9\ delaySfv8&==="!==9\ lcdSdisplay8_E_9\ delaySfv8&==="!==9\ lcdSdisplay8_:_9\ delaySfv8&==="!==9\ lcdSdisplay8_(_9\ delaySfv8&==="!==9\ lcdSdisplay8_3_9\

delaySfv8&==="!==9\ lcdSdisplay8_M_9\ delaySfv8&==="!==9\ lcdSdisplay8_E_9\ delaySfv8&==="!==9\ lcdSdisplay8_ _9\ delaySfv8&==="!==9\ lcdSdisplay8_$_9\ delaySfv8&==="!==9\ lcdSdisplay8_3_9\ delaySfv8&==="!==9\ cmd8=+=c=9\ lcdSdisplay8_F_9\ delaySfv8&==="!==9\ lcdSdisplay8_,_9\ delaySfv8&==="!==9\ lcdSdisplay8_R_9\ delaySfv8&==="!==9\ lcdSdisplay8_M_9\ delaySfv8&==="!==9\ lcdSdisplay8_(_9\ delaySfv8&==="!==9\ lcdSdisplay8_3_9\

delaySfv8&==="!==9\ lcdSdisplay8_D_9\ delaySfv8&==="!==9\ lcdSdisplay8_E_9\ delaySfv8&==="!==9\ lcdSdisplay8_0_9\ delaySfv8&==="!==9\ lcdSdisplay8_._9\ delaySfv8&==="!==9\ lcdSdisplay8_(_9\ delaySfv8&==="!==9\ lcdSdisplay8_3_9\

delaySfv8&==="!==9\ lcdSdisplay8_M_9\


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delaySfv8&==="!==9\ ^ ^

void delaySfv8unsigned int +"int y9 ] unsigned int i"P\ for8i=\iT+\iJJ9 for8P=\PTy\PJJ9\ ^void lcdSdisplay8unsigned int +9 ] ,3=(:R`8R0`RÈC`:(D9\ ,3=0E$`8+TT&69\ ,3=0E$`R0\ ,3=(:R`R\

,3=0E$ÈC\ delaySfv8&=="&=9\ ,3=(:RÈC\ delaySfv8&="&=9\ ^

void cmd8unsigned char m9 ] ,3=(:R`8R0`RÈC`:(D9\ ,3=0E$`8mTT&69\ ,3=(:R`R0\ ,3=(:R`R\

,3=0E$ÈC\ delaySfv8&=="&==9\ ,3=(:RÈC\ delaySfv8&=="&=9\ ^

void lcdSini89 ] cmd8=V>9\ cmd8=V=e9\ cmd8=V=69\

cmd8=V=&9\ cmd8=V=9\ ^


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,nterfacing switch with ARM%7

[includeTlpc2&++.hU

[de#ne switchS& 8,3=*,CW=V=&9[de#ne led 8=+TT&9

void delay89\

int main89 ] *,C0E:==V========\ ,3=D,R=Vfe\ ,3=(:Rled\ while8&9

] if8switchS&&9 ] ,3=0E$led\ delay89\ ,3=(:Rled\ delay89\ ^ ^ ^

void delay89

] int i"P\


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for8i=\iT&==\iJJ9 for8P=\PT6==\PJJ9\ ^

% segment Display J :ED[includeTlpc2&++.hU

[de#ne switchS& 8,3=*,CW8&TT=99[de#ne switchS2 8,3=*,CW8&TT&99[de#ne led 8=+TT29

void delay89\

int data&G]=+c="=+f-"=+a!"=+="=+--"=+-2"=+2"=+f"=+="=+-= ^\ HH arraydata

int main89 ] int i=\ *,C0E:==V=======\ ,3=D,R=VFFFFFFFD\ while8&9 ] if8switchS&&9 ] ,3=0E$led\ delay89\

delay89\ ,3=(:Rled\ delay89\ ^ if8switchS2=9 ] if8i&=9 i=\ ,3=0E$8data&iGTT&29\ delay89\ delay89\

delay89\ delay89\ delay89\ delay89\ delay89\ delay89\ ,3=(:R8data&iGTT&29\ iJJ\

^ ^ ^

void delay89 ]


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int i"P\ for8i=\iT&==\iJJ9 for8P=\PT6==\PJJ9\ ^

R02>2 with ARM %

[includeTlpc2&++.hU

unsigned char rec\

void pll89\void serialSini89\void serialStransmit8unsigned char +9\

void delay8int +9\int main89 ] *,C0E:= =+=======\ ,3=D,R=VFFFFFFFF\ serialSini89\ pll89\

while8&9 ]


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serialStransmit8__9\ HH call transmit functiondelay8&==9\ HH calling of delay function

serialStransmit8__9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8__9\ HH call transmit function

delay8&==9\ HH calling of delay function serialStransmit8_._9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_F_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_,_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_R_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_M_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_(_9\ HH call transmit function

delay8&==9\ HH calling of delay function serialStransmit8_3_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_D_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_E_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_0_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_._9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_(_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_3_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8_M_9\ HH call transmit function delay8&==9\ HH calling of delay function serialStransmit8=+=d9\ HH call transmit function delay8!==9\ delay8!==9\

^ ^

void pll89 ] HK*:: ,0 (3CF,)RED $3 E$ 6=45 p(:YKH *::(F=V2!\ HH 0E$ *0E:2 ACD M0E: *::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$ (3CCE($ *::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E while88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E $3 LE,C0ER$ED *::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACD LE,C (3CCE($RD @*LD,@=V==\ HH 0E$ *(:Y 0AME A0 F((:Y

*::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E


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^HK 0ER,A: ,C,$,:,5A$,3CKH

void serialSini89 ]

)=:(R =+>\ )=D:M=V==\ )=D::=Ve\ )=FDR=V2\ )=:(R =+=>\ ^void serialStransmit8unsigned char +9 ] )=$4R +\ HH :3AD DA$A ,C )=$4R RE,0$ER

while 88)=:0R W =+!=9=9\ HH A,$ F3R DA$A $RAC0M,00,3C )=:0R`=V!=\ ^void delay8int +9

] int i"P\ ++K&=\ for8i=\iT+\iJJ9 for8P=\PT>=\PJJ9\ ^


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[includeTlpc2&++.hU


void delaySfv8unsigned int +"int y9\

void lcdSdisplay8unsigned int +9\void cmd8unsigned char m9\void lcdSini89\

unsigned char rec\

void pll89\

void serialSini89\char serialSre89\

int main89 ] *,C0E:= =+=======\ *,C0E:& =+========\ ,3=D,R=VFFFFFFFF\ serialSini89\


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pll89\ lcdSini89\ while8&9 ] serialSre89\

lcdSdisplay8rec9\ ^ ^

void delaySfv8unsigned int +"int y9 ] unsigned int i"P\ for8i=\iT+\iJJ9 for8P=\PTy\PJJ9\ ^void lcdSdisplay8unsigned int +9

] ,3=(:R`8R0`RÈC`:(D9\ ,3=0E$`8+TT&69\ ,3=0E$`R0\ ,3=(:R`R\ ,3=0E$ÈC\ delaySfv8&=="&=9\ ,3=(:RÈC\ delaySfv8&="&=9\ ^

void cmd8unsigned char m9

] ,3=(:R`8R0`RÈC`:(D9\ ,3=0E$`8mTT&69\ ,3=(:R`R0\ ,3=(:R`R\ ,3=0E$ÈC\ delaySfv8&=="&==9\ ,3=(:RÈC\ delaySfv8&=="&=9\ ^

void lcdSini89 ] cmd8=V>9\ cmd8=V=e9\ cmd8=V=69\ cmd8=V=&9\ cmd8=V=9\ ^void pll89 ] HK*:: ,0 (3CF,)RED $3 E$ 6=45 p(:YKH

*::(F=V2!\ HH 0E$ *0E:2 ACD M0E: *::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$ (3CCE($


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*::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E while88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E $3 LE,C0ER$ED *::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACD LE,C (3CCE($RD

@*LD,@=V==\ HH 0E$ *(:Y 0AME A0 F((:Y *::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E ^void serialSini89]

)=:(R =+>\ )=D:M=V==\ )=D::=Ve\ )=FDR=V2\

)=:(R =+=>\^

char serialSre89 ] while 88)=:0R W =+=&9=9\ HH wait untill complete data is received

rec)=RLR\return rec\

^

,nterfacing timer with ARM%7

[includeTlpc2&++.hU

[ de#ne *RE0(A:AR 6==== HH de#ne prescalar as 6====


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void pll89\void timer=Sini89\void delay8unsigned long int ms9\

int main89 ] *,C0E:==+========\ HH select gpio pin ,3=D,R=VFFFFFFFF\ HH ma'e gpio as output pin pll89\ HH calling pll function timer=Sini89\ HH calling timer function while8&9

] ,3=0E$=VFFFFFFFF\ HH led on delay8=+======fF9\ HH delay using timer = ,3=(:R=VFFFFFFFF\ HH led o

delay8=+======fF9\ HH delay using timer =^

return =\^

void pll89 ] HH*:: ,0 (3CF,)RED $3 E$ 6=45 p(:Y *::(F=V2!\ HH 0E$ *0E:2 ACD M0E: *::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$ (3CCE($

*::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E while88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E

$3 LE ,C0ER$ED *::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACD LE,C(3CCE($RD @*LD,@=V==\ HH 0E$ *(:Y 0AME A0 F((:Y *::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E ^

void timer=Sini89 ] $=$(R=V=\ HH to stop timer $=*R*RE0(A:AR/&\ HHload the timer value $=$(R=V=2\ HHreset timer ^void delay8unsigned long int ms9 ] $=$(=+========\ HH t= reset timer counting $=$(R=V=2\ HH reset the timer

$=$(R=V=&\ HH start timer while8$=$(Tms9\ HH chec' the condition


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$=$(R=V==\ HH stop timer ^

0I)ARE A@E

[includeTlpc2&++.hU

[ de#ne *RE0(A:AR 6==== HH de#ne prescalar as 6====

void pll89\void timer=Sini89\void delay8unsigned long int ms9\

int main89

] *,C0E:==+========\ HH select gpio pin ,3=D,R=VFFFFFFFF\ HH ma'e gpio as output pin pll89\ HH calling pll function timer=Sini89\ HH calling timer function while8&9

] ,3=0E$=V=&\ HH high level

delay8=+=======F9\ HH delay using timer = ,3=(:R=V=&\ HH low level delay8=+=======F9\ HH delay using timer=

^ return =\^

void pll89 ] HH*:: ,0 (3CF,)RED $3 E$ 6=45 p(:Y *::(F=V2!\ HH 0E$ *0E:2 ACD M0E: *::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$ (3CCE($ *::FEED=VAA\ HHFEED 0EI)EC(E

*::FEED=V\ HHFEED 0EI)EC(E while88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E $3 LE,C0ER$ED *::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACD LE,C(3CCE($RD @*LD,@=V==\ HH 0E$ *(:Y 0AME A0 F((:Y *::FEED=VAA\ HHFEED 0EI)EC(E *::FEED=V\ HHFEED 0EI)EC(E ^void timer=Sini89 ]

$=$(R=V=\ HH to stop timer $=*R*RE0(A:AR/&\ HHload the timer value


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$=$(R=V=2\ HHreset timer ^

void delay8unsigned long int ms9 ] $=$(=+========\ HH t= reset timer counting $=$(R=V=2\ HH reset the timer

$=$(R=V=&\ HH start timer while8$=$(Tms9\ HH chec' the condition $=$(R=V==\ HH stop timer ^

,nterfacing AD( with ARM%

[includeTlpc2&>+.hU



void lcdSdisplay8unsigned int +9\

void cmd8unsigned char m9\void lcdSini89\


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void lcdSpos8int line" int pos9\void lcdSstr8unsigned char K+9\

void pll89\

void adcSini89\unsigned long int adcSdata89\

int main89 ]

unsigned long temp\unsigned char #rst"second"third"fourth"#fth\*,C0E:==V========\,3=D,R=VFFFFFFFF\pll89\adcSini89\lcdSini89\

lcdSstr8b$EM* @A:)E ,0b9\lcdSpos82"69\lcdSdisplay8_(_9\while8&9

]tempadcSdata89\temptempK>>==\temptempH&=2>\#rsttempO&=J_=_\temptempH&=\secondtempO&=J_=_\temptempH&=\

thirdtempO&=J_=_\temptempH&=\fourthtempO&=J_=_\temptempH&=\lcdSpos82"=9\lcdSdisplay8fourth9\lcdSdisplay8third9\lcdSdisplay8second9\lcdSdisplay8_._9\lcdSdisplay8#rst9\

^ ^

void delaySfv8unsigned int +"int y9 ]

unsigned int i"P\for8i=\iT+\iJJ9for8P=\PTy\PJJ9\

^void lcdSdisplay8unsigned int +9 ]

,3=(:R`8R0`R`EC`:(D9\

,3=0E$`8+TT&69\,3=0E$`R0\


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,3=(:R`R\,3=0E$ÈC\delaySfv8&=="2==9\,3=(:RÈC\delaySfv8&="&=9\

^

void cmd8unsigned char m9 ]

,3=(:R`8R0`RÈC`:(D9\,3=0E$`8mTT&69\,3=(:R`R0\,3=(:R`R\,3=0E$ÈC\delaySfv8&=="&=9\,3=(:RÈC\delaySfv8&=="&=9\

^

void lcdSini89 ]

cmd8=V>9\cmd8=V=e9\cmd8=V=69\cmd8=V=&9\cmd8=V=9\

^

void lcdSpos8int line" int pos9

] if8line&9

cmd8=+=Jpos9\ else if8line29

cmd8=+c=Jpos9\ ^

void lcdSstr8unsigned char K+9 ]

while8K+_=_9 ]

lcdSdisplay8K+9\ +JJ\ ^

^

void pll89 ] HK*:: ,0 (3CF,)RED $3 E$ 6=45 p(:YKH

*::(F=V2!\ HH 0E$ *0E:2 ACD M0E:*::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$

(3CCE($*::FEED=VAA\ HHFEED 0EI)EC(E

*::FEED=V\ HHFEED 0EI)EC(E


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while88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E$3 LE ,C0ER$ED

*::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACDLE,C (3CCE($RD

@*LD,@=V==\ HH 0E$ *(:Y &H!th of F((:Y

*::FEED=VAA\ HHFEED 0EI)EC(E*::FEED=V\ HHFEED 0EI)EC(E ^

void adcSini89 ]

AD=(R &TT2&\ HHAHD is 3perationalAD=(R =TT2&\ HHAHD is in *ower Down Mode*,C0E:& =+=&======\HH*=.2 is (on#gured as Analog to Digital

(onverter *in AD=.&AD=(R =+==2===2\ HH(:YD,@!"(hannel/=.&

0elected"L)R0$="EDE=

HK*DC=AHD (loc' *(:Y H8(:YD,@J&9\KH

^

unsigned long int adcSdata89 ]

unsigned long rec\AD=(R ` 8&TT2!9\

HH0tart (onversionwhile88AD=DR W =+=======99\HKait untill the D3CE its 0etsKHrec AD=DR\AD=(R W N=+=&======\ HH0tops the AHD

(onversionrec rec UU 6\ HH data is present after 6 itrec rec W =+>FF\ HH(learing all other Lits

return 8rec9\ ^


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0*, with ARM%

www.#rmcodes.comDE@E:3*ED L7/ F,RMARE DE@E:3*ER4A$ *R3RAM D37/ *rogram 3f Multiple+ 0even 0egment )singMa+%22& And (ontrolled ith ARM8:*(2&VV9 )sing 0*, *rotocolKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKH

[includeTlpc2&++.hU

unsigned char spiSrec\

void spiSini89\void spiStr&8unsigned int +9\char spiSre89\void spiStr8unsigned char cmd"unsigned char data9\void spiSstr8unsigned char Kstr9\

int ar&=G] =+>f"=+=6"=+"=+!f"=+66"=+6d"=+%d"=+=%"=+%f"=+6f \int ar&G]=+=&"=+=2"=+=>"=+=!"=+="=+=6"=+=%"=+=^\

void pll89\

void delaySms8unsigned int +9\


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int main89 ]

int i"a""c"d"e"f"g"h\acdefgh=\*,C0E:==V========\,3=D,R=VFFFFFFFF\pll89\spiSini89\spiStr8=+=a"=+f9\spiStr8=+="=+f9\for8i=\iT-\iJJ9

] spiStr8ar&iG"ar=G9\ delaySms8&==9\ ^ spiStr8=+=c"=+=&9\

while8&9 ]

spiStr8ar&%G"araG9\ spiStr8ar&6G"arG9\ spiStr8ar&G"arcG9\ spiStr8ar&!G"ardG9\ spiStr8ar&>G"areG9\ spiStr8ar&2G"arfG9\ spiStr8ar&&G"argG9\ spiStr8ar&=G"arhG9\ aJJ\

if8a&=9 ] a=\

JJ\ ^ if8&=9 ] a=\

cJJ\ ^ if8c&=9

] ac=\ dJJ\

^ if8d&=9 ] acd=\

eJJ\ ^ if8e&=9 ] acde=\

fJJ\ ^


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if8f&=9 ] acdef=\

gJJ\ ^

if8g&=9 ] acdefg=\

hJJ\ ^ if8h&=9 ] acdefgh=\ ^ delaySms8>===9\

^ ^

void pll89 ]

HK*:: ,0 (3CF,)RED $3 E$ 6=45 p(:YKH*::(F=V2!\ HH 0E$ *0E:2 ACD M0E:*::(3C=V=&\ HH*:: ,0 A($,@E L)$ C3$ E$

(3CCE($*::FEED=VAA\ HHFEED 0EI)EC(E*::FEED=V\ HHFEED 0EI)EC(Ewhile88*::0$A$ W =V!==9=9\ HHA,$ F3R FEED 0EI)EC(E

$3 LE ,C0ER$ED*::(3C=V=>\ HH *:: 4A0 LEEC A($,@E ACD LE,C

(3CCE($RD@*LD,@=V==\ HH 0E$ *(:Y 0AME A0 F((:Y *::FEED=VAA\ HHFEED 0EI)EC(E*::FEED=V\ HHFEED 0EI)EC(E

^

void spiSini89 ]

*,C0E:= `=+&==\ HK *=.!" *=." *=.6" *=.% are set as 0(Y"M,03" M30, and *,3 KH

HH,3D,R= ` =V=\ HK 00E: is output KH

HH,30E$= `=V=\ HK set 00E: to high KH0=0*((R\ HK 0*, cloc'prescale register minimum value is . KH

0=0*(R=+==>=\ HK Device select asmaster" 0et data to /it" (*3: =" (*4A =KH^

void spiStr&8unsigned int +9 ] 0=0*DR +\ while 8 80=0*0R W =+=9 9\ HK ait until the 0*,F it is set to indicatetrasfer complete KH

^


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char spiSre89 ]

while 8 80=0*0R W =+=9 9\ HK ait until the 0*,F it is set to indicatetrasfer complete KH spiSrec 0=0*DR\

return spiSrec\ ^

void spiSstr8unsigned char Kstr9 ] while8Kstr_=_9 ] spiStr&8Kstr9\ strJJ\ ^ ^

void spiStr8unsigned char cmd"unsigned char data9]

,3=(:R8&TT%9\ HHenale transmissionspiStr&8cmd9\spiStr&8data9\,3=0E$8&TT%9\ HH disale transmission

^

void delaySms8unsigned int +9]

int i\

while8+//9]

for8i=\iT&==\iJJ9\^

^


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R$( with ARM%7

[includeTlpc2&++.hU



void lcdSdisplay8unsigned int +9\void cmd8unsigned char m9\

void lcdSpos8int line"int pos9\void lcdSini89\void lcdSstr8unsigned char K+9\

unsigned char Bag=\

void initSrtc89\

void main89 ]

unsigned int i"P"'"l"m"n\*,C0E:==V========\

*,C0E:&=V========\,3=D,R=VFFFFFFFF\


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lcdSini89\initSrtc89\lcdSstr8b(:3(Y7/ 2!b9\cmd8=+c=9\lcdSstr8b==7==7==b9\

while8&9 ]if8Bag9

]Bag=\lcdSpos82"=9\lcdSdisplay843)RH&= J _=_9\lcdSdisplay843)RO&= J _=_9\lcdSdisplay8_7_9 \lcdSdisplay8M,CH&= J _=_9\lcdSdisplay8M,CO&= J _=_9\lcdSdisplay8_7_9 \

lcdSdisplay80E(H&= J _=_9\ lcdSdisplay80E(O&= J _=_9\

^ ^

^

void delaySfv8unsigned int +"int y9 ]

unsigned int i"P\for8i=\iT+\iJJ9for8P=\PTy\PJJ9\

^

void lcdSdisplay8unsigned int +9 ]

,3=(:R`8R0`RÈC`:(D9\,3=0E$`8+TT&69\,3=0E$`R0\,3=(:R`R\,3=0E$ÈC\delaySfv8&=="&=9\,3=(:RÈC\

delaySfv8&="&=9\ ^

void cmd8unsigned char m9 ]

,3=(:R`8R0`RÈC`:(D9\,3=0E$`8mTT&69\,3=(:R`R0\,3=(:R`R\,3=0E$ÈC\delaySfv8&=="2=9\,3=(:RÈC\

delaySfv8&="&=9\ ^


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void lcdSpos8int line"int pos9 ]

if8line&9 cmd8=+=Jpos9\

else if8line29 cmd8=+c=Jpos9\

^

void lcdSini89]

cmd8=V>9\cmd8=V=e9\cmd8=V=69\cmd8=V=&9\cmd8=V=9\

^

void lcdSstr8unsigned char K+9]

while8K+_=_9] lcdSdisplay8K+9\ +JJ\^

^

void rtcSint8void9SSirQ ]

,:R =V=&\Bag &\@,(@ectAddr =V========\

^

void initSrtc89]

,:R =V=&\((R =V&>\((R =V&&\

(,,R =V=&\0E( =V==\43)R &2\M,C &&\@,(,ntEnale =+====2===\@,(@ect(ntl= =+======2D\@,(@ectAddr= 8unsigned9rtcSint\

^


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,nterrupts on ARM%7

[include Tlpc2&++.hU HH header #le of arm controller

[include bdelay.hb HH delay header #le

[include blcd!it.hb HH header #le of lcd

int ar&=G] =+>f"=+=6"=+"=+!f"=+66"=+6d"=+%d"=+=%"=+%f"=+6f \HH commoncathode codeint count=\ HH varile of type int

void interruptSini89\ HH interrupt intiliation

int main89 HH start of main program ]

*,C0E:==V========\ HH port=.= to port=.& used as gpio mode*,C0E:&=V========\ HH port=.&6 to port=.>& used as gpio

mode*,C0E:2=V========\ HH port&.&6 to port&.>2 used as gpio

mode,3=D,R=V=fFFFFFF\ HH direction of port=.= to port=.>& wor'ed

as output mode,3&D,R=VFFFFFFFF\ HH direction of port&.= to port&.>& wor'ed

as output mode

lcdSini89\ HH lcd initiliation functioninterruptSini89\ HH interrupt intiliation function


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while8&9]

,3&0E$`8arcountGTT&69\delaySfv8&==="&===9\,3&(:R`8arcountGTT&69\

countJJ\if8count&=9 count=\

^return =\

^

void interruptS=89SSirQ HH interrupt = ]

EV$,C$=V=&\,3=0E$`8=VFFTT&69\delaySfv8=="&===9\

,3=(:R`8=VFFTT&69\delaySfv8=="&===9\

^

void interruptS&89SSirQ HH interrupt &]

EV$,C$=V=2\cmd8=+=&9\lcdSstr8bE:(3ME $3b9\cmd8=+c=9\lcdSstr8bF,RM(3DE0.(3Mb9\

delaySfv8&==="&===9\^

void interruptSini89 ]

HK intialie interrupt =KH*,C0E:=`=+=c\@,(@ectAddr=8unsigned9interruptS=\@,(@ect(ntl==+2=`&!\@,(,ntEnale&TT&!\

HH delaySfv8&==="&==9\

HK intialie interrupt &KH*,C0E:=`=+c=\@,(@ectAddr&8unsigned9interruptS&\@,(@ect(ntl&=+2=`&\@,(,ntEnale&TT&\

^

DE:A.4 4EADER F,:EKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKH

void delayS89]


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unsigned int "v\ for8=\T6==\JJ9 for8v=\vT&==\vJJ9\^

void delaySpf8unsigned int +9 ] unsigned int i"P\ for8i=\iT+\iJJ9 for8P=\PT&>\PJJ9\ ^

void delaySfv8unsigned int +"int y9 ] unsigned int i"P\ for8i=\iT+\iJJ9 for8P=\PTy\PJJ9\

^

void delaySms8int count9 ] int P="i=\ for8P=\PTcount\PJJ9 ] HK At 6=Mh" the elow loop introduces delay of &= us KH for8i=\iT>\iJJ9\ ^ ^

:(D!L,$.4 4EADER F,:EKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKH[de#ne :(D 8=+fTT&&9[de#ne R0 8&TT9[de#ne R 8&TT-9[de#ne EC 8&TT&=9

void lcdSdisplay8unsigned char +9

] unsigned int temp\delaySms8&===9\,3=(:R`8R0`RÈC`:(D9\temp8+UU!9W=+=f\HHdelaySms8&=9\

,3=0E$`R0\ ,3=(:R`R\ ,3=0E$ÈC\

,3=(:R`:(D\ ,3=0E$`8tempTT&&9\

delaySms8&==9\

,3=(:RÈC\


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delaySfv8&="&=9\,3=(:R`8R0`RÈC`:(D9\temp+W=+=f\HHdelaySms8&===9\

,3=0E$`R0\

,3=(:R`R\ ,3=0E$ÈC\,3=(:R`:(D\

,3=0E$`8tempTT&&9\delaySms8&==9\

,3=(:RÈC\delaySms8&==9\

^

void cmd8unsigned char +9 ]

unsigned int temp\

delaySms8&==9\temp8+UU!9W=+=f\,3=(:R`8R0`RÈC9\

,3=(:R`R0\ ,3=(:R`R\ ,3=0E$ÈC\ ,3=(:R`:(D\ ,3=0E$`8tempTT&&9\ delaySms8&==9\ ,3=(:RÈC\

delaySfv8&=="&=9\

,3=(:R`8R0`RÈC9\temp+W=+=f\

,3=0E$`8tempTT&&9\ ,3=(:R`R0\ ,3=(:R`R\ ,3=0E$ÈC\

,3=(:R`:(D\ ,3=0E$`8tempTT&&9\ delaySms8&==9\ ,3=(:RÈC\ delaySfv8&=="&==9\

^

void lcdSini89 ]

*,C0E:=`8=VFFTT9\,3=D,R`8=VFTT9\cmd8=V=29\

cmd8=V29\ HH cmd8=V=29\ cmd8=+=e9\

cmd8=V=69\cmd8=V=&9\

cmd8=V=9\ ^


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void lcdSstr8unsigned char Kstr9]

while8Kstr_=_9 ] lcdSdisplay8Kstr9\ strJJ\ ^

^

Development of the ARM Architecture

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