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Development and assessment of semiconductor manufacturing equipment: Review and current R&D

IISB Annual Conference 2015, Erlangen, 20. November 2015 Dr. Georg Roeder, Fraunhofer IISB

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Introduction

A short view at the last 15 years

Motivation and approaches in equipment assessment

Current R&D: Low-temperature microwave plasma oxidation

Low temperature oxidation of silicon

Oxidation and nitridation of silicon carbide

Summary

Development and assessment of semiconductor manufacturing equipment: Review and current R&D

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450 mm metrology chamber

Semiconductor equipment development and assessment at the IISB A short view at the last 15 years of selected equipment and metrology R&D

Plasma oxidation 450 mm plasma

etch chamber

Pulsed MOCVD

VUV reflectometer

XPS 1.gen.

RTP/RTA

NF3 clean in PECVD

Low-temperature batch plasma

Scatte-rometry

Chamber wall sensor

200 mm cluster

Inline ellipsomerty

SiO2/Si

Batch ALD

200/300 mm cluster

XPS 2.gen.

450 mm metrology platform

Topography sensor

300/450 mm cluster

SiO2/SiC

Thermal laser separation

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Continuous demand for semiconductor manufacturing equipment development

Increased technology requirements and processing of new materials

Increased cost requirements

Efficient equipment development by cooperation of equipment manufacturers, IC manufacturers and the IISB as R&D site

Targeted development and flexible optimization of the semiconductor manufacturing equipment

Efficient and risk-minimized development and assessment of new equipment concepts for introduction into semiconductor device fabrication

Semiconductor equipment development and assessment at the IISB Motivation and approach

Steps in semiconductor equipment development and assessment

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Introduction

A short view at the last 15 years

Motivation and approaches in equipment assessment

Current R&D: Low-temperature microwave plasma oxidation

Low temperature oxidation of silicon

Oxidation and nitridation of silicon carbide

Summary

Development and assessment of semiconductor manufacturing equipment: Review and current R&D

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Low thermal budget required for device structures and larger wafer sizes (e.g. avoidance of dislocation & distortion) whereas thermal oxidation typically requires a high thermal budget

Investigate low reaction temperature (T ≤ 400 °C) microwave (MW) plasma-enhanced oxidation on silicon

Make advantage of the benefits of MW plasma-enhanced processing for the oxidation and nitridation of SiC

Low-temperature microwave plasma oxidation Motivation and objectives of the equipment assessment

Plasma generation at a an array of MW sticks vs. a floating Si-substrate

Field-enhanced diffusion of charged oxygen species through the silicon dioxide layer

𝒅 = 𝒄𝒄 + 𝒅𝟎

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Low-temperature microwave plasma oxidation Process module and cluster integration

Microwave plasma oxidation module installed at the Fraunhofer IISB

H2/O2 plasma in chamber

Schematic of the microwave (MW) plasma oxidation tool

Four-channel OES system for plasma characterization

300 mm wafer carrier

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Dedicated experiments to exploit limits of the parameter space (T: RT to 900°C, t: 10 s to 560 s, PMW, av = 1095 W/2190 W, wafer size: 200 mm, 300 mm)

Investigation by DOEs to prepare adjustment of thickness dav and homogeneity σd for MOS cap oxides (4 nm, 7 nm, 12 nm, 20 nm) (200 mm)

dav > 4 nm to 50 nm with σd < 1% achievable by tuning main process parameters

Individual tuning of MW power enables further optimization of σd

Assessment of low-temperature microwave plasma oxidation Investigation of thickness and thickness homogeneity on silicon

Investigation of thickness for different gas mixtures

H2/O2, p = 200 mTorr O2, p = 200 mTorr

SiO2 layer thickness on a 300 mm wafer

d = 6.57 nm ± 0.04 nm (0.58%)

d (n

m)

d (n

m)

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Fabrication of p-MOS capacitor structures with oxidation parameters adjusted from the DOEs

C(V)-measurements on wafer prober before and after forming gas anneal (49 points, f=100kHz); analysis of forward curve (no hysteresis observed) Oxide charges (Qeff), flat band voltage (VFB), interface state density (Dit, Gm)

E-ramp measurements on wafer prober before and after forming gas anneal (100 points) Classification according to break-down voltage

Assessment of low-temperature microwave plasma oxidation Characterization of p-MOS Test Structures – process flow

C(V)/E-ramp wafer map Process flow for MOS capacitor characterization

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Dit values of plasma oxides are comparable to thermal oxide values (Dit about twice of furnace oxide, reduction by 0.5x in forming gas anneal for all oxides)

For plasma oxides, overall Qeff is negative vs. thermal oxide values, negligible effect of forming gas anneal except for O2 plasma (0.5x reduction)

Indication of negative charges at the Si/SiO2 interface; shielding of negative charges with increasing oxide thickness

Due to Qeff, VFB is shifted to positive values (approx. 0.1 V)

Assessment of low-temperature microwave plasma oxidation Characterization of p-MOS Test Structures – results C(V) measurements

Effective oxide charges (Qeff) after forming gas anneal

Interface state density (Dit) after forming gas anneal

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Plasma oxides show comparable reliability to thermal oxides

Assessment of low-temperature microwave plasma oxidation Characterization of p-MOS Test Structures – results E-ramp measurements

Reliability results (overview and detail) for plasma oxides vs. thermal oxides

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Assessment of low-temperature microwave plasma oxidation Characterization of device structures

Comparison with Infineon product

Process split Infineon POR (1x): 800 °C, 60 min, furnace Plasma oxidation (5x4 wafers): Different gas mixtures : H2, He, O2; Tmax: 400 °C Analysis of VT, ID,sat, CG, acc , VBD

Higher VBD compared to POR, extrinsics caused by wafer transport and contamination

Fast wafer level reliability results: Break Down Voltage VBD

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Microwave Plasma induced oxidation enables high quality oxide growth at reduced temperatures (approx. 500K lower vs. thermal oxidation)

Oxide charges are shifted negative vs. thermal oxides

Interface state density slightly higher vs. thermal oxides

Narrow distribution of compared device parameters indicate excellent uniformity

Slight thickness differences and influence of thermal budget may explain difference to POR threshold voltages and gate capacities

Plasma oxides well comparable with POR furnace oxide

Assessment of low-temperature microwave plasma oxidation Low temperature oxidation of silicon – assessment summary

Results and the flexibility of processing motivated the assessment of low temperature plasma processing for the oxidation and nitridation of silicon carbide.

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Microwave Plasma induced oxidation successfully evaluated in Si technology

Exploratory tests showed potential of oxide growth on SiC at reduced temperature

Plasma oxidation provides flexibility for in situ nitridation and post treatment at similar or lower thermal budget (thermal oxidation of SiC: 1100°C to 1300°C)

Investigate microwave plasma oxidation on SiC (400 °C to 1000°C) on blanket SiC wafers and SiC test devices for implementation in the production of SiC MOSFETs

Low-temperature microwave plasma oxidation Oxidation and nitridation of silicon carbide - motivation and objectives

Oxide Thickness on SiC and Silicon versus Process Temperature

Potential basic process flows for generation of nitridation of oxides

SiO2

Si

Oxidation

Si3N4

Si

Nitridation

Oxidation of nitride

Si3N4

Si

SiO2 Si3N4

Si

SiO2

Nitridation of oxide

SiON

Si

SiON by O2/N2 plasmas

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Chamber with specular reflecting vs. opal walls

Design of a multi-wafer (100 mm)/single wafer (150mm) carrier; preliminary carrier for first investigations

Optimization for temperature coupling and control on SiC

Low-temperature microwave plasma oxidation Reactor modifications and base qualification

Chamber performance data

Fingerprint process after chamber modification demonstrates same uniformity as before modification (no uniformity tuning done at all)

Optimization of spectroscopic ellipsometry measurement for the characterization of oxidized SiC wafers

Precise layer thickness determination and detection of an interface layer possible

Wafer carrier design:

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Determination of oxidation rates and nitride content for different gas mixtures, processing times and temperatures

Target thickness of ~ 10 nm for further processing of MOScap devices can be obtained with good uniformity

Oxide growth rate on SiC: 0.9 nm/min @ RT/350 ºC, 9 nm/min @ 750 ºC

Typical process temperature: 650°C (growth rate SiC = 0.5 nm/s, growth rate c-SiC = 0.6 nm/s)

Low-temperature microwave plasma oxidation Characterization of oxidation on silicon carbide

Plasma Enhanced Oxidation of SiC at 350 – 750 ºC

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Investigation of oxide nitridation by vacuum UV reflectometry

Nitridation of oxides results in moderate nitrogen content

Reoxidation process of grown nitride results in pure oxide layer

First MOScap structures processed vs. reference plasma oxides

Characterization by C(V) and E-ramp measurements showed that equipment component rework and process adjustments are required

Low-temperature microwave plasma oxidation Characterization of the nitridation effect and MOScap fabrication

Characterization of layer thickness and nitride content by vacuum UV reflectometry

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Summary

Review of equipment developments and assessment at the Fraunhofer IISB

Approach and benefits in joint assessment activities

Low-temperature microwave plasma oxidation as current R&D activity

Successful equipment assessment for the oxidation of silicon

First results from ongoing R&D activities on the oxidation and nitridation of silicon carbide

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Acknowledgement

The presented work was conducted within the SEAL Integrated Project (257379) and

the SEA4KET Integrated Project (611332), which are funded by the European

Commission within the Seventh Framework Programme.

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Thank you for your attention!