Design of a High Precision Comparator for Implementation of a WDR Sensor

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Miriam Pekar Alex Liberchuk Supervisors : Dr. Alexander Fish Mr. Arthur Spivak 10/201 1 P-2011- 130

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Miriam Pekar Alex Liberchuk Supervisors: Dr. Alexander Fish Mr. Arthur Spivak. Design of a High Precision Comparator for Implementation of a WDR Sensor. P-2011-130. 10/2011. What is an Image Sensor?. - PowerPoint PPT Presentation

Transcript of Design of a High Precision Comparator for Implementation of a WDR Sensor

Page 1: Design of a High Precision Comparator for Implementation of a WDR Sensor

Miriam PekarAlex Liberchuk

Supervisors:Dr. Alexander FishMr. Arthur Spivak

10/2011

P-2011-130

Page 2: Design of a High Precision Comparator for Implementation of a WDR Sensor

What is an Image Sensor?

An image sensor is a device that converts an optical image into an electronic signal. It is used mostly in digital cameras and other imaging devices.

The two most popular kinds of image sensors are:Charge-coupled device (CCD).Complementary Metal–Oxide–

Semiconductor (CMOS).

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Why CMOS and not CCD? CMOS is implemented using less components. CMOS sensors consume less power. This is important in portable devices. Provides faster readout. Cheaper to manufacture.

CMOS sensors, traditionally, are more susceptible to noise. Light sensitivity of a CMOS chip tends to be lower because

several transistors are located next to each photodiode. CMOS sensors tend to have Low Dynamic Range.

CMOS Drawbacks:

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Effects of Low Dynamic Range Imaging:

Goal of Our Project: Improve the Dynamic Range of the CMOS Sensor

Low DR Imaging

Wide DR ImagingDynamic Range quantifies the ability

of a sensor to image highlights and shadows.

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What is a CMOS Sensor? It is an image sensor produced by a CMOS

semiconductor process. It consists of a photodiode and extra circuitry next

to each photodiode converting the light energy to a voltage, later the voltage is converted to a digital signal.

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What is a Comparator?

a comparator is a device that compares two voltages and switches its output to indicate which is larger.

A good comparator implementation can be an Operational Amplifier connected in open loop.

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The Use of the Comparator in a WDR Sensor:

If a pixel value exceeds the threshold - i.e. the pixel is expected to be saturated at the end of the exposure time - the reset is given at that time to that pixel. The binary information concerning the reset (i.e., if it is applied or not) is saved in a digital storage for later calculation of the scaling factor. Thus, we can represent the pixel output in the following floating- point format: M⋅2EXP. Here, the mantissa (M) represents the digitized pixel value, and the exponent (EXP) represents the scaling factor.

This way, the maximal signal value the sensor can process is raised – higher DR.

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Project Process Flow

Specifications

Choose SuitableComparatorTopologies

Design ProceduresSet-up to determentW/L (each Topology)

Full SPECTRAsimulation

Remaining Tasks

Page 9: Design of a High Precision Comparator for Implementation of a WDR Sensor

Our Project:

Design a High Precision Comparator to Implement a WDR Sensor

Technology - TOWER 180nm The Comparator’s Design Requirements:

GBW = 1-2 GHz Gain = 1000 Bandwidth = 1 - 2 MHz Slew Rate > 1.8 V/µsec Power Dissipation < 100nW

CLoad = 150 fF

0V < Vout < 3.3V

0.2V < Vin < 2V

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Project Process Flow

Specifications

Choose SuitableComparatorTopologies

Design ProceduresSet-up to determentW/L (each Topology)

Full SPECTRAsimulation

Remaining Tasks

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Comparator Topologies

Simple One-Stage Two-Stage Folded Cascode Gain Boosted Folded Cascode

Page 12: Design of a High Precision Comparator for Implementation of a WDR Sensor

Project Process Flow

Specifications

Choose SuitableComparatorTopologies

Design ProceduresSet-up to determentW/L (each Topology)

Full SPECTRAsimulation

Remaining Tasks

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Simple One-Stage Comparator

The topology resulted in poor performance, due to poor gain and bandwidth

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Two-Stage Comparator

Current Mirror

Differential Pair

Active Load

Common Source

Amplifier

Enable Switch

Bias Current

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Two-Stage Comparator cont. Results:

All the design requirements were met!

Gain, BW

3.275[ ]dVout VSR Secdt

Slew Rate

ENABLE=ON

Power Dissipation

ENABLE=OFF

GBW = Gain*BW= (62.03dB)*1.4MHz = 1.769GHz

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Folded Cascode Comparator

Bias Circuit

Differential Pair

Current Source

Current Mirror

Cascode Transistors

Common Source

Amplifier

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Folded Cascode Comparator cont.

Results:

All the design requirements were met!

Gain, BWSlew Rate

2.53[ ]dVout VSR Secdt

Power Dissipation

ENABLE = ON ENABLE=OFF

GBW = Gain*BW= (60.12dB)*1.36MHz = 1.379GHz

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Project Process Flow

Specifications

Choose SuitableComparatorTopologies

Design ProceduresSet-up to determentW/L (each Topology)

Full SPECTRAsimulation

Remaining Tasks

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Full SPECTRA simulation DC analysis – make sure all transistors

are in saturation mode AC analysis – find a suitable W/L for the

desired Gain, BW and GBW. Transient analysis – checks the Slew

Rate, and Power Dissipation. Now, Corners were checked.

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Project Process Flow

Specifications

Choose SuitableComparatorTopologies

Design ProceduresSet-up to determentW/L (each Topology)

Full SPECTRAsimulation

Remaining Tasks

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Remaining Tasks

Create and check Gain Boosted Folded Cascode topology.

Comparison of all topologies designed in this project.

Layout Implementation of the best topology and post layout simulations.

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Questions

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