Design, Fabrication, and Characterization of Passive ...

Design, Fabrication, and Characterization

of Passive Silicon Photonic Device

by

Yang Wang

Submitted in total fulfillment of the

Requirements for the degree of

Doctor of Philosophy

Department of Electrical and Electronic Engineering

The University of Melbourne

September 2017

II

Abstract

Over the past decade, the silicon photonics technology has attracted extensive research

attention due to its great potential to leverage with the existing microelectronics facility

to produce large-scale and high-density photonic integrated circuits (LHPICs). Silicon-

based LHPICs have the potential of realizing low-cost and power-efficient tera-scale

communications for future optical networks, data-centres, supercomputers, and various

consumer electronic and photonic applications. As the fundamental building blocks of

the LHPICs, various passive optical components have been built on the silicon

photonics integration platform, and they are used to realize the basic functions of the

circuit such as light guidance, power splitting, optical reflection, and wavelength

filtering, or are used as the components to construct more complex devices such as

lasers, modulators and photodetectors. Therefore, the passive silicon photonic devices

play an important role in building high-performance and densely integrated PICs.

This thesis focuses on the design, fabrication, and characterization of passive silicon

photonic devices. Specifically, we present two novel passive silicon photonic devices

based on the popular 220 nm SOI platform, namely an ultra-broadband and low-loss

silicon adiabatic optical power splitter and an ultra-broadband and high-reflectivity

silicon circular Bragg grating mirror. The proposed adiabatic splitter can achieve a low

excess loss (<0.19 dB) and a broad operation band (500 nm) based on an adiabatic

length of only 5 µm, and more importantly, it is polarization insensitive. To the best of

our knowledge, the proposed splitter in this thesis is the shortest and the most

broadband polarization-insensitive adiabatic splitter that has been presented on the SOI

platform until now. For the proposed circular Bragg grating mirror, it solves the

challenge of achieving high reflectivity and broad reflection bandwidth simultaneously

for Bragg gratings based on the thin silicon layer SOI platform, and it has a very

compact size of only 4.49 µm × 4.54 µm, which makes it suitable for building densely

integrated devices, such as on-chip resonators, filters, and laser cavities.

Compared with existing devices, the proposed adiabatic splitter and the circular Bragg

grating mirror present significant advantages in terms of device performance and size.

Therefore, they are expected to be promising elements in LHPICs and applications

which require ultrahigh-efficiency and broadband optical power distributions and

III

reflections. The proposed silicon photonic devices are fabricated based on e-beam

lithography and deep reactive ion etching (DRIE) systems, and the development of the

fabrication process based on the 220 nm SOI wafer will also be demonstrated in this

thesis as a technical chapter.

IV

Declaration

This is to certify that

(i) the thesis comprises only my original work towards the PhD,

(ii) due acknowledgement has been made in the text to all other material used,

(iii) the thesis is less than 100,000 words in length, exclusive of tables, maps,

bibliographies and appendices.

Signature________________________

Date____________________________

V

Acknowledgement

Time flies. Now it comes to the end of my PhD research. Looking back at the past four

years, I feel lucky that I have entered a field which I have been passionately interested

in. This is definitely a field that I will be glad to be keen on throughout my entire future

career. Without doubt, the knowledge, experience, and skills that I have gained through

these four years of study will become lifetime benefits for me. This would not be

possible to happen without the help of so many people.

First of all, I would like to express my sincere gratitude to my principle supervisor,

Professor Stan Skafidas, for introducing me into this stunning world of silicon photonics,

and for his continuous support, encouragement, and advices throughout the whole stage

of my PhD research. Prof. Stan’s enthusiasm, inspiration, and rigorous attitude towards

research and work have also set an example for me.

I would also like to express my deep gratitude to my co-supervisor, Dr. Ke Wang. As a

supervisor and a friend, Dr. Ke has provided enormous help and support to me. Without

those valuable suggestions, discussions, guidance and support from him, I would not be

able to achieve those fruitful outcomes for my PhD research.

I would like to show thankfulness to Dr. Thomas Chae, for his guidance and supervision

in the early years of my PhD research. Dr. Chae has helped me knock the door of the

world of silicon photonics and build a good foundation.

I would also like to thank Prof. Thas Nirmalathas for serving as my advisory committee

member.

I would like to thank Australian Research Council (ARC) for the funding support of my

chip fabrication, and I would like to thank National ICT Australia laboratory (NICTA)

for supporting all my academic conference travels during the past four years.

I would also like to show my appreciation to the staff of Melbourne Centre for

Nanofabrication (MCN), for their training in nanofabrication facilities and the valuable

support in my chip fabrication.

Finally, I would like to show great thanks to my family, for their understanding, support,

encouragement, and love.

VI

Acronyms

APD avalanche photodetector

ASE amplified spontaneous emission

BOX buried-oxide

BPM beam propagation method

CMOS Complementary Metal Oxide Semiconductor

Cr chrome

C4F8 Octafluorocyclobutane

CVD chemical vapor deposition

DC directional coupler

DVS-BCB divinylsiloxane-benzocyclobutane

EBL e-beam lithography

EC external-cavity

EIC electronic integrated circuit

EL excess loss

Er erbium

ER extinction ratio

FDTD finite difference time domain

FEM finite element method

FMM film mode matching method

FPR free propagation region

GaSb gallium-antimonide

Ge germanium

HBG high-index-contrast Bragg grating

ICP Inductively Coupled Plasma

ICPRIE inductively coupled plasma reactive ion etching

IME Institute of Microelectronics

IMEC Interuniversity MicroElectronics Center

IL insertion loss

VII

InP indium-phosphide

IPA isopropyl alcohol

LBG low-index-contrast Bragg grating

LETI Laboratory of Electronics and Information Technologies

LPCVD low pressure chemical vapor deposition

LSF lensed single-mode fibre

LSPIC large-scale photonic integrated circuit

MMI multi-mode interference

MOS Metal Oxide Semiconductor

MZI Mach-Zehnder Interferometer

OEIC optoelectronic integrated circuit

OI optical interconnect

OSA optical spectrum analyser

PBS polarization beam splitter

PEC proximity effect correction

PECVD plasma enhanced chemical vapor deposition

PIC photonic integrated circuit

PMMA polymethyl methacrylate

PR polarization rotator

PSF Point Spread Function

Q quality factor

RF radio frequency

RIE reactive ion etching

SEM scanning electron microscope

SF6 Sulfur hexafluoride

Si silicon

SiGe silicon-germanium

SiN silicon nitride

SiO2 silicon dioxide

SOA semiconductor optical amplifier

SOI silicon-on-insulator

VIII

SRS Stimulated Raman Scattering

SRO silicon-rich-oxide

SSC spot size converter

TE transverse-electric

TIR total internal reflection

TM transverse-magnetic

VCSEL vertical-cavity surface-emitting laser

WDM wavelength division multiplexing

IX

Contents

Chapter 1 Silicon Photonics: Introduction and Review ...................... 1

1.1 Silicon Photonics Integration and Applications ................................. 1

1.2 Components ................................................................................... 5

1.2.1 Silicon Optical Modulator ......................................................................................... 6

1.2.2 Si-integrated Laser ....................................................................................................12

1.2.3 Ge-on-Si Photodetector ...........................................................................................16

1.2.4 Passive Silicon Photonic Device ...........................................................................18

1.3 Thesis Objective and Organisation ................................................. 21

Chapter 2 Passive Silicon Photonic Device Fabrication .................... 24

2.1 Single-Mode Silicon Waveguide ..................................................... 24

2.2 Fabrication and Measurement ....................................................... 30

2.2.1 Fabrication Process Based on 220 nm SOI ........................................................30

2.2.1.1 E-beam lithography .................................................................................. 31

2.2.1.2 PEC and dose test .................................................................................... 34

2.2.1.3 Silicon nano-etching ................................................................................. 35

2.2.1.4 Edge coupling ............................................................................................ 38

2.2.2 Silicon Photonic Chip Measurement Setup .......................................................42

Chapter 3 Silicon Adiabatic Optical Power Splitter ......................... 44

3.1 3-dB Silicon Optical Power Splitter ................................................. 44

3.1.1 2×2 Silicon Adiabatic Coupler ..............................................................................45

3.1.2 1×2 Silicon Adiabatic Splitter................................................................................46

3.1.3 1×2 Silicon Non-adiabatic Splitter .......................................................................47

3.2 1×2 Optical Power Splitter Based on Adiabatic Silicon Tapers ........ 48

3.2.1 Device Design ............................................................................................................48

3.2.2 Characterization .........................................................................................................55

3.2.3 Splitter with Various Power Splitting Ratio ......................................................60

3.2.4 Conclusion ...................................................................................................................61

Chapter 4 Circular Bragg Grating Mirror ...................................... 62

4.1 High-index-contrast Bragg Grating on SOI ....................................... 62

4.2 Circular Bragg Grating Based on 220 nm SOI ................................. 63

4.2.1 Device Design ............................................................................................................65

X

4.2.2 Characterization .........................................................................................................71

4.2.3 Integrated Notch Filter Based on Circular Bragg Grating Mirror ...............74

4.2.4 Solutions for Broadband and High-efficiency TM-reflection ......................76

4.2.4.1 Circular Bragg grating with thickened grating blades.......................... 77

4.2.4.2 Circular Bragg grating based on horizontal slot waveguide ............... 81

4.2.5 Extended Applications of Slot Bragg Grating ..................................................85

4.2.5.1 Polarization-selective Bragg grating mirror ........................................... 85

4.2.5.2 TM-pass/TE-block polarizer .................................................................... 89

4.2.6 Conclusion ...................................................................................................................94

Chapter 5 Conclusions and Future Work ........................................ 96

5.1 Conclusions .................................................................................. 96

5.2 Future work ................................................................................... 97

Chapter 6 References ..................................................................... 99

XI

List of Figures

Figure 1.1. The prototype of a silicon photonic integrated four-channel WDM

transceiver. ....................................................................................................................... 2

Figure 1.2. The block diagram of an on-chip OI system. ................................................. 6

Figure 1.3. Diagrams of three different structures employed in plasma-dispersion-

effect-based silicon modulators to implement the mechanisms of (a) carrier injection, (b)

carrier depletion, and (c) carrier accumulation. ............................................................. 7

Figure 1.4. The schematic diagrams of (a) an MZI modulator and (b) a microring-based

modulator [31]. ................................................................................................................ 9

Figure 1.5. The schematic of SRO embedded in a MOS structure for electrical pumping.

........................................................................................................................................ 14

Figure 1.6. Proposed wavelength-switchable laser. (a) conceptual design, (b) detailed

implementation, (c) SEM image of a broadband reflector [67]. .................................... 16

Figure 1.7. (a) Optical microscope image of the fabrication PBS. (b) SEM (scanning

electron microscope) image of the SiN waveguide (cross-section). ............................... 21

Figure 2.1. The schematic diagram of a silicon strip waveguide: (a) 3D view; (b) cross-

section view. ................................................................................................................... 25

Figure 2.2. The change of effective refractive index with waveguide width for 220-nm-

thick silicon strip waveguide with a top cladding of SiO2. The simulations were carried

out using Lumerical Mode solutions, and the refractive indices of Si and SiO2 were set

to be 3.477 and 1.444, respectively. ............................................................................... 26

Figure 2.3. (a) – (d) The mode profiles of the fundamental TE and TM mode based

different waveguide widths. ............................................................................................ 27

Figure 2.4. The silicon photonic fabrication process based on 220 nm SOI. ................ 30

Figure 2.5. (a) The schematic of the proposed splitter structure to be fabricated. The

shadowed region in the structure indicates the place where ZEP resist exists after

development. (b, c) The scanning electron microscope (SEM) images of (b) a

successfully fabricated splitter, and (c) a damaged sample caused by the resist collapse.

........................................................................................................................................ 33

Figure 2.6. (a) The SEM image of the 200-nm line and space array exposed under the

dosage of 190 µC/cm2, the picture was captured after the step of resist development.

The grooves are the exposed area where ZEP was cleared after development. (b) The

SEM image of proposed splitter. Based on the SEM measurements, the exposed gap size

was about 10 nm larger than the designed size. Therefore a 5 nm bias was applied in

the pattern layouts to get correct size. ............................................................................ 35

Figure 2.7. Examples of fabricated waveguide arrays which show (a) trapezoid profiles,

and (b) inverse trapezoid profiles with under-cut effect................................................. 37

Figure 2.8. The SEM images of (a) the fabricated silicon strip waveguide and (b) a

bending waveguide sample with a bending radius of 10 µm.......................................... 38

Figure 2.9. Fabrication process to achieve edge coupling. ........................................... 39

Figure 2.10. Examples of (a) an isotropic Bosch etch when Fomblin oil was not used,

and (b) a non-isotropic Bosch etch with vertical sidewall when Fomblin oil was used. 41

Figure 2.11. (a) The photo of the fabricated wafer after the Bosch process step. (b, c)

The optical microscope images of the fabricated chip facet. ......................................... 42

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Figure 2.12. (a) The experiment setup for edge-coupling. (b) The extraction of linear

waveguide propagation loss at 1550 nm in TE polarization. ......................................... 43

Figure 3.1. The schematic diagrams of (a) a conventional directional coupler and (b) a

2×2 3-dB adiabatic coupler. .......................................................................................... 45

Figure 3.2. The principle illustration of a 1×2 3-dB adiabatic coupler based on the

effective-refractive-index tapering. ................................................................................ 47

Figure 3.3. (a) The schematic diagrams of the proposed adiabatic splitter and the

intensity field distributions simulated along the device with (b) the TE and (c) the TM

polarization input at 1550 nm wavelength. The device parameters used in the

simulations are: W (400 nm), L (5 µm), G (50 nm), T (30 nm). ..................................... 49

Figure 3.4. (a) - (d) Mode profiles (1550 nm) simulated at the cross section of taper end

with W = 460 nm. (e) Effective index of the four modes along the tapers with a length of

5 µm. (f) Simulated ∆Neff at the taper end cross section with the change of W from 340

to 500 nm. (g) Change of ∆Neff along the tapers for different W and L. (h) Simulated

excess loss at 1550 nm with the change of L. ................................................................. 52

Figure 3.5. (a) The simulated transmission spectrum (output 1 and output 2 have

identical spectrum) of the proposed splitter and (b) a 90° bending waveguide with a

cross-section size of 400 nm × 220 nm and the bending radius of 15 µm. .................... 54

Figure 3.6. The change of transmission efficiency and ∆Neff with (a) T and with (b) G at

1550 nm. ......................................................................................................................... 55

Figure 3.7. (a, b) The SEM images of the fabricated adiabatic splitter. (c) The

schematic of the device measurement setup. .................................................................. 56

Figure 3.8. The optical microscope images of (a) the fabricated 1×8 splitter and (b) the

cascaded splitter. ............................................................................................................ 57

Figure 3.9. Experimentally measured spectra of the splitter for (a) the TE and (b) the

TM polarization. ............................................................................................................. 58

Figure 3.10. The extracted loss at 1550 nm for (a) the TE polarization and (b) the TM

polarization. R square is the calculated coefficient of determination. ........................... 59

Figure 3.11. The simulated power splitting ratio as a function of gap_2 when gap_1 is

fixed at 50 nm. ................................................................................................................ 60

Figure 4.1. The schematic diagrams of the proposed circular Bragg grating with two

different structures (size scaled). .................................................................................... 64

Figure 4.2. The field distribution (1550 nm) within the taper simulated with an arc

angle of (a) 270°, (b) 180°, and (c) 60°. Note that the above field distributions were

captured to illustrate the wave diffraction from the strip waveguide to the taper, and no

grating blades were set in the simulation. The reflection observed was due to the

refractive index contrast between the taper and the cladding, rather than the Bragg

reflection. The red circles in (a) and (b) indicate the branches formed in the 270° taper

and the effective-index-contrast interface formed in the 180° taper, respectively. The

dashed line in (b) shows the 60° boundary. The tapers were all covered by 2 μm SiO2. 66

Figure 4.3. The simulated reflection spectra of the proposed Bragg grating with

different values chosen for W1, Wt, and Wb. ................................................................... 68

Figure 4.4. (a) – (d): The vertical field-intensity distribution of the grating captured at

the y = 0 plane with λ set at 1.3 and 1.75 µm and W1 chosen at 100 and 181 nm. (e, f, h):

The grating spectrum simulated with different values of W1, θ, and N. (g): The change of

the reflectivity (1550 nm) and ∆λ (reflectivity >90%) with the grating blade number N.

........................................................................................................................................ 70

XIII

Figure 4.5. The schematic of the measurement setup and the SEM images of the

fabricated grating mirror. .............................................................................................. 72

Figure 4.6. (a): The tilted view of the fabricated grating mirror. (b): The measured

spectra of the fabricated grating, the reference strip waveguide, and the chip-facet

reflections. (c): The measured IL of the fabricated grating. .......................................... 73

Figure 4.7. The top-view of the fabricated notch filter with the following parameters: Lw

= 4 μm, Lc = 0 μm, rb = 5 μm ......................................................................................... 74

Figure 4.8. (a): The tilted-view of the fabricated notch filter. (b): The spectra measured

at the output port of the notch filters fabricated with different T and Lc........................ 75

Figure 4.9. (a) The 3D and (b) the vertical cross-section schematic diagrams of the

proposed circular Bragg grating mirror with thickened blades, designed for TM-

polarized light. ................................................................................................................ 78

Figure 4.10. (a) The simulated reflection spectra of the circular Bragg grating with

thickened blades (775 nm thick) and non-thickened blades (220 nm thick) with TM-

polarized light launched. (b) The vertical field intensity distributions simulated along

the gratings with 775 nm thick blades and 220 nm thick blades. The blade number was

set to 5. ............................................................................................................................ 79

Figure 4.11. The change of the grating peak reflectivity and the bandwidth with (a) the

grating arc angle θ, (b) the blade thickness, and (c) the blade number. (d) The reflection

spectra of the circular grating with thickened blades (775 nm thick) simulated for the

fundamental TE and TM modes. ..................................................................................... 80

Figure 4.12. The schematic illustration of the slot-waveguide-based circular Bragg

grating. ........................................................................................................................... 82

Figure 4.13. (a) The reflection spectra of CSG and SCG. (b, c) The vertical field

intensity distributions captured along (b) SCG and (c) CSG. ........................................ 83

Figure 4.14. (a) The change of grating peak reflectivity with slot thickness (t). (b) The

change of grating peak reflectivity and bandwidth with grating arc angle (θ). (c) The

change of grating peak reflectivity with blade number (p) for CSG and SCG. .............. 84

Figure 4.15. The schematic of a horizontal slot waveguide. .......................................... 85

Figure 4.16. (a) The 3D schematic and (b) the cross-section schematic diagrams of the

polarization-selective Bragg grating. ............................................................................. 86

Figure 4.17. The reflection spectra of (a) the TE-dedicated mirror and (b) the TM-

dedicated mirror. Dotted lines show the grating spectrum for the different polarization.

........................................................................................................................................ 87



........................................................................................................................................ 88

Figure 4.19. The intensity field distribution simulated along the grating with different

sets of (a) slot layer thickness and (b) silicon layer thickness. ...................................... 89

Figure 4.20. (a) The 3D schematic and the 2D (b) lateral and (c) vertical illustrations of

the proposed polarizer based on horizontal slot silicon waveguide. ............................. 91

Figure 4.21. (a)-(d) The field profiles (1550 nm) captured in the horizontal and vertical

cross-sections of the device with TE- or TM-mode; and (e) and (f) The simulated

transmission spectra of the polarizer with 20 and 40 grating periods. .......................... 93

XIV

List of Publications

1. Y. Wang, S. Gao, K. Wang, H. Li, and E. Skafidas, “Ultra-broadband, compact,

and high-reflectivity circular Bragg grating mirror based on 220 nm silicon-on-

insulator platform,” Optics Express. 25(6), 6653-6663 (2017).

2. Y. Wang, S. Gao, K. Wang, and E. Skafidas, “Ultra-broadband and low-loss 3 dB

optical power splitter based on adiabatic tapered silicon waveguides,” Optics

Letters. 41(9), 2053-2056 (2016).

3. K. Wang, Y. Wang, S. Gao, A. Nirmalathas, C. Lim, K. Alameh, H. Li, and E.

Skafidas, “Silicon Integrated Optical Isolator with Dynamic Non-Reciprocity,”

IEEE Photonics Technology Letters. 29(15), 1261-1264 (2017).

4. S. Gao, Y. Wang, K. Wang, and E. Skafidas, “High contrast circular grating

reflector on silicon-on-insulator platform,” Optics Letters. 41(3), 520-523 (2016).

5. S. Gao, Y. Wang, K. Wang, and E. Skafidas, “Low-loss and Broadband 2×2

Polarization Beam Splitter Based on Silicon Nitride Platform,” IEEE Photonics

Technology Letters. 28(18), 1936-1939 (2016).

6. K. Wang, S. Gao, Y. Wang, A. Nirmalathas, C. Lim, K. Alameh, and E. Skafidas,

“Four-Wave-Mixing-Based Silicon Integrated Optical Isolator With Dynamic

Non-Reciprocity,” IEEE Photonics Technology Letters. 28(16), 1739-1742

(2016).

7. Y. Wang, S. Gao, K. Wang, and E. Skafidas, “Broadband, High-Extinction-Ratio,

and Low-Excess-Loss Polarizer Based on Horizontal Slot Silicon Bragg Grating,”

CLEO-PR/OECC/PGC 2017. Paper ID: s1127.

8. Y. Wang, S. Gao, K. Wang, and E. Skafidas, “Ultra-broadband and Low-loss

Optical Power Splitter Based on Tapered Silicon Waveguides,” IEEE Optical

Interconnects Conference 2015, April 2015.

9. Y. Wang, S. Gao, K. Wang, and E. Skafidas, “Broadband Bragg Grating Mirror

Based on Circular and Horizontal Slot Silicon Waveguides for TM0 Mode,” Asia

Communications and Photonics Conference (ACP) 2014, Nov 2014.

10. Y. Wang, C.J. Chae, S. Gao, and E. Skafidas, “Single-polarization Reflector

Based on Circular Bragg gratings and Horizontally Slotted Silicon Waveguides,”

OptoElectronics and Communications Conference (OECC) 2014, July 2014.

11. Y. Wang, C.J. Chae, S. Gao, E. Skafidas, “Circular Bragg Grating Mirror with

High Reflectance and Wide Bandwidth for TM-Polarized Waves,” IEEE Optical

Interconnects Conference 2014, May 2014.

XV

12. S. Gao, Y. Wang, K. Wang, and E. Skafidas, “High Efficient, Compact and

Broadband 2×2 Polarization Beam Splitter on Silicon Nitride,” Conference on

Lasers and Electro-Optics (CLEO) 2016, June 2016.

13. K. Wang, Y. Wang, S. Gao, A. Nirmalathas, C. Lim, K. Alameh, and E. Skafidas,

“2×2 Silicon Integrated Optical Phased Array for Beam Steering Applications,”

International Topical Meeting on Microwave Photonics 2015, October 2015.

14. S. Gao, Y. Wang, K. Wang, H. Li, and E. Skafidas, “High-Efficiency Interlayer

Coupler on Silicon Nitride,” CLEO-PR/OECC/PGC 2017. Paper ID: s2361.

15. S. Gao, Y. Wang, K. Wang, and E. Skafidas, “Polarization Insensitive Vertical

Coupler for Multi-Layer Silicon Photonic Integrated Circuits,” IEEE Optical

Interconnects Conference 2015, April 2015.

16. K. Wang, S. Gao, Y. Wang, A. Nirmalathas, C. Lim, K. Alameh, E. Skafidas,

and H. Li, “Four-Wave-Mixing Based Silicon Integrated Optical Isolator With

Dynamic Non-Reciprocity,” CLEO-PR/OECC/PGC 2017. Paper ID: s1309.

17. K. Wang, Y. Wang, S. Gao, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh,

“Si Integrated Optical Phased Array for Efficient Beam Steering in Optical

Wireless Communications,” Globecom 2014.

18. S. Gao, Y. Wang, K. Wang, E. Skafidas, “High Index Contrast Circular Bragg

Reflector on Silicon-on-Insulator with Flat and Broadband Spectrum”, ACP 2014,

Nov 2014.

19. S. Gao, C.J. Chae, Y. Wang, and E. Skafidas, “Deeply Etched Silicon Circular

Bragg Reflector Optimized for High Reflectance, Wide Bandwidth and Reduced

Footprint,” OECC 2014, July 2014.

20. S. Gao, C.J. Chae, Y. Wang, E. Skafidas, “Fast Wavelength-Switchable Hybrid

Laser for Energy-Efficient Optical Interconnect,” IEEE Optical Interconnects

Conference 2014, May 2014.

21. K. Wang, S. Gao, Y. Wang, T. Song, T. Liang, A. Nirmalathas, C. Lim, K.

Alameh, and E. Skafidas, “Short-range infrared optical wireless communications

– Systems and integration,” Photonics Society Summer Topical Meeting Series

(SUM), 2016 IEEE, July 2016.

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Chapter 1 Silicon Photonics: Introduction and Review

1

CHAPTER 1 SILICON PHOTONICS:

INTRODUCTION AND REVIEW

1.1 Silicon Photonics Integration and Applications

Silicon (Si) integrated photonics is a breakthrough technology that has been recognized

as a promising solution to build large-scale and high-density photonic integrated circuits

(LHPICs). Such LHPICs are developed to meet the requirements of low-cost, high-

volume, energy-efficient, and ultrahigh-speed data processing and communications in

future optical networks, data centres, cloud servers, supercomputers, and various

consumer applications [1-5]. This is mainly because that silicon photonics integration is

compatible with the modern complementary metal oxide semiconductor (CMOS)

fabrication technology, which enables mass production of Si-based PICs with low cost

and high yield by using existing and high-advanced CMOS facilities. In addition, the

silicon material is also an appropriate material for photonics applications.

Firstly, there is a large refractive index contrast (∆n > 2) between the silicon waveguide

core (n = 3.47) and the surrounding cladding material, typically SiO2 (n = 1.44) or air

(n = 1), which allows silicon waveguides to be built with ultra-small dimensions in the

sub-micron level. The large index contrast also enables strong optical intensity within

the silicon waveguide, which activates non-linear effects relatively easily. Based on

these non-linear interactions, important optical functions like lasing, amplification, and

wavelength conversion can be realized [6]. Secondly, silicon has a transparent

transmission window in the 1.1 - 7 µm range, which covers the traditional near-infrared

optical communication band. Therefore, silicon based optical devices has very low

absorption loss inside this band [7]. Thirdly, as a semiconductor material, the

availability of refractive index control through either thermal effect or plasma

dispersion in silicon ensures that active functions such as optical modulation can be

realized [8]. Lastly, the high-quality silicon-on-insulator (SOI) wafer which can be

produced easily nowadays provide an ideal platform to build planar PICs.

Benefited from these exceptional advantages, silicon photonics has gained extensive

research attention over the past decade, and various fundamental optical devices such as

waveguides, filters, modulators, photodetectors, and lasers, have been successfully


2

realized on the silicon photonics integration platform [6, 9]. Nevertheless, instead of

building these discrete devices, the most important feature of silicon photonics is the

integration of multiple devices onto a single chip so as to build chip-scale optical

systems with compact size and low cost [10, 11]. Figure 1.1 shows the prototype of a

silicon photonic integrated wavelength division multiplexing (WDM) system developed

by us. As illustrated in the figure, all optical components needed to construct a WDM

system, including waveguides, optical modulators, wavelength-division-multiplexer/de-

multiplexer, and photodetectors, are monolithically integrated onto a single silicon chip.

The only component which is not monolithically integrated is the laser module which is

flip-chip bonded onto the silicon substrate. Based on this prototype, the optical and the

electronic components can be integrated seamlessly to provide dynamic system-level

optical functions on chip, and these components can be produced and packaged through

a single CMOS process. Such Si-based optoelectronic integrated circuits (Si-OEICs)

have substantial applications in future low-cost and high-volume tera-scale data

transmissions.

Figure 1.1. The prototype of a silicon photonic integrated four-channel WDM

transceiver.

On-chip optical interconnect

One of the promising applications of Si-OEIC is the on-chip optical interconnect (OI).

Si-based microelectronics, under the guidance of Moore’s law, have been driving the

improvement of data processing speeds for decades. This is mainly attributed to the


3

continuous advancement of the CMOS fabrication facilities and processes, which makes

it possible to constantly downscale the size of basic electronic computing elements and

increase their integration density and complexity within electronic microprocessors [12].

However, as the electronic integrated circuits (EICs) become increasingly dense, the

metallic electrical interconnects which are responsible for the communications between

different components of an EIC or different parts of a microprocessor have to be

arranged more and more densely as well. Consequently, the resulted inherent physical

limitations of these metal wires, such as the RC circuit delay and the frequency-related

loss, signal distortion, and crosstalk noise, have severely limited the overall

performance of the EIC. In the meantime, these metal wires have contributed the

majority of the power consumption of the EICs, which is called “the interconnect

bottleneck” [13-15].

To overcome this bottleneck, a breakthrough solution has been proposed which uses

optical interconnects. By using photons instead of electrons to transmit data between

these electronic components, we can avoid those physical limitations associated with

electronics and take the exceptional advantages of high-bandwidth, low-power-

consumption, and low-interference of photonics, which so far have only been widely

used in long-haul and short-reach optical fibre communications. Optical interconnects

can be employed to realize ultrafast and energy-efficient broad-to-broad, chip-to-chip,

or even intra-chip data communications [16]. Moreover, the compatibility of Si-OEIC

with existing CMOS fabrication lines enables the possibility of producing high-

performance OIs with low cost and high yield. Due to these great potentials, more and

more enterprises have launched their long-term projects for Si-based OI chips. For

example, IBM’s SNIPER (silicon nanoscale integrated photonic and electronic

transceiver) project aims to build ultrafast on-chip WDM systems which are compatible

with their standard CMOS lines for next-generation supercomputers [17]. Intel has also

announced their plan to replace chip-to-chip electrical interconnects with optical

interconnects to achieve a higher bandwidth of 100 Gb/s to 1 Tb/s [18].

Optical fibre networks

In addition to chip-scale optical interconnections, silicon photonics can also bring

enormous benefits to long-haul fibre optic transport networks and short-reach optical

communications. With the explosive growth of multi-media users and broadband


4

Internet services, the capacity of optical networks has improved substantially over the

past decade and will continuously face significant traffic demands with a growth rate of

around 30% per year [4]. To keep this rapid growth of the network capacity sustainable,

it is not only required to expand the channel capacity of the transmission links, e.g., by

developing more advanced optical modulation formats, but is also important to improve

the physical networks to have higher capacity, lower cost and better energy efficiency.

Currently, the photonic systems used in optical networks usually comprise of discrete

optical elements such as InP lasers and photodetectors, Lithium Niobate modulators,

etc., which are bulky, expensive, and lack of energy efficiency and function scalability

[19]. To meet the demand of future green optical networks, high-density photonic

integration is unavoidable. Silicon photonic devices, benefited from their ultra-compact

footprints, dense integration, low power consumption, as well as the integration and

interaction with conventional CMOS electronics at the chip or wafer levels, are

becoming promising solutions for future optical networks.

Data centres/super computers

Another major application of silicon photonics integrated circuits is inside data centres

and supercomputers. With the explosively increasing traffic [20] generated by cloud

computing, cloud storage, and multi-media streams, the capacity demand for data

centres also increases exponentially. This will not only result in an increase in the

number of vast data centres in the future, but will also need expansions of current data

centres to hold more servers, racks, storage, and networking functions. Consequently, a

more efficient and robust solution is needed to tackle the complicated interconnection

systems inside data centres in the future [19]. Similarly, the computing performance

required for the supercomputer is estimated to grow at around 60% per year. Whilst

multi-core and parallel processing architectures have been widely deployed for this need,

the intra-system interconnection bandwidth becomes a bottleneck [2].

The vertical-cavity surface-emitting laser (VCSEL)-based multi-mode parallel

interconnections, which are the dominant deployment in current data centres and

supercomputers, is difficult to meet the demands of future interconnections for higher

capacity and longer distance (kilometre-level), due to the limited direct-modulation

bandwidth and the difficulty of integrating the WDM functionality [19]. Moreover,

based on the current deployment, expanding data centres and supercomputers imposes a


5

huge pressure on the power consumption and the cost to run the more complicated

interconnection networks and cooling systems. Therefore, considering the above issues,

the silicon photonics integration, which is able to bring ultrafast and low-cost optical

interconnections to the levels of rack-to-rack, server-to-server, or even chip-to-chip, will

be a disruptively cost- and energy-efficient solution.

Industrial milestones

Due to these promising applications, silicon photonics has been extensively studied

since the 1980s [21, 22], and significant milestones have been achieved over the past

decade towards the commercialization of Si-based OEICs. In 2004, Intel demonstrated a

standard-CMOS-compatible silicon modulator with a modulation bandwidth exceeding

1 GHz [23], which made the monolithic integration of silicon modulator with CMOS

electronics possible. In 2006, Intel and the University of California, Santa Barbara co-

announced the first electrically pumped continuous-wave hybrid silicon laser [24],

which was a milestone for realizing low-cost light sources on silicon. In 2008, Luxtera

announced the world’s first fully integrated Si-based DWDM transceiver which was

produced based on the 130 nm CMOS fabrication lines and achieved an aggregate data

rate of 40 Gb/s [25]. In 2015, IBM announced a breakthrough in silicon photonic chips,

presenting a fully silicon integrated four-channel WDM transceiver which achieved an

aggregate data rate of 100 Gb/s [26]. More and more efforts and breakthroughs have

been pushing silicon photonics to the higher level of maturity, and the real

commercialization of this technology is foreseeable in the near future.

1.2 Components

The ultimate goal of Si-OEIC is to transfer the whole optical system onto a chip. Figure

1.2 illustrates the block diagram of a basic on-chip OI system [27]. To build such an OI

chip, all the building blocks of an optical system are needed, including a laser source to

generate the light signal, an optical modulator driven by electronic circuits to encode the

signal, optical waveguides for light transmission, and a photodetector on the receiver

side to detect and convert the light into photo current. The amplifier is used to amplify

the photo current and reproduce the original electrical signals. Other optical devices

such as switches, routers, splitters, and filters can also be added to the system to provide


6

more comprehensive optical functions. In this diagram, the laser source is externally

bonded to the chip, due to the limitation of silicon material itself (indirect bandgap).

Depending on whether external electrical control signals are needed to realize the

optical function, these components can be divided into two categories, namely the active

device and the passive device. Lasers, modulators, photodetectors, and amplifiers are

active devices, while waveguides, couplers, splitters, filters, and gratings are passive

devices. Passive devices are primarily used for light transmission, splitting, switching,

coupling and reflection, or are used as the components to construct more complex

optical devices. In next section, the four main building blocks of a silicon photonic chip,

which are on-chip modulator, laser, photodetector, and passive optical device, will be

briefly reviewed.

Figure 1.2. The block diagram of an on-chip OI system.

1.2.1 Silicon Optical Modulator

Due to its centrosymmetric crystal structure, the efficiencies of the primary electrical

field effects (including the Pockels effect, the Kerr effect, and the Franz-Keldysh effect)

which are conventionally used to achieve the refractive index modulations in traditional

III-V semiconductor or Lithium Niobate based modulators are very weak in silicon at

the telecommunications wavelengths of 1.3 and 1.55 m. This left the thermo-optic

effect and the free-carrier plasma dispersion effect as the only effective means to realize

the optical modulation in silicon [28]. However, although silicon has a very high

thermo-optic coefficient of 1.86×10-4/K, the modulation speed based on thermo-optic

mechanism is too slow to meet the requirement of modern telecommunications


7

applications. Therefore, the free-carrier plasma dispersion effect, due to its much faster

modulation speed, has become the most popular approach to realize optical modulations

in silicon photonics [8]. Based on the plasma dispersion effect, a change in the density

of free carriers in silicon will cause a change in its refractive index which is eventually

transferred to a change in the phase of the optical mode. This effect can be implemented

by three different configurations: carrier injection in a p-i-n diode, carrier depletion in a

p-n diode, and carrier accumulation in a MOS capacitor, which are illustrated in Fig. 1.3.

Figure 1.3. Diagrams of three different structures employed in plasma-dispersion-effect-

based silicon modulators to implement the mechanisms of (a) carrier injection, (b)

carrier depletion, and (c) carrier accumulation.

The way to achieve carrier injection is to use a p-n junction. However, since the high

doping concentrations in the p- and n- regions will cause high optical absorption loss if

the doped regions form the parts of the waveguide where optical power is concentrated,

a p-i-n structure is more suitable. As shown in Fig. 1.3(b), the intrinsic region is where

the optical power is contained. When the device is forward biased, the carrier density

injected into the intrinsic region will increase, and this will consequently cause a change

in the refractive index of the material which will be converted to a phase change of the

propagating mode. Soref and Bennet deduced the relation between the change of the

refractive index and the change of the free carrier densities [28, 29]. At 1.55 m, it is

expressed as:

22 18 0.8[8.8 10 8.5 1 (0 ) ]e h e hn n n N N (1.1)

Where ∆ne and ∆nh are the changes in refractive index resulting from the changes in

free-electron (∆Ne) and free-hole (∆Nh) carrier concentrations respectively. The resulted

phase change of the optical mode will be:


8

0

2 nL

(1.2)

Where L is the length of the active region of the modulator. Correspondingly, there is

also an additional absorption loss for the optical power due to the change of free carrier

concentrations [8]. The forward biased p-i-n diode approach has been proven to provide

high modulation efficiency. However, due to the slow carrier generation/recombination

processes, the modulation speed is usually limited. In contrast, the reverse biased p-n

junction could cause carrier depletion which has been proven to achieve the best high

speed result. As shown in Fig. 1.3(c), the central region of the waveguide is lightly n-

type and p-type doped. When a reverse bias is applied, a depletion region forms at the p-

n junction, which expands with the bias voltage and creates a change in the refractive

index of the waveguide. The third method to achieve plasma dispersion is through

carrier accumulation. As shown in Fig. 1.3(a), an insulating oxide layer is built in the

middle of the waveguide to form a capacitor. When a voltage is applied to the structure,

carriers will accumulate at the interface of the oxide layer, resulting in a change in the

refractive index. In contrast to carrier injection, the speed of carrier accumulation is not

limited to the minority carrier lifetime, but depends on the device resistance and

capacitance [23, 30].

Based on the plasma dispersion effect, an optical phase shifter can be realized through

above three different configurations. To convert the phase change into intensity change

and realize an optical intensity modulator, two different methods are mostly used. The

first one is manipulating the relative phase difference between two propagating waves to

achieve either a constructive or destructive interference. Normally, a Mach-Zehnder

interferometer (MZI) structure is used to realize this effect.


9

Figure 1.4. The schematic diagrams of (a) an MZI modulator and (b) a microring-based

modulator [31].

MZI-based modulator

Figure 1.4(a) shows a typical 1 × 1 MZI structure. The electric field of the propagating

wave at the input port of the MZI can be represented as:

0( ) j zE z E e (1.3)

Assume the lengths of the two arms are L1 and L2. For a basic 1 × 1 MZI structure

shown in Fig. 1.4(a), when ignoring the waveguide propagation losses, the electric field

at the output port will be:

1 1 2 2

0 0

1( )

2

j L j LE E e E e

(1.4)

The output optical intensity will be:

2

0 1 1 2 2

11 cos( )

2I E E E L L (1.5)


10

From Equation. 1.5, it can be seen that the output intensity of the MZI can be

manipulated by varying the relative phase of the two arms of the interferometer, and this

is the basic principle behind an MZI modulator, where the phase change can be realized

through refractive index change.

Microring-based modulator

The second popular way to convert the phase change to intensity change is using a

microring resonator such that a small refractive index change of the resonator will cause

a change in the resonances, and consequently, there will be a significant change in the

device transmission. Figure 1.4(b) shows the first microring modulator demonstrated by

Xu et al. in 2005 [31]. In this modulator, the plasma dispersion effect was implemented

by carrier injection based on a p-i-n diode. Theoretically, for the all-pass-type microring

resonator shown in Fig. 1.4(b), the intensity transmission is given as [32]:

2 2

2

2 cos

1 2 cos ( )

pass

input

I a ra r

I ar ra

(1.6)

Where Ф = β∙2πR is the single-pass phase shift, R is the radius of the ring, a is the

single-pass amplitude transmission coefficient, and r is the self-coupling coefficient.

The ring is on resonance when the optical length of the ring is a whole number times of

the light wavelength, and the optical waves in the device will interfere constructively:

2eff

res

n R

m

1, 2, 3...m (1.7)

When the ring is on resonance (Ф = 2mπ), most of the incident power will be circulated

or preserved inside the ring, and the transmitted component will be minimum, the

intensity transmission equation becomes:

2

2

( )

(1 )

pass

input

I r a

I ra

(1.8)

In practice, the resonator is tuned such that the operating wavelength is on the slope of

the resonance peak, and by modulating the refractive index of the ring, the resonance

peak is shifted and the output intensity of the device is changed [32].


11

Compared with the MZI-based modulators which normally need a long interaction

length to realize the optical interference, the microring-based modulators could have

smaller footprints due to their looped resonant structure, and this also implies lower

insertion loss and power consumption. But on the other hand, the bandwidth of the

microring modulators is usually much narrower than MZI-based modulators, which also

indicates a higher sensitivity to fabrication errors and temperature variations [8, 33]. To

stabilize the temperature, accurate temperature controlling components and

specifications will be needed, which could instead increase the power consumption of

the device. Therefore, in practice, there will be trade-offs, and the modulator should be

chosen based on the requirements of specific applications.

Research progress

Silicon modulator was one of the earliest silicon photonic devices that researchers began

to put into study since the 1980s [34]. Initially, silicon modulators were implemented

based on the carrier injections in a p-i-n diode structure [35-38], which suffered from

relatively high optical loss and low speed, due to the high absorption of the highly

doped silicon waveguide and the long minority carrier lifetime in silicon. To overcome

these drawbacks, optimizations in modulator geometry and size had been studied, and

gigahertz modulation speeds had been presented [39-41]. In 2004, Intel demonstrated

the first monolithically integrated silicon modulator based on carrier accumulation,

which avoided the slow minority carrier lifetime in carrier-injection-type modulators

and achieved a bandwidth of >1 GHz [23]. Later on, they had improved the data rates to

10 Gb/s based on the carrier accumulation [30]. The first carrier-depletion-based

modulator was proposed by Gardes et al. in 2005, presenting a theoretical bandwidth of

50 GHz [42]. Since then, various modulators of this type based on reverse-biased p-n

diode had been presented, with data rates of >10 Gb/s [43-45]. In 2007, Intel improved

the 3 dB bandwidth of carrier-depletion-based modulator to 30 GHz with an ultrafast

data rate of up to 40 Gb/s [46]. Compared with the carrier-injection-type modulators,

the speed of carrier-depletion-type modulators is not limited by the minority carrier

lifetime due to the reverse bias, however, their smaller region for optical mode to be

interacted with the variations of the carrier density results in lower modulation

efficiency. The first microring-based modulator was experimentally demonstrated by

Xu et al. in 2005 [31], with the consideration of significantly improving the device

footprint and power consumption compared with the MZI-based modulators. The


12

modulator was based on p-i-n diode carrier injection with an initial reported data rate of

1.5 Gb/s. Later on, they had improved the performance to 16 Gb/s based on a pre-

emphasis driving signal [40]. Meanwhile, microring-based modulators based on carrier

depletions have also been studied [43, 44], and fast speed of >35 GHz was presented

[47]. In practice, the bandwidth, modulation speed, insertion loss, power consumption,

device footprint, and the CMOS compatibility etc. are some of the most important

metrics that should be taken into account when designing a silicon optical modulator [8].

But these metrics can sometimes contradict to each other, therefore trade-offs should be

carefully considered in specific applications. Meanwhile, continuous efforts are still

required to take the full advantages of the silicon integrated modulator and catalyze the

progress of Si-OEIC.

1.2.2 Si-integrated Laser

Due to the indirect bandgap structure, it is very challenging to realize lasers and

amplifiers in crystalline silicon. The misaligned momentums of conduction band and

valence band in silicon results in very poor efficiency of the radiative electron-hole

recombinations based on which the optical gain is achieved. As the gain is

insufficient to compensate for the free carrier absorption loss which is orders of

magnitude higher, the bulk silicon exhibits a net loss property under carrier

injections, and therefore it has been regarded as an incapable material for light

amplification and emission [6, 48, 49]. To overcome the hurdle and integrate light

sources onto the silicon platform, various approaches have been proposed and

studied, which are mainly based on the following several mechanisms: (1) Quantum

confinement, (2) Stimulated Raman scattering (SRS) effect, (3) Erbium (Er)-doping,

(4) Germanium (Ge)-on-silicon, (5) III-V compound hybridization.

Quantum confinement-/SRS-based laser

The basic principle of quantum confinement effect is to localize the carriers (or

confine the carriers at a small space free of defects) such that their momentums

become uncertain, and this in consequence could increase the probability of the

radiative recombination. The method to implement quantum confinement is using

Si-based nanostructures such as porous silicon, quantum wells, quantum dots, silicon

nanocrystals, etc. [50]. The SRS effect is based on the Stokes transition which is


13

induced by a pump light, and the wavelength resonant with the stokes transition can

be coherently emitted [51]. SRS was initially introduced in silica optical fibres to

realize lasers and amplifiers, and it was in 2002 when it was firstly proposed as a

way to realize lasers and amplifiers in silicon [52]. In 2007, a milestone work was

done by Intel, in which they demonstrated the first continuous-wave Raman silicon

laser [53]. Despite these progresses, the silicon lasers based on quantum

confinement and SRS effect usually suffer from a number of drawbacks which

hinder their usefulness for on-chip OIs, for example, they emit non-

telecommunications-band wavelengths and exhibit quite low emission efficiencies,

and the need of optical pumping instead of electrical pumping make them unsuitable

for on-chip integrations [54]. Therefore, in recent years, the study of silicon lasers is

mainly focused on the rest three methods.

Er-doped Si-laser

The great success of Er-doped fibre amplifiers and lasers in optical networks, as well

as their ability to emit light at wavelength of 1550 nm, have greatly motivated the

development of Er-doped silicon lasers. However, the gain of Er-doped bulk silicon

laser is quite low, both due to the low concentration of Er within bulk silicon and the

substantial non-radiative processes such as the Auger recombination and the back-

transfer of energy from the excited Er ions to silicon [55]. To overcome these issues,

the most popular solution is to dope Er into an SRO (silicon-rich-oxide) layer (a

SiO2 layer containing dispersed silicon nanocrystals) which acts as the optical gain

medium. Compared with the Er-doped silicon, the wider bandgap of silicon

nanocrystals in SRO reduces the energy back-transfer from Er ions to silicon, and

the low free carrier concentration in SiO2 could suppress the Auger recombination

[33]. Moreover, by sandwiching the Er-doped SRO layer between a metal layer and

the silicon layer (a MOS structure illustrated in Fig. 1.5), the electrical pumping can

be achieved. When a voltage is applied to the MOS structure, the Er atoms will be

excited, meanwhile, the silicon nanocrystals can also be excited, acting as the

sensitizers and transfer their energy to the nearby Er ions [6]. There are still

challenges to achieve high emission efficiency based on this method. For example,

the free carrier absorption loss is high, and the solubility of Er in SRO is still very

low [56]. To improve the efficiency, the method to increase the Er concentration in

SRO will be needed in the future. Nevertheless, good progress has been made in this


14

field, e.g., electroluminescence with a power efficiency of 10-2 and Er population

inversion of up to 20% has been demonstrated [57].

Figure 1.5. The schematic of SRO embedded in a MOS structure for electrical pumping.

Ge-on-Si laser

Same as silicon, Ge is also a material with indirect bandgap, however, the energy

difference between its direct and indirect bandgaps is only 136 meV, making it a so-

called pseudo-direct-bandgap material. In addition, Ge’s direct bandgap of 0.8 eV

corresponds to the optical telecommunications wavelength of around 1550 nm, and

Ge is compatible with the traditional silicon CMOS fabrication processes [58].

These special properties of Ge have greatly motivated researchers to pursue light

sources based on the Ge-on-Si platforms. One way to reduce the energy difference

between the direct and indirect bandgaps is introducing tensile strain in Ge layer.

According to [59], a 0.25% tensile strain reduces the energy difference to 115 meV.

To turn Ge into a complete direct-bandgap material, a 2% tensile strain will be

needed however, this will shrink the bandgap to 0.5 eV at the same time and shift

the emitted wavelength to 2500 nm. The way to reduce the energy difference while

keeping the tensile strain at a small percentage is employing n-type doping. By

filling the indirect L valleys with electrons, the energy difference can be

compensated and the emission efficiency at 1550 nm is greatly improved. The

concept of Ge-on-Si laser was first proposed in [59]. Afterwards, it has been

extensively researched and significant milestones have been achieved in both

optically and electrically pumped Ge-on-Si lasers [60, 61]. Although further

research is still needed to improve the viability of monolithic integration of Ge laser

in silicon, e.g., it is needed to deal with the conflicting impacts of the heavy n-


15

doping concentration [54], the good progress, along with the great potentials of Ge,

remain it as a promising candidate for Si-integrated on-chip light sources.

Hybrid Si-laser

Currently, the most practical method to realize light sources in silicon photonics is

integrating III-V compounds into silicon substrates so as to realize a so-called

hybrid silicon laser. The first way to do this is applying traditional hetero-epitaxial

growth of III-V layers on silicon substrates. However, the high-density threading

dislocations caused by the large difference in lattice constants and thermal

expansion coefficients of silicon and III-V materials make this approach very

difficult. One way to resolve the issue is to apply a buffer layer with an appropriate

lattice constant to alleviate the threading dislocations, such as SiGe [62] or GaSb

[63]. Another method is using quantum dots. Based on the good defect-tolerant and

threading-dislocation-filtering capabilities, various Si-based quantum-dot lasers

were presented, which have been summarized in [54]. The second method to

integrate III-V compounds to silicon substrates is the heterogeneous wafer-bonding

techniques, which is also the most appealing solution for industry use nowadays.

Based on this technique, the unpatterned III-V epitaxial layer of either a wafer or

dies can be directly molecule-bonded onto the patterned silicon substrates or through

adhesives such as divinylsiloxane-benzocyclobutane (DVS-BCB) [64], and after the

removal of III-V substrate, only the epitaxial layer exists above the passive silicon

photonic circuit, which will then be patterned to form the active gain structure. The light

generated in the active region is evanescently coupled to silicon waveguide, which

avoids the lattice-mismatch issues associated with the hetero-epitaxial growth

approach [65].

In addition to the above two methods, a more simplified way to integrate III-V

compounds is directly mounting a III-V semiconductor die onto an SOI wafer by

solder bumps. An external-cavity (EC) hybrid silicon laser is the most popular

configuration of this method. The advantages of the EC lasers include the low cost

and simplicity in fabrication process. Moreover, since the gain module and the laser

cavity are separate, they can be chosen and optimized individually to achieve better

performance of each section with great flexibilities. We proposed a wavelength-

switchable external-cavity laser structure in [66], and the concept is shown in Fig.


16

1.6. An SOA (semiconductor optical amplifier) die is flip-chip bonded onto the

silicon substrate, serving as the gain medium. Based on the cascaded active

microring resonators, we can realize a laser with compact size, switchable

wavelength, narrow linewidth and large free spectral range, which is suitable for use

in WDM networks. However, due to the different refractive indices and light

confinement properties of the gain module and the silicon waveguide, the main

challenge for this type of laser is the realization of efficient low-loss coupling

between the gain and the external cavity. The coupling can be assisted with a spot-

size converter, but accurate optical alignment will be needed, which could increase

cost and time for manufacture, thus more trade-offs remain to be considered.

Figure 1.6. Proposed wavelength-switchable laser. (a) conceptual design, (b) detailed

implementation, (c) SEM image of a broadband reflector [67].

1.2.3 Ge-on-Si Photodetector

Silicon exhibits a transparency within the optical telecommunications band of 1.3-1.55

m, making it a suitable candidate for optical waveguides. But on the other hand, this

also hints that photo-detection within this band would be impractical due to the weak

photon absorption efficiency. Ge, on the other hand, exhibits a much stronger

absorption in 1.3-1.55 m due to its smaller bandgap structure. Moreover, Ge is

compatible with the silicon CMOS fabrication processes and is much easier to be


17

integrated into silicon substrates compared with the III-V compounds which is another

viable material for photo-detection. Therefore, Ge-on-Si photodetector has become the

most popular approach for photo-detections in silicon photonics and has obtained rapid

progress over the past decade.

The main challenge in Ge-on-Si photodetector is the growth of high-quality epitaxial Ge

layer onto silicon substrates, as the 4.2% lattice mismatch between Ge and Si leads to

severe surface roughness and threading dislocations at the interface of the two layers,

which could seriously influence the performance of the detector and the subsequent

CMOS processes [68]. The first successful approach, which was demonstrated by Luryi

et al. [69], was inserting a graded SiGe buffer layer to reduce the threading dislocations,

and this method was later improved by Fitzgerald et al. using multiple buffer layers [70,

71]. The downside of this method is that the buffer layer is very thick, which could

affect the coupling efficiency between silicon waveguide and the Ge photodetectors in a

waveguide-integrated-type Ge-on-Si photodetector in Si-OEICs [72]. The second

approach is based on a two-step epitaxial growth process [73, 74]. The first step is to

directly grow a thin layer (30-60 nm) of epitaxial Ge on silicon substrate by chemical

vapor deposition (CVD) using a low temperature of around 350C to prevent islanding,

in the second step, the temperature is increased to around 600C to grow thick high-

crystal-quality Ge absorption layer with higher growth rates. By this method, the growth

of Ge absorption layer is no longer influenced by the Ge/Si lattice mismatch therefore

could have a much smoother surface. However, the threading dislocation density of this

method is usually high and high-temperature annealing (>750C) is often needed to

effectively reduce it [68]. Various other approaches to grow Ge on silicon have also

been explored, such as by combing thin SiGe buffer layers with the two-step Ge growth

process, and good surfaceness and low threading dislocation density have been

demonstrated [75, 76].

The first type of structure of the p-i-n type Ge photodetectors demonstrated is the

normal-incidence structure, for which light is normally (or vertically) illuminated onto

the surface of the Ge detector for photocurrent generation, which is also the simplest

form and has long been used in optical communications. However, the normal-

incidence structure involves critical trade-offs in meeting the primary figures of merit of

photodetectors, which include the detector bandwidth, efficiency, and dark current noise.

Simply speaking, higher photon absorption efficiency needs a thicker Ge layer as this


18

could increase the absorption length in the intrinsic region, but on the other hand this

results in a lower bandwidth and higher dark current, as the thicker Ge also increases the

carrier transit time and the junction capacitance [33]. Fortunately, the trade-off can be

resolved with another type of structure, which is the waveguide-integrated structure. In

this structure, Ge is formed as part of the waveguide which is extended from the silicon

waveguide. Consequently, light is going through Ge detector horizontally rather than

vertically, and the Ge thickness will no longer limit the absorption efficiency and can be

made much thinner to have high bandwidth and low dark current simultaneously [72].

Moreover, the waveguide-integrated detectors have a device area which is significantly

smaller than that of the normal-incidence detector, and are more suitable for planar

CMOS processes, which greatly favours the building of large-scale Si-OEICs.

Therefore, waveguide-integrated Ge-on-Si photodetectors have become a promising

candidate in silicon photonics and have achieved good research progress, e.g., detectors

with high responsivity, wide bandwidth, and low noise have been demonstrated [77, 78].

Compared with the p-i-n type Ge photodetectors, the avalanche Ge-on-Si photodetectors

(Ge-on-Si APDs) can provide better sensitivity based on their advantage of internal

multiplication mechanism, thus have become increasingly attractive in recent years [68].

By combining the small ionization ratio (<0.1) advantage of silicon with the strong

absorption property of Ge, the performance of Ge-on-Si APDs have been demonstrated

to exceed the traditional III-V APDs in terms of higher gain-bandwidth products and

better sensitivity [79-81]. Moreover, same as the waveguide-integrated p-i-n Ge

detectors, the waveguide-integrated Ge-on-Si APD can also achieve a lower dark

current and higher bandwidth-efficiency products compared with the normal-incidence

APDs [82], which makes it a competitive candidate for future high-speed on-chip

optical systems.

1.2.4 Passive Silicon Photonic Device

As the fundamental building blocks of the complex PICs, passive components, such as

waveguides, Y-junctions, directional couplers (DCs), multi-mode interference couplers

(MMIs), Bragg gratings, etc., are used to realize various passive optical functions of the

circuit such as light guidance, power splitting, wavelength filtering, optical reflection,

polarization rotation, etc., or used as the basic constituents to build active and passive

devices with more complex functions such as lasers, modulators, and photodetectors.


19

Therefore, the performance and the size of the passive components play a pivotal role in

Si-based photonic integrations, which is also within the major interest of this thesis.

The most fundamental passive function within a silicon photonic circuit is the guidance

of light. The two most popular waveguide structures are rib waveguide and strip

waveguide. Rib waveguides benefit from smaller propagation loss, lower fabrication

requirement, and easier coupling with optical fibres due to their relatively large cross-

section size (multi-micron). But strip waveguides, despite their critical feature size,

more challenging fibre-coupling, and higher requirement on waveguide smoothness, are

the most competitive candidate to meet the large-scale and high-density photonic

integration requirements for Si-based PICs. This is because strip waveguides have ultra-

small dimensions of sub-micron level, and they can be used to realize tight waveguide

bends with radius of only several microns. The major challenge with strip waveguide is

the high scattering loss resulting from the strong interaction of the confined mode with

the imperfectly fabricated waveguide sidewalls, which is also the main constituent of

the waveguide propagation loss. Particularly, the transverse-electric (TE) polarized light

suffer more from the sidewall roughness than the transverse-magnetic (TM) polarized

light, due to their stronger optical field concentration at waveguide sidewalls. Without

further optimization on waveguide roughness, propagation loss of around 3 dB/cm at

1550 nm was typically reported for dry-etched strip waveguides [83-85]. By wet-

etching or applying high-temperature thermal oxidations, the sidewall roughness can be

effectively reduced, and propagation loss of <1 dB/cm has been presented [86-88].

The second challenge with strip waveguide is obtaining low-loss coupling with external

fibre, due to the significant mode-size mismatch. Two common methods are normally

used, which are the vertical coupling through surface grating couplers and the edge

coupling through spot size converters (SSCs). In comparison, grating couplers usually

have a relatively large coupling loss of several dB and a narrow 3 dB bandwidth of only

tens of nanometres [89-91], and the non-fully-etched structure requires more complex

fabrication process. In contrast, edge couplers can achieve a low sub-dB coupling loss

and a much wider 3 dB bandwidth of hundreds of nanometres [92-94], which are

suitable for wideband operations, and normally the fabrication of them only needs one

step of full etch down to the substrate. But on the other hand, the alignment tolerance of

the edge coupling is much lower than that of the grating coupling, and sub-micron

alignment accuracy is needed to avoid substantial coupling losses [95]. In contrast,


20

grating couplers have much more relaxed alignment tolerances. An alignment error of

±2 µm in grating coupler leads to an additional coupling loss of <1 dB [90, 96], which

makes it a more commercial approach due to the reduced packaging cost [97].

Another major issue in silicon photonic circuit is the polarization handling. The planar

structures of silicon waveguides and devices show significant birefringence, which

makes them strongly polarization sensitive, therefore a polarization-diversity scheme is

usually applied in the design of Si-PICs. To realize an on-chip polarization-diverse

system, an integrated polarization manipulation device is normally needed, such as a

polarizer, a polarization rotator (PR), or a polarization beam splitter (PBS). A polarizer

only transmits light with the desired polarization while blocks the other, and its

principle is mainly based on the leakage or cut-off of light with unwanted polarization.

The leakage-type polarizer usually needs a sufficiently long device length to ensure a

high leakage loss (1 mm in [98]), while the cut-off-type polarizer, such as the

plasmonic-type polarizers [99, 100], can be made very short (several microns) due to

the strong mode attenuation, but it comes with the introduction of new materials such as

metal into the silicon substrate, which increases the fabrication complexity and

introduces high insertion loss. The principle of PR is based on mode hybridization,

where a TE/TM mode is gradually rotated or converted to a TM/TE mode, normally

through a specific asymmetric or multi-level structures [101], and the fabrication of

such structures can be very complex. In comparison, PBS is the simplest and most

fabrication-friendly polarization handling device. It works by separating the input light

with hybrid polarizations into two outputs with single polarization, and can be realized

through various planar structures, such as MZIs, MMIs, or DCs [102-104]. Based on the

large birefringence of silicon waveguides, silicon PBS can have high extinction ratio

(ER) and compact device size. But on the other hand, the large birefringence of silicon

platform also indicates a high sensitivity to fabrication errors [105], which could

seriously influence the ER of the PBS.

As an alternative, we have proposed an MZI-based PBS in silicon nitride (SiN) platform

[106] (shown in Fig. 1.7). The availability for growth with either low-pressure chemical

vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD),

as well as the compatibility with silicon CMOS fabrications make SiN another attractive

platform. In our PBS, the low refractive index of SiN provides a higher fabrication

tolerance and a lower waveguide scattering loss compared with Si-based PBSs, and


21

based on an optimized phase control section, a high ER of >20 dB has been achieved

over a wide 80 nm wavelength range (1530 nm – 1610 nm) with a minimum insertion

loss of only 0.13 dB, and the whole device length is only 113 m, which is significantly

shorter than the previously demonstrated works such as the SiN-based PBS in [107].

Figure 1.7. (a) Optical microscope image of the fabrication PBS. (b) SEM (scanning

electron microscope) image of the SiN waveguide (cross-section).

1.3 Thesis Objective and Organisation

Chapter 1 has introduced the promising applications of silicon photonics and reviewed

the major components of the silicon photonic system, which include silicon integrated

laser, modulator, photodetector, and passive optical device. Amongst these key silicon

photonic building blocks, the passive device will be the focus of this thesis. Specifically,

in this thesis, two main types of passive optical devices, namely the optical power

splitter and the Bragg grating mirror, will be studied and investigated based on the

silicon photonics integration platform. A power splitter is widely used for light power

distributions or the construction of more complex optical devices, such as optical

switches, modulators, multiplexers, etc. An integrated Bragg grating mirror is used for

on-chip reflections which normally have important applications such as lasers,

resonators, or wavelength filters, etc. Therefore, these two devices are the two most

fundamental building blocks of the optical systems, and play an important role in

realizing highly integrated and high-performance Si-PICs.

The key contributions of this thesis will include the design of a silicon integrated ultra-

broadband and low-loss adiabatic optical power splitter and a silicon integrated ultra-

broadband and high-reflectivity circular Bragg grating mirror. In addition, the

fabrication process of these two devices will be developed based on the 220 nm SOI

platform, and will also be presented in this thesis.


22

The specific thesis organisation will be as following:

Chapter 2 has two major sections. In the first section, the principle of single-mode

silicon strip waveguide is presented. In the second section, the fabrication process of the

single-mode strip waveguide and the passive silicon photonic devices is developed and

demonstrated based on the 220 nm SOI platform. The developed process presented in

this chapter is the fundamental step to realize the low-loss silicon waveguide as well as

the devices proposed in Chapter 3 and Chapter 4 of this thesis. In this chapter, the

silicon photonic chip measurement setup is also demonstrated.

In Chapter 3, a 3-dB optical power splitter based on adiabatic silicon tapers is proposed

and experimentally demonstrated. The proposed splitter breaks the bottleneck of the

conventional silicon integrated 3-dB optical power splitters, and for the first time, it

achieves the properties of ultrabroad band, low excess loss, polarization insensitivity,

and compact device size simultaneously. The exceptional advantages of the splitter

make it a promising element for use in building large-scale and high-density Si-PICs.

In Chapter 4, a novel circular Bragg grating mirror is proposed and experimentally

demonstrated based on the 220 nm SOI platform. The proposed circular Bragg grating

mirror solves the difficulty of achieving high reflectivity and broad reflection bandwidth

simultaneously for conventional Bragg gratings based on the thin-silicon SOI wafer,

and it has a very compact device size of only several microns. As one of the promising

applications of the proposed circular Bragg grating mirror, a compact, high extinction-

ratio, and low-loss integrated notch filter is also demonstrated in this chapter.

In Chapter 4, in addition to the circular Bragg grating presented on the 220 nm SOI

platform, which is designed for TE-polarized light, two different solutions to realize

broadband and high-efficiency TM-reflections are also proposed and investigated based

on FDTD simulations. These solutions are based on non-220 nm SOI platform. The first

solution is a circular Bragg grating with thickened grating blades, and the second

solution is a circular Bragg grating based on the horizontal slot silicon waveguide. Both

solutions are proved to be effective for TM-reflection. Finally, in this chapter, two

extended applications of the proposed slot grating, including a polarization-selective

Bragg grating mirror, and a broadband high-extinction-ratio TM-pass/TE-block

polarizer is proposed and investigated based on simulations.

The conclusions and future work of this thesis are presented in Chapter 5.


23

The references are shown in Chapter 6.

Chapter 2 Passive Silicon Photonic Device Fabrication

24

CHAPTER 2 PASSIVE SILICON

PHOTONIC DEVICE FABRICATION

2.1 Single-Mode Silicon Waveguide

In this chapter, the principle of single-mode silicon strip waveguide and its fabrication

process will be discussed. Specifically, in this section, the major properties of silicon

strip waveguide, which include the single-mode condition, typical size, the fundamental

modes, and the source of the waveguide propagation loss will be discussed. In the next

section, the developed fabrication process of single-mode silicon strip waveguide and

the proposed passive devices in this thesis will be presented in detail. In addition, the

experimental measurement setup will also be introduced at the end of this chapter.

Optical waveguide is used for light guidance and routing in PICs. It is also used as the

fundamental building block to construct various integrated optical devices with more

complex functions such as directional couplers (DCs), MZIs, polarization rotators,

micro-ring resonators, etc. As introduced in Chapter 1, the two most commonly used

waveguide structures in silicon photonics are rib waveguide and strip waveguide. Both

types of waveguide have merits and demerits, depending on specific applications. But in

terms of realizing the true advantage of silicon photonics which is large-scale and high-

density photonic integration, strip waveguide is recognized as the only competitive

candidate due to its ultra-small dimension of hundreds of nanometres. Moreover, based

on the tight optical confinement, the bending strip waveguide can be made with very

small radius of only a few microns, while still keeping a low bending loss. This is

especially advantageous in building high-density PICs. In contrast, the bending rib-

waveguide normally needs a radius of at least hundreds of microns to achieve a low

bending loss. Benefited from the large refractive index of silicon and the tight optical

confinement of strip waveguide, silicon photonic devices can normally be made to be

very compact and have good performance. In this thesis, the strip waveguide is used in

the design of silicon photonic devices and chips.


25

Figure 2.1. The schematic diagram of a silicon strip waveguide: (a) 3D view; (b) cross-

section view.

Figure 2.1 shows the schematic of a typical SOI-based strip waveguide with a cross-

section size denoted as W × T. The strip waveguide made of silicon has a very high

refractive index of 3.47 and sits above a so-called BOX (Buried-Oxide) layer which

has a much lower refractive index of 1.44. Based on such a large refractive index

difference, the waveguide could provide a very strong optical confinement and can be

made very compact to satisfy the “total internal reflection” (TIR) condition. Normally,

the BOX layer is made thick enough (1 - 3 m) to avoid evanescent coupling to the

silicon substrate, and in practice the waveguide can be covered by either SiO2 or air as

the upper cladding.

Theoretically, depending on its cross-section size (W × T), the waveguide shown in Fig.

2.1 can support single or multiple “propagation modes”, with each mode having a

different effective refractive index (neff). From a physical point of view, these

propagation modes can be regarded as different energy transmission forms within the

waveguide. From a mathematical perspective, these modes correspond to the eigenmode

solutions of the Maxwell equations. In practice, to avoid intermodal dispersion, the

waveguide size is determined such that it will only support one mode, which is the

“fundamental mode”, and optical devices are normally designed specifically based on

this fundamental mode. Therefore, retaining a single-mode transmission scheme is

important in Si-PICs.

In practice, the most commonly used thickness for single-mode silicon strip waveguides

is about 200 - 250 nm. The aspect ratio of the waveguide width to thickness is normally


26

designed to be about 2:1, which is based on a number of considerations such as the

single mode transmission condition, waveguide propagation loss, waveguide bending

loss, and the ease of fabrication, etc. The exact waveguide thickness is usually chosen

based on specific applications. Particularly, a thickness of 220 nm has been taken as a

standardized size by some major silicon photonics fabrication foundries in the world

such as IME, IMEC, and LETI [108] and therefore has been widely adopted for use in

many academic and industrial research groups around the world. In this thesis, the

silicon photonic device and the chip design is based on the 220 nm SOI platform.

Theoretically, it is complicated to obtain the exact analytical solution of a non-planar

waveguide such as a silicon strip waveguide. Instead, a variety of numerical methods

have been proposed for the analysis of guided modes, such as the finite element method

(FEM), film mode matching method (FMM), beam propagation method (BPM), and

finite difference time domain method (FDTD), etc. [109] In this thesis, the FDTD-based

Maxwell solver Lumerical FDTD solutions and MODE solutions are utilized for the

analysis of optical modes and the device design.

Figure 2.2. The change of effective refractive index with waveguide width for 220-nm-

thick silicon strip waveguide with a top cladding of SiO2. The simulations were carried

out using Lumerical Mode solutions, and the refractive indices of Si and SiO2 were set

to be 3.477 and 1.444, respectively.


27

Figure 2.3. (a) – (d) The mode profiles of the fundamental TE and TM mode based

different waveguide widths.

Figure 2.2 shows the simulated effective refractive indices of the fundamental mode and

the first higher-order mode at 1550 nm with the change of waveguide width (W) for a

220-nm thick silicon strip waveguide. When both the upper and lower claddings are set

to SiO2, the waveguide can be called as a “symmetric waveguide”, as it has the same

refractive index for the top and bottom claddings. In this case, the single mode

condition is satisfied when W is ≤ 460 nm, as indicated in the figure. Figures. 2.3(a) and

2.3(b) show the simulated mode profiles of the fundamental TE and TM mode for a

460-nm wide silicon strip waveguide. As shown in the figure, while the electric field

intensity of the fundamental TE mode is mainly confined within the waveguide core,

the intensity of the fundamental TM mode is mainly concentrated at the top and bottom

interfaces of the waveguide with a large cladding penetration. As a result, neff-TE is larger

than neff-TM as shown in Fig. 2.2. The mode concentration at the waveguide boundaries is

caused by the discontinuity of the normal component of the electric field at the

waveguide boundaries which can be expressed by the boundary condition as following:

1 1 2 2n nE E (2.1)


28

Therefore,

2 211 2

2 2

2 12

n

n

EI

I E

(2.2)

Where ε1 and ε2 are the permittivity of different mediums across the boundary, En is the

normal component of the electric field which is also the only electric component of the

fundamental TE mode, and I is the optical intensity. In practice, as the sidewall

roughness of the fabricated waveguide is usually worse than the roughness of its top and

bottom interfaces, the fundamental TE mode usually has higher propagation loss than

the fundamental TM mode due to its stronger interaction with the sidewalls. Compared

to an “asymmetric waveguide” which has different refractive indices for the top and

bottom claddings, a special property of the symmetric waveguide is that the

fundamental modes will never be cut off regardless of what W is chosen, which means

that mathematically, the solution of the eigenmode equation always exists for the

fundamental TE and TM mode. On the contrary, for an asymmetric waveguide, once the

waveguide dimension is below a certain value, even the fundamental modes could be

cut off. But on the other hand, with a narrow waveguide width, e.g., 200 nm, as shown

in Figs. 2.3(c) and 2.3(d), the mode confinement will be very weak, and in practice,

such a weak mode confinement could be easily lost when light is going through tight

waveguide bends or transmitting in a non-ideal index environment where the refractive

indices of the top and bottom claddings are not exactly the same [108]. Furthermore, the

waveguide propagation loss would normally be higher for a narrower width, due to the

stronger mode interaction with the waveguide sidewalls. Therefore, in practice, to retain

both the single-mode transmission and low propagation loss, 460 × 220 nm has become

the most popularly used size for silicon strip waveguides.

The propagation loss of a passive silicon waveguide is mainly composed of three

components, namely the intrinsic material absorption loss (inter-band absorption), the

waveguide bending loss, and the mode scattering loss which is caused by the waveguide

surface roughness. As introduced in Chapter 1, silicon has a transparent window which

covers the major 1.3 - 1.55 μm telecommunications band within which it has negligible

absorption loss, therefore this part of loss is not a major contribution of the total

propagation loss. To understand the cause of the waveguide bending loss, it is more

intuitive to consider it in a ray optics model. Bending a straight waveguide would lead


29

to a decrease of the light incident angle, and once the incident angle is decreased below

the critical angle, the TIR would be broken and a part of light would be leaked into the

claddings, which results in a part of radiation loss. The bending loss is mainly

determined by the lateral mode confinement ability of the waveguide as the bending

occurs in the lateral plane. Due to the high index contrast and the small dimension of the

silicon strip waveguide, the bending loss is very low even with a small bending radius,

e.g., a 220-nm-thick 90° silicon strip waveguide bend with a bending radius of 2 μm

only exhibited a bending loss of around 0.1 dB [83]. Normally, the bending loss of a

silicon bending strip waveguide would be negligible if the bending radius is ≥ 5 μm.

The propagation loss of a silicon strip waveguide mainly comes from the waveguide

surface scattering loss. The high-density mode confinement within the small waveguide

core indicates a strong interaction of the guided mode with the waveguide surfaces,

therefore the propagation loss is very sensitive to the waveguide surface roughness. In

addition, as the top and bottom surfaces of the waveguide are relatively smooth based

on the crystal growth of the silicon layer, the scattering loss is mainly determined by the

roughness of the waveguide sidewalls which is dependent on the applied fabrication

process. Therefore, achieving smooth sidewall roughness is one of the important goals

of silicon photonic fabrication.


30

2.2 Fabrication and Measurement

2.2.1 Fabrication Process Based on 220 nm SOI

Figure 2.4. The silicon photonic fabrication process based on 220 nm SOI.

The fabrication process of silicon strip waveguide is illustrated in Fig. 2.4. The

fabrication started with SOITEC’s UNIBOND 200mm (8') SOI wafer with a 220-nm-

thick silicon layer and a 2-μm-thick BOX layer. The 8' SOI wafer was cleaved into

square pieces with a dimension of 7cm × 7cm such that it could be processed by the

employed fabrication facilities which support a wafer size of up to 4 inch. The photonic

structures were defined through E-beam lithography (EBL), with ZEP520A used as the

e-beam resist. After development of the positive-tone resist, Chrome (Cr) was deposited

by E-beam evaporation to serve as the etching mask for the silicon device layer, and the

silicon device layer was then etched through deep reactive-ion etching (Oxford Plasma

Lab100). After Cr removal, SiO2 was deposited on chip by plasma-enhanced chemical

vapor deposition (PECVD) to serve as the upper cladding layer.


31

2.2.1.1 E-beam lithography

EBL was implemented based on the Vistec EBPG5000 Plus system. During the e-beam

writing, all the silicon structures were set into a single writing layer which includes strip

waveguides, spot size converters (used for coupling between strip waveguide and fibre),

proposed adiabatic-taper-based optical power splitters (Chapter 3), and proposed

circular Bragg grating mirrors (Chapter 4). As a rule of thumb, the beam spot size for e-

beam exposure is set to be around one quadrant of the pattern critical dimension, and the

beam step size (BSS) is selected to enable a 50-60% overlap between two consecutive

beam shots so that a consistent exposure can be achieved with the Gaussian beam. The

illustration of the beam spot size and the beam step size is shown in the following figure,

and they are selected based on the equations below.

Beam Spot Size = 0.25 Pattern Critical Dimension

Beam Step Size = 0.5-0.6 Beam Spot Size

Since the proposed adiabatic splitter has a very small critical dimension of ≦30 nm, as

shown in Fig. 2.5, a sufficiently small beam spot size of 4 nm was chosen for e-beam

writing based on a beam current of 0.1 nA at 100 kV. In addition, a beam step size of 2

nm was selected to enable a 50% overlap between two consecutive beam shots.

ZEP520A was chosen as the positive-tone e-beam resist for EBL. Compared to another

popularly used positive-tone e-beam resist PMMA (polymethyl methacrylate), ZEP can

provide a comparably good resolution (minimum 20 nm based on our tests), a higher

sensitivity, and a stronger dry-etch resistance, therefore it has also been widely used in

EBL to realize nano-scale structures. In our case, the higher sensitivity of ZEP means

that it can be exposed with a much lower dose compared to PMMA, which could

significantly save the writing time and the cost for us.


32

The thickness of the resist had a significant impact to our fabrication. Without dilution,

the thinnest ZEP that we can spin-coat is about 350 nm with a spin speed of 5000 rpm.

This produced a significant challenge when fabricating the proposed adiabatic splitters.

The proposed splitter consists of three silicon tapers, as shown in Fig. 2.5(a), and the

gap between two adjacent tapers is as small as 50 nm. As a result, after ZEP resist

development [99% amyl acetate for 1 min followed by isopropyl alcohol (IPA)], the

unexposed resist strips located within the gaps [denoted by the shadowed regions in Fig.

2.5(a)] would have a high aspect ratio of 1:7 for its width to height. Such a challenging

aspect ratio could easily cause collapse of the resist strips, especially when the sample

was being blow-dried by nitrogen after IPA rinsing. The collapse of the resist strips

would lead to incomplete Cr mask, as they will cover parts of the exposed area, and the

Cr deposited onto these areas will be removed during the lift-off step. Consequently,

after deep RIE etching, some of the samples showed damaged blocks which were etched

down to the substrate. Fig. 2.5(c) shows one of the unsuccessfully fabricated splitters

caused by the collapse of the resist strips.


33

Figure 2.5. (a) The schematic of the proposed splitter structure to be fabricated. The

shadowed region in the structure indicates the place where ZEP resist exists after

development. (b, c) The scanning electron microscope (SEM) images of (b) a

successfully fabricated splitter, and (c) a damaged sample caused by the resist collapse.

To solve the problem, the aspect ratio of the resist strips needs to be reduced, and this

was realized using diluted ZEP (ZEP: Anisol 1:2) as the e-beam resist. The diluted ZEP

was spin-coated based on a two-step spin cycle. Firstly, the spin coater was ramped to

100 rpm with a 50 rpm/s acceleration and then held for 10 seconds. Secondly, the spin

coater was ramped to 1000 rpm with a 500 rpm/s acceleration and held for 42 seconds.

Finally, this would give a much thinner resist coating of about 100 nm. The film was

then pre-baked on a hotplate with a temperature of 180°C for 3 mins before the e-beam

exposure. Based on the diluted ZEP, the aspect ratio of the resist strips was reduced

significantly to 1:2, which successfully resolved the resist-collapse challenge.


34

2.2.1.2 PEC and dose test

To realize accurate size of the small features in our fabrication, proximity effect

correction (PEC) was applied to EBL, and it could help to avoid the potential problems

of pattern distortion and overexposure caused by the electron backscattering effect. The

proximity effect is normally characterized by a Point Spread Function (PSF) which

specifies the deposited energy as a function of distance from the incident beam, and it is

strongly dependent on the chosen acceleration voltage (100 kV) of the e-beam exposure

and the stack materials (ZEP on SOI in our case) and their thicknesses. In our

fabrication, the PSF was calculated based on a Monte Carlo simulation software

TRACER.

The dose test was implemented by exposing 200-nm-wide line and space arrays, and the

base dose was determined as the smallest dose that could expose the patterns with no

resist residues left. Based on this method, the base dose was tested to be around 180 to

200 µC/cm2, and therefore 190 µC/cm2 was chosen as the correct base dose in our

fabrication. With PEC applied, the width of the exposed 200-nm-wide line and space

array was measured to be about 10 to 20 nm wider than the designed width, as shown in

Fig. 2.6(a). Meanwhile, the exposed gap size of the proposed splitter was measured to

be about 10 nm larger than the designed value, as shown in Fig. 2.6(b). therefore, to

achieve correct device size, in our fabrication, a 5-nm size bias was applied in the

pattern layouts (10 nm smaller in total). It should be noted that, in reference [110], the

base dose for ZEP520A is also tested to be 190 µC/cm2, which is consistent with our

test results. But the ZEP520A is not diluted in [110], which suggests that the dilution of

ZEP doesn’t have a substantial impact on the base dose.


35

Figure 2.6. (a) The SEM image of the 200-nm line and space array exposed under the

dosage of 190 µC/cm2, the picture was captured after the step of resist development.

The grooves are the exposed area where ZEP was cleared after development. (b) The

SEM image of proposed splitter. Based on the SEM measurements, the exposed gap

size was about 10 nm larger than the designed size. Therefore a 5 nm bias was applied

in the pattern layouts to get correct size.

2.2.1.3 Silicon nano-etching

In our fabrication, the silicon device layer was etched through the pseudo Bosch silicon

etch recipe with a mixed SF6/C4F8 chemistry, and the etch was implemented based on

the Oxford Plasma Lab100 inductively coupled plasma reactive ion etching (ICPRIE)

system. Based on the pseudo Bosch principle, the silicon layer is etched by reactive ions

with the etched sidewalls protected by a generated polymer chain layer during the etch

process. As a result, an anisotropic etch with a vertical etching profile could be realized.

Specifically, the silicon layer is etched with fluorine ions and radicals which are

generated through injection and ionization of the SF6, in the meanwhile, a CF2 polymer

chain layer is generated with the injection and ionization of C4F8, and the generated

polymer is deposited on both the horizontal surface of the silicon layer and the sidewalls.

Under a radio frequency (RF) electric field, the silicon etching rate in the horizontal

surface could be faster than the polymer deposition rate, and as a result, the horizontal

surface of the silicon layer is continuously etched down with the sidewalls protected by

the deposited polymer. Compared to the conventional Bosch process for which the


36

etching and passivation are implemented cyclically, the continuous etching and

passivation in this pseudo Bosch process result in a much slower etching rate, on the

other hand, the inherent rippling effect on the sidewalls for the conventional Bosch

process is avoided. Based on the slow etching rate and the smooth sidewalls, the pseudo

Bosch recipe is suitable for realization of sub-micron structures.

Cr was selected as the material of the etching mask due to its strong etch resistance and

the ease of removal, and a thickness of 30 nm was applied through E-beam evaporation.

The selection of the etching mask material does have an influence on the silicon etch

result, but is without the scope of this thesis. Based on the ICPRIE system, the pseudo

Bosch etch result is mainly influenced by several factors, including the injected gas

ratio, the RF Forward power, the ICP power, and the chamber pressure. Each of these

parameters could affect the silicon etching result, and the final etching rate and quality

is a result of the combined effect of the selected parameters.

Without describing the working principle of the ICPRIE system in details (which can be

found in previous literatures), the general etching test results that we obtained are

briefly summarized here. In our tests, the chamber pressure of ICPRIE was fixed at 10

mTor. The square wafer piece was placed on a 4 inch carrier wafer with Fomblin oil

used as the adhesive. Firstly, it was found that inappropriate ratio of SF6/C4F8 could

result in non-vertical etching profiles. If the proportion of SF6 was too low, the

fabricated waveguide would show trapezoid profile, as shown in Fig. 2.7(a). The

trapezoid profile was mainly due to the insufficient fluorine ions which led to the

accumulation of polymer chains at the bottom of the waveguide. But if the proportion of

SF6 was higher than C4F8, the fabricated waveguide would show an interesting inverse

trapezoid profile with an undercut effect, as shown in Fig. 2.7(b). This could be

attributed to the fact that the polymer removal rate is faster that its re-deposition rate,

which resulted in the isotropic-like effect. Based on our tests, an injected gas ratio of

around 1:2 for SF6/C4F8 was proved to be able to provide nearly 90° sidewalls for the

etched waveguide.


37

Figure 2.7. Examples of fabricated waveguide arrays which show (a) trapezoid profiles,

and (b) inverse trapezoid profiles with under-cut effect.

The RF Forward power and the ICP power could affect the silicon etching rate.

Generally, these two parameters could influence the mechanical etching rate of the

chemical reactive ions and the number of ions that could be generated, respectively. The

silicon etching rate was found to be increasing with the Forward power while

decreasing with the ICP power. This is because the momentum of the fluorine ions

directed to the silicon substrate becomes higher with a larger Forward power, which

could increase the mechanical etching rate of the reactive ions. However, with a larger

ICP power, although the total number of the generated reactive ions could increase, the

amount of polymer chains increases more than fluorine ions due to the larger proportion

of C4F8, and this instead resulted in an overall slower etching rate. With a Forward

power of 15 W and an ICP power of 1200 W, the silicon etching rate was tested to be

around 160 nm/min. In our fabricated devices, a slight over-etch was carried out to

ensure that the silicon layer could be fully etched, thanks to the strong etch resistance of

the Cr mask. Figure. 2.8 shows the final results of the fabricated waveguide based on

the optimized etching recipe. As shown in the figure, relatively vertical and smooth

sidewalls were achieved for the etched silicon strip waveguides.


38

Figure 2.8. The SEM images of (a) the fabricated silicon strip waveguide and (b) a

bending waveguide sample with a bending radius of 10 µm.

2.2.1.4 Edge coupling

The edge coupling method was used for coupling between the fabricated silicon

photonic chip and the lensed single-mode fibre (LSF). As introduced in Chapter 1, when

compared with the grating coupler, the edge coupler has much wider operation

bandwidth, which is specially advantageous in our applications where both the proposed

adiabatic splitter and the circular Bragg grating mirror have the property of ultrabroad

bandwidth. Linear inverse tapers with a length of 200 µm and a tip width of 180 nm was

used as the spot size converter (SSC) to reduce the coupling loss caused by the mode

size mismatch between the strip waveguide and the LSF [111]. The LSF used has a spot

diameter of 2.5 µm. Figure. 2.9 shows the fabrication process to achieve the edge

coupling. In the process, the oxide cladding (both the upper cladding deposited by

PECVD and the buried oxide) was etched down to the silicon substrate by ICPRIE to

achieve a vertical and smooth coupling facet. A small gap of 4 µm was left between the

SSC tip and the etched oxide facet such that only one material (SiO2) would be etched

throughout the RIE process. This approach could avoid multi-step etching caused by the

stack of different materials (Si and SiO2) and protect the SSC tip to be distorted during

the facet etching process, therefore, it could help reduce the coupling loss and simplify

the process. In the meanwhile, the extra coupling loss caused by the introduction of the

small oxide gap proved to be negligible [92].


39

Figure 2.9. Fabrication process to achieve edge coupling.

Before implementing the SiO2 etch, SU-8 photoresist was spin-coated onto the wafer to

serve as the etching mask for both the SiO2 etch and the deep silicon substrate

etch/Bosch etch. The deep Bosch etch was implemented following the SiO2 etch to

allow fibre attach. The SU-8 model used was SU-8 2005. Before coating the SU-8, a

thin film of OmniCoat was spin-coated onto the SiO2 substrate to improve the SU-8

adhesion, otherwise, based on our tests, there would be a risk for SU-8 to peel off from

the SiO2 substrate during the development step. SU-8 2005 was spin-coated based on a

two-step spin cycle. In the first cycle, the spin coater was ramped to 500 rpm with a 100

rpm/s acceleration, in the second cycle, the spin coater was ramped to 1000 rpm with a

300 rpm/s acceleration and held for 30 seconds, and this would finally lead to a film

thickness of about 7 - 8 µm. After spin-coating, soft-bake was implemented to densify

the coated film. Firstly, the wafer was pre-baked on a hotplate under a temperature of

65°C for 1 min, and then the hotplate temperature was ramped to 95°C and the wafer

was soft-baked for 2 mins. The slower the temperature ramping, the better the coating

fidelity and the resist adhesion. After cooling down to the room temperature, the resist

was patterned with UV exposure (SUSS MA-6 Mask Aligner). Following the exposure,

a two-step post-expose-bake was applied. In the first step, the wafer was baked under

65°C for 1 min, and in the second step, the wafer was baked under 95°C for another 1

min. After cooling down, the wafer was developed under SU-8 developer for 1 min

followed by IPA rinsing and dried with nitrogen. Before being sent to the RIE etching,


40

the SU-8 resist was checked with an optical microscope to ensure that there was no

resist cracking or peel-off, especially at the film corners.

The oxide cladding was etched through ICPRIE with a C4F8/O2 chemistry, and the etch

rate was about 200 nm/min. The etch selectivity for SU-8 resist was about 1:1, therefore,

after the oxide etch, the thickness of the SU-8 left was about 3 - 4 µm. Following the

oxide etch, the standard Bosch process was carried out to achieve a deep substrate etch

so that the chip facet can be accessed by the LSF. The etching ratio of silicon to SU-8

resist was about 20:1 for the Bosch process, therefore, 3 - 4 µm SU-8 would be able to

etch 60 - 80 µm silicon substrate. For the sake of fibre alignment, the etch depth of the

substrate should be at least larger than half of the fibre diameter so that the bottom of

the fibre would not be contacted by the substrate. As the diameter of a stripped SMF 28

fibre is 125 µm, a 60 - 80 µm etch depth would be risky. Therefore, when the SU-8

resist was etched up, the Bosch process was continuously implemented with the SiO2

serving as the etching mask. The SiO2 has a much higher etch selectivity, and the

etching ratio of silicon to SiO2 is about 100:1. Therefore, a 0.5-µm oxide etch was

enough to offer a total substrate etch of more than 100 µm deep.

It should be noted that, during the Bosch process, if the entire wafer is not used, such as

in our case where square wafer pieces were used, it is important to provide proper

thermal conductivity for the wafer piece. In our case, Fomblin oil was used as the

adhesive as well as the thermal conductor between the wafer piece and the carrier wafer.

This is because the Bosch process relies on the combination of etching and passivation

steps to protect the sidewalls while etching downwards, and the passivation step can

only happen when there is proper cooling of the wafer substrate. Therefore, if there is

insufficient thermal conductivity provided between the wafer piece and the carrier wafer,

there will be improper passivation which will finally lead to the isotropic etching result.

Figure. 2.10(a) shows an example of the isotropic etching result which was obtained

when Fomblin oil was not used during the Bosch process. Figure. 2.10(b) shows a non-

isotropic etching result. As shown in the figure, the isotropic etch caused by the

improper thermal conductivity resulted in the non-vertical sidewall and the under-cut

effect.


41

Figure 2.10. Examples of (a) an isotropic Bosch etch when Fomblin oil was not used,

and (b) a non-isotropic Bosch etch with vertical sidewall when Fomblin oil was used.

Figure. 2.11(a) shows the final fabricated wafer after the Bosch process. In each

fabrication round, six chips were fabricated, and the chip size was designed to be 3mm

× 15mm. Figures. 2.11(b) and 2.11(c) show the optical microscope images of the

fabricated chip facet. As shown in the figure, a deep-etched smooth facet was achieved,

and the SSC tip was well protected within the oxide cladding. After going through a

Piranha cleaning, the wafer was cleaved to get chips which were ready for testing. The

<100> wafer could be cleaved manually with a scriber or through a dicing saw. If the

wafer is cleaved manually, the cleaved edge of the wafer should be kept sufficiently far

from the chip facet to ensure that the facet would not be damaged during the cleaving.


42

Figure 2.11. (a) The photo of the fabricated wafer after the Bosch process step. (b, c)

The optical microscope images of the fabricated chip facet.

2.2.2 Silicon Photonic Chip Measurement Setup

Figure 2.12(a) shows the experiment setup used to implement the edge coupling. Two

Thorlab’s 3-axis NanoMax Flexure Stages were used to realize sub-micron-precision

fibre alignment and coupling. The lensed fibres (input and output) were mounted onto

the stages through a fibre rotator, and the chip was placed on a mounting plate which

was fixed between the two stages. The propagation loss of the fabricated silicon strip

waveguide was measured based on the cut-back method. Waveguides with different


43

lengths were fabricated and measured. As shown in Fig. 2.12 (b), at 1550 nm, the

fabricated strip waveguide exhibited a propagation loss of around 2.425 dB/cm.

Figure 2.12. (a) The experiment setup for edge-coupling. (b) The extraction of linear

waveguide propagation loss at 1550 nm in TE polarization.

Chapter 3 Silicon Adiabatic Optical Power Splitter

44

CHAPTER 3 SILICON ADIABATIC

OPTICAL POWER SPLITTER

3.1 3-dB Silicon Optical Power Splitter

A 3-dB optical power splitter is an important optical device that has been widely used

for light power distributions and the construction of more complex optical devices, such

as optical switches, modulators, multiplexers, and optical phased arrays, etc. [112-115].

Normally, the most important figures of merit that are utilized to characterize a 3-dB

integrated optical power splitter include the excess loss (EL), the operation bandwidth,

the polarization sensitivity, and the device footprint. Based on the silicon photonics

integration platform, 3-dB power splitters are mainly realized through Y-branches,

directional couplers (DCs), and multi-mode interference (MMI) couplers [116-121].

However, these approaches are conventionally limited by a number of drawbacks which

makes it challenging for the splitters to satisfy all the above metrics simultaneously.

Specifically, a conventional Y-branch would suffer from relatively high excess loss

when the branching angle is not sufficiently small. The high excess loss is mainly

caused by the mode scattering from the non-adiabatic branch corner. To achieve an

adiabatic power splitting for a conventional Y-branch, a sufficiently small branching

angle and a long device length are needed. Unfortunately, the small branching angle

would lead to a high fabrication requirement and a high sensitivity to fabrication errors,

and the long device length would scarify the device’s competitiveness in building large-

scale and high-density PICs. On the other hand, the DC-based splitters can achieve a

low excess loss based on a relatively short device length, however, the 3-dB coupling

ratio of a conventional directional coupler is highly sensitive to wavelength and

coupling length, as a result, the operation bandwidth of the DC-based splitters is

relatively limited, and the splitters are also sensitive to the fabrication variations. To

avoid these drawbacks, the MMI-based splitters are popularly used, owing to their

relatively wide bandwidth and high fabrication tolerance. Nevertheless, MMI coupler is

still a wavelength-dependent device, as the effective width of an MMI coupler for self-

imaging is inherently sensitive to wavelength, and the low-loss bandwidth of an MMI

coupler is usually less than 100 nm.


45

3.1.1 2×2 Silicon Adiabatic Coupler

Recently, to overcome the wavelength dependence issue associated with the traditional

DC and MMI-coupler based splitters, 2×2 adiabatic couplers with wide bandwidth and

high fabrication tolerance have been proposed [122-126]. Figure. 3.1 shows the

schematic diagrams of a conventional DC and a typical 2×2 3-dB adiabatic coupler. In

contrast to the conventional DC for which the fundamental odd and even modes are

both excited which then interfere with each other along the mode coupling region and

result in the power oscillation (coupling ratio) between the two coupled waveguides, in

the adiabatic coupler, only one mode (the fundamental even/odd mode) is excited and

propagates all the way along the coupler. During the mode evolution, the excited mode

is adiabatically (slowly) transferred to the even/odd mode of the coupled waveguides.

Consequently, the 3-dB power splitting ratio achieved at the end of the adiabatic region

is independent of the coupler length and wavelength, given the adiabatic condition is

satisfied. Moreover, as there is no power oscillation between the two coupled

waveguides, the 3-dB splitting ratio is less sensitive to fabrication variations. Normally,

the bandwidth of an adiabatic coupler is much wider than that of a conventional DC or

MMI coupler, which is up to hundreds of nanometres.

Figure 3.1. The schematic diagrams of (a) a conventional directional coupler and (b) a

2×2 3-dB adiabatic coupler.


46

Despite the advantages of the wide bandwidth and the high fabrication tolerance, the

existing Si-integrated adiabatic couplers have two major drawbacks, which are the

relatively large device size and the polarization-sensitive property. Firstly, to satisfy the

adiabatic-transition condition, a sufficiently long mode evolution region is needed for

an adiabatic coupler. The coupler length that can satisfy the adiabatic evolution is

usually larger than 100 µm [122-126]. Secondly, the existing silicon adiabatic couplers

are normally polarization dependent. Due to the different coupling strength for the TE

and TM polarizations, the mode evolution length required for the adiabatic transition is

different for the two polarizations. Consequently, the adiabatic coupler designed for

TE/TM is not adiabatic for TM/TE. Although polarization dependence can be rendered

by using a longer coupler length, it will further scarify the device footprint. One way to

achieve a short polarization-independent adiabatic coupler length is balancing the

coupling strength of the two polarizations as demonstrated in [125]. Nevertheless, a

considerably long coupling length of 300 µm is still needed for the proposed

polarization-independent adiabatic coupler. The large device size and the high

polarization sensitivity could limit the practical applications of the existing silicon

adiabatic coupler, and to the best of our knowledge, an ultra-compact (sub-10 µm),

broadband (hundreds of nanometres), low-loss (<0.2 dB), and polarization-independent

Si-integrated adiabatic coupler has not been demonstrated until now.

3.1.2 1×2 Silicon Adiabatic Splitter

In addition to the 2×2 adiabatic couplers which are based on the tapering design of the

coupled waveguides, various 1×2 power splitters based on the tapered waveguides have

also been presented, and these splitters can be generally divided into two categories,

namely the adiabatic-taper and non-adiabatic-taper based splitters. Normally, for an

adiabatic-taper-based 1×2 power splitter, the adiabatic mode division is realized through

an adiabatic variation of the effective refractive index of the input and the output

waveguides, which can be illustrated in Fig. 3.2. In principle, the input waveguide is

supposed to have a gradually decreasing effective refractive index along the light

propagation direction, and the two output waveguides which are placed on two sides of

the input waveguide are supposed to have a gradually increasing effective refractive

index along the light propagation direction. Based on this adiabatic-index-tapering

design, the power of the fundamental mode of the input waveguide is gradually shifted


47

towards the two output waveguides with low loss and is independent of wavelength. For

the previously presented adiabatic-taper-based splitters, the refractive index variation of

the output waveguides was usually realized through tapered waveguides, as illustrated

in Fig. 3.2. But for the input waveguide, the index variation was usually realized

through a complex structure which is hard to fabricate. For instance, in [127], the

linearly decreasing refractive index variation of the input waveguide (n2 as illustrated in

Fig. 3.2) was realized through etching the rib waveguide for a variable rib height, which

made the fabrication of the 3D structure considerably complex. Moreover, these

splitters were not based on the silicon integration platform, which normally required

considerably long tapers (hundreds of microns) to realize the adiabatic transition. To the

best of our knowledge, a compact and easy-to-fabricate adiabatic-taper-based 1×2

power splitter based on the silicon photonics integration platform has not been

demonstrated yet.

Figure 3.2. The principle illustration of a 1×2 3-dB adiabatic coupler based on the

effective-refractive-index tapering.

3.1.3 1×2 Silicon Non-adiabatic Splitter

In addition to the adiabatic-taper-based 1×2 splitters, non-adiabatic-taper-based 1×2

splitters have also been demonstrated. The antenna-coupled Y-branch splitters [128-130]

are a major representative of the non-adiabatic-taper-based splitters. Instead of being

based on an adiabatic power transition from the input waveguide to the output

waveguides, this type of splitters work in a non-adiabatic manner where the input light

is radiated from a truncated input waveguide and is re-launched into the two parallel

output waveguides through two tapers. The idea of the antenna-coupled Y-branch was

originally introduced in [130]. Generally, this type of splitters could be made much

shorter than the adiabatic splitters, but they suffered from a relatively high radiation loss.

To achieve a low radiation loss in the transition region, the refractive index near the


48

branching point of the splitter could be designed to be smaller than the refractive index

of the claddings, which on the other hand could increase the fabrication complexity.

In conclusion, in terms of achieving a low excess loss and a wide operation bandwidth,

the adiabatic-type splitters are inherently advantageous compared with the non-adiabatic

splitters. However, both the existing 2×2 adiabatic couplers and the 1×2 adiabatic

splitters suffer from either a large device size or a complex structure which is difficult to

fabricate, and those splitters were polarization dependent. In this chapter, to overcome

these issues and realize an ultra-compact, broadband, low-loss, and polarization-

independent optical power splitter, we propose a novel 1×2 adiabatic-taper-based

splitter based on the 220 nm SOI platform.

3.2 1×2 Optical Power Splitter Based on Adiabatic Silicon Tapers

3.2.1 Device Design

The proposed new adiabatic optical splitter structure is shown in Fig. 3.3(a). As shown

in the figure, the proposed structure mainly consists of three regions, namely input

waveguide, adiabatic tapers (one input taper and two output tapers), and output bending

waveguides. A single-mode input strip waveguide with a dimension of W × 220 nm is

gradually tapered down (tip width T) along a length L, and the taper is symmetrically

inserted into two output tapers which have the same length (L), end width (W) and tip

width (T) as the input taper. The ends of the output tapers are connected with two

bending waveguides. The gap between two adjacent tapers is denoted as G.


49

Figure 3.3. (a) The schematic diagrams of the proposed adiabatic splitter and the

intensity field distributions simulated along the device with (b) the TE and (c) the TM

polarization input at 1550 nm wavelength. The device parameters used in the

simulations are: W (400 nm), L (5 µm), G (50 nm), T (30 nm).

Different from a conventional 2×2 3-dB adiabatic coupler, for which the adiabatic

coupling occurs between two tapered waveguides, in the proposed splitter, light is

adiabatically coupled from one input waveguide to two symmetric output waveguides

through three tapers and, as long as the adiabatic mode evolution is satisfied for both TE

and TM polarizations, the 3-dB power splitting ratio can be achieved for both

polarizations at the end of the tapered region. The signal after passing through the tapers


50

is then split into the fundamental modes through the bending waveguides. Moreover,

different from a conventional 1×2 3-dB adiabatic splitter as shown in Fig. 3.2, where the

adiabatic tapers were only used for the output waveguides of the splitter, and the

adiabatic index variation of the input waveguide was realized following a specific

function which makes the device hard to fabricate, in the proposed splitter, both the

input and output waveguides are realized through adiabatic tapers, and the three

identical tapers are placed in a complementary manner with tiny gaps to realize the

adiabatic mode transition. Based on the 220 nm SOI wafer, the proposed splitter only

requires a single step of etching for device patterning, which indicates a much simpler

device fabrication process. Figures. 3.3(b) and 3.3(c) show the simulated mode

evolution process for the TE and TM polarizations, respectively (in different color

scales). It can be seen that when the TE mode is launched, due to the electric-field

discontinuities at the tapered region, the light field is first enhanced and concentrated

within the tiny gaps and, along a certain propagation distance, light can be seen as

lossless eigenmodes propagating in a double-slot waveguide [131]. On the other hand,

for the TM mode, as the electric field is mainly concentrated at the top and bottom

interfaces of the waveguide, light field is not squeezed into the gaps throughout the

tapers. Consequently, in practice, the mode transition in TE polarization is more

sensitive to the sidewall roughness within the tapered region, which has to be taken into

account in device optimizations.

To achieve low loss and wide bandwidth for both TE and TM polarizations, the

adiabatic mode evolution needs to be maintained for both polarizations so that only the

fundamental mode is excited and propagates along the tapers. An eigenmode solver was

used for the mode analysis in the tapered region. The input and output waveguides

width was first selected at 460 nm, and L was selected at 5 µm. As shown in Fig. 3.4(e),

it is found that for either TE or TM polarization, two modes are supported along the

tapers (denoted as the fundamental and first-order modes). Furthermore, the effective

refractive index difference between these fundamental and first-order modes becomes

smaller in the taper region along the light propagation direction. The effective indices at

the taper end of the two modes in TE polarization are very close (∆Neff-TE = 0.05) while

the difference of the TM polarization is comparatively larger (∆Neff-TM = 0.2). The

corresponding mode profiles at the taper end cross section are shown in Figs. 3.4(a) –

3.4(d). Therefore, in practice, when the TE-polarized signal is utilized, given the


51

fabrication imperfection, the adiabatic transition condition is difficult to maintain and

the higher-order mode can be excited, which can lead to mode interferences and cause

extra losses [132]. Therefore, the device needs to be optimized to suppress the higher-

order mode excitation, while still keeping the device compact.

Theoretically, it is easier to maintain the adiabatic transition with a longer taper length

(L), a smaller gap size (G) and a sharper tip width (T). However, considering fabrication

limitations, G and T are chosen at 50 and 30 nm, respectively, based on the typical E-

beam lithography (EBL) resolution. The impact of waveguide width (W) and taper

length (L) is then investigated and optimized based on 3D-FDTD simulations. Figure

3.4(f) shows the simulated ∆Neff at the taper end cross section when W is varied over a

range from 340 to 500 nm. It can be seen that ∆Neff decreases with W for both TE and

TM polarizations, while overall it remains relatively large for the TM polarization.

Since it is easier to maintain the adiabatic transition with a larger ∆Neff, W is chosen at

400 nm here by taking the propagation and bending losses into consideration

simultaneously. In addition to the larger ∆Neff, another advantage of choosing W = 400

nm is that the change of ∆Neff along the tapered region is also smoother, as shown in Fig.

3.4(g).


52

Figure 3.4. (a) - (d) Mode profiles (1550 nm) simulated at the cross section of taper end

with W = 460 nm. (e) Effective index of the four modes along the tapers with a length of

5 µm. (f) Simulated ∆Neff at the taper end cross section with the change of W from 340

to 500 nm. (g) Change of ∆Neff along the tapers for different W and L. (h) Simulated

excess loss at 1550 nm with the change of L.

With W fixed at 400 nm, the device performance in terms of EL at 1550 nm is then

investigated by changing the taper length (L) from 1 to 7 µm, and the results are shown

in Fig. 3.4(h). Note that in the simulation, the impact of sidewall roughness was not

included in EL. The excess loss here is defined by the following equation:


53

Excess Loss (dB) = 1 210*lgin

P P

P

(3.1)

Where P1 and P2 are the output power of the splitter, and Pin is the input power. In

general, longer tapers are preferred to maintain the adiabatic transition. It is clear that

for L ˃ 3 µm, the EL for the TE polarization becomes negligible, indicating that no

higher-order mode is excited, while for the TM polarization, due to the larger ∆Neff, the

EL remains low, even for L < 3 µm. Considering compact size, as well as the adiabatic

requirements for both polarizations, a conservative value of 5 µm is chosen for L. As

shown in Fig. 3.4(g), when L = 5 µm, ∆Neff also changes more smoothly than the case

when L = 3 µm. Compared with the previous polarization-independent 3-dB adiabatic

couplers [125], the weak mode confinement at the input taper, as well as the small gap

size between tapers, leads to much stronger coupling strength for both TE and TM

polarizations, which leads to a significantly shorter (by two orders of magnitude) taper

length which can satisfy the adiabatic evolution for both polarizations simultaneously.

Based on the optimized parameters, the simulated transmission spectra of the splitter are

shown in Fig. 3.5(a). In the simulation, 90° bending waveguides were used as the output

branches of the splitter, and the bending radius was set to a relatively large value of 15

µm to avoid substantial bending losses. As can be seen, the splitter achieves an

extremely high and flat transmission efficiency of nearly 50% for each output port over

the whole simulated wavelength range. For the TM polarization, the spectrum gradually

drops for wavelengths > 1550 nm, and this is due to the gradually increasing bending

loss within the bending waveguide. To confirm this, we simulated the spectrum of the

bending waveguide used in the splitter, and the results are shown in Fig. 3.5(b) below.

As can be seen, for the TM polarization, the spectrum of the bending waveguide

matches with the spectrum of the splitter, which indicates that the loss within the

adiabatic tapered region is negligible. To improve the efficiency for wavelengths > 1550

nm, wider waveguide or larger bending radius can be utilised. However, as explained

previously, 400 nm waveguide width is the optimum choice for the proposed device,

and a larger bending radius also leads to less compact device. In addition, although the

efficiency gradually drops after 1550 nm, the wavelength range with high efficiency

(above 49%) is still very wide for the TM polarization (1200 – 1625 nm).


54

Figure 3.5. (a) The simulated transmission spectrum (output 1 and output 2 have

identical spectrum) of the proposed splitter and (b) a 90° bending waveguide with a

cross-section size of 400 nm × 220 nm and the bending radius of 15 µm.

The splitter’s tolerances to the variations of the non-zero taper tip width (T) and the

small gap size (G) were also investigated. Firstly, T was changed from 0 to 80 nm,

while other parameters were kept at the optimized values. As shown in Fig. 3.6(a), the

transmission efficiency degradation is negligible (<0.3%) for both polarizations. The

impact on ∆Neff is not substantial either, with ∆Neff-TE dropping from 0.12 to 0.07 and

∆Neff-TM dropping slightly from 0.25 to 0.23. Therefore, the splitter performance has

relatively high tolerance to the taper tip width variation. Then G was increased from 50

nm to a relatively large value of 130 nm, while other parameters remained unchanged.

As shown in Fig. 3.6(b), while the transmission ratio of the TE mode slightly decreases

by around 0.6%, the transmission ratio of the TM mode remains stable. However, ∆Neff

reduces sharply for both polarizations, with ∆Neff-TM dropping from 0.25 to 0.12 and

∆Neff-TE dropping from 0.1 to only 0.02. As ∆Neff-TM remains high (>0.12), even with

large gaps, it is still difficult to excite the higher-order TM modes. For the TE


55

polarization, as ∆Neff rapidly drops to <0.05 when G is larger than 70 nm, the adiabatic

evolution is difficult to maintain in practice. Therefore, the proposed splitter has higher

fabrication tolerance in TM polarization, while relatively precise fabrication is needed

for the TE polarization.

Figure 3.6. The change of transmission efficiency and ∆Neff with (a) T and with (b) G at

1550 nm.

3.2.2 Characterization

The proposed splitter was fabricated based on the fabrication process presented in Fig.

2.3, and the SEM images of the fabricated splitter are shown in Figs. 3.7(a) and 3.7(b).


56

Based on the SEM measurements, the fabrication variation on T and G was about ±5 nm.

The device was measured based on the measurement setup illustrated in Fig. 3.7(c). An

ASE source (THORLABS ASE730) with an operation wavelength of 1530 to 1610 nm

was used as the wideband light source, and the output passed through an in-line

polarizer and a polarization controller (PC) to generate the single-polarized light. The

edge-coupling approach illustrated in Fig. 2.11 was utilized for the coupling between

the fabricated silicon chip and the LSF. The output spectrum of the splitter was

monitored by an optical spectrum analyzer (OSA). Because the operation wavelength of

the polarizer used was limited to 1600 nm, only the spectrum within the range of 1530

to 1600 nm was extracted for device performance characterizations.

Figure 3.7. (a, b) The SEM images of the fabricated adiabatic splitter. (c) The schematic

of the device measurement setup.

To characterize the splitter performance more reliably, three stages of 1×2 splitters were

cascaded to form a 1×8 splitter, as illustrated in Fig. 3.8(a). The average EL of a single

element was then estimated based on the following equation [133]:


57

0( ) ( ) / 3 3wgEL dB P P (3.2)

Where P0 is the average output power of all output ports and Pwg is the measured output

power of the reference strip waveguide. The factors 1/3 and 3 correspond to the number

of cascaded stages and the 50% splitting ratio, respectively.

Figure 3.8. The optical microscope images of (a) the fabricated 1×8 splitter and (b) the

cascaded splitter.

The device measurement results are shown in Fig. 3.9.


58

Figure 3.9. Experimentally measured spectra of the splitter for (a) the TE and (b) the

TM polarization.

Figures. 3.9(a) and 3.8(b) show the measured excess loss of the splitter for TE and TM

polarizations, respectively. The insertion loss of three random ports [as indicated in Fig.

3.8(a)] were also extracted to show the uniformity of the 1×8 splitter. It can be seen that

a flat spectrum and low loss profile can be achieved for both polarizations over the

entire measured wavelength range. Due to the higher sensitivity to sidewall roughness,


59

the performance of TE-polarized light has larger fluctuations across the operation

bandwidth. For better performance characterizations, regression lines were extracted

based on the robust locally weighted regression method [134]. It is clear that the excess

loss is lower than 0.19 dB over the whole measured wavelength range for the TE

polarization and better than 0.14 dB for the TM polarization. Compared with simulation

results, the measurement results agree well for the TM polarization, while they are

slightly worse for the TE polarization. This is mainly due to the extra scattering losses

caused by sidewall roughness of the tiny gaps between tapers where the TE field is

mainly concentrated. This can be further improved by optimizing the fabrication

processes (e.g., oxidation) to have smoother sidewalls.

More accurate results on the EL at 1550 nm were extracted by linearly fitting the

measured output power after passing through different numbers of splitters, as shown in

Fig. 3.8(b), and the results are shown in Fig. 3.10. At 1550 nm, an ultra-low EL of 0.11

and 0.08 dB can be achieved for the TE and the TM polarizations, respectively, and the

results also agree well with the measured wideband spectrum shown in Fig. 3.9.

Figure 3.10. The extracted loss at 1550 nm for (a) the TE polarization and (b) the TM

polarization. R square is the calculated coefficient of determination.

The power uniformity of the splitter was also estimated, and it was defined as the

difference between the maximum output power and the minimum output power across

all output ports of the splitter. The power uniformity increases with the number of

cascade stages. For the cascaded 1×8 splitter, as shown by the insertion loss spectra in

Figs. 3.9(a) and 3.9(b), uniform outputs are achieved over a wide wavelength range. At


60

1550 nm, the power uniformity across all 8 output ports was measured to be only 0.47

dB and 0.17 dB for the TE and TM polarizations, respectively. For a single 1×2 splitter,

the best measured uniformity was only 0.07 and 0.02 dB, respectively.

3.2.3 Splitter with Various Power Splitting Ratio

For the proposed optical splitter, it is possible to realize various power splitting ratios.

For the TE polarization, due to the strong confinement of light within the tiny gaps, the

coupling ratio is very sensitive to the gap size variation. Additional FDTD simulations

have been carried out. As shown in Fig. 3.11 below, when one gap (gap 1) was fixed at

50 nm while the other gap (gap 2) was varied from 50 nm to 130 nm, a splitting ratio of

about 0.833 : 0.159 can be realized. On the other hand, for the TM polarization, as the

light field is mainly distributed at the top and bottom interfaces of the tapers, the power

splitting ratio is more sensitive to the shape of the entire tapered region rather than small

variations of the gap size. FDTD simulation results of the TM polarization are shown in

Fig. 3.11 as well. It can be seen that with small gap size variation, the power splitting

ratio can be altered. However, the variation is much smaller than the scenario with TE

polarized signals. All the results presented here are only based on simulations which

have not been confirmed by experiments (additional chips need to be fabricated).

Figure 3.11. The simulated power splitting ratio as a function of gap_2 when gap_1 is

fixed at 50 nm.


61

3.2.4 Conclusion

In conclusion, in this chapter, an ultra-broadband, compact, low-loss, and polarization

insensitive adiabatic 3-dB optical power splitter has been proposed and experimentally

demonstrated. The proposed splitter has been shown to be only 5 µm in length, and the

EL is <0.19 dB for the TE polarization and <0.14 dB for the TM polarization over the

entire measured band of 1530 to 1600 nm. The relatively small taper tip width and the

gap size would make the splitter hard to realize through today’s standard CMOS process.

However, with the rapid development of the fabrication technology, a much smaller

feature size can be realized, such as using the emerging extreme-UV lithography, and

the proposed device is expected to have a strong potential in applications that need

ultra-high-efficiency optical power distributions and broadband operations. For the

proposed splitter, it is possible to realize various splitting ratios by using asymmetric

gap sizes between tapers, which will be investigated in future research.

Chapter 4 Circular Bragg Grating Mirror

62

CHAPTER 4 CIRCULAR BRAGG

GRATING MIRROR

4.1 High-index-contrast Bragg Grating on SOI

Bragg gratings are important optical components which are widely used as the optical

mirrors to reflect light within a specific band of wavelengths. The optical reflection of a

Bragg grating is realized based on the principle of Bragg condition which is satisfied

through a periodic variation of the effective refractive index of the waveguide. In

integrated photonics and silicon photonics, Bragg gratings are usually formed in

waveguides with a periodic structural corrugation to realize the periodic effective index

modulation. Generally, based on the index modulation strength, the waveguide Bragg

gratings can be categorized into two groups, namely the low-index-contrast Bragg

gratings (LBGs) and the high-index-contrast Bragg gratings (HBGs).

The LBGs normally have a weak grating index contrast, and the weak index contrast is

usually formed through shallowly- (in vertical directional) or partially-etched (in

horizontal direction) waveguide corrugations. Due to the weak grating strength, the

LBGs normally require a large number of grating periods to achieve high reflectivity

(hundreds of periods are usually needed), and the reflection bandwidth of an LBG is

usually very narrow (e.g., within one nanometer) [135, 136]. On the other hand, the

HBGs are usually formed through deeply- or fully-etched waveguide corrugations to

realize a strong grating index contrast. Attributed to the strong grating strength, the

HBGs can have a much broader reflection bandwidth of up to hundreds of nanometers

based on only a few grating periods, therefore, they have been widely utilized as

integrated broadband mirrors to provide broad and flat reflection spectra in a wide

variety of applications, such as filters, resonators and semiconductor lasers [137-142].

Typically, based on the silicon integration platform, the HBGs are usually built using a

relatively thick silicon layer (normally >1 μm thickness) with deeply- or fully-etched

grating trenches to achieve the high index contrast [141, 142]. However, this approach

becomes problematic when implemented on the popular silicon photonics integration

platform based on SOI wafers with a thin silicon layer of 220 nm, where waveguides

typically with a dimension of 460 × 220 nm for single-mode transmission are utilized.


63

In this 220 nm SOI platform, the grating index contrast becomes very limited due to the

thin silicon device layer, even with deeply- or fully-etched grating trenches. Moreover,

if a conventional deeply- or fully-etched Bragg grating structure is implemented based

on the sub-wavelength waveguide in this 220 nm SOI platform, the grating would suffer

from high mode diffraction loss due to the small size of the waveguide. As a result, it is

challenging to realize both broad bandwidth and high reflectivity simultaneously for a

Bragg grating based on this popular thin SOI platform, and to the best of our knowledge,

no previous work has attempted to tackle this issue.

4.2 Circular Bragg Grating Based on 220 nm SOI

To overcome this difficulty, in this chapter, we propose a novel circular Bragg grating

mirror based on the 220 nm SOI platform which could achieve the properties of high

reflectivity, broad bandwidth and compact device size simultaneously. In contrast to the

conventional HBGs which have rectangular-shape grating teeth/trenches, in the

proposed circular Bragg grating mirror, the grating blades (teeth) are bent around the

strip waveguide end to form a circular shape such that they could match with the

diffracted circular waves from the strip waveguide end. Consequently, the circular

waves diffracted from the strip waveguide end are recollected back to the waveguide,

which avoids the high diffraction loss of the conventional HBGs based on the thin-Si-

layer SOI platform. Moreover, although the grating is still made on the thin silicon

device layer, the beam divergence in the lateral direction leads to a high effective index

for the circular grating blades, and a high index contrast can be achieved for the grating.

Circular Bragg gratings with two different structures have been proposed, as shown in

Fig. 4.1. The initially proposed circular Bragg grating structure is shown in Fig. 4.1(a),

and its detailed device optimization process is presented in [143]. Based on the

optimized parameters, the proposed grating mirror shown in Fig. 4.1(a) could achieve a

reflectivity of >90% over a wide bandwidth of 385 nm, based on a compact footprint of

only 4.03 µm × 4.32 µm. To the best of our knowledge, it is the first broadband and

high-reflectivity Bragg grating mirror demonstrated on the 220 nm SOI platform.

Unfortunately, the initially proposed circular Bragg grating mirror has very stringent

fabrication requirements, which limit its practical applications. For instance, to match

with the circular wave diffraction from the strip waveguide end, the circular grating


64

blades were designed to be centered at the end of the waveguide with inner-radiuses (r)

selected as:

( 1)p tr w p (4.1)

Where wt is the grating trench width (170 nm), Λ is the grating period (360 nm), and p is

the blade number. Consequently, circular blades with very small radiuses are needed,

which is difficult to realize based on standard fabrication lines. Particularly, from the

equation above, the first blade has a critical radius (r1) of only 170 nm, which

significantly increases the fabrication challenge, and in practice, extremely high-

resolution lithography (a sub-10-nm EBL was used in [143]) is required to realize a

smooth circle with such a tiny radius. Furthermore, a small gap is needed between the

waveguide end and the first blade in this design, and the gap needs to be ≤30 nm to

ensure satisfying grating performance, which further increases fabrication challenges.

Figure 4.1. The schematic diagrams of the proposed circular Bragg grating with two

different structures (size scaled).


65

To resolve these fabrication issues, we propose another circular Bragg grating mirror

which is shown in Fig. 4.1(b). The new design has significantly relaxed fabrication

requirements and a better grating performance in terms of a much broader high-

reflectivity (>95%) grating bandwidth. The minimum radius of the grating blade in this

design can be increased by more than tenfold to >2 µm, while overall the circular

grating still has a very compact size of only 4.49 μm × 4.54 μm. In addition, the

minimum device feature size is increased substantially to 100 nm, which allows much

larger fabrication tolerance and greatly relieves fabrication challenges. The proposed

circular grating is studied via numerical simulations, and results show an ultrabroad

operation band of 500 nm with a reflectivity of >90%, and a broad 397-nm band with a

high reflectivity of >95% covering the entire E- and U-bands. In this chapter, the

detailed optimization process and the experimental characterizations of the proposed

new circular Bragg grating shown in Fig. 4.1(b) will be presented.

4.2.1 Device Design

As shown in Fig. 4.1(b), the proposed new circular Bragg grating mainly consists of

three parts: a single-mode strip waveguide (460 × 220 nm), a pie-shaped taper which is

spread from the end of the waveguide, and several circular blades following the taper

with the same arc angle to serve as the grating teeth. The arc angle of the taper and the

blades is denoted as θ, and the length of the taper is denoted as R. To maximize the

grating bandwidth, the grating period is selected using the first order reflection together

with a 50% duty cycle (defined as the ratio of the blade width to the grating period),

which is capable of providing the maximized grating strength [144, 145]. The Bragg

condition can be expressed as follows:

0

2t t b bnW n W

(4.2)

Where Wt and Wb are the width of the grating trenches and the blades, respectively, nt

and nb are the effective refractive index for the grating trenches and the blades,

respectively, and λ0 is the Bragg wavelength. In the proposed new circular grating

design, although the grating blades are still centered at the waveguide end similar to the

design shown in Fig. 4.1(a), the insertion of the taper significantly expands their

radiuses, now the minimum radius of the circular structure is increased to >R (the center


66

of the taper is slightly overlapped with the waveguide), which greatly relieves

fabrication challenges associated with the tiny radius in the previous design. In addition,

as the waveguide is gradually spread to the circular shape which is directly aligned with

the following grating blades, a small gap (wg ≤ 30 nm) between the waveguide end and

the first grating blade is no longer required, and it further reduces fabrication challenges.

Figure 4.2. The field distribution (1550 nm) within the taper simulated with an arc angle

of (a) 270°, (b) 180°, and (c) 60°. Note that the above field distributions were captured

to illustrate the wave diffraction from the strip waveguide to the taper, and no grating

blades were set in the simulation. The reflection observed was due to the refractive

index contrast between the taper and the cladding, rather than the Bragg reflection. The

red circles in (a) and (b) indicate the branches formed in the 270° taper and the

effective-index-contrast interface formed in the 180° taper, respectively. The dashed

line in (b) shows the 60° boundary. The tapers were all covered by 2 μm SiO2.

In the new device design, the pie-shaped taper is intentionally used to create a circular

wave diffraction to match with the subsequent circular grating blades. In this case, the

taper functions like a free propagation region (FPR), and the wave diffraction through

the strip waveguide to the taper is similar to a Huygens-Fresnel diffraction, according to

which the transversely confined light transmitting to an aperture (a) which is small

enough relative to its wavelength (a ≤ ) will be diffracted to circular waves [146]. The

taper angle is a critical parameter which could influence the shape of the diffracted

wavefront. Figure. 4.2 shows the simulated diffraction field distribution within the taper

when it has different arc angles. In principle, to perform like an FPR, θ should be

chosen as ≥180° so that the diffracted wavefront would not be obstructed along the y-


67

direction. Figure. 4.2(a) shows the simulated field distribution when the taper has an arc

angle of 270°. In this case, although circular waves can be formed within the taper, the

reflected mode transmitting back towards the waveguide will be split by the sharp V-

shaped branching corners formed by the non-vertical taper boundary and the waveguide,

and results in the additional propagation routes inside the taper, as shown in the figure.

These unwanted fields will experience multiple resonance routes inside the grating,

which could seriously interfere with the intended Bragg reflection and destruct the

Bragg spectrum. In the case of θ = 180, as shown in Fig. 4.2(b), the sharp branches are

avoided, and perfect circular waves can be observed in the taper. However, the effective

refractive index contrast at the interface of the waveguide and the taper is relatively

large (2.37 and 2.85 respectively, calculated by Lumerical Mode Solutions), which

could result a considerable amount of power to be reflected again at this interface, and

the disturbing resonant effect can be generated. To avoid this problem, we set θ to a

smaller value of 60°, and the simulated light field distribution within the taper is shown

in Fig. 4.2(c). The taper here can still cover the dominant angular beam divergence

observed in Fig. 4.2(b), while in the meantime, the index contrast at the interface is

reduced (2.37 and 2.47 for the waveguide and near the taper end, respectively). Such

design also enables a much smaller device size.

Another important design parameter in the proposed circular Bragg grating is the taper

length R, which needs to be ≫λ to create circular wavefronts [146, 147] (λ here is the

wavelength inside the silicon taper). Due to the sub-wavelength size of the silicon strip

waveguide and the high material refractive index, circular waves can be obtained even

using a short taper, and here a relatively small value of R = 2 μm was selected to

achieve a compact device size. It should be noted that, theoretically, the longer the wave

evolution length, the closer for the diffracted waves to become circular [146]. Therefore,

a longer taper provides a better match between the diffracted wavefront and the circular

blades, at the cost of a larger device size. Compared to the design in Fig. 4.1(a), the

circular grating proposed in this paper enables a much longer wave evolution path

within the taper. On the contrary, for the design in Fig. 4.1(a), a relatively large gap

between the waveguide and blades can lead to high diffraction loss.


68

Figure 4.3. The simulated reflection spectra of the proposed Bragg grating with

different values chosen for W1, Wt, and Wb.

The performance of proposed circular grating was investigated based on the three-

dimensional finite difference time domain (3D-FDTD) simulations. In the simulation,

𝑊𝑡 and 𝑊𝑏 were set to 181 nm based on the following parameters: λ0 = 1.55 μm, nt =

1.44, nb = 2.85. Here, nt was selected as the refractive index of SiO2, and nb was

approximated as the effective index of a 220 nm thick slab silicon waveguide as it is

difficult to calculate the accurate effective index of a circular-shaped blade. The number

of grating blades was set to 6. The simulated reflection spectrum is shown by the red

dotted line in Fig. 4.3. As can be seen, the grating has an ultrabroad spectrum ranging

approximately from 1260 to 1760 nm benefited from its strong index contrast. However,

the reflection has a gradually declining tendency towards the shorter wavelengths,

resulting in a non-flat top for the spectrum. This is mainly caused by the extra mode

diffraction loss in the vertical direction inside grating trenches, due to the strong vertical

confinement within the thin silicon layer. This effect is shown in Figs. 4.4(a) and 4.4(b),

where the vertical diffraction is clearly stronger for smaller wavelength, due to its

tighter confinement within the taper (equivalently, a larger neff). Therefore, the vertical

diffraction loss needs to be reduced to achieve a flat-top reflection spectrum.

Theoretically, the diffraction loss in a fully-etched waveguide grating can be reduced

with narrower grating trenches [148, 149]. The yellow dashed line in Fig. 4.3 shows the

reflection spectrum when Wt was reduced to 100 nm. The trench width was not further

reduced considering the fabrication difficulty (correspondingly, Wb was increased to

221 nm based on Equation (1) to maintain the Bragg condition). As can be seen, the


69

back-reflection variation becomes smaller within the operation bandwidth and a flat-top

spectrum is realized. However, such an approach of changing the duty cycle also results

in weaker grating strength, which leads to a much narrower reflection bandwidth.

In order to achieve both flat spectrum with high reflectivity and large device bandwidth

simultaneously, instead of changing the grating duty cycle, here we propose a new

solution of only reducing the width of the first trench, which is denoted as W1 in Fig.

4.1(b). The field distributions with different W1 values are simulated and results are

shown in Fig. 4.4. As shown in Fig. 4.4(a), due to the strong index contrast of the

circular grating, light is reflected within only a few grating periods, and the mode

intensity decreases sharply along the propagation direction due to the strong reflection

at each blade. Consequently, since the mode intensity is strongest within the taper, the

diffraction occurring at the first trench is much stronger than others. Therefore, the

diffraction loss can be suppressed considerably as long as W1 is reduced. Figure. 4.4(c)

shows the field distribution when W1 is reduced to 100 nm for the wavelength of 1.3 m.

It is clear that the diffraction at the first trench has been significantly weakened, and the

diffraction at other trenches still remains weak. In addition, as the duty cycle of most

periods is unchanged, the reduction of W1 imposes a negligible impact on the grating

strength. Figure. 4.4(e) shows the circular grating reflection spectrum for different

values of W1 ranging from 181 to 100 nm. It can be seen that the grating reflectivity is

gradually improved with decreasing W1. It is also clear from the figure that the

reflectivity improvement gradually becomes insignificant for longer wavelengths. This

is mainly because the mode diffraction becomes weaker, as shown by Figs. 4.4(b) and

4.4(d). It is clear from these figures that the reduction of W1 from 181 to 100 nm has a

negligible impact on the diffraction at the wavelength of 1.75 µm.

With W1 chosen at 100 nm, the simulated circular grating reflection spectrum is shown

by the blue solid line in Fig. 4.3, which presents a flat reflectivity of >90% over an

ultra-broad band of 500 nm (1263 - 1763 nm) with a high / of 32.3%, and a high

reflectivity of >95% over a broadband of 397 nm (1340 - 1737 nm) with a / of 25.6%

which covers the entire E- to U- bands. At 1550 nm, the reflectivity is 97.6%.

Compared to the previous design which has a high-efficiency (>95%) bandwidth of

only 171 nm (1410 - 1581 nm), the high-efficiency band of the proposed new circular

grating has been improved significantly. In addition, as shown by Fig. 4.4(e), even for

W1 = 120 nm, the grating still shows a comparably good performance, which has a 498-


70

nm band with a reflectivity of >90% and a 298-nm band with a high reflectivity

of >95%, indicating an even larger fabrication tolerance.

Figure 4.4. (a) – (d): The vertical field-intensity distribution of the grating captured at

the y = 0 plane with λ set at 1.3 and 1.75 µm and W1 chosen at 100 and 181 nm. (e, f, h):

The grating spectrum simulated with different values of W1, θ, and N. (g): The change of

the reflectivity (1550 nm) and ∆λ (reflectivity >90%) with the grating blade number N.


71

The impact of grating angle θ on the device performance was investigated as well, and

simulation results are shown in Fig. 4.4(f). When θ is relatively small, increasing θ

expands the beam divergence, which results in a larger 𝑛eff and more-circular wavefront.

Therefore, the wavefront matches better with the following circular blades, and both

reflectivity and bandwidth can be improved, as shown by the simulations results of θ =

20o and 60o. When θ continues to increase, no notable improvement on the grating

performance can be observed, as both neff and the wavefront shape remain relatively

stable (the main lobe is already fully captured). Therefore, as shown in Fig. 4.4(f), with

θ further increased to 180°, the spectrum is only slightly wider than the spectrum with θ

= 60°. On the other hand, for θ = 180°, a periodic fluctuation in the spectrum can be

seen, which is mainly due to the mode resonance inside the taper, as explained

previously. This problem can be further confirmed by calculating the corresponding

resonance cavity length (from the resonance peak spacing), and it is about 2.56 μm

[150]. The calculated cavity length is slightly larger than the taper length, and this is due

to the mode penetration into the grating, as can be illustrated in Fig. 4.4. When θ is

further increased to 270° (the case shown in Fig. 1(c)), the Bragg reflection is severely

destructed due to the strong disturbing fields inside the taper, and the grating reflection

becomes unusable. Therefore, θ = 60° was chosen as the optimal angle in our design to

achieve both a wide and flat reflection spectrum and a compact device size.

The impact of the number of grating blades (N) on the reflectivity and

(reflectivity >90%) was also investigated, and simulation results are shown in Fig.

4.4(g). It is clear that both and reflectivity improve sharply with a larger N until N

reaches 6. For N > 6, the reflectivity and the bandwidth remain almost unchanged,

whilst the spectrum shows sharper edges, as shown in Fig. 4.4(h). To summarize, based

on the device optimization, the main design parameters of the proposed circular grating

are chosen to be: θ = 60°, R = 2 µm, 𝑊1 = 100 nm, and N = 6 to ensure that a high-

efficiency and broadband spectrum with a flat top can be achieved based on a very

compact device footprint.

4.2.2 Characterization

The fabrication and measurement of the proposed circular Bragg grating was realized

based on the fabrication process shown in Fig. 2.4 and Fig. 2.9. The inset of Fig. 4.5

shows the SEM image of the fabricated device in top-view and the schematic of the


72

measurement setup. Figure. 4.6(a) shows the tilted view of the fabricated grating. It can

be seen from Fig. 4.6(a) that vertical sidewalls were achieved for the fabricated grating

blades. To measure the fabricated grating mirror, as illustrated in Fig. 4.5, a broadband

light source (THORLABS ASE730) with an operation wavelength of 1530 to 1610 nm

followed by an in-line polarizer and a polarization controller (PC) was used to provide

the TE-polarized light. The input light passed through a circulator (Port 1→2) before

being injected to the chip. After being back-reflected by the circular grating, the signal

was routed by the circulator (Port 2→3) to an optical spectrum analyzer (OSA) for

spectrum characterizations (shown by Setup 1). To measure the insertion loss (IL) of the

grating, a reference strip waveguide was measured with the setup indicated by the

dotted connection (Setup 2) in Fig. 4.5, and the length of the reference waveguide was

chosen as twice the length of the waveguide connecting the circular grating to the spot

size converter, considering the round-trip propagation of the light reflected by the

circular grating. It should be noted that, during the input light injection in Setup 1, there

were chip-facet reflections which could also be collected by Port 3 of the circulator.

This facet-reflected power was measured at Port 3 of the circulator using Setup 2, and

the measured facet reflection is shown in Fig. 4.6(b). Although this reflection was

relatively weak, it was measured for more reliable performance characterization of the

circular grating. Furthermore, the IL of the circulator for Port 2→3 was also measured

and compensated to the device characterization results.

Figure 4.5. The schematic of the measurement setup and the SEM images of the

fabricated grating mirror.


73

Figure 4.6. (a): The tilted view of the fabricated grating mirror. (b): The measured

spectra of the fabricated grating, the reference strip waveguide, and the chip-facet

reflections. (c): The measured IL of the fabricated grating.


74

The device measurement results are shown in Fig. 4.6(b). It can be seen that the

measured reflection spectrum of the grating is similar with the transmission spectrum of

the reference waveguide, indicating the high reflection efficiency of the device. The

measured IL of the grating is shown in Fig. 4.6(c), which presents fluctuations that are

mainly caused by the unoptimized device sidewall roughness, and at some points it is

even above 0 dB. For reliable characterization, a regression line was calculated based on

the robust locally weighted regression method [134]. Based on the regression line

results, the grating exhibits a low IL of -0.32 to -0.1 dB (corresponding to a reflectivity

of ~ 93% to 98%), which generally matches well with the simulation results.

4.2.3 Integrated Notch Filter Based on Circular Bragg Grating Mirror

Based on the proposed circular grating mirror, we also designed and fabricated a notch

filter [151]. The filter consisted of a resonant cavity formed by two circular grating

mirrors connected by a strip waveguide. A bending waveguide coupler with a bending

radius of rb and a coupling length of Lc was used as the input/output. The SEM images

of the fabricated filter in top-view and tilted-view are shown in Fig. 4.7 and Fig. 4.8(a),

respectively. This filter is equivalent to a 2-port version of a micro-ring based add-drop

filter, with its input and output ports corresponding to the drop and pass ports of the

micro-ring filter, respectively, and the total cavity length corresponding to half of the

round trip length of a micro-ring filter. The input light was coupled into the resonant

cavity through the coupler, and after the cavity the resonant wavelengths were reflected

back to the input port (drop port) of the coupler, whilst other wavelengths passed

through to the output port (pass port) of the coupler. The total cavity length (T) equals

Lw + 2R.

Figure 4.7. The top-view of the fabricated notch filter with the following parameters: Lw

= 4 μm, Lc = 0 μm, rb = 5 μm


75

Figure 4.8. (a): The tilted-view of the fabricated notch filter. (b): The spectra measured

at the output port of the notch filters fabricated with different T and Lc.

Circular grating based filters with different cavity and coupling lengths were fabricated.

The gap between the coupler and the cavity was fixed at 200 nm. The IL of the

fabricated filters are all within 0.5 dB, as shown by the measured output spectra in Fig.

4.8(b), which indicates a low loss of the cavity and thus verifies the high reflectivity of

the proposed grating mirror. With a cavity length of 44 μm (corresponding to a micro-


76

ring filter with a radius of ∼14 μm and a footprint of ~ 616 µm2), the filter shows a free-

spectral range (FSR) of about 6.34 nm at around 1550 nm. It can also be seen from the

measurement results that for a given cavity length, the notch depth of the filter increases

with the coupling strength while the quality factor (Q) decreases with the coupling

strength. With a coupling length of 2 μm and 4 μm (corresponding to a power coupling

ratio of about 7.6% and 15% at 1550 nm), the notch depth of the filter was measured to

be >5 and 10 dB, respectively, and the maximum Q was estimated to be about 14312

and 4683. In practice, the notch depth and Q can be tailored to desired values based on

specific applications. When T was reduced to a much smaller value of 8 μm

(corresponding to a micro-ring radius of ∼2.5 μm), a larger FSR of 30 nm was achieved,

as shown in the figure. However, as the coupling ratio of this filter was not optimized at

the time of fabrication (which is only about 1.4% with Lc set at 0 μm), the notch depth

was very limited to <3 dB. In practice, the notch depth can be significantly increased by

increasing the coupling strength, e.g., based on simulation results, a deep notch of >20

dB can be achieved for the short-cavity notch filter under critical coupling condition.

The proposed notch filter has low IL regardless of the cavity length, mainly attributed to

the low loss of the proposed circular grating mirror, and this becomes specially

advantageous in applications where large FSR and low loss are required. On the other

hand, the IL of a micro-ring filter based on this thin-Si-layer SOI could increase

substantially for <3 μm radius, due to the bending loss.

4.2.4 Solutions for Broadband and High-efficiency TM-reflection

In last section, a broadband circular Bragg grating mirror has been proposed based on

the standard 220 nm SOI platform. While the proposed grating mirror could achieve

high reflectivity over a broad bandwidth for TE-polarized light, it doesn’t work

efficiently for the TM-polarized light. Based on the mode profiles shown in Figs. 2.3(a)

and 2.3(b), unlike the fundamental TE mode whose power is mostly confined within the

silicon waveguide, the fundamental TM mode has a large cladding-penetration, and thus

effective refractive index becomes very low. As the TM mode is penetrated into the

claddings mainly in the vertical direction, even based on the proposed circular grating

structure, the index contrast for the grating is still relatively small, which is <0.5 for the

fundamental TM mode (1550 nm). The weak index contrast makes it hard to achieve

wide reflection bandwidth and high reflectivity, even with a large number of grating


77

periods. In addition, the large cladding-penetration of the TM mode also leads to higher

mode diffraction losses at the grating trenches. As a result, neither broad bandwidth nor

high reflectivity could be easily realized for the TM-polarized light based on the circular

Bragg grating mirror proposed on the 220 nm SOI platform. The polarization

dependence could limit the practical applications of the grating mirror in a polarization-

diverse integrated photonics environment. To overcome this difficulty, in sections

4.2.4.1 and 4.2.4.2, two potential solutions will be proposed based on the SOI platform

to realize broadband and high-efficiency TM-reflections.

4.2.4.1 Circular Bragg grating with thickened grating blades

From a physical point of view, as the confinement factor of the fundamental TM mode

is less than 0.3 and not all, but part of the waves that hit the grating blades gets reflected,

resulting reflectivity is obviously very low. Therefore, the first solution to increase the

grating reflectivity for the fundamental TM mode is increasing the thickness of the

grating blades so that more waves in the grating structure will be pushed for the

constructive interferences. In the meanwhile, as the effective index of the grating blades

increases for larger thickness, the grating index contrast becomes higher which could

increase the reflection bandwidth. The schematic illustration of the proposed circular

Bragg grating with thickened grating blades is shown in Fig. 4.9. In this TM-reflection

grating mirror, the blade thickness is designed to be >220 nm.


78

Figure 4.9. (a) The 3D and (b) the vertical cross-section schematic diagrams of the

proposed circular Bragg grating mirror with thickened blades, designed for TM-

polarized light.

3D-FDTD simulations were run to investigate properties of the proposed TM-designed

grating mirror. The grating parameters used in the simulations were: r = 5 µm, θ = 36°,

W1 = 370 nm, W2 = 286 nm, T = 775 nm, p = 5. It should be noted that, the widths of the

grating blades and the trenches here are designed based on second-order Bragg

condition to achieve grating parameters which are all compatible with the standard UV

lithography, and this is different from the previous TE-reflection grating which was

designed based on first-order Bragg condition with the consideration of achieving

maximized grating strength. The equations used for Bragg condition is expressed as:

0 0

1 2

1 2

3,

4 4eff eff

W Wn n

(4.3)

Where neff1 and neff2 are the effective refractive indices for the grating blades and the

trenches, respectively. Two different structures were compared: circular grating with

non-thickened blades (h = T = 220 nm), and circular grating with thickened blades (h =

220 nm, T = 775 nm). Spectral responses are shown in Fig. 4.10(a), which clearly

demonstrates that the grating with thickened blades is far more advantageous than the


79

other in terms of a higher reflectivity and a broader bandwidth. The vertical field

intensity distributions for the two structures were captured in Fig. 4.10(b), which

suggests the effectiveness of the raised blade height in reducing vertical diffractions.

Figure 4.10. (a) The simulated reflection spectra of the circular Bragg grating with

thickened blades (775 nm thick) and non-thickened blades (220 nm thick) with TM-

polarized light launched. (b) The vertical field intensity distributions simulated along

the gratings with 775 nm thick blades and 220 nm thick blades. The blade number was

set to 5.

The impact of the grating arc angle θ, the blade thickness, and the blade number on the

grating performance were investigated as shown in Fig. 4.11. As shown in Fig. 4.11(a),

both the grating peak reflectivity and the bandwidth (reflectivity >0.8) increase with θ,

but become nearly unaffected when θ exceeds 36°. Figure. 4.11(b) shows the change of

the grating peak reflectivity with the blade thickness. As shown in the figure, the

optimum blade thickness required to achieve the highest peak reflectivity is around 775

nm. For either thinner or thicker blades, the mode size mismatch between the blades and

the taper results in degraded grating performances, and this is mainly because the

fundamental TM mode is concentrated at the upper and lower interfaces of the

waveguide, which results in a relatively larger mode dimension than the fundamental

TE mode, which can be illustrated from Figs. 2.3(a) and 2.3(b). The grating peak

reflectivity also increases with the blade number, as shown in Fig. 4.11(c), and it

becomes stable (∼0.97) when the blade number exceeds 6. In contrast, based on 220 nm

thick blades, the peak reflectivity is <0.5 even with more than 6 blades.


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When the fundamental TE mode was launched into the grating designed for TM modes,

it is interesting that the TM-designed grating is also good for TE modes, as shown in

Fig. 4.11(d). This is because the effective indices of the grating blade become very close

for the fundamental TE and TM modes, based on the larger thickness, where neff-TE ≈ 3.3,

neff-TM ≈ 3.2 at 1550 nm, and therefore the Bragg condition is satisfied for both

polarizations simultaneously. Nevertheless, the grating spectra for the two polarizations

are still different, and carefully observing them in Fig. 4.11(d) suggests two possibilities

in the future. The first one is that broadband grating mirrors can be designed for both

polarizations with proper engineering. The other is that the design can be elaborated for

only one polarization, TM or TE, while strongly discriminating the undesired one.

Figure 4.11. The change of the grating peak reflectivity and the bandwidth with (a) the

grating arc angle θ, (b) the blade thickness, and (c) the blade number. (d) The reflection

spectra of the circular grating with thickened blades (775 nm thick) simulated for the

fundamental TE and TM modes.


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4.2.4.2 Circular Bragg grating based on horizontal slot waveguide

In section 4.2.4.1, it has been shown that circular grating with thickened grating blades

is effective in reflecting the TM-polarized light. However, the proposed structure shown

in Fig. 4.9 has one weakness, which is the relatively complex fabrication requirement.

This is because the waveguide and the grating blades are not based on the same silicon

substrate, as shown in Fig. 4.9(b), which makes the practical implementation of the

proposed structure very complicated. In this section, another solution for broadband and

high-efficiency TM-reflection is proposed, which is called a circular slot Bragg grating

mirror. The slot Bragg grating has a double-layer-silicon structure and is designed based

on the horizontal slot silicon waveguides. Compared to the structure proposed in last

section, the slot grating has an easy-to-fabricate structure.

As shown in Fig. 4.12, the proposed grating based on SOI substrate has three layers,

including two layers of silicon with the same thickness T and an embedded SiO2 slot

layer with the thickness t. The device mainly consists of four parts: an input strip

waveguide, an inverse taper of length lt used for mode transition from the fundamental

TM mode of strip waveguide to the slot mode of slot waveguide, a horizontal slot

waveguide of length ls, and the circular slot Bragg grating. The circular slot Bragg

grating region consists of a slot taper, and several circular slot blades. The arc angle and

radius of the taper is denoted as 𝜃 and r, the widths of grating blade (W1) and trench (W2)

are determined based on Equation 4.3.

Different from the structure in Fig. 4.9 which resolves the vertical diffraction loss issue

of the fundamental TM mode by using thicker grating blades [principle illustrated in Fig.

4.10(b)], the slot grating mirror proposed here in Fig. 4.12 eliminates the vertical

diffraction loss based on the conversion of the fundamental TM mode of strip

waveguide to the slot mode of slot waveguide. In a horizontal slot waveguide [152], due

to the electric-field discontinuity at the upper and lower waveguide boundaries, the

mode intensity of the fundamental TM mode is enhanced and concentrated within the

small slot region, and the TM mode could propagate through the slot waveguide

losslessly. Although TM mode is concentrated within the oxide slot, the effective index

of the slot waveguide can still be larger than the effective index of the strip waveguide,

if the slot thickness is properly chosen. Moreover, compared to the strip-waveguide-

based grating, the slot-waveguide-based grating has thicker grating blades [(2T + t) as


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shown in Fig. 4.12], which leads to weaker vertical mode diffractions. As a result,

gratings based on the slot waveguide could be advantageous than gratings based on the

strip waveguide in terms of a larger index contrast and lower diffraction loss, given the

TM-polarized light is launched. Moreover, compared to the structure in Fig. 4.9, the slot

grating structure shown in Fig. 4.12 is relatively easy to fabricate. The fabrication can

be implemented based on a horizontal slot waveguide which is easy to realize [153], and

various similar structures based on horizontal slot waveguides have been demonstrated

before [154-156].

Figure 4.12. The schematic illustration of the slot-waveguide-based circular Bragg

grating.

The grating performance was investigated based on 3D-FDTD simulations. The lengths

of mode transition taper, slot waveguide, and circular grating taper were set to 5 µm (lt),

1 µm (ls) and 5 µm (r), respectively, and the taper tip width was set to 180 nm. Blade

and trench widths of 515 nm and 286 nm were selected for a Bragg central wavelength

of 1550 nm, and the grating angle 𝜃 was initially set at 20°. Based on the chosen

parameters, the proposed device is compact and is compatible with standard CMOS

fabrication processes. The performances of proposed circular slot grating (CSG) and the

single-layer circular grating (SCG) [Fig. 4.1 (b)] were both simulated. In both structures,

six grating blades were used for short device length. The thickness of the two silicon

layers of the CSG was set at 240 nm, and the SiO2 slot thickness was set to 150 nm. In

addition, devices were covered by SiO2 upper cladding in the simulation. The reflection

spectra of the two gratings are shown in Fig. 4.13(a).


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As shown in Fig. 4.13(a), when compared to the SCG, the proposed CSG has achieved a

much higher reflectivity and a broader bandwidth. Vertical field intensity distributions

captured in Figs. 4.13(b) and 4.13(c) suggest the effectiveness of the CSG in reducing

vertical diffractions. Compared to the proposed grating in last section [Fig. 4.10(a)], the

relatively smaller effective index (2.36) of the slot waveguide results in a slightly

smaller reflectivity and bandwidth, nevertheless, when compared to the SCG (neff =

1.76), the CSG is still significantly advantageous in terms of a much higher peak

reflectivity (>0.9) and a broader bandwidth (>100 nm for reflectivity >0.8). It should be

noted that, in the proposed structure, the reason to choose the silicon layers at 240 nm

instead of 220 nm is because the optimal reflectivity of the grating will degrade based

on the 220 nm silicon thickness.

Figure 4.13. (a) The reflection spectra of CSG and SCG. (b, c) The vertical field

intensity distributions captured along (b) SCG and (c) CSG.

The impact of slot thickness was studied and the results are shown in Fig. 4.14(a). Here

the thickness of silicon layers (T) was fixed at 240 nm and the thickness of SiO2 slot (t)


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was changed from 30 to 270 nm. It can be seen from the results that, Rpeak initially

increases with t, but after t = 150 nm, Rpeak starts to decrease. The reason is that for very

thin slot layer, there will be strong wave diffractions occurring through the slot to

grating trenches due to the tight slot mode confinement, which can be verified by the

field profile in the inset of Fig. 4.14(a) where t was set to a small value of 30 nm. On the

other hand, when the slot thickness increases beyond 150 nm, the slot mode condition

[152] is no longer satisfied, which also results in high propagation loss. It should also be

noted that extra excess loss is generated during the mode transition process, and longer

tapers (lt) can be used to reduce this loss. The impact of grating arc angle and blade

number were also investigated, as shown in Figs. 4.14(b) and 4.14(c). From Fig. 4.14(b),

it is clear that Rpeak and bandwidth increase with 𝜃 until around 30°, then both

parameters keep nearly constant. Furthermore, from Fig. 4.14(c), Rpeak increases with

the period number for both CSG and SCG. While in CSG, light is almost completely

reflected within 8 periods, the SCG shows low reflectivity even using a large number of

blades.

Figure 4.14. (a) The change of grating peak reflectivity with slot thickness (t). (b) The

change of grating peak reflectivity and bandwidth with grating arc angle (θ). (c) The

change of grating peak reflectivity with blade number (p) for CSG and SCG.


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4.2.5 Extended Applications of Slot Bragg Grating

In section 4.2.4.2, a circular Bragg grating mirror was proposed based on the horizontal

slot silicon waveguide to realize broadband high-efficiency TM-reflections. Figure. 4.15

shows the schematic of a horizontal slot silicon waveguide. While the fundamental TM

mode of a slot waveguide is concentrated within the oxide slot layer due to the electric

field discontinuity at the upper and lower boundaries of the silicon layers, the

fundamental TE mode is mainly confined within the silicon layers, as illustrated in the

figure. Consequently, based on the differentiated mode profiles of the two polarizations

(a substantial effective index contrast exists between two different polarizations), Bragg

gratings can be designed to be highly polarization-selective. A polarization-selective

mirror should be highly reflective over a broad bandwidth and be operated only for TE

or TM with the other mode severely suppressed. Such a mirror could be used to reduce

the polarization degeneracy in applications such as tunable lasers, or to maintain the

polarization stability in a polarization-sensitive photonic integrated circuit. In next

section, slot-waveguide-based Bragg gratings are optimized to achieve high reflectivity,

wide bandwidth, as well as a strong polarization selectivity simultaneously.

Figure 4.15. The schematic of a horizontal slot waveguide.

4.2.5.1 Polarization-selective Bragg grating mirror

The schematic illustration of a polarization-selective Bragg grating mirror is shown in

Fig. 4.16. The structure was investigated based on 3D-FDTD simulations based on the

following parameters: θ = 24°, r = 5 µm, T = 240 nm, t = 150 nm, p = 6. Based on the

chosen parameters, the effective refractive indices for the fundamental TE and TM


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modes at 1550 nm are about 2.84 and 2.41, respectively. Based on Equation 4.3,

different sets of grating blade/trench widths (W1/W2) were chosen to satisfy the Bragg

condition for the two polarizations. For TE polarization: W1 = 370 nm, W2 = 286 nm.

For TM polarization: W1 = 510 nm, W2 = 286 nm.

Figure 4.16. (a) The 3D schematic and (b) the cross-section schematic diagrams of the

polarization-selective Bragg grating.

Simulated spectral responses of the grating are shown in Figs. 4.17(a) and 4.17(b). From

the figures, we can see that the mirrors have good performances in terms of reflectivity

and bandwidth. The grating peak reflectivity can reach 0.956 and 0.914, respectively,

for TE and TM polarizations. For TE, high reflectivity (R > 0.8) can be obtained over a

broad bandwidth (BW) of 159 nm from 1490 to 1649 nm. For TM, a BW of 101nm from

1497 to 1598nm is estimated, covering the full C and L bands. When a TM mode is

launched into the TE-designed mirror, it would suffer very high loss as indicated by the

dotted line in Fig. 4.17(a). Extinction ratio (γ = RTE/RTM) was estimated to be 21.4 dB at

1550 nm, indicating an excellent polarization selectivity. Likewise, γ for TM-intended

design was calculated to be 5.05 dB, which could be made larger with more slot silicon

blades. Further optimisations to enlarge γ leave for future works.


87



The influences of blade angle θ, blade number p, silicon layer thickness T and slot layer

thickness t, on the grating performance were investigated as shown in Fig. 4.18. As

shown in Fig. 4.18(a), Rpeak increases with θ, but becomes generally unaffected after 12º,

although there are maximums showing up at 24º. Fig. 4.18(b) suggests that 6 blades are

enough to reach the maximum Rpeak for both polarizations. To get Rpeak of 0.8, only 2

and 4 blades are needed for TE and TM polarizations, respectively, hinting a very small

device footprint. The values of T and t have been proved to have substantial impact on

grating mirror performance. Figure. 4.18(c) shows Rpeak as a function of t when T was

fixed at 240 nm. It is found that Rpeak for TM modes increases initially with t, then

decreases after reaching its maximum at 150 nm. This is because for too small slots,

there will be strong wave diffractions from the slot layer when light propagates through

the grating, due to the strong slot mode confinement. The same problem happens in the

structure shown in Fig. 4.12. For too thick slots, the condition for slot mode

transmission is not satisfied [152, 154], which leads to relatively high propagation loss.

The impact of slot layer thickness can be illustrated by the vertical field intensity

distributions of the grating which were simulated with different t values, as shown in

Fig. 4.19(a). For TE modes, in case of t >150 nm, diffraction loss caused by mode

mismatch between waveguide and blades increases with t, thus peak reflection goes

gradually down. Figure. 4.18(d) shows variation of Rpeak as a function of T while the slot

thickness t is fixed at 150 nm. We see there is also an optimum value for TM modes.

The reason is that, for thinner silicon layers, the power leakage to claddings is larger


88

while, for thicker silicon layers, slot mode confinement becomes weak which causes

relatively high propagation loss. The impact of silicon layer thickness is illustrated in

Fig. 4.19(b). In contrast, the influence of T for TE modes is so negligible that Rpeak

almost remains unchanged. This is because TE mode power is mostly distributed inside

silicon layers no matter how thick they are, once the slot thickness is chosen optimally

for low diffraction loss. In addition, the high index contrast of the TE modes always

helps achieve a high reflectance.




89

Figure 4.19. The intensity field distribution simulated along the grating with different

sets of (a) slot layer thickness and (b) silicon layer thickness.

4.2.5.2 TM-pass/TE-block polarizer

In last section, a polarization-selective Bragg grating mirror was proposed based on the

horizontal slot silicon waveguide, and the polarization selectivity was realized by taking

advantage of the large effective index difference between the TE and TM polarizations.

The polarization-selective mirror could reflect light with a single polarization (TE or


90

TM) over a broad bandwidth while strongly discriminating the other. Particularly, for

the TE-reflection mirror, attributed to the large effective index of the fundamental TE

mode within the double-layer slot silicon waveguide, very high reflectivity and broad

reflection bandwidth can be achieved. In the meanwhile, the TM-polarized light

propagates through the slot layer of the grating and gets negligible reflection with most

of its power diffused into the claddings, contributing to a high polarization extinction

ratio for the grating. This inspires us to propose a solution to collect the non-reflected

TM modes which transmit through a TE-reflection slot Bragg grating, such that a

broadband and high extinction ratio TE-block/TM-pass polarizer could be realized.

Due to the large birefringence of the silicon photonics integration platform, photonic

integrated devices and circuits are polarization sensitive. Various types of polarization

manipulation devices have been demonstrated, amongst which the polarizer is an

important component which transmits light with only the selected polarization (TE or

TM) while blocks the other. However, in previous studies [157-159], the polarizer

usually suffers from a number of drawbacks, including the low extinction ratio (ER)

[159], high excess loss (EL) [158], and narrow operation bandwidth [157]. In this

section, we propose a TE-block/TM-pass polarizer based on the horizontal slot silicon

Bragg grating which overcomes these issues. Based on 3D-FDTD simulation results, the

polarizer could achieve an ultra-high ER of ˃ 30 dB over an ultra-broad wavelength

range of 264 nm (1412 – 1676 nm), and a low EL of < 0.3 dB. In addition, the proposed

polarizer is very compact, having a length of only 10.64 µm for the entire device,

making it suitable for large-scale photonic integrations.


91

Figure 4.20. (a) The 3D schematic and the 2D (b) lateral and (c) vertical illustrations of

the proposed polarizer based on horizontal slot silicon waveguide.

Different from the TE-reflection mirror demonstrated in last section, the TE-block/TM-

pass polarizer is not only required to be highly reflective for TE-polarized light, but also

needs to transmit the TM-polarized light with low loss. If circular Bragg grating is

employed to realize the polarizer, although high reflectivity can be achieved for the TE

modes, the TM modes would be hard to recollect, as the mechanism to recollect the

diffracted circular waves back to the straight waveguide is relatively complicated to

realize. Therefore, in the proposed polarizer, the grating blades were designed to be


92

straight rather than circular, as shown in Fig. 4.20, such that there would be no circular

diffractions occurring inside the grating, and the TM modes could transmit through the

slot grating with low loss. Two tapered mode converters are used in the proposed device

which connect the input/output waveguides with the Bragg grating. The input taper is

used to guide the input light into the grating mirror, and the output taper is used to guide

the transmitted TM modes into the output waveguide. To avoid high mode diffraction

losses for the TM modes, the grating is not fully etched in the lateral direction, which

leaves a nano-bridge connecting across the grating blades, as shown in the figure. The

use of nano-bridge ensures that the TM modes could be well confined within the slot

layer throughout the grating, which consequently avoids the high diffraction loss at

grating trenches compared with the case where there is no bridge.

In order to block the TE polarization while transmitting the TM polarization with low

loss, the grating period is selected so that the Bragg condition is only satisfied for the

TE polarization: Neff1-TEW1 + Neff2-TEW2 = λ0/2, and the grating period is smaller than

half of the TM polarization operating wavelength: Neff1-TMW1 + Neff2-TMW2 < λ0/2, where

Neff1 and Neff2 are the effective refractive index in the blade and the bridge regions,

respectively, and W1 and W2 are the lengths of the grating blades and the nano-bridges,

respectively. Consequently, the device works as a highly reflective mirror for the TE

polarization while as a slot sub-wavelength grating (SWG) waveguide which supports

the lossless Bloch mode [4] for the TM polarization. It should be noted that, W1 and W2

were selected based on first-order Bragg condition to realize a wide bandwidth and high

extinction ratio for the proposed polarizer.

In the grating section, high index contrast is of great importance in realizing a wideband

and high reflectance device. To enlarge the index contrast between grating blades and

nano-bridges for the TE modes, the blade width (Wt) is selected at a relatively large

value of 1 µm while the bridge width (Wb) is selected at a much smaller value of 100

nm, which enables a large index contrast of ˃1.4 for the TE mode (1550 nm). In

addition, the choosing of 100 nm bridge width ensures the cutoff of TE mode at the

bridge section, which leads to extra scattering losses for the TE mode and contributes to

a higher extinction ratio.


93

Figure 4.21. (a)-(d) The field profiles (1550 nm) captured in the horizontal and vertical

cross-sections of the device with TE- or TM-mode; and (e) and (f) The simulated

transmission spectra of the polarizer with 20 and 40 grating periods.

The grating duty cycle could influence the bandwidth and insertion loss of the proposed

polarizer. To realize broad bandwidth and low insertion loss simultaneously for the


94

proposed polarizaer, the following optimized parameters were used: W1 = 0.202 µm, W2

= 0.13 µm, based on a central Bragg wavelength of 1550 nm. In addition, the device

was covered by 2 µm thick SiO2 as the upper cladding. Figures. 4.21(a) – 4.21(d) show

the field propagation profiles (1550 nm) in both horizontal and vertical cross-sections

with TE- or TM-mode, respectively. It is clear that the TE mode is almost fully blocked

through the strong reflections of the grating. On the other hand, the TM mode

propagates through the slot layer with negligible loss. The transmission spectra are

shown in Figs. 4.21(e) and 4.21(f). It can be seen that with 20 grating periods (with a

total device length of only 10.64 µm), ultra-high ER of ˃ 30 dB can be achieved over a

broad band of 264 nm (1412 -1676 nm), and the EL for the TM mode is < 0.3 dB from

1434 to 1690 nm. With 40 periods (with a total device length of 17.28 µm), the ER is

further improved to ˃ 40 dB over a broader range of 276 nm (1409 -1685 nm), and there

is no substantial increase in the EL over the entire band.

4.2.6 Conclusion

In conclusion, in this chapter, a compact circular Bragg grating mirror with relaxed

fabrication requirements and a broader high-reflectivity (>95%) bandwidth has been

proposed based on the 220 nm SOI platform. Compared to the previously presented

circular grating in [143], the minimum radius of the circular grating proposed in this

chapter is significantly enlarged from 170 nm to >2 µm without sacrificing the overall

device footprint, and the minimum device feature size is increased from 30 to 100 nm,

which also allows a large fabrication tolerance. Simulation results have shown that the

proposed grating can achieve a high reflectivity of >95% over an ultrabroad band of 397

nm which is more than twice as wide as the high-efficiency band achieved in [143],

while experimental measurement results have shown that the fabricated circular grating

can achieve a high reflectivity of 93% to 98% within the measured band of 1530 to

1610 nm, which matches with the simulation results. Based on the proposed grating

mirror, a compact notch filter with large notch depth, high Q, and low transmission loss

has also been designed and demonstrated, and the proposed notch filter could be utilized

in various optical applications such as optical monitoring, sideband suppression, optical

modulation, etc., and sensing applications such as thermal and biochemical sensors [32,

160, 161]. With the advantages of broad bandwidth, high reflectivity and compact size,

the proposed circular Bragg grating is expected to be a promising element for wide use


95

in large-scale photonic integrated circuits and applications that require ultra-broadband

and high-efficiency on-chip optical reflections. In this chapter, in addition to the

presented circular Bragg grating mirror designed for TE polarization, two potential

solutions to realize high-efficiency TM-reflections have also been proposed and studied,

which include a circular Bragg grating with thickened blades and a slot circular Bragg

grating based on horizontal slot waveguide. These solutions have been proved to be

effective in realizing wideband and high reflectivity for TM-polarized light based on the

SOI platform. Finally, in this chapter, two extended applications of proposed slot Bragg

grating, including a polarization-selective mirror and a TM-pass/TE-block polarizer has

also been demonstrated and investigated through simulations.

Chapter 5 Conclusions and Future Work

96

CHAPTER 5 CONCLUSIONS AND

FUTURE WORK

5.1 Conclusions

In this thesis, the design, fabrication, and experimental characterizations of two novel

silicon photonic devices, namely a broadband, low-loss, and polarization-insensitive

adiabatic optical power splitter and a broadband high-reflectivity circular Bragg grating

mirror, have been presented. To the best of our knowledge, compared existing same

devices, both proposed devices in this thesis have achieved the best device performance

and the smallest device size. These promising properties make them highly competitive

in building large-scale high-density photonic integrated circuits.

In Chapter 2, we have developed the fabrication process for silicon photonic device

based on 220 nm SOI wafer and assembled the device measurement setup. Low

propagation loss of 2.4 dB/cm has been achieved for the fabricated single-mode silicon

strip waveguide.

The 3-dB adiabatic optical power splitter has been presented in Chapter 3. FDTD

simulation results have shown that the proposed splitter can achieve a transmission

efficiency of nearly 50% for the two output ports over an ultrabroad band from 1200 to

1700 nm, which is literally wavelength insensitive. Experimental measurement results

have shown that the fabricated splitter exhibits a low excess loss of <0.19 dB and <0.14

dB for the TE and TM polarizations, respectively, over the entire measured band from

1530 to 1600 nm, while having an adiabatic taper length of only 5 µm. The splitter has

also exhibited a good power uniformity. The measured uniformity of the cascaded 1×8

splitter has been only 0.47 and 0.17 dB for the TE and TM polarizations, respectively.

In Chapter 4, a broadband and high-reflectivity circular Bragg grating mirror has been

demonstrated. FDTD simulation results have shown that the proposed grating mirror

can achieve a reflectivity of >90% over an ultrabroad bandwidth of 500 nm (1263 -

1763 nm), and a high reflectivity of >95% over a broad bandwidth of 397 nm (1340 -

1737 nm), which covers the entire E- to U-bands. Experimental measurement results

have exhibited a high reflectivity of 93% - 98% within the measured band of 1530 to

1610 nm, which agrees well with simulations. The proposed Bragg mirror has a very


97

compact size of only 4.49 µm × 4.54 µm, making it suitable to build densely integrated

devices such as filters, resonators, and on-chip laser cavities. As one of its applications,

a compact notch filter with high rejection ratio (>10 dB) and low transmission loss

(<0.5 dB) has also been fabricated and presented in this chapter. In this chapter, in

addition to the grating mirror designed for TE-polarized light, solutions for high-

efficiency TM-reflections have been proposed and investigated. Moreover, two

extended applications of the proposed slot grating structure in this chapter have been

presented through simulations.

5.2 Future work

The outstanding properties of the proposed devices in this thesis can enable various

promising applications in the future. One of the promising applications of the proposed

adiabatic splitter in Chapter 3 is the silicon integrated optical phased array proposed in

[162]. The proposed phased array can be used to realize beam steering function in high-

speed short-range infrared optical wireless communication systems. Silicon integrated

power splitter is one of the key components of the proposed optical phased array, and

the splitter is required to have a compact size, low insertion loss and broad bandwidth.

In addition, it needs to be polarization independent. The proposed adiabatic splitter in

this thesis meets all these requirements and will be utilized in the proposed optical

phased array in our future work. In addition, as mentioned in section 3.2.2, it is possible

to realize various power splitting ratios for the proposed splitter by using asymmetric

gaps between tapers. Free choice of splitting ratio is an important feature which can be

used to realize dynamic control and efficiency management of optical power in photonic

systems [163], and is also needed in various applications such as asymmetric MZI [164]

and signal monitoring [165]. Therefore, realizing various splitting ratio is another

improvement of the proposed adiabatic splitter in the future.

The proposed broadband circular Bragg grating mirror in Chapter 4 can be used to

construct integrated filters, resonators, and lasers. In addition to the integrated notch

filter presented in Chapter 4, another promising application of the proposed circular

Bragg mirror is the fast wavelength-switchable hybrid silicon laser demonstrated in [66].

Compared with a loop mirror which is also commonly used to build external laser

cavities [166, 167], the proposed circular Bragg grating mirror has the advantages of flat

reflectivity, high polarization extinction ratio, and smaller footprint. These properties


98

make it capable of building lasers with stable lasing output, stronger polarization

stability, and higher level of integration. While in [66], only the initial concept of the

hybrid laser is presented, the experimental demonstrations will be left for our future

work. In addition, in Chapter 4, several new multi-layer Bragg grating structures with

novel applications have also been proposed. Normally, silicon photonic structures with

multiple silicon layers can be realized based on the deposition of amorphous silicon,

which has been extensively researched in previous literatures [153, 154, 156]. Due to

the facility limitation, the proposed multi-layer devices in this thesis are only estimated

through simulations, and the fabrication and experimental characterization will also

leave for the future work.

Chapter 6 References

99

CHAPTER 6 REFERENCES

[1] Y. A. Vlasov, "Silicon CMOS-Integrated Nano-Photonics for Computer and Data

Communications Beyond 100G," IEEE Communications Magazine, vol. 50(2), pp. s67-

s72, Feb 2012.

[2] P. Pepeljugoski et al., "Low Power and High Density Optical Interconnects for Future

Supercomputers," presented at the Optical Fiber Communication Conference, San

Diego, California, United States, Mar, 2010.

[3] C. Sun et al., "Single-chip microprocessor that communicates directly using light,"

Nature, vol. 528, pp. 534-538, Dec 2015.

[4] K. Yamada et al., "High-performance silicon photonics technology for

telecommunications applications," Science and Technology of Advanced Materials, vol.

15(2), Apr 2014.

[5] P. Dong, Y.-K. Chen, G.-H. Duan, and D. T. Neilson, "Silicon photonic devices and

integrated circuits," Nanophotonics, vol. 3, no. 4-5, pp. 215-228, 2014.

[6] B. Jalali and S. Fathpour, "Silicon Photonics," JOURNAL OF LIGHTWAVE

TECHNOLOGY, vol. 24(12), pp. 4600-4615, Dec 2006.

[7] B. Jalali, V. Raghunathan, R. Shori, S. Fathpour, D. Dimitropoulos, and O. Stafsudd,

"Prospects for Silicon Mid-IR Raman Lasers," IEEE JOURNAL OF SELECTED

TOPICS IN QUANTUM ELECTRONICS, vol. 12(6), pp. 1618-1627, Nov/Dec 2006.

[8] G. T. Reed, G. Mashanovich, F. Y. Gardes, and D. J. Thomson, "Silicon optical

modulators," Nature Photonics, vol. 4, pp. 518-526, Jul 2010.

[9] H. Subbaraman et al., "Recent advances in silicon-based passive and active optical

interconnects," Optics Express, vol. 23(3), pp. 2487-2510, Feb 2015.

[10] L. TSYBESKOV, D. J. LOCKWOOD, and M. ICHIKAWA, "Silicon Photonics:

CMOS Going Optical," Proceedings of the IEEE, vol. 97(7), pp. 1161-1165, Jul 2009.

[11] R. Soref, "The Past, Present, and Future of Silicon Photonics," IEEE JOURNAL OF

SELECTED TOPICS IN QUANTUM ELECTRONICS, vol. 12(6), pp. 1678-1687,

Nov/Dec 2006.

[12] L. Pavesi and D. J. Lockwood, "Integrated Photonics," in Silicon Photonics: Springer-

Verlag Berlin Heidelberg, 2004.

[13] L. Pavesi and D. J. Lockwood, "Monolithic Silicon Microphotonics," Springer-Verlag

Berlin Heidelberg, 2004.

[14] Z. Zhou, Z. Tu, T. Li, and X. Wang, "Silicon Photonics for Advanced Optical

Interconnections," JOURNAL OF LIGHTWAVE TECHNOLOGY, vol. 33(4), pp. 928-

933, Feb 2015.

[15] D. A. B. MILLER, "Rationale and Challenges for Optical Interconnects to Electronic

Chips," Proceedings of the IEEE, vol. 88, no. 6, pp. 728-749, Jun 2000.


100

[16] D. A. B. Miller, "DeviceRequirementsforOptical Interconnects to Silicon Chips,"

Proceedings of the IEEE, vol. 97(7), pp. 1166-1185, Jul 2009.

[17] L. D. Paulson, "IBM Project Proposes Using Light to Make Chips Faster," Computer,

vol. 44, no. 2, pp. 14-17, Feb 2011.

[18] D. McGrath. (2009) Intel developing optical chip-to-chip interconnects. Electronic

Engineering Times.

[19] L. Pavesi and D. J. Lockwood, "Merits and Potential Impact of Silicon Photonics," in

Silicon Photonics III: Systems and Applications: Springer-Verlag Berlin Heidelberg,

2016.

[20] Available: https://www.cisco.com/c/dam/en/us/solutions/collateral/service-

provider/global-cloud-index-gci/white-paper-c11-738085.pdf

[21] R. A. Soref and J. P. Lorenzo, "Single-crystal silicon: a new material for 1.3 and 1.6 μm

integrated-optical components," Electronics Letters, vol. 21, no. 21, pp. 953-954, 1985.

[22] R. A. Soref and J. P. Lorenzo, "All-silicon active and passive guided-wave components

for λ = 1.3 and 1.6 µm," IEEE Journal of Quantum Electronics, vol. 22, no. 6, pp. 873-

879, Jun 1986.

[23] A. Liu et al., "A high-speed silicon optical modulator based on a metal–oxide–

semiconductor capacitor," Nature, vol. 427, pp. 615-618, Feb 2004.

[24] B. R. Koch, A. W. Fang, O. Cohen, and J. E. Bowers, "Mode-locked silicon evanescent

lasers," Optics Express, vol. 15(18), pp. 11225-11233, Sep 2007.

[25] A. Narasimha et al., "A Fully Integrated 4 × 10-Gb/s DWDM Optoelectronic

Transceiver Implemented in a Standard 0.13 μm CMOS SOI Technology," IEEE

JOURNAL OF SOLID-STATE CIRCUITS, vol. 42(12), pp. 2736-2744, Dec 2007.

[26] S. Assefa et al., "A 90nm CMOS integrated Nano-Photonics technology for 25Gbps

WDM optical communications applications," presented at the Electron Devices Meeting

(IEDM), 2012 IEEE International, San Francisco, CA, 2012.

[27] M. Haurylau et al., "On-Chip Optical Interconnect Roadmap: Challenges and Critical

Directions," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,

vol. 12(6), pp. 1699-1705, Nov/Dec 2006.

[28] G. T. Reed, "Optical Modulators in Silicon Photonic Circuits," in SILICON

PHOTONICS: THE STATE OF THE ART: John Wiley & Sons Ltd, 2008.

[29] R. Soref and B. Bennett, "Electrooptical effects in silicon," IEEE Journal of Quantum

Electronics, vol. QE-23(1), pp. 123-129, Jan 1987.

[30] L. Liao, D. Samara-Rubio, M. Morse, A. Liu, and D. Hodge, "High speed silicon Mach-

Zehnder modulator " Optics Express, vol. 13(8), pp. 3129-3135, Apr 2005.

[31] Q. Xu, B. Schmidt, S. Pradhan, and M. Lipson, "Micrometre-scale silicon electro-optic

modulator," Nature, vol. 435, pp. 325-327, May 2005.

[32] W. Bogaerts et al., "Silicon microring resonators," LASER & PHOTONICS REVIEWS,

vol. 6(1), pp. 47-73, 2012.

https://www.cisco.com/c/dam/en/us/solutions/collateral/service-provider/global-cloud-index-gci/white-paper-c11-738085.pdf

https://www.cisco.com/c/dam/en/us/solutions/collateral/service-provider/global-cloud-index-gci/white-paper-c11-738085.pdf


101

[33] Z. Fang and C. Z. Zhao, "Recent Progress in Silicon Photonics: A Review," ISRN

Optics, vol. 2012, 2012.

[34] R. A. Soref and B. R. Bennett, "Kramers-Kronig Analysis Of Electro-Optical Switching

In Silicon," Proc. SPIE 0704, Integrated Optical Circuit Engineering IV, vol. 704, pp.

32-37, Mar 1987.

[35] C. K. Tang and G. T. Reed, "Highly efficient optical phase modulator in SOI

waveguides," Electronics Letters, vol. 31(6), pp. 451-452, Mar 1995.

[36] J. P. Lorenzo and R. A. Soref, "1.3 μm electro‐optic silicon switch," Applied Physics

Letters, vol. 51, pp. 6-8, 1987.

[37] A. Cutolo, M. Iodice, P. Spirito, and L. Zeni, "Silicon electro-optic modulator based on

a three terminal device integrated in a low-loss single-mode SOI waveguide," Journal

of Lightwave Technology, vol. 15, no. 3, pp. 505-518, Mar 1997.

[38] C. A. Barrios, V. R. Almeida, R. Panepucci, and M. Lipson, "Electrooptic modulation

of silicon-on-insulator submicrometer-size waveguide devices," Journal of Lightwave

Technology, vol. 21, no. 10, pp. 2332-2339, Oct 2003.

[39] C. E. Png, S. P. Chan, S. T. Lim, and G. T. Reed, "Optical phase modulators for MHz

and GHz modulation in silicon-on-insulator (SOI)," Journal of Lightwave Technology,

vol. 22, no. 6, pp. 1573-1582, Jun 2004.

[40] S. Manipatruni, Q. Xu, B. Schmidt, J. Shakya, and M. Lipson, "High Speed Carrier

Injection 18 Gb/s Silicon Micro-ring Electro-optic Modulator," presented at the Lasers

and Electro-Optics Society, 2007. LEOS 2007. The 20th Annual Meeting of the IEEE,

Lake Buena Vista, FL, Oct, 2007.

[41] W. M. J. Green, M. J. Rooks, L. Sekaric, and Y. A. Vlasov, "Ultra-compact, low RF

power, 10 Gb/s silicon Mach-Zehnder modulator," Optics Express, vol. 15, no. 25, pp.

17106-17113, 2007.

[42] F. Y. Gardes, G. T. Reed, N. G. Emerson, and C. E. Png, "A sub-micron depletion-type

photonic modulator in Silicon On Insulator," Optics Express, vol. 13, no. 22, pp. 8845-

8854, 2005.

[43] F. Y. Gardes et al., "High-speed modulation of a compact silicon ring resonator based

on a reverse-biased pn diode," Optics Express, vol. 17, no. 24, pp. 21986-21991, 2009.

[44] J.-B. You, M. Park, J.-W. Park, and G. Kim, "12.5 Gbps optical modulation of silicon

racetrack resonator based on carrier-depletion in asymmetric p-n diode," Optics Express,

vol. 16, no. 22, pp. 18340-18344, 2008.

[45] N.-N. Feng et al., "High speed carrier-depletion modulators with 1.4V-cm VπL

integrated on 0.25μm silicon-on-insulator waveguides," Optics Express, vol. 18, no. 8,

pp. 7994-7999, 2010.

[46] L. Liao et al., "40 Gbit/s silicon optical modulator for highspeed applications,"

Electronics Letters, vol. 43(22), Oct 2007.

[47] D. M. Gill et al., "Internal Bandwidth Equalization in a CMOS-Compatible Si-Ring

Modulator," IEEE Photonics Technology Letters, vol. 21, no. 4, pp. 200-202, Dec 2008.


102

[48] D. Liang and J. E. Bowers, "Recent progress in lasers on silicon," Nature Photonics, vol.

4, pp. 511-517, Jul 2010.

[49] G. T. Reed, "Silicon Lasers," in SILICON PHOTONICS: THE STATE OF THE ART:

John Wiley & Sons Ltd, 2008.

[50] L. Pavesi and D. J. Lockwood, "Silicon Fundamentals for Photonics Applications," in

Silicon Photonics: Springer-Verlag Berlin Heidelberg, 2004.

[51] G. T. Reed and A. P. Knights, "Prospects for Silicon Light-emitting Devices," in Silicon

Photonics: An Introduction: John Wiley & Sons Ltd, 2004.

[52] R. Claps, D. Dimitropoulos, Y. Han, and B. Jalali, "Observation of Raman emission in

silicon waveguides at 1.54 μm," Optics Express, vol. 10, no. 22, pp. 1305-1313, 2002.

[53] H. Rong et al., "A continuous-wave Raman silicon laser," Nature, vol. 433, pp. 725-728,

Feb 2005.

[54] Z. Zhou, B. Yin, and J. Michel, "On-chip light sources for silicon photonics," Light:

Science & Applications vol. 4. e358, 2015.

[55] A. J. Kenyon, "Erbium in silicon," SEMICONDUCTOR SCIENCE AND

TECHNOLOGY, vol. 20, no. 12, pp. R65-R84, 2005.

[56] M. J. DEEN and P. K. BASU, "Light Emitters in Si," in Silicon Photonics:

Fundamentals and Devices: John Wiley & Sons Ltd, 2012.

[57] O. Jambois, F. Gourbilleau, A. J. Kenyon, J. Montserrat, R. Rizk, and B. Garrido,

"Towards population inversion of electrically pumped Er ions sensitized by Si

nanoclusters," Optics Express, vol. 18, no. 3, pp. 2230-2235, 2010.

[58] J. Liu et al., "Ge-on-Si optoelectronics," Thin Solid Films, vol. 520, pp. 3354–3360,

2012.

[59] J. Liu et al., "Tensile-strained, n-type Ge as a gain medium for monolithic laser

integration on Si," Optics Express, vol. 15, no. 18, pp. 11272-11277, 2007.

[60] X. Sun, J. Liu, L. C. Kimerling, and J. Michel, "Direct gap photoluminescence of nn-

type tensile-strained Ge-on-Si," Applied Physics Letters, vol. 95, no. 1, 2009, Art. no.

011911.

[61] J. Liu, X. Sun, R. Camacho-Aguilera, L. C. Kimerling, and J. Michel, "Ge-on-Si laser

operating at room temperature," Optics Letters, vol. 35, no. 5, pp. 679-681, 2010.

[62] M. E. Groenert et al., "Monolithic integration of room-temperature cw GaAs/AlGaAs

lasers on Si substrates via relaxed graded GeSi buffer layers," Journal of Applied

Physics, vol. 93, no. 1, pp. 362-367, 2003.

[63] L. Cerutti, J. B. Rodriguez, and E. Tournie, "GaSb-Based Laser, Monolithically Grown

on Silicon Substrate, Emitting at 1.55 μm at Room Temperature," IEEE Photonics

Technology Letters, vol. 22, no. 8, pp. 553-555, 2010.

[64] G. Roelkens, D. V. Thourhout, R. Baets, R. Nötzel, and M. Smit, "Laser emission and

photodetection in an InP/InGaAsP layer integrated on and coupled to a Silicon-on-

Insulator waveguide circuit," Optics Express, vol. 14, no. 18, pp. 8154-8159, 2006.


103

[65] G.-H. Duan et al., "Hybrid III–V on Silicon Lasers for Photonic Integrated Circuits on

Silicon," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS,

vol. 20, no. 4, 2014, Art. no. 6100213.

[66] S. Gao, C.-J. Chae, Y. Wang, and E. Skafidas, "Fast Wavelength-Switchable Hybrid

Laser for Energy-Efficient Optical Interconnect," presented at the 2014 Optical

Interconnects Conference, San Diego, CA, May 2014, 2014.

[67] C.-J. Chae, E. Skafidas, and D.-Y. Choi, "Compact bragg grating reflectors in silicon

waveguides and their application to resonator filters," presented at the Optical Fiber

Communications Conference and Exhibition (OFC), 2014, San Francisco, CA, March

2014, 2014.

[68] J. Michel, J. Liu, and L. C. Kimerling, "High-performance Ge-on-Si photodetectors,"

Nature Photonics, vol. 4, pp. 527-534, Aug 2010.

[69] S. Luryi, A. Kastalsky, and J. C. Bean, "New infrared detector on a silicon chip," IEEE

Transactions on Electron Devices vol. 31, no. 9, pp. 1135-1139, Sep 1984.

[70] E. A. Fitzgerald, "Dislocations in strained-layer epitaxy: theory, experiment, and

applications," Materials Science Reports, vol. 7, no. 3, pp. 87-142, Nov 1991.

[71] S. B. Samavedam, M. T. Currie, T. A. Langdo, and E. A. Fitzgerald, "High-quality

germanium photodiodes integrated on silicon substrates using optimized relaxed graded

buffers," Applied Physics Letters, vol. 73, pp. 2125-2127, 1998.

[72] J. Wang and S. Lee, "Ge-Photodetectors for Si-Based Optoelectronic Integration,"

Sensors, vol. 11, pp. 696-718, Jan 2011.

[73] H.-C. Luan et al., "High-quality Ge epilayers on Si with low threading-dislocation

densities," Applied Physics Letters, vol. 75, no. 19, pp. 2909-2911, 1999.

[74] J. M. Baribeau, T. E. Jackman, D. C. Houghton, P. Maigné, and M. W. Denhoff,

"Growth and characterization of Si1−x Ge x and Ge epilayers on (100) Si," Journal of

Applied Physics, vol. 63, pp. 5738-5746, 1988.

[75] Z. Huang, J. Oh, and J. C. Campbell, "Back-side-illuminated high-speed Ge

photodetector fabricated on Si substrate using thin SiGe buff er layers," Applied Physics

Letters, vol. 85, pp. 3286-3288, 2004.

[76] J. Nakatsuru, H. Date, S. Mashiro, and M. Ikemoto, "Growth of high quality Ge

epitaxial layer on Si(100) substrate using ultra thin Si0.5Ge0.5 buff er," MRS

Proceedings, vol. 891, pp. 315-320, 2006.

[77] L. Vivien et al., "42 GHz p.i.n germanium photodetector integrated in a silicon-on-

insulator waveguide," Optics Express, vol. 17, no. 8, pp. 6252-6257, 2009.

[78] D. Feng et al., "High-speed Ge photodetector monolithically integrated with large

cross-section silicon-on-insulator waveguide," Applied Physics Letters, vol. 95, 2009,

Art. no. 261105.

[79] Y. Kang et al., "Monolithic germanium/silicon avalanche photodiodes with 340 GHz

gain–bandwidth product," Nature Photonics, vol. 3, pp. 59-63, 2009.


104

[80] W. S. Zaoui et al., "Frequency response and bandwidth enhancement in Ge/Si

avalanche photodiodes with over 840GHz gain-bandwidth-product," Optics Express,

vol. 17, no. 15, pp. 12641-12649, 2009.

[81] Y. Kang et al., "Ge/Si Waveguide Avalanche Photodiodes on SOI Substrates for High

Speed Communication," ECS Transactions, vol. 33, no. 6, pp. 757-764, 2010.

[82] Y. Kang et al., "Monolithic Ge/Si avalanche photodiodes," presented at the 2009 6th

IEEE International Conference on Group IV Photonics, San Francisco, CA, Sep, 2009.

[83] Y. A. Vlasov and S. J. McNab, "Losses in single-mode silicon-on-insulator strip

waveguides and bends," Optics Express, vol. 12, no. 8, pp. 1622-1631, 2004.

[84] T. Tsuchizawa et al., "Microphotonics devices based on silicon microfabrication

technology," IEEE Journal of Selected Topics in Quantum Electronics, vol. 11, no. 1,

pp. 232-240, 2005.

[85] P. Dumon et al., "Low-loss SOI photonic wires and ring resonators fabricated with deep

UV lithography," IEEE Photonics Technology Letters, vol. 16, no. 5, pp. 1328-1330,

2004.

[86] K. Debnath et al., "Low-Loss Silicon Waveguides and Grating Couplers Fabricated

Using Anisotropic Wet Etching Technique," frontiers in Materials, vol. 3, Feb 2016,

Art. no. 10.

[87] F. Y. Gardes et al., "Sub-micron optical waveguides for silicon photonics formed via

the local oxidation of silicon (LOCOS)," SPIE Proceedings, Jan 2008.

[88] K. K. Lee, D. R. Lim, L. C. Kimerling, J. Shin, and F. Cerrina, "Fabrication of ultralow-

loss Si/SiO2 waveguides by roughness reduction," Optics Letters, vol. 26, no. 23, pp.

1888-1890, 2001.

[89] G. Z. Masanovic et al., "A high efficiency input/output coupler for small silicon

photonic devices," Optics Express, vol. 13, no. 19, pp. 7374-7379, 2005.

[90] D. Vermeulen et al., "High-efficiency fiber-to-chip grating couplers realized using an

advanced CMOS-compatible Silicon-On-Insulator platform," Optics Express, vol. 18,

no. 17, pp. 18278-18283.

[91] X. Chen, C. Li, and H. K. Tsang, "Fabrication-Tolerant Waveguide Chirped Grating

Coupler for Coupling to a Perfectly Vertical Optical Fiber," IEEE Photonics

Technology Letters, vol. 20, no. 23, pp. 1914-1916, Aug 2008.

[92] J. Cardenas, C. B. Poitras, K. Luke, L.-W. Luo, P. A. Morton, and M. Lipson, "High

Coupling Efficiency Etched Facet Tapers in Silicon Waveguides," IEEE Photonics

Technology Letters, vol. 26, no. 23, pp. 2380-2382, Sep 2014.

[93] T. Shoji, T. Tsuchizawa, T. Watanabe, K. Yamada, and H. Morita, "Low loss mode size

converter from 0.3 μm square Si wire waveguides to singlemode fibres," Electronics

Letters, vol. 38, no. 25, pp. 1669-1670, Dec 2002.

[94] C. Kopp et al., "Silicon Photonic Circuits: On-CMOS Integration, Fiber Optical

Coupling, and Packaging," IEEE Journal of Selected Topics in Quantum Electronics vol.

17, no. 3, pp. 498-509, Oct 2010.


105

[95] S. J. McNab, N. Moll, and Y. A. Vlasov, "Ultra-low loss photonic integrated circuit

with membrane-type photonic crystal waveguides," Optics Express, vol. 11, no. 22, pp.

2927-2939, 2003.

[96] Z. Yu et al., "High efficiency and broad bandwidth grating coupler between

nanophotonic waveguide and fibre," Chinese Physics B, vol. 19, no. 1, 2010.

[97] L. Pavesi and D. J. Lockwood, "Packaging of Silicon Photonic Devices," in Silicon

Photonics III: Systems and Applications: Springer-Verlag Berlin Heidelberg, 2016.

[98] D. Dai, Z. Wang, N. Julian, and J. E. Bowers, "Compact broadband polarizer based on

shallowly-etched silicon-on-insulator ridge optical waveguides," Optics Express, vol. 18,

no. 26, pp. 27404-27415, 2010.

[99] Y. Huang, S. Zhu, H. Zhang, T.-Y. Liow, and G.-Q. Lo, "CMOS compatible horizontal

nanoplasmonic slot waveguides TE-pass polarizer on silicon-oninsulator platform,"

Optics Express, vol. 21, no. 10, pp. 12790-12796, 2013.

[100] M. Z. Alam, J. S. Aitchison, and M. Mojahedi, "Compact and silicon-on-insulator-

compatible hybrid plasmonic TE-pass polarizer," Optics Letters, vol. 37, no. 1, pp. 55-

57, 2012.

[101] D. Dai, J. Bauters, and J. E. Bowers, "Passive technologies for future large-scale

photonic integrated circuits on silicon: polarization handling, light non-reciprocity and

loss reduction," Light: Science & Applications, 2012.

[102] T. K. Liang and H. K. Tsang, "Integrated polarization beam splitter in high index

contrast silicon-on-insulator waveguides," IEEE Photonics Technology Letters, vol. 17,

no. 2, pp. 393-395, 2005.

[103] B.-K. Yang, S.-Y. Shin, and D. Zhang, "Ultrashort Polarization Splitter Using Two-

Mode Interference in Silicon Photonic Wires," IEEE Photonics Technology Letters, vol.

21, no. 7, pp. 432-434, Feb 2009.

[104] Y. Yue, L. Zhang, J.-Y. Yang, R. G. Beausoleil, and A. E. Willner, "Silicon-on-

insulator polarization splitter using two horizontally slotted waveguides," Optics Letters,

vol. 35, no. 9, pp. 1364-1366, 2010.

[105] D. Dai, Z. Wang, J. Peters, and J. E. Bowers, "Compact Polarization Beam Splitter

Using an Asymmetrical Mach–Zehnder Interferometer Based on Silicon-on-Insulator

Waveguides," IEEE Photonics Technology Letters, vol. 24, no. 8, pp. 673-675, Jan

2012.

[106] S. Gao, Y. Wang, K. Wang, and E. Skafidas, "Low-Loss and Broadband 2 × 2

Polarization Beam Splitter Based on Silicon Nitride Platform," IEEE Photonics

Technology Letters, vol. 28, no. 18, pp. 1936-1939, Jun 2016.

[107] J. Feng and R. Akimoto, "Silicon nitride polarizing beam splitter with potential

application for intersubband-transition-based all-optical gate device," Japanese Journal

of Applied Physics, vol. 54, no. 4S, 2015.

[108] D.-X. Xu et al., "Silicon Photonic Integration Platform—Have We Found the Sweet

Spot?," IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, vol.

20, no. 4, pp. 189-205, 2014.


106

[109] D. J. Lockwood and L. Pavesi, "Silicon Photonic Wire Waveguides: Fundamentals and

Applications," in Silicon Photonics II: Components and Integration: Springer-Verlag

Berlin Heidelberg, 2011.

[110] N. Devlin and D. Brown. (2010). Dose Determination Using ZEP520A Resist as a

Model. Available: http://nanolithography.gatech.edu/training/Determining_dose_r3.pdf

[111] J. Cardenas；, C. B. Poitras；, K. Luke；, L.-W. Luo；, P. A. Morton；, and M.

Lipson；, "High Coupling Efficiency Etched Facet Tapers in Silicon Waveguides,"

IEEE PHOTONICS TECHNOLOGY LETTERS, vol. 26, no. 23, pp. 2380-2382, 2014.

[112] D. Kwong, A. Hosseini, Y. Zhang, and R. T. Chen, "1 × 12 Unequally spaced

waveguide array for actively tuned optical phased array on a silicon nanomembrane,"

APPLIED PHYSICS LETTERS, vol. 99, 2011, Art. no. 051104.

[113] S. Tomofuji, S. Matsuo, T. Kakitsuka, and K.-i. Kitayama, "Dynamic switching

characteristics of InGaAsP/InP multimode interference optical waveguide switch,"


[114] T. Li et al., "Low-voltage, high speed, compact silicon modulator for BPSK modulation

" Optics Express, vol. 21, no. 20, pp. 23410-23415, 2013.

[115] S. Chen, Y. Shi, S. He, and D. Dai, "Compact monolithically-integrated hybrid

(de)multiplexer based on silicon-on-insulator nanowires for PDM-WDM systems,"


[116] H. Yamada, T. Chu, S. Ishida, and Y. Arakawa, "Optical directional coupler based on

Si-wire waveguides," IEEE Photonics Technology Letters, vol. 17, no. 3, pp. 585-587,

2005.

[117] Y.-j. Quan, P.-d. Han, Q.-j. Ran, F.-p. Zeng, L.-p. Gao, and C.-h. Zhao, "A photonic

wire-based directional coupler based on SOI," Optics Communications, vol. 281, no. 11,

pp. 3105-3110, 2008.

[118] Z. Sheng et al., "A Compact and Low-Loss MMI Coupler Fabricated With CMOS

Technology," IEEE Photonics Journal, vol. 4, no. 6, pp. 2272-2277, 2012.

[119] H. Zhou, J. Song, C. Li, H. Zhang, and P. G. Lo, "A Library of Ultra-Compact

Multimode Interference Optical Couplers on SOI," IEEE Photonics Technology Letters,

vol. 25, no. 12, pp. 1149-1152, 2013.

[120] X. Tang, J. Liao, H. Li, L. Zhang, R. Lu, and Y. Liu, "A novel scheme for 1×N optical

power splitter," Optics Express, vol. 18, no. 21, pp. 21697-21704, 2010.

[121] K. K. Chung, H. P. Chan, and P. L. Chu, "A 1 × 4 polarization and wavelength

independent optical power splitter based on a novel wide-angle low-loss Y-junction,"

Optics Communications, vol. 267, no. 2, pp. 367-372, 2006.

[122] J. Xing et al., "Silicon-on-insulator-based adiabatic splitter with simultaneous tapering

of velocity and coupling," Optics Letters, vol. 38, no. 13, pp. 2221-2223, 2013.

[123] L. Cao, A. Elshaari, A. Aboketaf, and S. Preble, "Adiabatic couplers in SOI

waveguides," presented at the Conference on Lasers and Electro-Optics 2010, San Jose,

California United States, 16–21 May 2010, 2010.

http://nanolithography.gatech.edu/training/Determining_dose_r3.pdf


107

[124] H. Yun, Z. Lu, Y. Wang, W. Shi, L. Chrostowski, and N. A. Jaeger, "2x2 Broadband

Adiabatic 3-dB Couplers on SOI Strip Waveguides for TE and TM modes," presented

at the CLEO: 2015, San Jose, California United States, 10–15 May 2015, 2015.

[125] J. Xing, Z. Li, Y. Yu, and J. Yu, "Design of polarization-independent adiabatic splitters

fabricated on silicon-on-insulator substrates," Optics Express, vol. 21, no. 22, pp.

26729-26734, 2013.

[126] K. Solehmainen, M. Kapulainen, and M. Harjanne, "Adiabatic and Multimode

Interference Couplers on Silicon-on-Insulator," IEEE Photonics Technology Letters, vol.

18, no. 21, pp. 2287 - 2289, 2006.

[127] M. H. Hu, J. Z. Huang, R. Scarmozzino, M. Levy, and R. M. Osgood, "A Low-Loss and

Compact Waveguide Y-Branch Using Refractive-Index Tapering," IEEE PHOTONICS

TECHNOLOGY LETTERS, vol. 9, no. 2, pp. 203-205, 1997.

[128] M. Rangaraj, M. Minakata, and S. Kawakami, "Low loss integrated optical Y-branch,"

Journal of Lightwave Technology, vol. 7, no. 5, pp. 753 - 758, 1989.

[129] A. Sakai, T. Fukazawa, and T. Baba, "Low loss ultra-small branches in a silicon

photonic wire waveguide," IEICE TRANS. ELECTRON., vol. E85-C, no. 4, pp. 1033-

1038, 2002.

[130] O. Hanaizumi, M. Miyagi, and S. Kawakami, "Wide Y-Junctions with Low Losses in

Three-Dimensional Dielectric Optical Waveguides," IEEE Journal of Quantum

Electronics vol. QE-21, pp. 168-173, 1985.

[131] S.-H. Yang, M. L. Cooper, P. R. Bandaru, and S. Mookherjea, "Giant birefringence in

multi-slotted silicon nanophotonic waveguides," Optics Express, vol. 16, no. 11, pp.

8306-8316, 2008.

[132] Z. Xiao et al., "Ultra-compact low loss polarization insensitive silicon waveguide

splitter," Optics Express, vol. 21, no. 14, pp. 16331-16336, 2013.

[133] X. Li, H. Xu, X. Xiao, Z. Li, J. Yu, and Y. Yu, "Compact and low-loss silicon power

splitter based on inverse tapers," Optics Letters, vol. 38, no. 20, pp. 4220-4223, 2013.

[134] W. S. Cleveland, "Robust Locally Weighted Regression and Smoothing Scatterplots,"

Journal of the American Statistical Association, vol. 74, no. 368, pp. 829-836, 1979.

[135] T. E. Murphy, J. T. Hastings, and H. I. Smith, "Fabrication and characterization of

narrow-band Bragg-reflection filters in silicon-on-insulator ridge waveguides," Journal

of Lightwave Technology, vol. 19, no. 12, pp. 1938-1942, 2001.

[136] X. Wang, W. Shi, H. Yun, S. Grist, N. A. F. Jaeger, and L. Chrostowski, "Narrow-band

waveguide Bragg gratings on SOI wafers with CMOS-compatible fabrication process,"


[137] K.-C. Shin et al., "Low threshold current density operation of GaInAsP-InP laser with

multiple reflector microcavities," IEEE Photonics Technology Letters, vol. 7, no. 10, pp.

1119-1121, 1995.

[138] T. Mukaihara, N. Yamanaka, M. N. Iwai, S. Arakawa, T. Ishikawa, and A. Kasukawa,

"Integrated GaInAsP Laser Diodes with Monitoring Photodiodes Through


108

Semiconductor/Air Bragg Reflector (SABAR)," IEEE Journal of Selected Topics in

Quantum Electronics, vol. 5, no. 3, pp. 469-475, 1999.

[139] C. F. R. Mateus, M. C. Y. Huang, Y. Deng, A. R. Neureuther, and C. J. Chang-Hasnain,

"Ultrabroadband Mirror Using Low-Index Cladded Subwavelength Grating," IEEE

Photonics Technology Letters, vol. 16, no. 2, pp. 518-520, 2004.

[140] T. C. Kleckner et al., "Design, Fabrication, and Characterization of Deep-Etched

Waveguide Gratings," Journal of Lightwave Technology, vol. 23, no. 11, pp. 3832-3842,

2005.

[141] C. A. Barrios, V. R. Almeida, R. R. Panepucci, B. S. Schmidt, and M. Lipson,

"Compact Silicon Tunable Fabry-Perot Resonator With Low Power Consumption,"

IEEE Photonics Technology Letters, vol. 16, no. 2, pp. 506-508, 2004.

[142] M. W. Pruessner, T. H. Stievater, and W. S. Rabinovich, "Integrated waveguide Fabry-

Perot microcavities with silicon/air Bragg mirrors," Optics Letters, vol. 32, no. 5, pp.

533-535, 2007.

[143] S. Gao, Y. Wang, K. Wang, and E. Skafidas, "High contrast circular grating reflector on

silicon-on-insulator platform," Optics Letters, vol. 41, no. 3, pp. 520-523, 2016.

[144] T. E. Murphy, "Design, Fabrication and Measurement of Integrated Bragg Grating

Optical Filters," Ph.D., Department of Electrical Engineering and Computer Science,

MIT, 2001.

[145] K. Ghoumid, I. Elhechmi, S. Mekaoui, C. Pieralli, and T. Gharbi, "Analysis of optical

filtering in waveguides with a high index modulation using the extended coupled mode

theory by hybridization of a matrix method," Optics Communications, vol. 289, pp. 85-

91, 2013.

[146] E. Hecht, "Diffraction," in Optics5th ed.: Pearson, 2017.

[147] M. Born and E. Wolf, "Elements of the theory of diffraction," in Principles of Optics7th

ed.: Cambridge University Press, 1999.

[148] P. J. Bock et al., "Subwavelength grating periodic structures in silicon-on-insulator: a

new type of microphotonic waveguide," Optics Express, vol. 18, no. 19, pp. 20251-

20262, 2010.

[149] R. Halir et al., "Waveguide sub-wavelength structures: a review of principles and

applications," LASER & PHOTONICS REVIEWS, vol. 9, no. 1, pp. 25-49, 2015.

[150] G. T. Reed, "Passive Silicon Photonic Devices," in Silicon Photonics: The State of The

Art: John Wiley & Sons, 2008.

[151] C. J. Chae, D. Y. Choi, E. Skafidas, and Y. T. Lee, "Compact Waveguide Resonator

Filter for Wavelength-Selective Reflection and Rejection in Silicon Waveguides,"

presented at the Opto-Electronics and Communications Conference 2015, 2015.

[152] P. Sanchis, J. Blasco, A. Martinez, and J. Marti, "Design of Silicon-Based Slot

Waveguide Configurations for Optimum Nonlinear Performance," Journal of Lightwave

Technology, vol. 25, no. 5, pp. 1298-1305, 2007.


109

[153] R. Sun et al., "Horizontal single and multiple slot waveguides: optical transmission at λ

= 1550 nm " Optics Express, vol. 15, no. 26, pp. 17967-17972, 2007.

[154] H. Zhang et al., "Polarization splitter using horizontal slot waveguide," Optics Express,

vol. 21, no. 3, pp. 3363-3369, 2012.

[155] J. Zhang, H. Zhang, and S. Chen, "Mode converter between channel waveguide and slot

waveguide," presented at the Photonics Global Conference (PGC), 2012, 2012.

[156] H. Zhang et al., "Efficient and broadband polarization rotator using horizontal slot

waveguide for silicon photonics," Applied Physics Letters, vol. 101, no. 021105, 2012.

[157] X. Guan, P. Chen, S. Chen, P. Xu, Y. Shi, and D. Dai, "Low-loss ultracompact

transverse-magnetic-pass polarizer with a silicon subwavelength grating waveguide,"

Optics Letters, vol. 39, no. 15, pp. 4514-4517, 2014.

[158] L. Sánchez, S. Lechago, and P. Sanchis, "Ultra-compact TE and TM pass polarizers

based on vanadium dioxide on silicon," Optics Letters, vol. 40, no. 7, pp. 1452-1455,

2015.

[159] P. Ma, P. Strasser, P. Kaspar, and H. Jackel, "Compact and Integrated TM-Pass

Photonic Crystal Waveguide Polarizer in InGaAsP–InP," IEEE Photonics Technology

Letters, vol. 22, no. 24, pp. 1808-1810, 2010.

[160] H. Sun, A. Chen, and L. R. Dalton, "A reflective microring notch filter and sensor,"


[161] M. S. Rasras et al., "Demonstration of a Tunable Microwave-Photonic Notch Filter

Using Low-Loss Silicon Ring Resonators," JOURNAL OF LIGHTWAVE

TECHNOLOGY, vol. 27, no. 12, pp. 2105-2110, 2009.

[162] K. Wang et al., "Short-range infrared optical wireless communications — Systems and

integration," presented at the Photonics Society Summer Topical Meeting Series (SUM),

2016 IEEE, 2016.

[163] S. Tao, B. Yang, H. Xia, H. Wang, and G.-Q. Lo, "An Optical Power Splitter With

Variable Power Splitting Ratio," IEEE Photonics Technology Letters, vol. 23, no. 14,

pp. 1004-1006, 2011.

[164] M. Uenuma and T. Motooka, "Temperature-independent silicon waveguide optical

filter," Optics Letters, vol. 34, no. 5, pp. 599-601, 2009.

[165] U. Koren et al., "A 1.3-μm wavelength laser with an integrated output power monitor

using a directional coupler optical power tap," IEEE Photonics Technology Letters, vol.

8, no. 3, pp. 364-366, 1996.

[166] K. Nemoto, T. Kita, and H. Yamada, "Narrow spectral linewidth wavelength tunable

laser with Si photonic-wire waveguide ring resonators," presented at the Group IV

Photonics (GFP), 2012 IEEE 9th International Conference on, 2012.

[167] T. Matsumoto et al., "Narrow spectral linewidth full band tunable laser based on

waveguide ring resonators with low power consumption," presented at the Optical Fiber

Communication (OFC), collocated National Fiber Optic Engineers Conference, 2010

Conference on (OFC/NFOEC), 21-25 March 2010, 2010.

Minerva Access is the Institutional Repository of The University of Melbourne

Author/s:

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Title:

Design, fabrication, and characterization of passive silicon photonic device

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2017

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Design, fabrication, and characterization of passive silicon photonic device

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