DESIGN AND ANALYSIS OF RF-CMOS SWITCH FOR

RECONFIGURABLE RF FRONT END

BY

IKSANNURAZMI BAMBANG SOEROSO

A dissertation submitted in fulfilment of the requirement for

the degree of Master of Science (Electronics Engineering)

Kulliyyah of Engineering

International Islamic University Malaysia

MAY 2014

ii

ABSTRACT

The consumer demands on having multi-functional wireless communication devices

have driven current mobile handset to be more complex than it has ever been before.

Of interest, radio frequency (RF) front end has evolved to adapt to multi-standards

terminals. Therefore, having an RF-CMOS switch that suits this purpose can be

considered unprecedented. This work presents the design and analysis of RF-CMOS

switch for reconfigurable RF front end. The RF-CMOS switch is based on two typical

designs of transmit-receive (T/R) switch mainly single pole single throw (SPST) and

single pole double throw (SPDT) topologies. These designs are analyzed based on key

figures of merit of T/R switches, namely insertion loss, isolation and power handling

capability. In order to determine the switches performance, the simulation for each

key figure of merit is done for two specific designs, namely design A and design B.

These designs are varied in terms of their transistor widths. The simulation is done

using Cadence Virtuoso software tool and utilizing standard 0.35µm CMOS

technology. The SPST RF-CMOS switch exhibits insertion loss of 1.155dB while the

SPDT RF-CMOS switch exhibits insertion loss of 1.153dB at 2GHz. On the other

hand, the isolation for both RF-CMOS switch designs is kept high (>20dB).

Nonetheless, the RF-CMOS switch exhibits power handling capability measured by

power 1dB compression point (P1dB) of (>20dBm) and third order intercept point

(IIP3) of (>26dBm). On top of that, a DC bias condition needed to operate the switch

is discussed to determine an optimal bias condition for each RF-CMOS switch design.

This work also presents the capability of integrating the RF-CMOS switch with SAW

resonator through simulation. Indeed, this simulation demonstrates the application of

RF-CMOS switch for reconfigurable RF front end.

iii

موخص امبحر

اموظائف امياثف امنلال الحالي دفعت ظوبات المس تهوكين على وحود أ جهزة الاثطالات املاسوكية مذعددة

( امواجهة RFميكون أ كثر ثعليدا مما كان عويو في أ ي وكت مضى. من امفائدة، وكد ثعورت حرددات امراديو )

ل ن اس خخدام مبد امتي ثناسب ىذا RF- CMOSال مامية نوخكيف مع محعات مذعددة المعايير. لذا ، فا

لا عادة RF- CMOSويعرض ىذا امعمل ثطميم وتحويل مبدل امغرض يمكن اعخبارىا لم يس بق ميا مثيل .

اس خلبال -على ازنين من امخطاميم اهنموذحية لمبدل RF- CMOS. ويسدند مبدل RFجشكيل نهاية الجبهة

( و مخعط المفذاح SPSTذو المسار واحد ) ( بشكل أ ساسي مخعط المفذاح ال حادي T / Xالا رسال )

(/ T( . ويتم تحويل ىذه امخطاميم على أ ساس خطائص رئيس ية من مبدلات SPDTذو المسارين ) ال حادي

(X هي: خسارة الا دراج ، امعزل و امكاهية على امخعامل مع املدرة . من أ خل تحديد أ داء المبدل، فلد تم محاكاة

عرض مكل خاضية رئيس ية مخطميمين معينين وىما ثطميم أ مف وثطميم باء. وثدنوع ىذه امخطاميم من حير

" Cadence Virtuosoامترانزس خورات الخاضة بهم. وكد تمت المحاكاة باس خخدام أ داة امبرمجيات املياس ية "

دراج SPST RF- CMOS. المبدل CMOS μm 53.0واس خخدام حكنوموحيا امعول املياسي يعاني فلدان ا

دراج SPDT RF- CMOSفي حين أ ن امخبديل dB13100 بملدار . 2GHzفي .dB 1310 يعاني فلدان ا

( . ومع dB 05 <عالي ) RF- CMOSمن ناحية أ خرى ، تم ابلاء امعزل على حد سواء مخطميمي المبدل

ن المبدل P1dBضغط امنلعة ) 1dBأ ظير ملدرة حيدة نوخعامل مع املدرة ثلاس كوة RF- CMOSذلك، فا

. علاوة على ذلك ، ( dBm 26 <عالي ) ( IIP3و ثامر حرثيب هلعة امخلاظع ) .( dBm 20 <عالي ) (

املازمة مدشغيل المبدل وذلك مخحديد شرط امخحيز ال مثل مكل ثطميم لمبدل DCتمت مناكشة حالة امخحيز

RF- CMOS ويعرض ىذا امعمل أ يضا املدرة على دمج مبدل .RF- CMOS مع مرنانSAW من خلال

.RFامخبديل لا عادة جشكيل اهنهاية ال مامية RF- CMOSالمحاكاة. في امواكع ، وىذا يدل على محاكاة ثعبيق

iv

APPROVAL PAGE

I certify that I have supervised and read this study and that in my opinion; it conforms

to acceptable standards of scholarly presentation and is fully adequate, in scope and

quality, as a dissertation for the degree of Master of Science in Electronics

Engineering.

………………………………….

Anis Nurashikin Nordin

Supervisor

………………………………….

A.H.M Zahirul Alam

Co-Supervisor

I certify that I have read this study and that in my opinion it conforms to acceptable

standards of scholarly presentation and is fully adequate, in scope and quality, as a

dissertation for the degree of Master of Science in Electronics Engineering.

………………………………….

Sheroz Khan

Examiner (Internal)

………………………………….

Ibrahim Ahmad

Examiner (External)

This dissertation was submitted to the Department of Computer and Electrical

Engineering and is accepted as a fulfilment of the requirement for the degree of

Master of Science in Electronics Engineering.

………………………………….

Othman O. Khalifa

Head, Department of Electrical

and Computer Engineering

This dissertation was submitted to the Kulliyyah of Engineering and is accepted as a

fulfilment of the requirement for the degree of Master of Science in Electronics

Engineering.

………………………………….

Md Noor Salleh

Dean, Kulliyyah of Engineering

v

DECLARATION

I hereby declare that this dissertation is the result of my own investigation, except

where otherwise stated. I also declare that it has not been previously or concurrently

submitted as a whole for any other degrees at IIUM or other institutions.

Iksannurazmi Bambang Soeroso

Signature:……………………….. Date:………………………..

vi

INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA

DECLARATION OF COPYRIGHT AND AFFIRMATION

OF FAIR USE OF UNPUBLISHED RESEARCH

Copyright © 2014 by International Islamic University Malaysia. All rights reserved.

DESIGN AND ANALYSIS OF RF-CMOS SWITCH FOR

RECONFIGURABLE RF FRONT END

No part of this unpublished research may be reproduced, stored in a retrieval system,

or transmitted, in any form or by any means, electronic, mechanical, photocopying,

recording or otherwise without prior written permission of the copyright holder

except as provided below.

1. Any material contained in or derived from this unpublished research

my only be used by others in their writing with due

acknowledgement.

2. IIUM or its library will have the right to make the transmit copies

(print or electronic) for institutional and academic purposes.

3. The IIUM library will have the right to make, store in a retrieval

system and supply copies of this unpublished research if requested

by other universities and research libraries.

Affirmed by Iksannurazmi Bambang Soeroso

……………………. …………………..

Signature Date

vii

ACKNOWLEDGEMENTS

In the name of Allah, Most Gracious, Most Compassionate. All Praise be to Allah

(S.W.T.), the Almighty for bestowing His Bounty and Mercy, Solawat and Salam to

our beloved prophet (P.B.U.H).

First and foremost, all my du’a and gratitude make to Allah the Almighty for granting

me the nikmah and abilities to pursue my post graduate studies. With His blessings,

I am able to withstand all the obstacles and hardships throughout the journey in

completing this research. With His favors, I am able to carry out and complete this

dissertation.

I wish to express my heartfelt gratitude to my supervisor, Assoc. Prof. Dr. Anis

Nurashikin Nordin for giving me the chance to continue my studies under her

supervision. Although at the very beginning I had doubts to pursue the Master’s

program, but with her guidance, the research work seemed transparent at the end of

the day. A warm thankful goes to my co-supervisor, Prof. Dr. A.H.M. Zahirul Alam

for his useful advice and assistance on subject related to my research. The people to be

thanked directly or indirectly contribute toward the success of my research are namely

Prof. Dr. Aisha Hasan, Assoc. Prof. Dr Sheroz Khan, Assoc. Prof. Dr Muhammad Ibn

Ibrahimy, Assoc. Prof. Dr Abdi. Omar Shuriye and lecturers in ECE Dept., IIUM.

Also, I would like to express my gratitude to technician and staff in ECE Dept.

particularly Mr. Rahmat, Mr. Saiful and Mr. Fadzil.

The people behind the success of my research are actually the circle of friends I have

and mingle along the journey of my master’s program. The people to be named are

quite long but nonetheless are Syamsi, Anwar, Taqa, Dhiyauddin, Sobrun, Moaz and

friends who come to visit me without proper warning. Besides, I would like to express

my thankful to Kak Aliza, Kak Jamilah, Ma Li Ya, Kak Fatini, Kak Amalina, and Kak

Arfah for giving me useful advice on the research matters. Besides, I would like to

acknowledge people in Post Graduate Lab and VLSI Lab who have helped and

encourage me a lot during the period of my studies. Their encouragement and support

have helped me a lot in increasing my self-esteem and all sort of challenge I

encountered seemed bearable.

In a nutshell, I am very pleased and wish to thank my father: Bambang Soeroso, my

mother: Syarifah Wilfah, my siblings Ibnu, Ikbal, Ikram and Ikhwan for their care,

love, understanding and encouragement. Their constant prayers to Allah for my

success have motivated me to work hard and do my best be it in terms of studies or in

every aspect of my life. I owe them every bit of my success. Last but not least, special

acknowledgement goes to research grant under Assoc. Prof. Dr. Anis Nurashikin

Nordin which is ERGS11-009-0009 and RACE12-006-0006.

viii

TABLE OF CONTENTS

Abstract .......................................................................................................................... ii

Abstract in Arabic ......................................................................................................... iii

Approval Page ............................................................................................................... iv

Declaration Page ............................................................................................................ v

Copyright Page .............................................................................................................. vi

Acknowledgements ...................................................................................................... vii

List of Tables ................................................................................................................ xi

List of Figures ............................................................................................................. xiii

List of Abbreviations ................................................................................................ xviii

CHAPTER 1:INTRODUCTION ................................................................................ 1

Background .................................................................................................. 1 1.1

Problem Statement and its Significance ...................................................... 5 1.2

Research Objectives .................................................................................... 6 1.3

Research Methodology ................................................................................ 7 1.4

Research Scope ............................................................................................ 8 1.5

Organization of Dissertation ........................................................................ 9 1.6

CHAPTER 2:LITERATURE REVIEW .................................................................. 10

2.1 Introduction ............................................................................................... 10 2.2 RF Front-end.............................................................................................. 11

2.2.1 Superheterodyne Receiver ............................................................. 11 2.2.2 Multi-Standard Receiver ................................................................ 12

2.3 RF T/R Switch ........................................................................................... 13 2.3.1 RF MEMS Switch .......................................................................... 13 2.3.2 RF-CMOS Switch .......................................................................... 14

2.4 Parameters Affecting the CMOS Switch Performance ............................. 16

2.5 Techniques Used to Improve the CMOS Switch Performance ................. 18 2.5.1 The Body Floating Technique ....................................................... 18 2.5.2 Stacked Transistors Technique ...................................................... 19 2.5.3 Impedance Transformation Technique .......................................... 20

2.6 Integrated Switch With Resonators Design ............................................... 22

2.7 Summary .................................................................................................... 24

CHAPTER 3:DESIGN OF RF-CMOS SWITCH ................................................... 25

3.1 Introduction ............................................................................................... 25 3.2 RF-CMOS Switch Design Theory ............................................................. 25

ix

3.3 Key Figures of Merit of RF-CMOS Switch .............................................. 29 3.3.1 Insertion Loss ................................................................................. 29 3.3.2 Isolation ......................................................................................... 31 3.3.3 Power Handling Capability ............................................................ 32 3.3.4 Third Order Intercept Point (IIP3) ................................................. 33

3.4 SPST RF-CMOS Switch ........................................................................... 34 3.4.1 SPST RF-CMOS Switch Working Principle ................................. 35

3.5 SPDT RF-CMOS Switch ........................................................................... 37 3.5.1 SPDT RF-CMOS Switch Working Principle ................................ 38

3.6 Summary .................................................................................................... 41

CHAPTER 4:SIMULATION AND ANALYSIS ..................................................... 42

4.1 Introduction ............................................................................................... 42 4.2 SPST RF-CMOS Switch Simulation ......................................................... 42

4.2.1 Insertion Loss ................................................................................. 44 4.2.2 Isolation ......................................................................................... 45 4.2.3 Power 1dB Compression Point (P1dB) ......................................... 46 4.2.4 Third Order Intercept Point (IIP3) ................................................. 48 4.2.5 Input and Output Return Loss ........................................................ 49

4.3 SPDT RF-CMOS Switch Simulation ........................................................ 52 4.3.1 Insertion Loss ................................................................................. 53 4.3.2 Isolation ......................................................................................... 54 4.3.3 Power 1dB Compression Point (P1dB) ......................................... 56 4.3.4 Third Order Intercept Point (IIP3) ................................................. 58 4.3.5 Input and Output Return Loss ........................................................ 59

4.4 RF-CMOS Switch with Saw Resonator .................................................... 62 4.4.1 SPST RF-CMOS Switch with SAW Resonator Simulation .......... 64 4.4.2 SPDT RF-CMOS Switch with SAW Resonator Simulation ......... 70

4.5 Summary .................................................................................................... 76

CHAPTER 5:DISCUSSION ..................................................................................... 77

5.1 Introduction ............................................................................................... 77 5.2 Theoretical Calculation Versus Simulation ............................................... 77

5.2.1 SPST RF-CMOS Switch ................................................................ 78 5.2.2 SPDT RF-CMOS Switch ............................................................... 81

5.3 The Effect of Transistor Width on Insertion Loss ..................................... 85

5.4 DC Bias Condition of RF-CMOS Switch.................................................. 87 5.4.1 DC Bias Condition of SPST RF-CMOS Switch ............................ 87

5.4.1.1 The Effect of Varying on SPST RF-CMOS………89 Switch

5.4.1.2 The Effect of Varying on SPST RF-CMOS.........91 Switch

5.4.1.3 The Effect of Varying on SPST RF-CMOS ............ 92 Switch

5.4.2 DC Bias Condition of SPDT RF-CMOS Switch ........................... 94 5.4.2.1 The Effect of Varying on SPDT RF-CMOS……...96

Switch 5.4.2.2 The Effect of Varying on SPDT RF-CMOS……96 Switch 5.4.2.3 The Effect of Varying on SPDT RF-CMOS…......100 Switch

x

5.5 The Body Floating Technique Effect on RF-CMOS Switch ………...…102 5.5.1 The Effect of Body Floating Technique on SPST…………….102

RF-CMOS Switch 5.5.2 The Effect of Body Floating Technique on SPDT…………..106

RF-CMOS Switch 5.6 RF-CMOS Switch Comparison ............................................................... 110 5.7 The RF-CMOS Switch Application ........................................................ 112 5.8 Summary .................................................................................................. 114

CHAPTER 6:CONCLUSION AND RECOMMENDATION ............................. 115

6.1 Conclusion ............................................................................................... 115

6.2 Recommendation ..................................................................................... 117

REFERENCES ......................................................................................................... 118

LIST OF PUBLICATIONS ....................................................................................... 122

xi

LIST OF TABLES

Table No. Page No.

2.1 Summary of RF-CMOS switch design 16

2.2 Previous work on RF front-end 24

3.1 Summary of SPST RF-CMOS switch design parameters 36

3.2 Summary of SPDT RF-CMOS switch design parameters 40

4.1 Two design parameters with variation of transistors width 43

4.2 Performance summary of SPST RF-CMOS switch at 2GHz 51

4.3 Two design parameters with variation of the transistor width 52

4.4 Performance summary of SPDT RF-CMOS switch at 2GHz 61

4.5 SAW resonator design RLC (Nordin, 2008) 63

4.6 Performance evaluation of integrated SPST CMOS switch with SAW resonator

70

4.7 Performance evaluation of integrated SPDT CMOS switch with SAW resonator

76

5.1 Parameters for theoretical calculation of SPST RF-CMOS switch

81

5.2 Parameters for theoretical calculation of SPDT RF-CMOS switch

84

5.3 Performance summary of biasing condition at 2GHz for SPST switch (variation of )

90

5.4 Performance summary of biasing condition at 2GHz for SPST switch (variation of )

92

5.5 Performance summary of biasing condition at 2GHz for SPST switch (variation of )

94

5.6 Performance summary of biasing condition at 2GHz for SPDT switch (variation of )

97

xii

5.7 Performance summary of biasing condition at 2GHz for SPDT switch (variation of )

99

5.8 Performance summary of biasing condition at 2GHz for SPDT switch (variation of )

101

5.9 Performance summary of SPST RF-CMOS switch at 2GHz before and after applying the body floating technique

105

5.10 Performance summary of SPDT RF-CMOS switch at 2GHz before and after applying the body floating technique

109

5.11 Comparison of this RF-CMOS switch with previous work 111

xiii

LIST OF FIGURES

Figure No. Page No.

1.1 RF front-end receiver architecture (Bowick et al., 2011) 2

1.2 Multi-frequency single chip consist of CMOS switch and SAW resonator (Huang et al., 2009)

4

1.3 Flow chart of research methodology 8

2.1 Superheterodyne architecture (Jordi, 2007) 12

2.2 RF multi-band front-end (Li et al., 2002) 13

2.3 Circuit schematic of single transistor (b) simplified equivalent model without (c) with body floating technique (Yeh et al., 2006)

19

2.4 Circuit schematic of stacked transistors 20

2.5 Circuit schematic of CMOS switch utilizing ITN 21

3.1 (a) A single MOS transistor in 50Ω system (b) Small signal models of NMOS transistor under ON state (c) OFF state

27

3.2 Insertion loss versus frequency using equation (3.5) (for W=120um)

31

3.3 Isolation versus frequency using equation (3.8) (for W=120um)

32

3.4 The P1dB compression point (Tolstrup, 2011) 33

3.5 Circuit schematic of an SPST RF-CMOS switch 35

3.6 Circuit schematic of SPDT RF-CMOS switch 38

3.7 Insertion loss versus frequency (theoretical calculation for W=160um)

39

3.8 Isolation versus frequency (theoretical calculation for W=160um)

40

3.9 Isolation versus frequency (theoretical calculation for W=80um)

41

4.1 Circuit simulation settings for SPST RF-CMOS switch 44

xiv

4.2 Design comparison in terms of insertion loss 45

4.3 Design comparison in terms of isolation 46

4.4 P1dB for design A of SPST RF-CMOS switch 47

4.5 P1dB for design B of SPST RF-CMOS switch 47

4.6 IIP3 for design A of SPST RF-CMOS switch 48

4.7 IIP3 for design A of SPST RF-CMOS switch 49

4.8 Input return loss for design A and B 50

4.9 Output return loss for design A and B 51

4.10 Circuit simulation settings for SPDT RF-CMOS switch 53

4.11 Design comparison in terms of insertion loss 54

4.12 Design comparison in terms of isolation for Port 2 55

4.13 Design comparison in terms of isolation for Port 3 56

4.14 P1dB for design A of SPDT RF-CMOS switch 57

4.15 P1dB for design B of SPDT RF-CMOS switch 57

4.16 IIP3 for design A of SPDT RF-CMOS switch 58

4.17 IIP3 for design B of SPDT RF-CMOS switch 59

4.18 Input return loss of design A and B 60

4.19 Output return loss of design A and B 61

4.20 Equivalent circuit model of two port SAW resonator (Soeroso et al., 2012)

62

4.21 Circuit simulation settings for integrated SPST RF-CMOS switch with equivalent circuit of SAW resonator

65

4.22 The response of the SAW resonator with the SPST RF-CMOS switch during ON state (at 848 MHz)

65

4.23 The response of the SAW resonator with the SPST RF-CMOS switch during OFF state (at 848 MHz)

66

4.24 Difference in insertion loss (with-without) SPST RF-CMOS switch (from 800MHz~900MHz)

66

xv

4.25 Isolation of SPST RF-CMOS switch (from 800MHz~900MHz)

67

4.26 The response of the SAW resonator with the SPST RF-CMOS switch during ON state (at 1024 MHz)

68

4.27 The response of the SAW resonator with the SPST RF-CMOS switch during OFF state (at 1024 MHz)

68

4.28 Difference in insertion loss (with-without) SPST RF-CMOS switch (from 950MHz~1.1GHz)

69

4.29 Isolation of SPST RF-CMOS switch (from 950MHz~1.1GHz)

69

4.30 Circuit simulation settings for integrated SPDT RF-CMOS switch with equivalent circuit of SAW resonator

71

4.31 The response of the SAW resonator with the SPDT RF-CMOS switch during ON state (at 848 MHz)

71

4.32 The response of the SAW resonator with the SPDT RF-CMOS switch during OFF state (at 848 MHz)

72

4.33 Difference in insertion loss (with-without) SPDT RF-CMOS switch (from 800MHz~900MHz)

72

4.34 Isolation of SPDT RF-CMOS switch (from 800MHz~900MHz)

73

4.35 The response of the SAW resonator with the SPDT RF-CMOS switch during ON state (at 1024 MHz)

74

4.36 The response of the SAW resonator with the SPDT RF-CMOS switch during OFF state (at 1024 MHz)

74

4.37 Difference in insertion loss (with-without) SPDT RF-CMOS switch (from 950MHz~1.1GHz)

75

4.38 Isolation of SPDT RF-CMOS switch (from 950MHz~1.1GHz)

75

5.1 Theoretical calculation versus simulation for insertion loss (SPST switch)

79

5.2 Theoretical calculation versus simulation for isolation (SPST switch)

80

5.3 Theoretical calculation versus simulation for insertion loss (SPDT switch)

82

5.4 Theoretical calculation versus simulation for isolation at Port 2 (SPDT switch)

83

5.5 Theoretical calculation versus simulation for isolation at Port 3 (SPDT switch)

84

xvi

5.6 The effect of varying the width of the transistor MS on insertion loss

86

5.7 The effect of varying the width of the transistor M1 on insertion loss

87

5.8 The effect of varying the DC bias on insertion loss (SPST) 89

5.9 The effect of varying the DC bias on insertion loss (SPDT) 96

5.10 Insertion loss increases minimally at higher frequencies (SPST)

103

5.11 Isolation loss of SPST RF-CMOS switch before and after applying the body floating technique

103

5.12 P1dB of SPST RF-CMOS switch before applying the body floating technique

104

5.13 IIP3 of SPST RF-CMOS switch before applying the body floating technique

105

5.14 Insertion loss increases minimally at higher frequencies (SPDT)

106

5.15 Isolation loss of SPDT RF-CMOS switch at Port 2 before and after applying the body floating technique

107

5.16 Isolation loss of SPDT RF-CMOS switch at Port 3 before and after applying the body floating technique

107

5.17 P1dB of SPDT RF-CMOS switch before applying the body floating technique

108

5.18 IIP3 of SPDT RF-CMOS switch before applying the body floating technique

109

xvii

LIST OF ABBREVIATIONS

AlN Aluminium Nitride

CMOS Complementary Metal-Oxide-Semiconductor

DECT Digital Enhanced Cordless Telecommunication

FBAR Film Bulk Acoustic Wave Resonator

FET Field-Effect Transistor

GaAs Gallium Arsenide

GSM Global System for Mobile Communication

IC Integrated Circuit

IF Intermediate Frequency

IIP3 Third Order Intercept Point

ITN Impedance Transformation Network

IL Insertion Loss

LNA Low Noise Amplifier

LO Local Oscillator

LTE Long Term Evolution

MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor

MEMS Micro-Electro-Mechanical System

NF Noise Figure

PIN Positive Intrinsic Negative

PA Power Amplifier

P1dB Power 1dB Compression Point

RF Radio Frequency

xviii

SPST Single Pole Single Throw

SPDT Single Pole Double Throw

SAW Surface Acoustic Wave

SPICE Simulation Program with Integrated Circuit Emphasis

SiGe Silicon Germanium

SP2T Single Pole Dual Throw

SOI Silicon-on-Insulator

TX Transmit Receive

TDD Time-Division Duplexing

UWB Ultra-Wideband

WLAN Wireless Local Area Network

WCDMA Wideband Code Division Multiple Access

1

CHAPTER ONE

INTRODUCTION

BACKGROUND 1.1

New standards are evolving particularly in wireless communication. In order to meet

the present day’s user requirements in terms of high data rate and multimedia

communication, certain specifications such as noise figure (NF) and third order

intercept point (IIP3) must be taken care of to optimize the receiver’s sensitivity.

Figure 1.1 shows the generic radio frequency (RF) front-end receiver architecture,

which consists of RF filter, mixer, intermediate frequency (IF) and local oscillator

(LO). Normally, the front-end module incorporates a few integrated circuits (ICs) that

may be based on different semiconductor processes such as silicon complementary

metal-oxide semiconductor (CMOS) and silicon germanium (SiGe) technologies. The

current RF front-end architecture is becoming more and more complex to adapt to the

increasing levels of system integration to incorporate more functionality on a single

chip. In addition to this, the chip must also be low cost, have low power consumption

and smaller product size (particularly in mobile and portable products) (Bowick et al.,

2011).

2

Figure 1.1: RF front-end receiver architecture (Bowick et al., 2011)

A fully integrated of wireless front end circuit is desirable to replace bulky and

expensive components, especially in radio-frequency (RF) applications. Normally,

current RF front-end circuit would require off-chip components (ceramic/quartz

filters, switches) to be at the receiver station (Ramstad et al., 2009). The need of

designing single chip RF front-end is crucial to circumvent trade off in terms of size,

cost and complexity (Huang et al., 1999; Ramstad et al., 2009). Commercially

available off chip components such as quartz crystal, Surface Acoustic Wave (SAW)

resonator and Film Bulk Acoustic Wave Resonator (FBAR) cannot be monolithically

integrated. Typically acoustic wave resonators require piezoelectric substrates which

are not silicon compatible (Piazza, 2009). Using discrete acoustic wave filters result in

large footprint for RF front end circuits, especially if they are reconfigurable (Piazza,

2009). Utilizing a silicon compatible Micro-Electromechanical Systems (MEMS)

resonator and switch on the same chip can solve this problem.

For the past few decades, instrumentation and wireless communication have

been utilizing variety of switches for signal routing and control. In particular, CMOS

switches are considered as suitable candidates for ultra-wideband frequency range

(>10GHz) (Jin et al., 2005). CMOS switches have the advantages of having low

3

fabrication cost and high level of integration with other RF components blocks (Li et

al., 2010). In contrast, for selection of MEMS resonator, SAW resonator is of interest

since it has the advantages of having high-Q factor and accurate resonant frequency

(Yu et al., 2007). These properties are crucial especially in RF front-end because

losses can be minimized during transmission. Unlike other types of electroacoustic

resonators, LC resonator’s main problem is having very low Q and is not suitable for

filter component in RF front- end circuits. In reported work by Herranz et al., 2009,

the RF SAW filter used for frequency selection is controlled by two CMOS switches

(Herranz et al., 2009). In this design, the frequency is directly filtered at the receiver

site rather than in the analog baseband module. With that, a multi-frequency RF front-

end could be implemented to allow hardware sharing and baseband selection. Thus,

our proposed design demonstrates the capability of integrating CMOS switch with

SAW resonator for reconfigurable RF front-end in multi-standards transceiver. Figure

1.2 illustrates the reconfigured RF front-end architecture. It can be seen that the

channel select in RF processing can be implemented with an array of SAW resonators

and switches. MEMS switches are commonly used in wireless communication

industry particularly for enabling the integration of multiple wireless standards

(Fouladi et al., 2010). A single chip RF front-end could be realized by utilizing

MEMS switches where different frequency bands are desired. Although MEMS

switches offer better performance in terms of low DC power consumption and good

linearity, the pull up voltage needed to trigger the switch could be very high. Having

this in mind, CMOS switch such as Single Pole Single Throw (SPST) and Single Pole

Double Throw (SPDT) could replace MEMS switch since the voltage supply needed

at the transistor’s gate is relatively small (Li et al., 2010). In this regard, the SAW

resonator and CMOS switch could be implemented using the same CMOS process to

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enhance the performance and functionality by eliminating the effect of parasitic

capacitance commonly found in conventional packaging approach (Fouladi et al.,

2010). For the RF-CMOS switch design, single pole single throw (SPST) and single

pole double throw (SPDT) topologies are used in this work.

Figure 1.2: Multi-frequency single chip consisting of CMOS switch and SAW

resonator (Huang et al., 2009)

It is also reported that CMOS receivers have been implemented to overcome

trade off in terms of low power consumption (Ramstad et al., 2009). In this work, the

RF-CMOS switch would require low supply voltage ( ) unlike in the

design of MEMS switch which requires a much higher supply voltage ( )

(Rebeiz et al., 2001).

5

PROBLEM STATEMENT AND ITS SIGNIFICANCE 1.2

The RF transmit-receive (T/R) switch is an important component for wireless

communication particularly in RF front-end transceiver, consisting of transmission

and reception branches. Typical components in RF front-end such as low noise

amplifier (LNA), power amplifier (PA), switches, mixer and filter are difficult to

integrate in a single chip since each of them requires different technology to fabricate

(Li et al., 2010). For instance, the T/R switches are normally fabricated using GaAs

technology (Li et al., 2005) and MEMS technology (Rebeiz et al., 2001). Transistor

level components in RF front-end systems are difficult to integrate with these

technologies and result higher cost for separate device fabrication (Li et al., 2010).

Therefore, it is desirable to implement the T/R switch using CMOS technology due to

its potential integration of radio frequency, intermediate frequency (IF) and baseband

blocks on the same chip at a lower cost for wireless communication application (Li et

al., 2010).

In addition, the T/R switch must have low insertion loss, high isolation

(>30dB), good power handling capacity and high linearity in order to meet the mobile

communication specifications (P1dB>33dBm, IIP3>40dBm). Insertion loss of <1.5dB

for the RF-CMOS switch is desirable so that it could be used in mobile cellular and

wireless local area network (WLAN) radio (Li et al., 2010). In contrast, off-chip

component such as SAW filter or resonator are examples of passive components in RF

front-end. The SAW filter/resonator must be fabricated on piezoelectric substrate,

making it difficult to integrate on semiconductor chips (Jones et al., 2005). Apart from

that, the SAW filter or MEMS resonator would normally be off-chip and connected

with specific switches to enable multi-frequency band selection (Basu et al., 2011).

Due to this, losses may occur during transmission since external connection such as

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wire bonds are needed. Separate design of filters with other electronics would enlarge

the size of the chip itself. The contribution of this work is to design and analyze the

RF-CMOS switch to ensure that the switch performance is comparable to

conventional T/R switches. The RF-CMOS switch is simulated with the equivalent

circuit model of the SAW resonator to validate its application in the reconfigurable RF

front-end. Conventional RF front-end in the market requires the resonator/filter to be

off-chip and this design suffers from parasitic capacitance caused by the external

interconnection required to channel the signal through different paths (Piazza, 2009).

Apart from that, the multi-frequency band selection introduced in this proposed design

could be a startup for advanced multi-frequency and reconfigurable technology

platform. With this regard, a desired frequency range can be transmitted and bring

about reduction of power consumption in other components (LNA, Mixer) by

improving rejection directly at the channel.

RESEARCH OBJECTIVES 1.3

This dissertation focuses on the design and analysis of RF-CMOS switch using

0.35µm CMOS technology for reconfigurable RF front-end circuits. The novelty of

this work is based on the integration of CMOS switch with SAW resonator. This

integration could eliminate parasitic capacitance between components’

interconnection. The objectives of this work are summarized as follows.

i. To design the RF-CMOS switch based on Single Pole Single Throw

(SPST) and Single Pole Double Throw (SPDT) topologies.

ii. To simulate the RF-CMOS switch with SAW resonators using Cadence

Virtuoso software tool.