Derandomiser blockDerandomiser block

E.Atkin, A.KluevE.Atkin, A.Kluev

MEPhI,MEPhI,

A.VoroninA.Voronin

SINP MSUSINP MSU

OutlineOutline

►Core structure of derandomiserCore structure of derandomiser►Specs expectedSpecs expected►Chip structure and layoutChip structure and layout

Analog readout architecture with derandomizer

CSA Shaper CMP

CSA Shaper CMP

PD ADC

PD ADC

Input channel 0

Input channel n

Digital input 0

Analog input 0

Analog input n

Digital input n

Output channel 0

Output channel m

Address bus m

Address bus 0

Crosspoint switch + Arbitration logic:n inputs, m outputsn>m

Analogoutput 0

Analogoutput m

busy

busy

Prototype

Arbitration

ADCs

●●●

IN1

IN2

INn

●●●

Comparators

●●●

Preamps + Shapers

Address

Crosspoint switch

Analogstoragedevices (T&H or PD)

Crosspoint switch architectures

Multiple storages shared by channels

First prototype 4 x 2First prototype 4 x 2

X0, X1, X2, X3 – analog inputs, Y0, Y1 – cross-point switch outputs

What were simplified on the first What were simplified on the first prototypeprototype

► We do not think about cross talk, linearity, noiseWe do not think about cross talk, linearity, noise► There are no drivers on the chip outputsThere are no drivers on the chip outputs► Idea was to check derandomizer fuctionalityIdea was to check derandomizer fuctionality► We did not check the arbitration logic for We did not check the arbitration logic for

infinity, when input signals have small delays or infinity, when input signals have small delays or no delayno delay

► Peak detector is not optimized for HOLD modePeak detector is not optimized for HOLD mode► Cross-point switch is not optimized for Cross-point switch is not optimized for

capacitive load capacitive load

Derandomizer chip (prototype1)Derandomizer chip (prototype1)

Layout of 4x2 derandomizer block

Test BoardTest Board

ComparatorComparator

Cload =1 pF

1us 1us 1us

Cload =4 pF

Cload =15 pF

Cload =1 pF

Cload =15 pF

1us

1us

Colored – simulationB/W – scope1 – input2 –output3 – threshold level

1

1

1 1

1

1

1

2

2

2

2

2

2

2

2

3

3

3

33

3

3

Peak DetectorPeak Detector

Cload =1 pF Cload =4 pF Cload =15 pF

2.5us

2.5us

2.5us

Cload =15 pF Cload =15 pFCload =15 pF

Colored – simulationB/W – scope1 – input2 –output3 – reset

1

1 11

1

1

2

2 2

2

2

2

3

3 3 3

3

Cross point switchCross point switch

Only one signal on the input Two signals on different time

1 - comparators2 – inputs 3 – outputs

1

1

1

3

3

2

Cross point switchCross point switch

Small delay between two signals Two signals in the same time

1 - comparators2 – inputs 3 – outputs

11

22

Cross point switchCross point switch

4 Signals (4 comparators) 2 cross-point switch outputs (with amplification)

Cross point switchCross point switch

4 Signals ( 4 comparators) 2 cross-point switch outputs and peak detectors

► The prototype chip confirmed derandomizer The prototype chip confirmed derandomizer functionalityfunctionality

► Schematics should be improved for signals, which Schematics should be improved for signals, which can come in the same time (to avoid infinity on the can come in the same time (to avoid infinity on the cross-point switch outputs)cross-point switch outputs)

► Next prototype must get much less cross talk Next prototype must get much less cross talk between channels and different parts of the chipsbetween channels and different parts of the chips

► To measure the real speed of the scheme the fast To measure the real speed of the scheme the fast drivers should be included on the chip outputsdrivers should be included on the chip outputs

► Service low capacitance outputs better to measure Service low capacitance outputs better to measure with picoprobe, which is serious problem for us with picoprobe, which is serious problem for us

Comments