Department of Electrical Engineering Electronic Systems Department of Electrical Engineering...

Department of Electrical EngineeringElectronic SystemsDepartment of Electrical EngineeringElectronic Systems

Optimization of the mMIPS

Sander Stuijk

Electronic Systems

Outline

mMIPS tool flow Extending the LCC compiler Video processing I/O operations on the mMIPS Assignment

Electronic Systems

Design flow

test implementation

sw

hw

hardware

simulator

mMIPS

(C++ sources

that use

SystemC

library)

Application

(C sources)LCC C

Compiler

LCC C

Compiler

Celoxica

create memory

CoCentric

SystemC

Compiler

Xilinx XST Xilinx ISEVisual C++

Celoxica

transfer

Electronic Systems

What is the maximal frequency of the mMIPS?

The synthesis repport is stored in the file mmips.srp

maximal frequency

critical path

Electronic Systems

Critical path

ad

d1

pc

registers

de

cod

er

mu

x4

imm

2w

ord

alu

ctrl

c4

ad

d2

alu

mu

x3

mu

x2

mu

x1

ha

zard

_ct

rl

if_in

str

if_p

c

id_instr_15_11

id_data_reg2

id_immediate

id_instr_20_16

id_instr_5_0

id_ctrl_ex_alusrcid_ctrl_ex_aluop

id_ctrl_ex_regdst

id_ctrl_mem_branch

id_ctrl_mem_memwrite

id_ctrl_mem_memread

id_ctrl_wb_memtoreg

id_ctrl_wb_regwrite

id_data_reg1

id_pc

ex_alu_result

ex_ctrl_wb_regwrite

ex_ctrl_wb_memtoreg

ex_regdst_addr

mem_dmem_data

mem_alu_result

mem_regdst_addr

mem_ctrl_wb_regwrite

mem_ctrl_wb_memtoreg

r_addr_reg1

r_addr_reg2

w_addr_regr_data_reg2

r_data_reg1

w

w_data_reg

shift

left

_jm

p

shift

left

mu

x8

mu

x7

mu

x6

mu

x5

sig

ne

xte

nd

byt

e

me

md

ev

bra

nch

_ct

rl

de

cod

er_

nb

id_instr_25_0

id_instr_10_6

id_ctrl_ex_regvalue

id_ctrl_ex_target

id_ctrl_ex_hiloalu_selid_ctrl_ex_hilo_write

ctrl

ha

zard

hilo

c31

clk

enable

rst

rom_dout

rom_wait

ram_dout

ram_wait

rom_addr

rom_r

ram_din

ram_addr

ram_r

ram_w

dev_*

1

0

1

0

2

1

00

1

0

1

2

0

1

2

1

0

0

1

2

b

a

[31-26]

[5-0] [15-11]

[20-16]

[10-6]

[5-0]

[25-0]

[15-0]

[25-21]

[20-16]

IFIDWrite

Hazard

PCWrite

Signextend

Pipe_en (This signal goes to all registers on which no

write signal is depicted)

Enable

dmem_wait

Electronic Systems

Critical patha

dd

1

pc

registers

deco

der

mux

4

imm

2wor

d

aluc

trl

c4

ad

d2

alu

mux

3

mux

2

mux

1

haza

rd_c

trl

if_in

str

if_pc

id_instr_15_11

id_data_reg2

id_immediate

id_instr_20_16

id_ctrl_ex_alusrcid_ctrl_ex_regdst

id_ctrl_mem_branch


id_ctrl_mem_memread

id_ctrl_wb_memtoreg

id_ctrl_wb_regwrite

id_data_reg1

id_pc

ex_alu_result

ex_ctrl_wb_regwrite

ex_ctrl_wb_memtoreg

ex_regdst_addr

mem_dmem_data

mem_alu_result

mem_regdst_addr

mem_ctrl_wb_regwrite

mem_ctrl_wb_memtoreg

r_addr_reg1

r_addr_reg2


r_data_reg1

w

w_data_reg

shift

left_

jmp

shift

left

mux

8

mux

7

mux

6

mux

5

sign

exte

ndby

te

mem

dev

bran

ch_

ctrl

deco

der_

nb

id_instr_25_0

id_ctrl_ex_regvalue

id_ctrl_ex_target


ctrl

haza

rd

hilo

c31

clk

enable

rst

rom_dout

rom_wait

ram_dout

ram_wait

rom_addr

rom_r

ram_din

ram_addr

ram_r

ram_w

dev_*

1

0

1

0

2

1

00

1

0

1

2

0

1

2

1

0

0

1

2

b

a

[31-26]

[5-0] [15-11]

[20-16]

[10-6]

[5-0]

[25-0]

[15-0]

[25-21]

[20-16]

IFIDWrite

Hazard

PCWrite

Signextend



Enable

dmem_wait

id_ctrl_ex_aluop

Electronic Systems

ad

d1

pc

registers

dec

ode

r

mux

4

imm

2w

ord

alu

ctrl

c4

ad

d2

alu

mux

3

mux

2

mux

1

haz

ard

_ct

rl

if_in

str

if_p

c

id_instr_15_11

id_data_reg2

id_immediate

id_instr_20_16

id_instr_5_0


id_ctrl_ex_regdst

id_ctrl_mem_branch


id_ctrl_mem_memread

id_ctrl_wb_memtoreg

id_ctrl_wb_regwrite

id_data_reg1

id_pc

ex_alu_result

ex_ctrl_wb_regwriteex_ctrl_wb_memtoreg

ex_regdst_addr

mem_dmem_data

mem_alu_result

mem_regdst_addr

mem_ctrl_wb_regwritemem_ctrl_wb_memtoreg

r_addr_reg1

r_addr_reg2


r_data_reg1

w

w_data_reg

shift

left

_jm

p

shift

left

mux

8

mux

7

mux

6

mux

5

sign

exte

nd

byt

e

mem

dev

bra

nch

_ct

rl

dec

ode

r_n

b

id_instr_25_0

id_instr_10_6

id_ctrl_ex_regvalue

id_ctrl_ex_target


ctrl

haz

ard

hilo

c31

clk

enable

rst

rom_dout

rom_wait

ram_dout

ram_wait

rom_addr

rom_r

ram_din

ram_addr

ram_r

ram_w

dev_*

1

0

1

0

2

1

00

1

0

1

2

0

1

2

1

0

0

1

2

b

a

[31-26][5-0] [15-11]

[20-16]

[10-6]

[5-0]

[25-0]

[15-0]

[25-21]

[20-16]

IFIDWrite

Hazard

PCWrite

Signextend



Enable

dmem_wait

Forwarding option 1

mux

mux

Electronic Systems

ad

d1

pc

registers

dec

ode

r

mux

4

imm

2w

ord

alu

ctrl

c4

ad

d2

alu

mux

3

mux

2

mux

1

haz

ard

_ct

rl

if_in

str

if_p

c

id_instr_15_11

id_data_reg2

id_immediate

id_instr_20_16

id_instr_5_0


id_ctrl_ex_regdst

id_ctrl_mem_branch


id_ctrl_mem_memread

id_ctrl_wb_memtoreg

id_ctrl_wb_regwrite

id_data_reg1

id_pc

ex_alu_result


ex_regdst_addr

mem_dmem_data

mem_alu_result

mem_regdst_addr


r_addr_reg1

r_addr_reg2


r_data_reg1

w

w_data_reg

shift

left

_jm

p

shift

left

mux

8

mux

7

mux

6

mux

5

sign

exte

nd

byt

e

mem

dev

bra

nch

_ct

rl

dec

ode

r_n

b

id_instr_25_0

id_instr_10_6

id_ctrl_ex_regvalue

id_ctrl_ex_target


ctrl

haz

ard

hilo

c31

clk

enable

rst

rom_dout

rom_wait

ram_dout

ram_wait

rom_addr

rom_r

ram_din

ram_addr

ram_r

ram_w

dev_*

1

0

1

0

2

1

00

1

0

1

2

0

1

2

1

0

0

1

2

b

a

[31-26][5-0] [15-11]

[20-16]

[10-6]

[5-0]

[25-0]

[15-0]

[25-21]

[20-16]

IFIDWrite

Hazard

PCWrite

Signextend



Enable

dmem_wait

Forwarding option 2

mux

mux

Electronic Systems

Forwarding

Register 0 has always the value 0, independent of whatever value is written to it Register 0 should never be forwarded

Forward always the newest data EX goes before MEM, MEM goes before WB, WB goes before ID

The two source registers can come from the same or a different pipeline stage The two forwarding multiplexers should be controlled separately

The read operations (lw, lb) have 1 delay slot, the data from the memory is only valid in the WB stage There may exist a data hazard between a load instruction in the MEM

stage and an instruction in the ID stage, this hazard cannot be solved with forwarding

Electronic Systems

Forwarding – WB stage

Hazard detection in the WB stageelse if (memwbregwrite_t == 1 &&

((memwbwriteregister_t == ifidreadregister1_t) ||

(memwbwriteregister_t == ifidreadregister2_t)))

{

hazard = 1;

}

Forwarding from the WB stageif (memwbregwrite_t == 1 && memwbwriteregister_t == ifidreadregister1_t

&& memwbwriteregister_t != 0)

{

forwardA.write(3);

}

if (memwbregwrite_t == 1 && memwbwriteregister_t == ifidreadregister2_t

&& memwbwriteregister_t != 0)

{

forwardB.write(3);

}

Electronic Systems

Registerfile and the write-back stage

Input Output

REG REG

Write Read

mMIPS

H&P

Write Output

The data is available at the output of the register file during the next cycle

Input

Write

The data is available at the output of the register file during the current cycle

Electronic Systems

Outline


Electronic Systems

Design flow

test implementation

sw

hw

hardware

simulator

mMIPS

(C++ sources

that use

SystemC

library)

Application

(C sources)LCC C

Compiler

LCC C

Compiler

Celoxica

create memory

CoCentric

SystemC

Compiler

Xilinx XST Xilinx ISEVisual C++

Celoxica

transfer

Electronic Systems

LCC compiler: it’s a C compiler

Consider the following code fragment:

for (int i = 0; i < 3; i++)

a[i] = ...;

It should be:

int i;

for (i = 0; i < 3; i++) {

a[i] = ...;

}

lcc prog.c –o mips_mem.bin

Electronic Systems

Adding special functions

Examples swap, clip, bit-masking, multiply-accumulate, ...

Constraints At most 2 input operands and 1 output operand Manifest loop bounds Clock frequency Chip area

Electronic Systems

Securing our skies

Measure height each second The airplane may never be for more

then 1 second below 10000ft If needed, take appropriate action…

Electronic Systems

missile.c

#define TRUE 1#define FALSE 0

int launch(int height1, int height2){ int l;

if (height1 < 10000 && height2 < 10000) l = TRUE; else l = FALSE;

return l;}

void main(void){ int height1, height2; int l;

while (TRUE) { l = launch(height1, height2);

sleep(1); }}

Electronic Systems

Assembler

lcc missile.c –o missile

disas missile

80: addiu sp,sp,-884: li t8,1000088: slt s8,a0,t88c: beqz s8,0xac90: nop94: slt s8,a1,t898: beqz s8,0xac9c: nopa0: li t8,1a4: b 0xb0a8: sw t8,4(sp)ac: sw zero,4(sp)b0: lw v0,4(sp)b4: jr rab8: addiu sp,sp,8

int launch(int height1, int height2){ int l;

if (height1 < 10000 && height2 < 10000) l = TRUE; else l= FALSE;

return l;}

Electronic Systems

Adding a special function to the mMIPS (overview)

New mMIPS instruction: launch

Select an opcode and function code

launch

height 1

height 2launch

opcode → 0 functioncode → 0x10 (not yet used)

opcode

6 bits

rs

5 bits

rt

5 bits

rd

5 bits

shamt

5 bits

funct

6 bits

Electronic Systems

Converting a C program to the LCC IR

0: int main(void) {1: int a = 3;

2: if (a == 3)3: return 1;

4: return 0;5: }

CNSTI4

3

ADDRLP4

a

ASGNI4

1

INDIRI4

NEI4

CNSTI4

3ADDRLP4

a2

RETI4

CNSTI4

13

JUMPV

ADDRGP4

12*

RETI4

CNSTI4

04The data representation is converted to assembler using rules. Rules map a set of nodes (one or more) onto assembler instructions.

The LCC data representation is called an Abstract Syntax Tree (AST).

Electronic Systems

What does a rule look like?

A rule for adding two unsigned integer (4 bytes): reg: ADDU4 (reg,reg) "\taddu $%c,$%0,$%1\n" 1

one output register

the node

two source registers

the assembler instruction

weight

%1 – The first source operand register%2 – The second source operand register%c – The destination register

Electronic Systems

Converting the LCC data-structure to assembler

CNSTI4

3

ADDRLP4

a

ASGNI4

1

INDIRI4

NEI4

CNSTI4

3ADDRLP4

a2

RETI4

CNSTI4

13

JUMPV

ADDRGP4

12*

RETI4

CNSTI4

04

.set reorder .globl main .text .text .align 2 .ent mainmain: .frame $sp,8,$31 addu $sp,$sp,-8 la $24,3 sw $24,-4+8($sp) lw $24,-4+8($sp) la $15,3 bne $24,$15,L.2 la $2,1 b L.1L.2: move $2,$0L.1: addu $sp,$sp,8 j $31 .end main

Electronic Systems

Adding a special function to the mMIPS (software)

Launch function must be detected by LCC Use special pattern to indicate use of launch function

Example: ((a) - ((b) + *(int *) 0x12344321))

The following 4 constructs map to custom operations in LCC:

((a) - ((b) + *(int *) 0x12344321))

((a) + ((b) + *(int *) 0x12344321))

((a) - ((b) - *(int *) 0x12344321))

((a) + ((b) - *(int *) 0x12344321))

More operations (possibly with more operands) can be added. Look at the website for more information.

Electronic Systems

What does a rule look like?

All rules are defined in the file ‘lcc/src/minimips.md’ File can be edited with a standard text editor LCC must be recompiled after editing (see website for details)

Rule with three inputs

Electronic Systems

Custom operation in C and assembler

#define TRUE 1#define FALSE 0

#define launch(h1, h2) ((h1) - ((h2) + *(int *) 0x12344321))

void main(void){ int height1, height2; int l;

while (TRUE) { l = launch(height1, height2); }}

80:addiu sp,sp,-1684: sw s5,0(sp)88: sw s6,4(sp)8c: b 0x9890: sw s7,8(sp)94: tgeu s7,s6,0x2a098: b 0x949c: nopa0: lw s5,0(sp)a4: lw s6,4(sp)a8: lw s7,8(sp)ac: jr rab0: addiu sp,sp,16

lcc missile.c –o missile

disas missile

Electronic Systems

Comparison

80: addiu sp,sp,-884: li t8,100088: slt s8,a0,t88c: beqz s8,0xac90: nop94: slt s8,a1,t898: beqz s8,0xac9c: nopa0: li t8,1a4: b 0xb0a8: sw t8,4(sp)ac: sw zero,4(sp)b0: lw v0,4(sp)b4: jr rab8: addiu sp,sp,8

original

94: tgeu s7,s6,0x2a0

added custom instruction

Reduction of 14 instructions per execution!

Electronic Systems

Adding a special function to the mMIPS (hardware)

ad

d1

pc

registers

dec

ode

r

mux

4

imm

2w

ord

alu

ctrl

c4

ad

d2

alu

mux

3

mux

2

mux

1

haz

ard

_ct

rl

if_in

str

if_p

c

id_instr_15_11

id_data_reg2

id_immediate

id_instr_20_16

id_instr_5_0


id_ctrl_ex_regdst

id_ctrl_mem_branch


id_ctrl_mem_memread

id_ctrl_wb_memtoreg

id_ctrl_wb_regwrite

id_data_reg1

id_pc

ex_alu_result


ex_regdst_addr

mem_dmem_data

mem_alu_result

mem_regdst_addr


r_addr_reg1

r_addr_reg2


r_data_reg1

w

w_data_reg

shift

left_

jmp

shift

left

mux

8

mux

7

mux

6

mux

5

sig

nex

tend

byt

e

mem

dev

bra

nch

_ct

rl

dec

ode

r_n

bid_instr_25_0

id_instr_10_6

id_ctrl_ex_regvalue

id_ctrl_ex_target


ctrl

haz

ard

hilo

c31

clk

enable

rst

rom_dout

rom_wait

ram_dout

ram_wait

rom_addr

rom_r

ram_din

ram_addr

ram_r

ram_w

dev_*

1

0

1

0

2

1

00

1

0

1

2

0

1

2

1

0

0

1

2

b

a

[31-26][5-0] [15-11]

[20-16]

[10-6]

[5-0]

[25-0]

[15-0]

[25-21]

[20-16]

IFIDWrite

Hazard

PCWrite

Signextend



Enable

dmem_wait

aluctrl

alu

Electronic Systems

Outline


Electronic Systems

CIF QCIF 1-25Hz 1:1

24 Hz 1:125 Hz 1:130 Hz 1:1

50 Hz 2:160 Hz 2:1

Video processing in the ES group

WEB

Electronic Systems

Video processing – display systems

Electronic Systems

Video processing – face detection

XetalTrimedia

Map face recognition in Smart-cam

Electronic Systems

Video processing – car safety systems

Electronic Systems

Video processing – motion estimation

Electronic Systems

Video processing – object detection

Electronic Systems

Video processing – algorithm/architecture codesign

MPEGMPEGMBSMBS

++VIPVIP

MMI+AICPMMI+AICP

13941394

MSPMSP

M-PIM-PI

MIPSMIPSTriMedia VLIWTriMedia VLIW

T-PIT-PIConditionalConditionalaccessaccess

CA

BC

AB

75135bandwidth(MB/s)

1246.0power(mW)

4.20.437eff area(mm2)

3731load(%)

11.41.41area(mm2)

GPASIP

picture-rate up-converter

Electronic Systems

What is an image?

A black and white image is a matrix of luminance values More pixels means higher image quality

400 pixels/line

300

lin

es

40 pixels/line

30

line

s

Electronic Systems

How do you store an image?

An image is a one dimensional pixel array

0 width-1

width*height-1Address: [y*width+x]

x

y

Electronic Systems

How many bits do we need per pixel?

Experiments: we can distinguish about 200 levels in an image

We shall use 8 bit representation of luminance

Electronic Systems

The input file with image data (name.y format)

File: {byte0,byte1,……..byten, bytewidth*height}

Pixel left top Pixel right bottom

Example: Two pixels above directly above each other: byten and byten+width

bicycle.y football.y

Electronic Systems

How many images per second?

Video is time discrete in the temporal domain More pictures/second affects

Motion portrayal Flicker

41

Electronic Systems

How many images per second?

Depends on the brightness level, and viewing angle

The flicker threshold shifts to higher frequencies in the periphery of the vision field

Allows us to rapidly recognize approaching danger

Electronic Systems

Video processing

Spatial domain Image processing on a still image Examples

Edge detection Blurring ...

Temporal domain Image processing across different points in time Examples

Motion estimation Object recognition ...

The assignment deals with still images

Electronic Systems

What does a 3x3 filter do with an image?

A 3x3 filter replaces each pixel (byte) in the file with the weighted sum of the pixel and its eight direct neighbors:

With:

And filter-coefficient Cline,pixel represented by one byte

1

1

1

1,

1_

line

line

pixel

pixelpixelwidthlinenpixellinen byteC

NbyteOutput

1

1

1

1,

line

line

pixel

pixelpixellineCN

3x3filter

Example: filter coefficients are all “1”

Electronic Systems

Blur filter

+1 +1 +1

+1 +1 +1

+1 +1 +1

Filter coefficient:

Electronic Systems

C-code for blur filterfor(int a=width+1; a<width*height-(width+1); a++){

result=((

1* (int)buf_i[a-1-width] +

1* (int)buf_i[a-width] +

1* (int)buf_i[a+1-width] +

1* (int)buf_i[a-1] +

1* (int)buf_i[a] +

1* (int)buf_i[a+1] +

1* (int)buf_i[a-1 +width] +

1* (int)buf_i[a+width] +

1* (int)buf_i[a+1+width]

+4 )/ 9);

if(result<0) buf_o[a]=0;

else if(result>255) buf_o[a]=255;

else buf_o[a]=result;

}

clip weighted sum (pixel value) back to

one byte

Electronic Systems

Sharpening filter

-1 -1 -1

-1 12 -1

-1 -1 -1

Filter coefficient:

Electronic Systems

C-code for sharpeningfor(int a=width+1;a<width*height-(width+1);a++){

result=((

-1* (int)buf_i[a-1-width] +

-1* (int)buf_i[a-width] +

-1* (int)buf_i[a+1-width] +

-1* (int)buf_i[a-1] +

12* (int)buf_i[a] +

-1* (int)buf_i[a+1] +

-1* (int)buf_i[a-1+width] +

-1* (int)buf_i[a+width] +

-1* (int)buf_i[a+1+width]

+2 )/ 4);




}

Electronic Systems

Edge detection

-1 -1 -1

-1 8 -1

-1 -1 -1

+128

Filter coefficient:

Electronic Systems

C-code for sharpeningfor(int a=width+1;a<width*height-(width+1);a++){

result=((

-1* (int)buf_i[a-1-width] +

-1* (int)buf_i[a-width] +

-1* (int)buf_i[a+1-width] +

-1* (int)buf_i[a-1] +

8* (int)buf_i[a] +

-1* (int)buf_i[a+1] +

-1* (int)buf_i[a-1+width] +

-1* (int)buf_i[a+width] +

-1* (int)buf_i[a+1+width]

+128 )/ 1);




}

Electronic Systems

Outline


Electronic Systems

Input / output

void main(void){ int a, result; char *buf_i = (char*)0x600000, *buf_o = (char*)0x665400; for (a=WIDTH+1; a < WIDTH*HEIGHT-(WIDTH+1);a++) { result=(( -1*(int)buf_i[a-1-WIDTH] + -1*(int)buf_i[a-WIDTH] + -1*(int)buf_i[a+1-WIDTH] + -1*(int)buf_i[a-1] + 12*(int)buf_i[a] + -1*(int)buf_i[a+1] + -1*(int)buf_i[a-1+WIDTH] + -1*(int)buf_i[a+WIDTH] + -1*(int)buf_i[a+1+WIDTH] + 128) / 4);

if(result<0) buf_o[a] = 0; else if (result > 255) buf_o[a] = (char)255; else buf_o[a] = result; }}

input image output image

Electronic Systems

Placing an image in the mMIPS memory

1. lcc -o mips_mem.bin image.c

2. imgproc.exe -i bicycle.y mips_mem.bin

images

Start of image in memory (mips_mem.bin)

Electronic Systems

Extracting an image from the mMIPS memory

1. imgproc.exe -e mips_ram.dump bicycle.y

2. ImProc.exe

Electronic Systems

Outline


Electronic Systems

Assignment

Optimize the run-time of an image processing algorithm running on the mMIPS without reducing the instruction set supported by the hardware.

ConstraintsAll programs that run on the original mMIPS must also run on your design.Programs running on your design and the original mMIPS must produce bit-exact output

AllowedAdding special instructions to the mMIPS;Changing the design of the mMIPS (e.g. forwarding).

Not-allowedModification of the image processing algorithm that are not needed to use special instructions (e.g. replace multiply with shifts).

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Testing and implementing the design

Test for functional correctness Run the original mMIPS with the algorithm to produce a reference output. Compare the results of your mMIPS to the reference output.

You can use the check-image utility for this purpose. Make sure that your image is large enough to cover all possible cases.

Implement your design on the FPGA You must complete the flow till the FPGA. The maximum clock frequency at

which your mMIPS can be synthesized is part of the performance.

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Submitting your design

Use the submit-design utility to submit your mMIPS design You can submit a new design as often as you like, but only your last design

will be tested

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Important dates

Submit the first version of your modified mMIPS on May 17th before noon. This version must at least contain:

a working forwarding unit, a working custom clipping instruction.

A separate document (A4, 10pt font, max 2 pages) with a description of all changes made, or planned, or investigated

Provide a short description of the required changes Provide a short motivation for the change Explain the expected performance gain

Send document to [email protected] Instructions at www.es.ele.tue.nl/education/Computation/mmips.

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Important dates

Midterm meeting on May 20th in PT 1.05 from 10.45 till 12.30.

Submit the final version of your modified mMIPS on June 16th before noon. Instructions at www.es.ele.tue.nl/education/Computation/mmips. This is a hard deadline, no extension is possible!

Individual presentation of your mMIPS on June 18th

The presentation is about the changes you made to the mMIPS. Do not talk about the book, forwarding or clipping.

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Support and information

Every Wednesday from 13.00 till 15.00 in PT 9.10

Check also www.es.ele.tue.nl/education/Computation/mmips for more information, hints, etc.

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Questions

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Documents

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