DC-HSDPA Functionality Check

27
LST UCORRMALGOSWITCH:; PHRH1 +++ PHRH1 2013-02-08 19:23:50 O&M #1839687 %%/*19954*/LST UCORRMALGOSWITCH:;%% RETCODE = 0 Execution succeeded. List Connection-Oriented Algorithm Switches ------------------------------------------- Channel Configuration Strategy Switch = CFG_DL_BLIND_DETECTION_SWITCH::ON = CFG_HSDPA_64QAM_SWITCH::ON = CFG_HSDPA_MIMO_SWITCH::ON = CFG_HSPA_DTX_DRX_SWITCH::OFF = CFG_HSPA_HSSCCH_LESS_OP_SWITCH::OFF = CFG_IMS_SUPPORT_SWITCH::ON = CFG_LOSSLESS_DLRLC_PDUSIZECHG_SWITCH::OFF = CFG_LOSSLESS_RELOC_CFG_SWITCH::OFF = CFG_MULTI_RAB_SWITCH::ON = CFG_PDCP_IPV6_HEAD_COMPRESS_SWITCH::OFF = CFG_PDCP_RFC2507_HC_SWITCH::OFF

description

Huawei Dual Carrier Feature Implementation

Transcript of DC-HSDPA Functionality Check

Page 1: DC-HSDPA Functionality Check

LST UCORRMALGOSWITCH:;

PHRH1

+++ PHRH1 2013-02-08 19:23:50

O&M #1839687

%%/*19954*/LST UCORRMALGOSWITCH:;%%

RETCODE = 0 Execution succeeded.

List Connection-Oriented Algorithm Switches

-------------------------------------------

Channel Configuration Strategy Switch = CFG_DL_BLIND_DETECTION_SWITCH::ON

= CFG_HSDPA_64QAM_SWITCH::ON

= CFG_HSDPA_MIMO_SWITCH::ON

= CFG_HSPA_DTX_DRX_SWITCH::OFF

= CFG_HSPA_HSSCCH_LESS_OP_SWITCH::OFF

= CFG_IMS_SUPPORT_SWITCH::ON

= CFG_LOSSLESS_DLRLC_PDUSIZECHG_SWITCH::OFF

= CFG_LOSSLESS_RELOC_CFG_SWITCH::OFF

= CFG_MULTI_RAB_SWITCH::ON

= CFG_PDCP_IPV6_HEAD_COMPRESS_SWITCH::OFF

= CFG_PDCP_RFC2507_HC_SWITCH::OFF

= CFG_PDCP_RFC3095_HC_SWITCH::OFF

= CFG_HSDPA_MIMO_WITH_64QAM_SWITCH::OFF

= CFG_HSDPA_DC_SWITCH::ON

= CFG_HSUPA_16QAM_SWITCH::OFF

= CFG_RAB_REL_RMV_HSPAPLUS_SWITCH::OFF

= CFG_PTT_SWITCH::OFF

= CFG_EDPCCH_BOOSTING_SWITCH::OFF

Page 2: DC-HSDPA Functionality Check

= CFG_HSDPA_DCMIMO_SWITCH::OFF

= CFG_FREE_USER_SWITCH::OFF

= CFG_DC_MIMO_DYNAMIC_SELECT_SWITCH::OFF

Dynamic Resource Allocation Switch = DRA_AQM_SWITCH::OFF

= DRA_DCCC_SWITCH::ON

= DRA_HSDPA_DL_FLOW_CONTROL_SWITCH::OFF

= DRA_HSDPA_STATE_TRANS_SWITCH::ON

= DRA_HSUPA_DCCC_SWITCH::OFF

= DRA_HSUPA_STATE_TRANS_SWITCH::ON

= DRA_PS_BE_STATE_TRANS_SWITCH::ON

= DRA_PS_NON_BE_STATE_TRANS_SWITCH::OFF

= DRA_R99_DL_FLOW_CONTROL_SWITCH::OFF

= DRA_THROUGHPUT_DCCC_SWITCH::OFF

= DRA_VOICE_SAVE_CE_SWITCH::OFF

= DRA_VOICE_TTI_RECFG_SWITCH::OFF

= DRA_BASE_COVER_BE_TTI_RECFG_SWITCH::OFF

= DRA_BASE_COVER_BE_TTI_L2_OPT_SWITCH::OFF

= DRA_BASE_RES_BE_TTI_RECFG_SWITCH::ON

= DRA_BASE_RES_BE_TTI_L2_OPT_SWITCH::OFF

= DRA_BASE_ADM_CE_BE_TTI_RECFG_SWITCH::ON

= DRA_BASE_ADM_CE_BE_TTI_L2_OPT_SWITCH::OFF

= DRA_IP_SERVICE_QOS_SWITCH::OFF

CS Algorithm Switch = CS_AMRC_SWITCH::OFF

= CS_HANDOVER_TO_UTRAN_DEFAULT_CFG_SWITCH::ON

= CS_IUUP_V2_SUPPORT_SWITCH::ON

Power Control Switch = PC_DL_INNER_LOOP_PC_ACTIVE_SWITCH::ON

= PC_DOWNLINK_POWER_BALANCE_SWITCH::ON

Page 3: DC-HSDPA Functionality Check

= PC_EFACH_ECN0_DYN_ADJ_SWITCH::OFF

= PC_FP_MULTI_RLS_IND_SWITCH::ON

= PC_HSUPA_HARQNUM_AUTO_ADJUST_SWITCH::OFF

= PC_INNER_LOOP_LMTED_PWR_INC_SWITCH::OFF

= PC_OLPC_SWITCH::ON

= PC_RL_RECFG_SIR_TARGET_CARRY_SWITCH::OFF

= PC_SIG_DCH_OLPC_SWITCH::OFF

= PC_UL_SIRERR_HIGH_REL_UE_SWITCH::OFF

= PC_CFG_ED_POWER_INTERPOLATION_SWITCH::OFF

= PC_HSUPA_COVER_EN_AT_POLIMIT_SWITCH::OFF

= PC_HSUPA_DATA_CH_PO_ADAPTIVE_ADJ_SWITCH::OFF

Compatibility Switch = CMP_IU_IMS_PROC_AS_NORMAL_PS_SWITCH::OFF

= CMP_IU_SYSHOIN_CMP_IUUP_FIXTO1_SWITCH::OFF

= CMP_IUR_H2D_FOR_LOWR5_NRNCCELL_SWITCH::OFF

= CMP_IUR_SHO_DIVCTRL_SWITCH::ON

= CMP_UU_AMR_SID_MUST_CFG_SWITCH::OFF

= CMP_UU_ADJACENT_FREQ_CM_SWITCH::OFF

= CMP_UU_IGNORE_UE_RLC_CAP_SWITCH::ON

= CMP_UU_SERV_CELL_CHG_WITH_ASU_SWITCH::OFF

= CMP_UU_SERV_CELL_CHG_WITH_RB_MOD_SWITCH::ON

= CMP_UU_VOIP_UP_PROC_AS_NORMAL_PS_SWITCH::ON

= CMP_UU_FDPCH_COMPAT_SWITCH::OFF

= CMP_UU_AMR_DRD_HHO_COMPAT_SWITCH::ON

= CMP_IU_QOS_ASYMMETRY_IND_COMPAT_SWITCH::OFF

= CMP_UU_IOS_CELL_SYNC_INFO_REPORT_SWITCH::OFF

= CMP_UU_INTRA_FREQ_MC_BESTCELL_CIO_SWITCH::OFF

= CMP_F2F_RLC_ONESIDE_REBUILD_SWITCH::OFF

Page 4: DC-HSDPA Functionality Check

= CMP_D2F_RLC_ONESIDE_REBUILD_SWITCH::OFF

= CMP_RAB_5_CFG_ROHC_SWITCH::OFF

= CMP_RAB_6_CFG_ROHC_SWITCH::OFF

= CMP_RAB_7_CFG_ROHC_SWITCH::OFF

= CMP_RAB_8_CFG_ROHC_SWITCH::OFF

= CMP_RAB_9_CFG_ROHC_SWITCH::OFF

= CMP_HSUPA_MACD_FLOW_MUL_SWITCH::OFF

= CMP_SMLC_RSLT_MODE_TYPE_SWITCH::OFF

Service Mapping Strategy Switch = MAP_HSUPA_TTI_2MS_SWITCH::ON

= MAP_INTER_RAT_PS_IN_CHANLE_LIMIT_SWITCH::OFF

= MAP_PS_BE_ON_E_FACH_SWITCH::OFF

= MAP_PS_STREAM_ON_E_FACH_SWITCH::OFF

= MAP_PS_STREAM_ON_HSDPA_SWITCH::OFF

= MAP_PS_STREAM_ON_HSUPA_SWITCH::OFF

= MAP_SRB_6800_WHEN_RAB_ON_HSDSCH_SWITCH::OFF

= MAP_SRB_ON_DCH_OR_FACH_CS_RRC_SWITCH::OFF

PS Rate Negotiation Switch = PS_BE_EXTRA_LOW_RATE_ACCESS_SWITCH::OFF

= PS_BE_INIT_RATE_DYNAMIC_CFG_SWITCH::OFF

= PS_BE_IU_QOS_NEG_SWITCH::OFF

= PS_RAB_DOWNSIZING_SWITCH::ON

= PS_STREAM_IU_QOS_NEG_SWITCH::OFF

= PS_BE_STRICT_IU_QOS_NEG_SWITCH::OFF

Direct Retry Switch = DR_RRC_DRD_SWITCH::ON

= DR_RAB_SING_DRD_SWITCH::ON

= DR_RAB_COMB_DRD_SWITCH::OFF

= DR_INTER_RAT_DRD_SWITCH::ON

HandOver Switch = HO_ALGO_HCS_SPEED_EST_SWITCH::OFF

Page 5: DC-HSDPA Functionality Check

= HO_ALGO_LDR_ALLOW_SHO_SWITCH::ON

= HO_ALGO_MBMS_FLC_SWITCH::OFF

= HO_ALGO_OVERLAY_SWITCH::OFF

= HO_INTER_FREQ_HARD_HO_SWITCH::ON

= HO_INTER_RAT_CS_OUT_SWITCH::ON

= HO_INTER_RAT_PS_3G2G_CELLCHG_NACC_SWITCH::OFF

= HO_INTER_RAT_PS_3G2G_RELOCATION_SWITCH::OFF

= HO_INTER_RAT_PS_OUT_SWITCH::OFF

= HO_INTER_RAT_RNC_SERVICE_HO_SWITCH::ON

= HO_INTRA_FREQ_DETSET_INTO_ACTSET_SWITCH::ON

= HO_INTRA_FREQ_DETSET_RPRT_SWITCH::ON

= HO_INTRA_FREQ_HARD_HO_SWITCH::ON

= HO_INTRA_FREQ_RPRT_1J_SWITCH::OFF

= HO_INTRA_FREQ_SOFT_HO_SWITCH::ON

= HO_MC_MEAS_BEYOND_UE_CAP_SWITCH::OFF

= HO_MC_NCELL_COMBINE_SWITCH::ON

= HO_MC_SIGNAL_IUR_INTRA_SWITCH::OFF

= HO_MC_SIGNAL_SWITCH::OFF

= HO_MC_SNA_RESTRICTION_SWITCH::OFF

= HO_LTE_PS_OUT_SWITCH::OFF

= HO_LTE_SERVICE_PS_OUT_SWITCH::OFF

= HO_H2G_SRVCC_SWITCH::OFF

SRNSR Algorithm Switch = SRNSR_DSCR_IUR_RESRCE_SWITCH::OFF

= SRNSR_DSCR_LOC_SEPRAT_SWITCH::ON

= SRNSR_DSCR_PROPG_DELAY_SWITCH::OFF

= SRNSR_DSCR_SEPRAT_DUR_SWITCH::ON

CMCF Algorithm Switch = CMCF_DL_HLS_SWITCH::ON

Page 6: DC-HSDPA Functionality Check

= CMCF_UL_HLS_SWITCH::ON

= CMCF_UL_PRECFG_TOLERANCE_SWITCH::OFF

= CMCF_WITHOUT_UE_CAP_REPORT_SWITCH::OFF

CORRM Algorithm Reserved Switch 0 = RESERVED_SWITCH_0_BIT1::OFF

= RESERVED_SWITCH_0_BIT2::ON

= RESERVED_SWITCH_0_BIT3::OFF

= RESERVED_SWITCH_0_BIT4::OFF

= RESERVED_SWITCH_0_BIT5::ON

= RESERVED_SWITCH_0_BIT6::OFF

= RESERVED_SWITCH_0_BIT7::ON

= RESERVED_SWITCH_0_BIT8::OFF

= RESERVED_SWITCH_0_BIT9::OFF

= RESERVED_SWITCH_0_BIT10::OFF

= RESERVED_SWITCH_0_BIT11::ON

= RESERVED_SWITCH_0_BIT12::OFF

= RESERVED_SWITCH_0_BIT13::OFF

= RESERVED_SWITCH_0_BIT14::OFF

= RESERVED_SWITCH_0_BIT15::OFF

= RESERVED_SWITCH_0_BIT16::ON

= RESERVED_SWITCH_0_BIT17::OFF

= RESERVED_SWITCH_0_BIT18::OFF

= RESERVED_SWITCH_0_BIT19::OFF

= RESERVED_SWITCH_0_BIT20::OFF

= RESERVED_SWITCH_0_BIT21::OFF

= RESERVED_SWITCH_0_BIT22::OFF

= RESERVED_SWITCH_0_BIT23::OFF

= RESERVED_SWITCH_0_BIT24::OFF

Page 7: DC-HSDPA Functionality Check

= RESERVED_SWITCH_0_BIT25::OFF

= RESERVED_SWITCH_0_BIT26::OFF

= RESERVED_SWITCH_0_BIT27::ON

= RESERVED_SWITCH_0_BIT28::OFF

= RESERVED_SWITCH_0_BIT29::OFF

= RESERVED_SWITCH_0_BIT30::OFF

= RESERVED_SWITCH_0_BIT31::OFF

= RESERVED_SWITCH_0_BIT32::OFF

CORRM Algorithm Reserved Switch 1 = RESERVED_SWITCH_1_BIT1::ON

= RESERVED_SWITCH_1_BIT2::ON

= RESERVED_SWITCH_1_BIT3::ON

= RESERVED_SWITCH_1_BIT4::ON

= RESERVED_SWITCH_1_BIT5::ON

= RESERVED_SWITCH_1_BIT6::ON

= RESERVED_SWITCH_1_BIT7::ON

= RESERVED_SWITCH_1_BIT8::ON

= RESERVED_SWITCH_1_BIT9::ON

= RESERVED_SWITCH_1_BIT10::ON

= RESERVED_SWITCH_1_BIT11::ON

= RESERVED_SWITCH_1_BIT12::ON

= RESERVED_SWITCH_1_BIT13::ON

= RESERVED_SWITCH_1_BIT14::ON

= RESERVED_SWITCH_1_BIT15::ON

= RESERVED_SWITCH_1_BIT16::ON

= RESERVED_SWITCH_1_BIT17::ON

= RESERVED_SWITCH_1_BIT18::ON

= RESERVED_SWITCH_1_BIT19::ON

Page 8: DC-HSDPA Functionality Check

= RESERVED_SWITCH_1_BIT20::ON

= RESERVED_SWITCH_1_BIT21::ON

= RESERVED_SWITCH_1_BIT22::ON

= RESERVED_SWITCH_1_BIT23::ON

= RESERVED_SWITCH_1_BIT24::ON

= RESERVED_SWITCH_1_BIT25::ON

= RESERVED_SWITCH_1_BIT26::ON

= RESERVED_SWITCH_1_BIT27::ON

= RESERVED_SWITCH_1_BIT28::ON

= RESERVED_SWITCH_1_BIT29::ON

= RESERVED_SWITCH_1_BIT30::ON

= RESERVED_SWITCH_1_BIT31::ON

= RESERVED_SWITCH_1_BIT32::ON

CORRM Algorithm Reserved U32 Para 0 = 25

CORRM Algorithm Reserved U32 Para 1 = 4294967295

CORRM Algorithm Reserved U8 Para 0 = 9

CORRM Algorithm Reserved U8 Para 1 = 10

Compatibility Switch2 = CMP_RELOCIN_IUUPVER_NOTCHG_SWITCH::OFF

= CMP_IUBR_DM_RTT_ALTERNATIVE_FMT_SWITCH::OFF

= CMP_IUR_CMCF_SWITCH::OFF

= CMP_STTD_RL_ADD_SWITCH::OFF

= CMP_STTD_ASU_SWITCH::OFF

= CMP_RAB_DRD_ROLLBACK_PUNISH_SWITCH::OFF

= CMP_WBAMR_SUBFLOW_SWITCH::OFF

= CMP_IUR_CELLCAP_BITMAP_TRANSFORM_SWITCH::OFF

= CMP_MOCN_PLMN_SEL_SWITCH::OFF

= CMP_LOSSLESS_RELOC_RLCPDUSIZECHG_SWITCH::OFF

Page 9: DC-HSDPA Functionality Check

= CMP_CS_FIXED_RATE_WHEN_PS_EXIST_SWITCH::OFF

(Number of results = 1)

--- END

LST UFRC:LSTFORMAT=VERTICAL;

PHRH1

+++ PHRH1 2013-02-08 19:25:27

O&M #1839691

%%/*19965*/LST UFRC:LSTFORMAT=VERTICAL;%%

RETCODE = 0 Execution succeeded.

List RNC-Oriented FRC Algorithm Parameters

------------------------------------------

Default Constant Value = -22

Power control algorithm selection = ALGORITHM1

UL Closed Loop Power Control Step = 1

FDD DL power control step size = STEPSIZE_1DB

DL power control mode = SINGLE_TPC

TFCI power offset = 0

TPC power offset = 12

Pilot power offset = 12

DL DPCH PosFixedorFlex Cfg by default = FLEX

DL AMR-NB Code-Resource-Saving switch = ON

DL DPCH puncturing limit in the saving mode = 11

Paging DRX cycle coefficient = 6

UL BE traffic Initial bit rate = D8

Page 10: DC-HSDPA Functionality Check

DL BE traffic Initial bit rate = D8

Upper limit of UL BE data rate in AMR services = D64

Upper limit of DL BE data rate in AMR services = D8

Upper limit of UL BE data rate in Non-AMR services = D8

Upper limit of DL BE data rate in Non-AMR services = D8

Streaming traffic transmission mode on HSUPA = NON-SCHEDULED

Value of PLnon-max = 11

E-DPCCH power offset for 2ms TTI = PO_15/15

E-DPCCH power offset for 10ms TTI = PO_9/15

HSUPA TTI 10ms schedule period without grant = D50

HSUPA TTI 2ms schedule period without grant = D50

HSUPA TTI 10ms schedule period with grant = D100

HSUPA TTI 2ms schedule period with grant = D100

Initial rate of HSUPA BE traffic = D256

DL Rate of HSDPA BE on DCH = D128

IMS Bearer Enhancement Switch = OFF

Ims initial rate = <NULL>

HSUPA TTI type of VOIP traffic = EDCH_TTI_10ms

Rate Threshold of Streaming Services on 2ms TTI of HSUPA = D384

Rate threshold of BE on 2ms TTI of HSUPA = D1280

Ec/N0 threshold = 41

Ec/N0 effective time = 5000

Cell_DCH DL L2 enhance max PDU size = 502

Cell_DCH UL L2 enhance max RLC PDU size = 302

Cell_DCH UL L2 enhance min RLC PDU size = 42

Cell_FACH L2 enhance max PDU size = 42

Preferred MIMO or 64QAM Character = 64QAM

Page 11: DC-HSDPA Functionality Check

Delay Time for DTX_DRX to Take Effect = D32

HSPA Technologies Retried by UEs = SRB_OVER_HSDPA::ON

= SRB_OVER_HSUPA::ON

= TTI_2MS::OFF

= MIMO::ON

= 64QAM::ON

= DL_L2_ENHANCE::ON

= DTX_DRX::ON

= HSSCCH_LESS_OPERATION::ON

= MIMO_64QAM::OFF

= DC_HSDPA::OFF

= UL_L2_ENHANCE::OFF

= UL_16QAM::OFF

= EDPCCH_BOOSTING::OFF

= DCMIMO_HSDPA::OFF

Prefered DPCCH slot format for HSPA = SLOT_FORMAT_1

HSUPA TTI type of CS voice traffic = EDCH_TTI_10ms

CS Voice Hspa Ul Relative Delay = 5

CS Voice Hspa Dl Relative Delay = 5

IMS signalling transmission mode on HSUPA = SCHEDULED

SRB transmission mode on HSUPA = SCHEDULED

Preferred MIMO_64QAM or DC_HSDPA Character = DC_HSDPA

The total rate threshold of HSUPA traffic for using 16QAM = 3640

PTT ARP Priority = 1

PTT ARP Preemption Capability = NOT_TRIGGER

PTT ARP Preemption Vulnerability = NOT_PRE_EMPTABLE

PTT ARP Queuing Allowed = NOT_ALLOWED

Page 12: DC-HSDPA Functionality Check

DRX cycle coefficient of PTT user = 5

PTT HSUPA TTI type = EDCH_TTI_2ms

Default SPI Weight = 100

Traffic to Total Pilot Power Offset = PO_12

The total rate threshold of HSUPA traffic for Boosting = 10

DCMIMOMacHsWinSize = D128

Cell_PCH L2 enhance max PDU size = 60

ERACH Max RLC PDU Size Under UL Layer 2 = 302

ERACH Min RLC PDU Size Under UL Layer 2 = 42

PTT traffic transmission mode on HSUPA = NON-SCHEDULED

DL TX Power Threshold of Secondary Cell = 80

Threshold of HSDPA Users in Secondary Cell = 4

(Number of results = 1)

--- END

LST UFRCCHLTYPEPARA:;

PHRH1

+++ PHRH1 2013-02-08 19:27:06

O&M #1839694

%%/*19978*/LST UFRCCHLTYPEPARA:;%%

RETCODE = 0 Execution succeeded.

List Channel Type Parameters

----------------------------

CS voice channel type = UL_DCH,DL_DCH

VOIP channel type = UL_DCH,DL_DCH

Page 13: DC-HSDPA Functionality Check

PTT channel type = UL_EDCH,DL_HSDSCH

IMS channel type = UL_DCH,DL_DCH

Type of Channel Preferably Carrying Signaling RB = UL_EDCH,DL_DCH

Effective Flag of Signaling RB Channel Type = FALSE

UL BE traffic DCH decision threshold = D8

DL BE traffic DCH decision threshold = D8

DL streaming traffic threshold on HSDPA = D64

DL BE traffic threshold on HSDPA = D64

UL streaming traffic threshold on HSUPA = D256

UL BE traffic threshold on HSUPA = D608

(Number of results = 1)

--- END

LST UCELLALGOSWITCH:CELLID=5892;

PHRH1

+++ PHRH1 2013-02-08 19:29:09

O&M #1839696

%%/*19993*/LST UCELLALGOSWITCH:CELLID=5892;%%

RETCODE = 0 Execution succeeded.

List Cell Algorithm Switch

--------------------------

Cell ID = 5892

Cell Name = 606077_PerthCentral_MV_U08A_2

Cell CAC algorithm switch = Credit Admission Control Algorithm::ON

= HSDPA UU Load Admission Control Algorithm::OFF

Page 14: DC-HSDPA Functionality Check

= HSUPA UU Load Admission Control Algorithm::OFF

= MBMS UU Load Admission Control Algorithm::OFF

= HSDPA GBP Meas Algorithm::OFF

= HSDPA PBR Meas Algorithm::OFF

= HSUPA PBR Meas Algorithm::OFF

= HSUPA EDCH RSEPS Meas Algorithm::OFF

= emergency call power admission::ON

= RTWP Resist Disturb Switch::OFF

= FACH power cac switch::OFF

= Legacy HSDPA Admission Control Algorithm in MIMO Cell ::OFF

= Fast Dormancy User Admission Control Algorithm::ON

Uplink CAC algorithm switch = ALGORITHM_SECOND

Downlink CAC algorithm switch = ALGORITHM_FIRST

Cell LDC algorithm switch = Intra Frequency LDB Algorithm::OFF

= Potential User Control Algorithm::OFF

= Uplink UU LDR Algorithm::ON

= Downlink UU LDR Algorithm::ON

= Uplink UU OLC Algorithm::OFF

= Downlink UU OLC Algorithm::OFF

= OLC Event Meas Algorithm::OFF

= Code LDR Algorithm::ON

= Credit LDR Algorithm::ON

= Intra Frequency ULB Algorithm::OFF

Mac-hs Reset algorithm switch = ALGORITHM_DEPEND_ON_LCG

Cell Hspa Plus function switch = Cell 64QAM Function Switch::ON

= Cell MIMO Function Switch::OFF

= Cell E_FACH Function Switch::OFF

Page 15: DC-HSDPA Functionality Check

= Cell DTX_DRX Function Switch::OFF

= Cell HS_SCCH LESS OPERATION Function Switch::OFF

= Cell DL L2ENHANCED Function Switch::ON

= Cell 64QAM+MIMO Function Switch::OFF

= Cell UL 16QAM Function Switch::OFF

= Cell DC-HSDPA Function Switch::ON

= Cell UL L2ENHANCED Function Switch::OFF

= Cell E-DPCCH Boosting Function Switch::OFF

= Cell DC-HSDPA Combined with MIMO Function Switch::OFF

= Enhanced Discontinuous Reception Function Switch::OFF

Cell Hspa Enhanced function switch = E_F_DPCH_OFF

Cell Capability Auto Handle Switch = TX diversity capability is on to off::OFF

= TX diversity capability is off to on::OFF

Inter-freq Handover Select User algorithm switch = Select users match target cell support only

Reserved parameter 1 = Reserved Switch 1::OFF

= Reserved Switch 2::OFF

= Reserved Switch 3::OFF

= Reserved Switch 4::OFF

= Reserved Switch 5::OFF

= Reserved Switch 6::OFF

= Reserved Switch 7::OFF

= Reserved Switch 8::OFF

= Reserved Switch 9::OFF

= Reserved Switch 10::OFF

= Reserved Switch 11::OFF

= Reserved Switch 12::OFF

= Reserved Switch 13::OFF

Page 16: DC-HSDPA Functionality Check

= Reserved Switch 14::OFF

= Reserved Switch 15::OFF

= Reserved Switch 16::OFF

Reserved parameter 2 = 0

Reserved parameter 3 = 0

Offload Switch = Offload Function is OFF

BE rate reduction switch based on fairness = Algorithm is OFF

(Number of results = 1)

--- END

LST UCELLHSDPA:LSTTYPE=ByCellId,CELLID=5892,LSTFORMAT=VERTICAL;

PHRH1

+++ PHRH1 2013-02-08 19:31:46

O&M #1839703

%%/*20036*/LST UCELLHSDPA:LSTTYPE=ByCellId,CELLID=5892,LSTFORMAT=VERTICAL;%%

RETCODE = 0 Execution succeeded.

List Cell HSDPA Parameters

--------------------------

Cell ID = 5892

Cell Name = 606077_PerthCentral_MV_U08A_2

Allocate Code Mode = Automatic

Code Number for HS-PDSCH = <NULL>

Code Max Number for HS-PDSCH = 15

Code Min Number for HS-PDSCH = 1

Code Number for HS-SCCH = 3

Page 17: DC-HSDPA Functionality Check

The Offset of HSPA Total Power = 0

HS-PDSCH MPO Constant = 2.5dB

HARQ Preamble Capability Indication = Mode0

Code Adjust Switch for HSDPA = ON

User Number for Code Adjust for HSDPA = 3

Punish Timer Length for Code Adjust for HSDPA = 5

MIMO MPO Constant[dB] = 2.5dB

Cell HSDPA state = ACTIVATED

(Number of results = 1)

--- END

Page 18: DC-HSDPA Functionality Check

Node B LMT:

TRAFFIC #237122

%%LST DUALCELLGRP:;%%

RETCODE = 0 Operation succeeded.

List Dual Cell Group

--------------------

First Local Cell ID Second Local Cell ID

1 4

2 5

3 6

11 14

12 15

13 16

17 18

(Number of results = 7)

--- END

Page 19: DC-HSDPA Functionality Check