MOSIS Chip Test Report

Dan Suo File: 'ReportV37P-CT89533DanSuo.doc'

CMPEN 411, Spring 2013, Homework Project 9 chip, 'Tiny Chip' fabricated through MOSIS program

Technology: 0.5um CMOS, ON Semiconductor

Project: 8bit RISC microcontroller, 32 word program, 8 data registers, 6 instructions, one 8 bit input port, one 8 bit output port, 32X16 RAM program memory - reprogrammable

MOSIS V37P-CT CHIP

Die size: 1584 X 1685 um

Package: Ceramic DIP40

Design Report Summary of Design Parameters:

Number of transistors: total = 9272 pmos = 4124 nmos = 5148

Layout size: total area = 2250000 um**2 X = 1500 um Y = 1500 um

Worst case delay time: Td = 11 nsec. Maximum clock cycle: Freq. = 102.04 MHz

AT2 design efficiency = 24750000 um

2 * nsec

2 Hspice minimum time step (.hsp file): CLK = 4.5 ns

Complete schematic design: completion = yes Complete schematic design verified with simulation: yes

Complete layout design: completion = yes Complete layout design verified with simulation: yes

Layout DRC error check passed: yes LVS check passed: yes

Top cell name: aaamicro8top

1. Objective: Build a simple microprocessor chip which is an 8-bit RISC processor.

This microcontroller is an 8-bit RISC processor, its full description and specification is posted at: http://www.cse.psu.edu/~kyusun/class/cmpen471/11f/hw/pj7/pj7.html Now the microprocessor core design needs to be placed into the chip pad frame to complete the chip. Sample pad frame 'p3tinyfr1' for the class chip fabrication, 40 pins total, 1000um X 1000um inside area 2. Tasks: Complete the full 8-bit RISC microprocessor chip design by placing the processor core design into the 40 pin ‘tiny’ chip pad frame. Do verify the functioning and timing from the ‘pad to pad’ simulation. 3. Circuit/Block Diagrams:

4. Schematic Designs and Simulations:

Schematic of the inner part of the 8-bit microcontroller

Schematic of 8-bit microcontroller

Schematic circuit simulation of the following program:

MV0,0 MV #255,1 Out 1 MV# 1,2 Add 2,1 Out 1 Sub 2,0 Out 0 In 3 Out 3

Simulation of 8-bit microcontroller

5. Layout Designs and Simulations:

Layout of Pad

Layout of inner part of the 8-bit microcontroller

Layout of 8-bit microcontroller

The program is as below:

MV0,0 MV #255,1 Out 1 MV# 1,2 Out 2 Add 2,1 Out 1 Sub 2,0 Out 0 In 3 Out 3

Then the simulation result is as follow:

Simulation of 8-bit microcontroller

6. Data Sheet/User's Guide:

An 8-bit RISC microcontroller is designed which consists of 32x16 program memory, 8x8 dual port data memory, 7 instructions, 4 addressing modes, one input port and one output port.

The 7 instructions are：

MV(#): Move data from source to destinatin. ADD: Add data from source to destination and save the result in destination. SUB: Substract source from destination and save the result in destination. BC: Branch if carry bit is set. IN: Move data from input port to destination. OUT: Move data from source to output port.

7. Specifications:

1. The worst case instruction execution time is 20nsec.

2. The fastest clock signal clock while the program properly executing is 10nsec.

Clk=5.0nsec

3. The adder is the lowest part. It is because the carry bit will take more time.

4. The worst case propagation delay is from ‘sdat<7>’ to ‘mux<7>’. And the delay time is 11nsec.

5. The rise time of ‘output’ is 206ps

The fall time of ‘output’ is 245ps

8. Design Conclusion: In this project, an 8-bit RISC microcontroller is designed which consists of 32x16 program memory, 8x8 dual port memory, 7 instructions, 4 addressing modes, one input port and one output port. This time, I placed the microcontroller into the 40 pin ‘tiny’ chip pad frame. The pad is 1500nmx1500nm.

Fabricated Chip Pin bonding diagram

Chip placed on the tester breadboard

Chip Testing Visual Inspection All of the received chips passed visual inspection, no flaws detected. Power Up Test Apply power to the power supply pins, gradually increase the supply voltage to 5V, watch the current flow. The chip fully powered at 5V and the power supply current less than 5mA is normal, supply current more than 300mA is not normal - short circuit is suspected. If the power supply current limit is set for the testing, the supply voltage may not be able to be raised to full 5V. All of the received chip passed the power up test. Clock In-Out Test We made the provision for a quick and simple signal test. Simply apply a square wave signal to the 'clock-in' pin and observe the same signal coming out to the 'ck-out' pin. This test will indicate the proper pad circuit operations. Also the pad circuit delay can be measured through this test. All of the received chip passed the clock in-out test. The pad circuit delay of less than 3ns was observed.

Full Microcontroller Operation Test Sample program 1: mv 0,0 ; NOP - no operation, always put this first for the safe RESET operation mv #0,0 ; fill first 4 memory locations with data: 0,1,2,3 mv #1,1 mv #2,2 mv #3,3 out 0 ; test proper data storing operation and 'out' operation out 1 out 2 out 3 mv #5,5 ; setting up an unconditional branch mv #6,6 sub 6,5 ; subtract a larger number from a smaller number, result saved in 5, and carry bit set bc -13 ; this will branch always, back 12 instructions - back to the 'mv 0,0' instruction mv 0,0 ; fill remaining program memory with NOP instructions mv 0,0 mv 0,0 mv 0,0 mv 0,0 mv 0,0 Sample program 2: mv 0,0 ; NOP - no operation, always put this first for the safe RESET operation in 3 ; sample the input port, save the data into memory location 3 out 3 ; take data from memory location 3 and send it to the output port mv #5,5 ; setting up an unconditional branch mv #6,6 sub 6,5 ; subtract a larger number from a smaller number, result saved in 5, and carry bit set bc -6 ; this will branch always, back 5 instructions - back to the 'in 3' instruction mv 0,0 ; fill remaining program memory with NOP instructions mv 0,0 mv 0,0 mv 0,0 mv 0,0 mv 0,0 Sample program 3: mv 0,0 ; NOP - no operation, always put this first for the safe RESET operation out 5 ; take data from memory location 5 and send it to the output port in 3 ; sample the input port, save the data into memory location 3 out 3 ; take data from memory location 3 and send it to the output port mv #5,5 ; setting up an unconditional branch mv #6,6 sub 6,5 ; subtract a larger number from a smaller number, result saved in 5, and carry bit set bc -6 ; this will branch always, back 5 instructions - back to the 'in 3' instruction mv 0,0 ; fill remaining program memory with NOP instructions mv 0,0 mv 0,0 mv 0,0 mv 0,0 ; this program will show the memory location 5 data, when 5-6 is performed mv 0,0

Sample program 4: Pulse Width Modulation (PWM) output - 7 level LED light dimming Apply a binary number from 0 to 7 to the input port, any LED light connected to the output port will be dimmed to that level. The light dimming will be completely steady if the PWM program must cycle through more than 100 times per second, the clock frequency of the microcontroller must be sufficiently high. All of the V37P-CT chips received did NOT work with the above microcontroller operation test. We are not even sure of the programs properly stored in the program RAM. We are not able to obtain clear reasons why the chips do not work at this time. A few internal signal lines of the microcontroller are brought out; in particular, the pins 2 and 3 shows the program counter output signal showing its operation. We were able to observe the PC<0> signal at pin 2 correctly operating - half of the clock signal frequency. However the PC<4> signal at pin 3 did not correctly operated. We are expecting a bug in the internal program counter design. Since the low bit of the PC worked, we even tried a very short program of 4 lines and observed its failure. Further testing was not able to carried out at this time but we will further investigate at later time.

Conclusion This chip project was marginally successful, all of the received chips work only partially. The chips passed the Power Up Test and clock in-out test. We are planning for further testing/investigation in the future. We express our gratitude to MOSIS for the course chip fabrication.