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Curriculum Vitae May 2016

Dr. Charayaphan Charoensak

Current Position

Senior Principal Engineer, Advanced Development, R&D Technology Group Singapore

Contacts

Tel : HP - 9230-8358, Home - (65)6752-7230 E-mail : charayap@hotmail.com and charayaphan.charoen@tpv-tech.com Linkedin : http://sg.linkedin.com/pub/charoensak-charayaphan/40/198/93a

Home Address

160 Lentor Loop, #08-06, Tower 6, Bullion Park, Singapore 789094

Academic Qualifications

1992 Ph.D., Electrical Engineering, Technical University of Nova Scotia, Nova Scotia, Canada

1987 M.A.Sc., Electrical Engineering, Technical University of Nova Scotia, Nova Scotia, Canada

1982 B.Eng (Hons, second in the class), Electrical Engineering, Chulalongkorn University,

Bangkok, Thailand

2002 Diploma in Teaching, Post Graduate Diploma of Teaching in Higher Education (PGDipTHE),

National Institute of Education, Singapore

Work Experience (please refer to details in section Major Accomplishments)

2012 – Present Senior Principal Engineer, Advanced Development, TPV R&D Singapore

Job functions Develop many picture quality improvement algorithms, starting from PC simulation to software in actual TV platforms. Examples are dynamic backlight dimming algorithm and automatic sharpness control. Design embedded hardware used in flat-screen TVs. Examples designs are FPGAs and ASICs for PQ enhancement, AmbiLight, and 3D goggle control. Expert in Hardware Description Language design including VHDL and Verilog

2005 – 2012 Senior Manager, Advanced Development, Philips Electronics, Singapore

Job functions Very similar to current job functions at TPV with addition of conductions of internal training. Example classes are “Introduction to Digital Signal Processing”, “Introduction to FPGA and VHDL”, and “Engineering Mathematics Refreshment”

1999 – 2005 Assistant Professor, Nanyang Technological University (NTU), Singapore

Job functions Teach, instruct labs, and supervise graduated students in the school of Electrical Engineering. Examples of subjects taught are DSP, VHDL, uP architecture, programming languages

1993 – 1999 Principal Engineer, Design & Development Dept, Siemens Nixdorf Information System, Singapore

Job functions Design many embedded controller systems for point-of-sale products such thermal printers and touch-screen display. Expert on embedded CPLD/FPGA and microcontroller designs.

Other Work Experience

2003 – Present Part-time trainer, Activemedia Singapore (http://www.activemedia.com.sg/)

Job functions Conduct trainings and laboratories. Specialized in courses on FPGA introduction, FPGA design for performance, VHDL and Verilog, Digital Signal Processing, and signal processing in communication

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Strong Points

Many years of experience in R&D and teaching in both private sectors and university. Balanced theoretical and practical expertise. Very good in technical problem solving, end-to-end from algorithm to actual implementations,

Strong background in digital signal and image processing, real-time hardware acceleration

Strong background in hardware design using FPGA (Field Programmable Gate Array) and ASIC. Expert on Xilinx and Altera FPGAs. Knowledge of FPGA design using VHDL/Verilog languages, Xilinx System generator/AccelDSP, Xilinx ISE/Planahead, and Altera Quartus

Strong background in analog and digital circuit design including transistor circuits, op-amp circuits, ADC/DAC, and embedded CPU circuits

Special skill in MATLAB/Simulink and many programming languages including C, C++, C#, JAVA, Python, and TCL

Skill in hardware and software development of embedded CPU

Major Accomplishments at TPV-Technology

2015 to present – PQ ASIC: a custom ASIC (Application Specific IC) designed for PQ enhancement based on Philips PQ IPs. IC to be used in 2k17 Philips TVs (high-end range),

2015 to present – Sub-bass synthesizer for TV audio enhancement: DSP algorithm to generate sub-harmonic of bass (thus the term sub-bass) which, when added into audio stream, significantly enhances the TV sound quality

2013 - Surround sound effect adaptive to live 3D depth: In 3D televisions, there is information regarding depth of each 3D object being shown. Using this information, it is possible to dynamically adjust the surround effects from the speakers to enhance the sound experience so as to match the 3D picture

2012 to present - Auto PQ algorithm: A TV may be connected to many types of input sources with varying quality, resolution and noise level for examples. Thus, picture quality (PQ) enhancement should also be automatically adapted. In auto PQ algorithm, various measurements are used to adapt PQ enhancements (such as sharpness and contrast) so as to achieve optimal picture. I developed the algorithm. It is being used in our televisions

2012 – Active 3D Infrared transmitter for goggle controller. Design hardware and developed firmware for a small microcontroller which transmits 3D synchronization signal to active 3D goggle allowing high quality 3D picture

2012 to present – Scanning backlight controller. Design hardware and write firmware for a an SoC (System on Chip) which implement the scanning backlight in the LED-lit LCD television. The scanning backlight both save energy and reduce motion blur

2012 - VirtualBass and Dynamic Range Compression (DRC) algorithms. The speaker systems in the new thin and flat screen television usually have poor bass and power output. The algorithms I developed give the sense of deeper bass and higher loudness beyond the level offered by the speakers alone

Major Accomplishments at Philips Electronics

2010 to 2012 - 3D TV: From start to completion, developed 3D TV. Work domains include a) theory of 3D, b) TV architecture and display panel selection, c) passive and active 3D TV prototypes (using FPGA), d) 2D-to-3D conversion algorithm simulation, e) 3D trainings, f) implementation of 3D format detection, and g) LVDS Snooper II,

2009 to present – Design of dynamic backlight dimming algorithm: In LCD TV, the panel has backlight which should to be dimmed. Backlight dimming reduces power consumption and improves picture quality. The level of dimming is dynamically adjusted according to picture contents. I developed, in 2009, the dimming algorithm which was then used in production

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TVs. Since then, the algorithm has been improved and used in many television models. I filed many patents relating to dimming algorithm which is still being use in our television

2007 - Design of LVDS Snooper I (and LVDS Snooper II in 2010). LVDS (Low Voltage Differential Signal) is the most commonly used signaling format for connecting TV main circuit board to the display panel. This RGB data embedded inside bus could not be read using basic equipment such as oscilloscope. I designed and developed the completed FPGA hardware and PC software solution called LVDS Snooper. The FPGA receives/decodes LVDS signal and produces the separated red/green/blue data. The specially developed PC program, written in C#, reads the data from the hardware and display the analysis results on computer screen in various graphical formats. The solution has been heavily used (very popular) among the TV PQ (Picture Quality) team. For this, I was very well received as being all-round expert in FPGA hardware design, PC software design, and algorithmic/analysis programming. As a result, I gave special trainings on the hardware/software design techniques to staffs

2006 to 2012 – VHDL, FPGA, and DSP trainings and consultations: With strong background in these topics, I provide trainings to staffs on regular basis. Most of the classes include hands-on experiments to supplement the theories. Many of the students later came back for consultations on their work problem relating to the classes

2005 – Design of FPGA for AmbiLight used in Philips television: AmbiLights are columns of tri-color LEDs light placed on all the sides of TV. Its lights up the wall behind TV set. The light enhances the sense of immersion and thus viewing enjoyment. I designed the FPGA which performs all the computation including analyzing the brightness and color on TV screen and correspondingly drive the LEDs. VHDL was used for FPGA design

Major Accomplishments at NTU (Please also refer more sections below)

2002 - Won bronze price in the IHPT 2002 competition (In House Practical Training). Project title – “Application of MATLAB Web Server In E-Teaching/Learning”

2001 - Won bronze price in the category of student Final Year Project (FYP) presentation during the 2001 E3 Technology week - E3 Technology Exhibition. Project title - “C to VHDL Translator)

2001 - Won silver price in the NTU APBF TERP 2001 competition (Technology & Engineering Research Programme). Project title - “FPGA for Medical Image Enhancement”

Major Accomplishments at Siemens Nixdorf

1998 – 1999 – Thermal printer design: design all from stepper motor driver circuit, thermal head driver using CPLD (Complex Programmable Logic Device), and the embedded CPU for communication between POS (Point of Sale) main board and CPLD

1997 – 1999 – Dot matrix printer design: similar to thermal printer above, design all hardware and embedded software

1996 – 1998 - POS (Point of Sale) hardware circuit design: design the CPU-based circuit of the POS and customer LCD display

1993 – 1995 FPGA-based video frame grabber card for PC: part of the team that developed ISA card video frame grabber for used in personal computer. Design FPGA, glue logic, and device drivers. Products was launched in the market

Major Funded Research Projects at NTU

(a) 2001 – 2003

Project Title FPGA Implementation of MELP Encoder and Decoder

Role Principal Investigator

Funding Source AUN-SEED/Net (ASEAN University Network/ Southeast Asia Engineering Education Development Network)

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Project Objectives Develop and implement MELP (Mixed Excitation LPC (Linear Predictive Coding) encoder/decoder in hardware using FPGA (Field Programmable Gate Array). The project demonstrates MELP voice compression in real-time using FPGA hardware

(b) 2004 – 2005

Project Title Design of Add-on Equipment for Handheld Devices to Implement Real-time Hardware-Based Sign Language Interpretation

Role Principal Investigator

Funding Source Centre for Signal Processing (CSP), School of Electrical and Electronic Engineering, NTU

Project Objectives Design an add-on device to be attached to handheld equipment such as Palm and Pocket PC. The device combines camera and FPGA hardware acceleration engine interfaces to the handheld devices using standard SDIO (Secure Digital Input Output) interface. The device implements hand/face detection, hand/face tracking, and sign-to-speech translation in real-time with minimum computation load to the handheld devices

(c) 2004 – 2005

Project Title Space-Time Signal Processing for Active Sonar Array

Role Collaborator

Funding Source Institute of Institute for Infocomm Research(I2R)

Project Objectives To implement multiple sensors, space- time receivers to process RF signal both in time and space, using array antenna. System was setup to study the performance of various algorithms.

Other On-going Academic Research Collaborations

Foetal ECG Separation using Blind Source Separation Methods for Biomedical Signal Processing

Adaptive Median Filter for Image Denoising in MPEG4 video using FPGA Hardware

On-going Works and Personal Interests

FPGA design for capturing/analyzing LVDS signals in LCD panel

2D-to-3D conversion for 3D TVs using FPGA

Algorithms for picture quality enhancement in 3D TV

Algorithm and coding for automatic MPEG noise reduction in TV

Algorithm and coding for automatic backlight dimming in TV

Algorithm and coding for 3D format detection in TV

Audio processing for VirtualBass and Dynamic Range Compression for small speakers in TV

Sigma-Delta signal processing for communication

Blind source separation and adaptive beam-forming

Real-time DSP algorithm using embedded controllers (PICs, TI, Xilinx)

Robotics designs using embedded controllers

Selected Publications

(a) Journal Papers

Saman S. Abeysekera, Charoensak Charayaphan, “Performance Evaluation of a Third-Order LADF Sigma-Delta Modulator via FPGA Implementation, Signal Processing, vol. 87, pp. 162-176, 2007.

Charoensak Charayaphan, Saman S. Abeysekera, ”Efficient Realization of Sigma-Delta Kalman Low-pass Filter in Hardware Using FPGA”, EURASIP Journal on Advanced Signal Processing, 2006.

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Charoensak Charayaphan, Farook Sattar, “Design of Low-Cost FPGA Hardware for Real-time ICA-Based Blind Source Separation Algorithm”, EURASIP Journal on Applied Signal Processing, vol. 18, pp. 3076-3086. 2005.

Charoensak Charayaphan, Saman S. Abeysekera, "Efficient Realization of Sigma-Delta Kalman Low-pass Filter in Hardware using FPGA", EURASIP Journal on Applied Signal Processing, vol. 2 , pp. 1-11, 2005.

Saman S Abeysekera, Yao Xue, and Charoensak Charayaphan, “Design of optimal and narrow-band Laguerre filters for sigma-delta demodulators,” IEEE Trans. Circuits Syst. II, vol. 50, no. 7, pp. 368–375, July 2003.

Abdullah, M. H., A. E. Marble, and C. Charayaphan, “Optimisation of a computer vision system for the interpretation of American Sign Language.” Medical and Biological Engineering and Computing, vol. 31, no. 5, pp. 509-515, 1993.

C. Charayaphan, A. E. Marble, S. T. Nugent, and D. Swingler, "Correlation algorithm and sampling techniques for estimating signal-to-noise ratio of the electrocardiogram," Journal of Biomedical Engineering, vol. 14, pp. 516-520, Nov. 1992.

C. Charayaphan and A. E. Marble, "Image processing system for interpreting motion in American Sign Language," Journal of Biomedical Engineering, vol. 14, no. 5, pp. 419-425, Sept. 1992.

C. Charayaphan, A. E. Marble, S. T. Nugent, and D. Swingler, "Estimation of signal-to-noise ratio of a quasiperiodic cardiovascular signals using coherency and correlation techniques," Medical and Biological Engineering and Computing, pp. 572-579. Nov. 1989.

(b) Book Chapter

Yu Wei and Charoensak Charayaphan, “Non-iterative ICA for detecting motion in image sequences,” in Computational Intelligence for Modelling and Predictions, Eds. Saman H. and Lipo Wang, Springer-Verlag, Book A, Chapter 16, 2004.

(c) Conference Papers

Charayaphan Charoensak and Farook Sattar, "A Single-Chip FPGA Design for Real-Time ICA-Based Blind Source Separation Algorithm", in Proc. IEEE International Symposium on Circuits and Systems, ISCAS 05, May 2005.

Charayaphan Charoensak and Saman S Abeysekera, "System on Chip FPGA Design of an FM Demodulator using a Kalman Band-Pass Sigma-Delta Architecture", in Proc. IEEE International Symposium on Circuits and Systems, ISCAS 05, May 2005.

Yu Wei, Charoensak Charayaphan, “Non-Iterative ICA for Detecting Motion in Image Sequences”, Computational Intelligence for Modelling and Prediction 2005, pp. 209-220.

Charayaphan Charoensak, Farook Sattar, Yu Wei, and Xiong Bing, “Design of FPGA Hardware for a Real-Time Blind Source Separation of Fetal ECG Signals”, in Proc. IEEE International Workshop on BioMedical Circuits & Systems, BioCAS 04, December 2004, pp. S2.4.13-S2.4.16.

Yu Wei, Charayaphan Charoensak, and Xiong Bing, “Multi-Weight Diameter Bisection Method for Ellipse Detection”, in Proc. IEEE International Workshop on BioMedical Circuits & Systems, BioCAS 04, December 2004, pp. S3.3.17-S3.3.20.

Yu Wei, Xiong Bing, and Charayaphan Charoensak, “FPGA Implementation of ADABOOST Algorithm for Detection of Face Biometrics”, in Proc. IEEE International Workshop on BioMedical Circuits & Systems, BioCAS 04, December 2004, pp. S1.6.17-S1.6.20.

Xiong Bing, Yu Wei, and Charayaphan Charoensak, “Face Contour Extraction Using Snake”, in Proc. IEEE International Workshop on BioMedical Circuits & Systems, BioCAS 04, December 2004, pp. S3.2.5-S3.2.8.

Xiong Bing, Yu Wei, and Charayaphan Charoensak, “Automatic Focusing Technique for Face Detection and Face Contour Tracking”, in Proc. IEEE International Workshop on BioMedical Circuits & Systems, BioCAS 04, December 2004, pp. S3.2.9-S3.2.12.

Xiong Bing and Charayaphan Charoensak, “Face contour tracking in video,” in Proc. IEEE Int. Conf. Image Processing, ICIP 04, Oct. 24-27, 2004.

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Charayaphan Charoensak and Saman S. Abeysekera, “FPGA implementation of efficient Kalman band-pass sigma-delta filter for application in FM demodulator,” in Proc. 15

th IEEE Int. Conf. SOCC, SOCC 04,

Sept. 12-15, 2004, pp. 137-138.

Charayaphan Charoensak and Farook Sattar, “Hardware for real-time ICA-based blind source separation,” in Proc. 15

th IEEE Int. Conf. SOCC, SOCC 04, Sept. 12-15, 2004, 139-140.

F. Sattar and Charayaphan Charoensak. “Low-cost design and implementation of an ICA-based blind source separation algorithm,” in Proc. IEEE Int. Conf. Acoustic, Speech and Signal Processing, ICAS 04, May 17-22, 2004.

Yu Wei and Charayaphan Charoensak, “FPGA implementation of non-iterative ICA for detecting motion in image sequences”, in Proc. 7

st Int. Conf. Control, Automation, Robotic and Vision, ICARV 02,

Dec. 2-5, 2002, pp. 1332–1336.

Xiong Bing and Charayaphan Charoensak, “Rapid FPGA prototyping of Gabor-wavelet transform for applications in motion detection”, in Proc. 7

st Int. Conf. Control, Automation, Robotic and Vision,

ICARV 02, Dec. 2-5, 2002, pp. 1653–1657.

Yu Wei and Charayaphan Charoensak, “Non-iterative ICA for detecting motion in image sequences,” in Proc. 1

st Int. Conf. Fuzzy Systems and Knowledge Discovery, ICONIP 02, Nov. 18-22, 2002.

Charayaphan Charoensak and Saman S Abeysekera, “FPGA implementation of Kalman low-pass filter for applications in sigma-delta demodulation,” in Proc. IEEE Workshop on Signal Processing Systems, SIPS 03, Aug. 27-29, 2003, pp. 219-223.

Charayaphan Charoensak, “Rapid FPGA prototyping of fuzzy median filter for removing noise in image”, in Proc. 1

st Int. Conf. Fuzzy Systems and Knowledge Discovery, ICONIP 02, Nov. 18-22, 2002.

Charayaphan, C. and A. E. Marble: "An image processing system for interpreting motion in American Sign Language," in Proc. CIPPRS Conf. Vision Interface 90, May 14-18, 1990, 23-30.

Charayaphan, C.: "An assessment of signal-to-Noise ratio of physiological signals using magnitude coherency spectrum," in Proc. 13

th CMBES Conf., CMBES 87, June 9-12, 1987, pp. 203-204.

Patents Filed

Remote Backlight Dimming (2010):

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.

Application Ref. : PH012196W01

International Application date : 28th January, 2010

International Application Number : PCT/IB2010/050377

Simple 3D Auto Format Detection Technique using Local Histogram Analysis (2014):

Application Ref: 102-480A-00448.ICN

Dynamic Picture and Sound Optimization based on Locations (2014):

Application Ref: 102-480A-00449.ICN

Viewing Distance Sensing by RF RC Transmission Power (2014):

Application Ref: 102-480A-00450.ICN

Techniques for Animating Light using Sound (2014):

TPV Ref: 2014-719.tw

Blind Source Separation for Improving Speech in Soundtracks (2015):

Application Ref: 103-480A-00150.ICN

China Application Number:201510071342.7

Auto Digital Video Range Detection based on Histogram (2015):

TPV Ref: 2015-880.cn

China Application Number:201510336573.6

Smart Local Color Temperature Optimization (2016):

TPV Ref: 2014-798.cn

Application Ref: 103-480A-00158.ICN

China Application Number:201610078631.4