Curriculum Vitae – Samuel Freitas Antao

PersonalInformation

Samuel Freitas AntaoINESC-ID, Room 201Rua Alves Redol, 91000-029 LisbonPortugaltel: +351 964 932 941fax: +351 213 145 843sfan@sips.inesc-id.ptsips.inesc-id.pt/~sfanhttp://pt.linkedin.com/in/samuelfantao

29th October, 2012

I was born in Lisbon, Portugal, in 1985. I graduated from Electrical and ComputerEngineering from the Instituto Superior Tecnico (IST) of the Technical Univer-sity of Lisbon, and obtained my MSc degree from the same University. My MScresearch project was conducted under the supervision of professor Leonel Sousaresulting in the thesis entitled “Portable Embedded Systems: Efficient Units forData Processing and Cryptography”. I am now working towards my PhD as aresearcher at the Signal Processing Group (SiPS) integrated at INESC-ID, in thefields of cryptography, embedded systems and digital electronic design. My re-search interests include computer arithmetic, residue number systems, computerarithmetic and computer architecture.

Education PhD student in Electrical and Computer Engineering (2008-present). De-partment of Electrical and Computer Engineering, Instituto Superior Tecnico,Technical University of Lisbon in collaboration with Laboratoire d’Informatiquede Paris 6, Universite Pierre et Marie Curie. Thesis subject: Embedded Sys-tems, Elliptic Curve Cryptography, Digital Electronic Design, Parallel Processing,Highly Parallel Platforms and Arithmetic/Algorithms. Thesis advisor: Prof. Leo-nel Sousa. Expected completion by December, 2012.

MSc degree in Electrical and Computer Engineering (2006-2008). Depart-ment of Electrical and Computer Engineering, Instituto Superior Tecnico, Techni-cal University of Lisbon. Thesis title: Portable Embedded Systems: Efficient Unitsfor Data Processing and Cryptography. Thesis advisor: Prof. Leonel Sousa. FinalGrade: 18 of 20.

BSc degree in Electrical and Computer Engineering (2003-2007). De-partment of Electrical and Computer Engineering, Instituto Superior Tecnico,Technical University of Lisbon. Final Grade: 17 of 20.

ProfessionalExperience 2007 → present Researcher at Signal Processing Systems Group - INESC-ID,

developing research on several subjects including: cryptography, residuenumber systems, computer arithmetic, parallelization of algorithms, com-

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puter architectures, embedded systems, FPGA design, ASIC design, GPUprogramming, and image processing.

2012 → present System administrator at Quality, Test and Co-Design of HW/SWSystems Group - INESC-ID;

2008 → present Singer (tenor) at the Calouste Gulbenkian Foundation Profes-sional Choir;

2002 → present Management and technical assistant at Casal Freitas winery.Fernando-Po, Palmela, Portugal;

2007 → 2008 High School Student Tutoring, supporting the preparation of highschool students in the field of physics for admission in graduation programs.

Summer 2005 Research Intern at Signal Processing Systems Group - INESC-ID.

Publications

Book chapters

� Antao, S., & Sousa, L. (2012). Reconfigurable Architecture for Cryptographyover Binary Finite Fields. Embedded systems: Hardware Design and Imple-mentations, John Wiley & Sons (to appear).

Refereed Scientific Journals

� Antao S., & Sousa, L. (2012). The CRNS Framework and its Application toProgrammable and Reconfigurable Cryptography. ACM Transactions on Archi-tecture and Code Optimization (to appear). ACM.

� Sousa, L., Antao, S., & Germano, J. (2012). A lab project on the design andimplementation of programmable and configurable embedded systems. IEEETransactions on Education (to appear). IEEE.

� Sousa, L., Antao S., & Chaves R. (2012). On the design of RNS reverse conver-ters for the four-moduli set {2n + 1, 2n − 1, 2n, 2n+1 + 1}. IEEE Transactionson Very Large Scale Integration (VLSI) Systems (to appear). IEEE.

� Sousa, L., & Antao, S. (2012). MRC-based RNS reverse converters for the four-moduli sets {2n + 1, 2n − 1, 2n, 22n+1 − 1} and {2n + 1, 2n − 1, 22n, 22n+1 − 1}.IEEE Transactions on Circuits and Systems II: Express Briefs, 59(4), 244 -248.IEEE.

� Antao, S., Bajard, J.-C., & Sousa, L. (2011). RNS based Elliptic Curve PointMultiplication for Massive Parallel Architectures. The Computer Journal 2011- Oxford Journals, 55(5), 624-647. Oxford University Press.

Refereed Conference Proceedings

� Sousa, L., & Antao, S. (2012). VLSI Reverse Converter for RNS based on theModuli Set {2n +1, 2n−1, 22n+1−3, 22n−2}. Euromicro Symposium on DigitalSystem Design - DSD (to appear). Cesme - Izmir: IEEE;

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� Antao, S., & Sousa, L. (2010). Exploiting SIMD extensions for linear imageprocessing with OpenCL. IEEE International Conference on Computer Design- ICCD (pp. 425-430). Amsterdam: IEEE;

� Antao, S., Bajard, J.-C., & Sousa, L. (2010). Elliptic Curve point multiplica-tion on GPUs. IEEE International Conference on Application-specific SystemsArchitectures and Processors - ASAP (pp. 192-199). Rennes: IEEE;

� Antao, S., Chaves, R., & Sousa, L. (2009). Compact and Flexible MicrocodedElliptic Curve Processor for Reconfigurable Devices. IEEE Symposium on FieldProgrammable Custom Computing Machines - FCCM (pp. 193-200). Napa -CA: IEEE;

� Tulabandhula, T., Antao, S., & Sousa, L. (2009). A Class of Software-HardwareProcessors for Fingerprint Matching on the Fourier Domain. 3rd HiPEACWorkshop on Reconfigurable Computing. Paphos: HiPEAC;

� Antao, S., Chaves, R., & Sousa, L. (2008). Efficient FPGA Elliptic CurveCryptographic Processor over GF (2m). International Conference on Field-Programmable Technology - ICFPT (pp. 357-360). Taipei: IEEE.

Invited Publications

� Antao, S., Chaves, R., & Sousa, L. (2009). AES and ECC Cryptography Proces-sor with Runtime Configuration. International Conference on Advanced Com-puting and Comunications - ADCOM. Bangalore: IEEE.

Thesis

� Antao, S. (2008). Portable Embedded Systems: Efficient Units for Data Pro-cessing and Cryptography. Instituto Superior Tecnico - TU-Lisbon.

Other Publications

� Antao, S., Chaves, R., & Sousa, L. (2009). Efficient Elliptic Curve Crypto-graphy with Collapsed Representation. Advanced Computer Architecture andcompilation for Embedded Systems (pp. 125-128). Terrassa: High PerformanceEmbedded Architecture and Compilation (HiPEAC) Network of Excelence.

Tutorials forEducation � “Optimizing code for given architectures with the SIMD instructions”. Tutorial

for the practical classes of the course of Advanced Computer Architectures ofthe MSc degree in Electrical and Computer Engineering at Instituto SuperiorTecnico - Technical University of Lisbon, 2012.

� “Accelerating Image Processing Algorithms with Microblaze Softcore and Digi-lent S3 FPGA Demonstration Board”. Tutorial for the practical classes of thecourse of Computer Electronics of the MSc degree in Electrical and Compu-ter Engineering at Instituto Superior Tecnico - Technical University of Lisbon,2011.

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� “Microblaze Softcore and Digilent S3 FPGA Demonstration Board”. Tutorial forthe practical classes of the course of Computer Electronics of the MSc degree inElectrical and Computer Engineering at Instituto Superior Tecnico - TechnicalUniversity of Lisbon, 2011.

Referee Experience

Scientific Journals

� TCAS-I: IEEE Transactions on Circuits and Systems I, IEEE;

� TVLSI: IEEE Transactions on Very Large Scale Integration Systems, IEEE;

� TECS: ACM Transactions on Embedded Computing Systems, ACM;

� IET-CDT: IET Computers & Digital Techniques, IET;

� IET-CDS: IET Circuits, Devices & Systems, IET;

� MICPRO: Microprocessors and Microsystems, Elsevier;

� Integration, the VLSI Journal, Elsevier.

Conference Proceedings

� MSEPT: International Conference on Multicore Software Engineering, Perfor-mance, and Tools - 2012;

� ARITH: IEEE Symposium on Computer Arithmetic - 2011;

� CF: ACM International Conference on Computing Frontiers - 2011;

� PDPS: International Conference on Parallel and Distributed Computing andSystems - 2011;

� ARCS: Architecture of Computing Systems - 2010, 2012;

� DSD: Euromicro Conference on Digital System Design - 2010, 2011, 2012;

� ICCD: IEEE International Conference on Computer Design - 2010, 2011;

� IPDPS: IEEE International Parallel & Distributed Processing Symposium -2010, 2012;

� ISCA: ACM/IEEE International Symposium on Computer Architecture - 2010;

� ISPDC: International Symposium on Parallel and Distributed Computing -2010;

� RAW: Reconfigurable Architectures Workshop - 2010;

� SDR/WInnComm: Software Defined Radio Forum / Wireless Innovation Forum- 2010;

� VLSI-SoC: IFIP/IEEE International Conference on Very Large Scale Integration- 2010;

� EUSIPCO: European Signal Processing Conference - 2009;

� SAMOS: International Conference on Embedded Computer Systems: Architec-tures, Modeling and Simulation - 2009, 2010, 2011;

� SiPS: IEEE Workshop on Signal Processing Systems - 2009;

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� PDCAT: International Conference on Parallel and Distributed Computing, Ap-plications and Technologies - 2008;

� ReConfig: International Conference on ReConFigurable Computing and FPGAs- 2008.

Projects andScholarships 2008 → 2012 PhD Student Scholarship by the Portuguese Foundation for Sci-

ence and Technology (FCT) for the realization of the PhD thesis at InstitutoSuperior Tecnico - TU Lisbon.

2009 → 2010 Systems for Cryptography based on Modular Arithmetic (SCry-BAM) project in the scope of the PHC PESSOA program between Portugaland France. This project aimed the development of collaborative work withthe teams ARITH at the Laboratoire d’informatique de Robotique et deMicroelectronique de Montpelier (LIRMM) and Performance and Quality ofNumerical Algorithms (PeQuAN) at Laboratoire d’Informatique de Paris 6- Universite Pierre et Marie Curie. The project allowed close collaborationwith Prof. Jean-Claude Bajard, Prof. Laurent-Stephane Dider and Prof.Thibault Hilaire in the field of modular arithmetic and residue number sys-tems.

2007 → 2008 Scholarship for Introduction to the Scientific Research by the Por-tuguese Foundation for Science and Technology (FCT) for the developmentof prototypes to accelerate elliptic curve cryptography at INESC-ID.

Honors and Awards� HiPEAC Paper Award for the paper entitled “Compact and Flexible Microcoded

Elliptic Curve Processor for Reconfigurable Devices”, by Samuel Antao, RicardoChaves and Leonel Sousa, presented at the IEEE Symposium on Field Pro-grammable Custom Computing Machines - FCCM, March 2009. Awarded by:European Network of Excellence on High Performance and Embedded Architec-ture and Compilation (HiPEAC);

� Prize Professor Luıs Vidigal 2007/2008, for the best quality and innovative MScThesis in the field of Electrical and Computer Engineering, and Computer Sci-ence between any of the courses lectured at Instituto Superior Tecnico - TU-Lisbon. Awarded by: Electrical and Computer Engineering Department - Ins-tituto Superior Tecnico - TU-Lisbon, INESC-ID;

� Merit Diploma for the 3rd best scholar performance for the 1st year of the MScdegree in Electrical and Computer Engineering. Awarded by: Electrical andComputer Engineering Department - Instituto Superior Tecnico - TU-Lisbon;

� Best Project of Mobile Computing 2006/2007 (Spring semester) Award, with thework entitled: “Intrusion Detection based on a Sensor Network”. Awarded by:Electrical and Computer Engineering Department - Instituto Superior Tecnico- TU-Lisbon, UbiSec&Sens, INOV.

Talks� “Elliptic Curve Point Multiplication on GPUs”, Laboratoire d’Informatique de

Paris 6 - Universite Pierre et Marie Curie, July, 2010, Paris, France.

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Training Initiatives� Attendee at the 5th International Summer School on Advanced Computer Ar-

chitecture and Compilation for Embedded Systems, Terrassa, Spain, July, 2009.Organized by: European Network of Excellence on High Performance and Em-bedded Architecture and Compilation (HiPEAC).

Tool skills

Operating Systems

� Windows;

� Linux (OpenSuse, Ubuntu, CentOS) and other Unix based systems, includingMac OS X;

� TinyOS 2.0 (applied to sensor network motes).

Programming, Hardware Description and Scripting languages

� C, C++: development of programs for verification, compilers, simulators, em-bedded processors programming (e.g. Xilinx MicroBlaze, Microchip PIC Micro-controllers, Atmel Microcontrollers);

� NesC: development of programs to control the motes in sensor network;

� Assembly: optimization of programs for several platforms, including x86 CPUsand several embedded processors (e.g. Xilinx MicroBlaze, Microchip PIC Mi-crocontrollers);

� Intel SIMD intrinsics: optimization of programs exploiting the CPU SIMD ca-pabilities;

� VHDL, Verilog: description of FPGA and ASIC accelerators for several appli-cations, including general purpose processing and cryptography;

� bash, DOS batch, Perl: automation of design procedures, setup and adminis-tration of an Apache Subversion server;

� MATLAB: simulation and results analysis using different toolboxes (e.g. Simu-link, Statistics toolbox);

� CUDA: GPU general purpose programming for NVIDIA GPUs, parallelizationof algorithms;

� OpenCL: parallel programming targeting NVIDIA and ATI GPUs, AMD andIntel CPUs, employing the OpenCL implementation by NVIDIA, Apple, andAMD (AMD Accelerated Parallel Processing).

Hardware Development and Verification

� Modelsim (Mentor Graphics, Inc.): verification and evaluation of digital hard-ware implementations;

� Synplify (Synopsys Inc.): synthesis for FPGA platforms;

� Design Vision (Synopsys Inc.): synthesis for ASIC standard cell based imple-mentations;

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� RTL Compiler (Cadence Design Systems, Inc.): synthesis for ASIC standardcell based implementations;

� Encounter (Cadence Design Systems, Inc.): digital ASIC design, cell placementand routing;

� Xilinx FPGA design tools: synthesis, place and routing, evaluation (ISE tools),MicroBlaze and Power PC embedded processors integration (Xilinx PlatformStudio);

� Altera FPGA design tools: synthesis, place and routing, evaluation (QuartusIItools), IP cores development and management (Qsys, SOPC Builder).

Other Software Tools and Libraries

� Microsoft Visual Studio .NET: managing and development of software projects;

� GNU Multiple Precision Arithmetic Library (GMP): software implementationof arithmetic for big integers in the development of compilers and verificationprograms;

� Crypto++: software implementation of protocols based requiring cryptographicroutines and verification programs;

� Multiprecision Integer and Rational Arithmetic C/C++ Library (MIRACL):implementation of finite field arithmetic, both for prime and binary extensionfields;

� Flex, The Fast Lexical Analyzer: implementation of the scanner procedures forcompilers;

� Bison, GNU parser generator: implementation of the parser procedures for com-pilers;

� LLVM Compiler Infrastructure : implementation of an high-level synthesis andparallel programming framework;

� Latex2ε: writing and production of documents;

� Apache2: setup and management of Linux based Web and Subversion servers.

Other activities2006 → present Member at the early music ensemble “Camerata da Cotovia”

as tenor voice, and Baroque and Renaissance flute (traverso) player;

2007 Participant in the movie “Esboco para um Filme” (Sketch for a Movie)directed by Pedro Sabino: dubbing on an original movie recorded in thePortuguese Colonial War years;

1998 → 2005 Flute, Musical Sight-Reading, and Ensemble Music Course. Adri-ana de Vecchi Music School, Music School of the National Conservatory ofLisbon, Portugal;

Language skills Portuguese: Native; English: Fluent; French: Basic; Spanish: Conversatio-nal.

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