CS35101Computer

ArchitectureSpring 2006

Week 1

Slides adapted from:

Mary Jane Irwin (www.cse.psu.edu/~mji)

Course url: www.cs.psu.edu/~cg331

[Adapted from Dave Patterson’s UCB CS152 slides]

Course Administration Instructor: Paul J Durand

durand@cs.kent.eduhttp://www.cs.kent.edu/~durand

Labs: Accounts on loki or neptune

Texts: Computer Organization and Design: The Hardware/Software Interface,

Third Edition, Patterson and Hennessy

Course Goals and Structure

Introduction to the major components of a computer system, how they function together in executing a program, how they are designed.

MIPS assembler programming using the spim system

spim Assembler and Simulator

spim is a self-contained assembler and simulator for the MIPS R2000/R3000

It provides a simple assembler, debugger and a simple set of operating system services

It implements both a simple, terminal-style interface and a visual windowing interface

Available as xspim on unix

- installed on the CS unix machines loki, hermes, neptune, poseidon

PCSpim on Windows- can be downloaded and installed on your own PC from

www.cs.wisc.edu/~larus/SPIM/pcspim.exe

Sorry, there is no Macintosh version of spim

Head’s Up This week’s material

Course introduction- Reading assignment – PH 1.1 through 1.3 and A.9 through A.10

(on cd)

Reminders Make sure your unix account is operational; change your

password to something you can remember and that is secure (must be six to eight alphanumeric characters)

Check out the course homepage (www.cs.kent.edu/~durand)

Next week’s material Introduction to MIPS assembler

- Reading assignment - PH 2.1 through 2.7, omit 2.6

What You Should Already Know How to write, compile and run programs in a higher

level language (C, C++, Java, …)

How to create, organize, and edit files and run programs on Unix

How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.)

Logic design How to design combinational components (Boolean algebra,

logic minimization, decoders and multiplexors)

Below the Program High-level language program (in C)

swap (int v[], int k)(int temp;

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

)

Assembly language program (for MIPS)swap: sll $2, $5, 2

add $2, $4,$2lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31

Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000

. . .

C compiler

assembler

Advantages of Higher-Level Languages

Higher-level languages

As a result, very little programming is done today at the assembler level

Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, …)

Improve programmer productivity – more understandable code that is easier to debug and validate

Improve program maintainability Allow programmers to be independent of the computer on

which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine)

Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine

Machine Organization

Capabilities and performance characteristics of the principal Functional Units (FUs)

e.g., register file, ALU, multiplexors, memories, ...

The ways those FUs are interconnected

e.g., buses

Logic and means by which information flow between FUs is controlled

The machine’s Instruction Set Architecture (ISA)

Register Transfer Level (RTL) machine description

Major Components of a Computer

Processor

Control

Datapath

Memory

Devices

Input

Output

Impacts of Advancing Technology

Processor logic capacity: increases about 30% per year performance: 2x every 1.5 years

Memory DRAM capacity:4x every 3 years memory speed: 1.5x every 10 years cost per bit: decreases about 25% per year

Disk capacity: increases about 60% per year

Example: Growth in DRAM Chip Capacity

64

256

1,000

4,000

16,000

64,000

256,000

10

100

1000

10000

100000

1000000

1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000

Year of introduction

Kb

it c

apac

ity

Below the Program

C compiler

assembler

one-to-many

one-to-one

High-level language program (in C) swap (int v[], int k) . . . Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31

Machine (object) code (for MIPS) 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000

Input Device Inputs Object Code

Processor

Control

Datapath

Memory

Devices

Input

Output

000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 100011 00010 01111 0000000000000000 100011 00010 10000 0000000000000100 101011 00010 10000 0000000000000000 101011 00010 01111 0000000000000100 000000 11111 00000 0000000000001000

Object Code Stored in Memory

Processor

Control

Datapath

MemoryDevices

Input

Output

000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000

Processor Fetches an Instruction

Processor

Control

Datapath

MemoryDevices

Input

Output

000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000

Processor fetches an instruction from memory

Where does it fetch from?

Control Decodes the Instruction

Processor

Control

Datapath

Memory

Devices

Input

Output

000000 00100 00010 0001000000100000

Control decodes the instruction to determine what to execute

Datapath Executes the Instruction

Processor

Control

Datapath

Memory

Devices

Input

Outputcontents Reg #4 ADD contents Reg #2results put in Reg #2

Datapath executes the instruction as directed by control

000000 00100 00010 0001000000100000

Processor Organization

Control needs to have the Ability to input instructions from memory

Logic and means to control instruction sequencing

Logic and means to issue signals that control the way information flows between datapath components

Logic and means to control what operations the datapath’s functional units perform

Datapath needs to have the Components - functional units (e.g., adder) and storage

locations (e.g., register file) - needed to execute instructions

Components interconnected so that the instructions can be accomplished

Ability to load data from and store data to memory

Where does it load and store from and to?

What Happens Next?

Processor

Control

Datapath

MemoryDevices

Input

Output

000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000

Fetch

DecodeExec

Output Data Stored in Memory

Processor

Control

Datapath

MemoryDevices

Input

Output000001000101000000000000000000000000000001001111000000000000010000000011111000000000000000001000

At program completion the data to be output resides in memory

Output Device Outputs Data

Processor

Control

Datapath

Memory

Devices

Input

Output

000001000101000000000000000000000000000001001111000000000000010000000011111000000000000000001000

The Instruction Set Architecture

instruction set architecture

software

hardware

The interface description separating the software and hardware.

Stopped here 1/19

MIPS R3000 Instruction Set Architecture

Instruction Categories Load/Store Computational Jump and Branch Floating Point

- coprocessor

Memory Management Special

R0 - R31

PCHI

LO

OP

OP

OP

rs rt rd sa funct

rs rt immediate

jump target

3 Instruction Formats: all 32 bits wide

Registers

Q: How many already familiar with MIPS ISA?