Crystalline Si Photovoltaics -...
Transcript of Crystalline Si Photovoltaics -...
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Crystalline Si Photovoltaics
Arthur Weeber
![Page 2: Crystalline Si Photovoltaics - mikro.elfak.ni.ac.rsmikro.elfak.ni.ac.rs/wp-content/uploads/08_Crystaline-Si.pdf · Crystalline Si Photovoltaics Arthur Weeber. 2 Outline • Short](https://reader033.fdocuments.in/reader033/viewer/2022053006/5f09a0ec7e708231d427bf60/html5/thumbnails/2.jpg)
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Outline
• Short introduction ECN• Introduction ECN Solar Energy• General Si solar cells• Crystalline Si Photovoltaics
- Feedstock- Wafering- Cell processing- Module technology- Costs and environmental
• Summary
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Petten: ECN; NRG; JRC; TYCO
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Targets ECN research
Transition to renewable energy supply:
efficiency improvement
development of renewable energy
clean use of fossil fuels
maximum reliabilityminimum environmental burden
optimal cost effectiveness
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ECN Programme units
Strategically Policy Studies
Energy savings Energy Efficiency in IndustryRenewable Energy in the Built Environment
Renewable energy Solar EnergyWind EnergyBiomass, Coal & Environmental research
Clean use fossil fuels Hydrogen & Clean fossil fuels
Support Engineering & Services
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Fuel Cell Technology
19%
Clean Use of Fossil Fuels
16%
RE in the Built Environment
8%
Wind Energy12%
Solar Energy15%
Energy Eff. in the Industry
7%
Policy Studies 11%
Biomass13%
Turnover share per unit (2005)
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ECN Solar Energy
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Solar Energy
• Silicon Photovoltaics• Thin-Film Photovoltaics• PV Module Technology
Objective:• Price of solar electricity in 2015 the same as consumer
electricity price, and after that even lower- High efficiency- Reduction of material use- Cost effective and environmental friendly processes and
products- Long lifetime of the modules
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PV technology development:no revolution, but evolution
0 5 10 15 20 25module efficiency (%)
mod
ule
pric
e (€
/Wp)
1
2
3
4
0
c-Sitf-Si
& CIGSS
new concepts
2004
2010
2020
>2030
OSC
technology families technology generations
(free afterW. Hoffmann)
tf-Si = thin-film silicon
CIGSS = copper-indium/gallium-selenium/sulfur
c-Si = wafer-typecrystalline silicon
OSC = organic solar cells
new concepts = advanced versions ofexisting technologies & new conversion principles
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ECN Solar EnergyThin-film photovoltaics
• Sensitised oxides – efficiency, stability, manufacturing technology– solid state version: in 2015 η=8% for 10x10 cm2
device with >10 year outdoor stability
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ECN Solar Energy
Thin-film photovoltaics• Organic solar cells
– device fabrication, efficiency and stability– in 2015 η=8% for 10x10 cm2 device
with >10 year outdoor stability
0.5
1.0
1.5
2.0
Effic
ienc
y (%
)
Year
400 600 8000
25
50
wavelength (nm)
EQ
E (%
)
2002 2003 2004 2005
Collaboration of ECN, TNO
S
S OR
MeOn R2R2 NC
CN1
OC10H21
H3CO
+
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ECN Solar Energy
Thin-film photovoltaics• Thin-film silicon
– R-2-R deposition of (n,i,p) silicon on foils– Development of thin-film Si tandems– In 2015 a 0.3x1 m2 PV module η=12% at 0.8€/Wp
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New concepts•improved spectrum utilization•flat plate concentrator
ECN Solar Energy1
a2
1
Fr
Ri
Re
AM1.5
2
1
a2
1
Fr
Ri
Re
AM1.5
2
wavelength [nm]
1.6
1.2
0.8
0.4
400 800 1200 1600 2000 24000.0
available for conversion in crystalline Si
infraredvisibleUVsolar spectrum (Air Mass 1.5; 1000 W/m2)
pow
er [W
/(m2 .n
m)]
1100 nm ∼1.1 eV = Si bandgap
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ECN Solar Energy
PV systems • grid interaction• system design & monitoring• standards and guidelines
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Crystalline Si PV technology
Objective:• Price of solar electricity in 2015 the same as consumer
electricity price, and after that even lower- High efficiency- 18% module efficiency for crystalline Si PV
- Reduction of material usage- Thin wafers (<150 µm compared to current >240 µm)
- Cost effective and environmental friendly processes and products
- Long lifetime of the modules (>30 yr for crystalline Si)
- Energy Pay Back Time < 1 yr
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Cell structure Crystalline silicon solar cell (minority carrier device)
• Base: B doped Si (p-type)• Emitter: P doped layer (n-type)
- Recombination losses in base and emitter- Voltage over pn junction
• Metallization for contacts- Shading losses- Resistance losses
• Antireflection coating to enhance current
• Surfaces: recombination losses
+-+
-
-
+
base
emitter
ARC
ohmic contact external load
back ohmic contact/ BSF
collection
recombination
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Cell structure Crystalline silicon solar cell
• Base: B doped Si (p-type)• Emitter: P doped layer (n-type)- Voltage over pn junction- Recombination losses
• BSF: p+ doped layer- Highly doped- Reduced
recombination
photon Back Surface Field
recombination
collection
EF
EC
EV junctionp-type p+-typen-type
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Cell structure Losses in crystalline silicon solar cell
• Colour mismatch• Fundamental recombination
• Additional recombination- Impurities, defects, surfaces
• Shading• Reflection, absorption and transmission
- Absorption at the rear• Resistance• Non-ideal band gap
Crystalline Si solar cell: η=13-20%
Eband
generation
recombination
hν
η≤30%
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Cell characterization
• Current Voltage (IV curve)- Open circuit voltage Voc
- Short circuit current Jsc
- Efficiency- Resistance losses
-10
0
10
20
30
-0.4 -0.2 0 0.2 0.4 0.6 0.8Voltage (V)
J (m
A/c
m2)
Rserie
Rshunt
standard
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Cell characterization
• Internal Quantum Efficiency IQE- IQE=collected carriers / absorbed photons- Depth profile cell quality
0
20
40
60
80
100
300 500 700 900 1100
wavelength (nm)
IQE
(%)
Front side / emitter
Bulk /rear side
Rear side reflection
cell
light
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Crystalline Si PV technology
• Feedstock- Effect impurities on cell output
• Wafers- Monocrystalline Si- Multicrystalline Si
• Cell technology- High efficiency with industrial in-line processing
• Module Technology- Module design integrated with cell concept- Simple interconnection and encapsulation
• Costs and environmental aspects
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Crystalline Si PV technology
• Feedstock- Effect impurities on cell output
• Wafers- Monocrystalline Si- Multicrystalline Si
• Cell technology- High efficiency with industrial in-line processing
• Module Technology- Module design integrated with cell concept- Simple interconnection and encapsulation
• Costs and environmental aspects
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Feedstock production
quartz, carbon mg-Si
solar grade Sisemiconductor
industry
semi-prime4500 ton/y
eg-Si
existing; 900.000 ton/y
under development, virtually unlim
ited
unde
r dev
elop
men
t, vir
tual
ly u
nlim
ited
existing; 26.000 ton/y
under development high cost
demand13.000 ton (2004)~200.000 ton (2020)
off-grade2000 ton/y
refining (silanes)
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Feedstock production
• Direct route: SOLSILC process
• plasma furnace: SiC from pure SiO2 and pure Cpellets of SiC and SiO2 Si(L)
SiCSiO2
SiO+SiCSi+SiO2
CO
2Si+CO2SiO
Si(liq)
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Feedstock: ingot growth
• Multicrystalline Siingot growth
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Feedstock: effect impurities
segregation
contamination from crucible
dissolution evaporation from melt
Decreasing:[Oi]
Increasing:dopant conc. metal conc.[Cs]
small grain bottom
• Feedstock- Melting- Crystallization
• Ingot- Sawing
• Wafer
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Feedstock: effect impurities
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01Fe
Al(tentative)
Ti
ppmw
waferingotfeedstock
85%
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Feedstock: effect impurities
Impurities added to feedstock
0
5
10
15
20
25
30
35
0 20 40 60 80 100position in ingot (%)
J sc (
mA
/cm
2 )
clean reference ingot10 ppmw Ti and high O10 ppmw Ti and high Fe, C
Effect Ti and O on cell output clearly visible
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Feedstock: effect impurities
Impurities added to feedstock• Ingot growth• Wafering• Cell processing• Characterization• Model development
- 1/Leff2∝1/τ ∝Cimp
- Segregationduring growth
- Solar cell modeling
• Needed to defineSolar Grade Si
1 10 1000.7
0.8
0.9
1.0
cell
effic
ienc
y (%
rel)
rela
tive
to h
igh-
purit
y fe
edst
ock
impurity concentration (a.u.)
14.5% cell techn. 17% cell techn.
our results:5 ppmw Al or10 ppmw Ti
reduction
Higher efficiency
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Wafer technologies
liquid Silicon
planar liquid /solid interface
columnarcrystallised silicon
Inductive heating
inductive heating liquidsilicon
liquid / solidinterface
columnarcrystallised silicon
heating
heat sink
liquid / solidinterface
columnarcrystallisedsilicon
liquidsilicon (octagon)
liquid silicon
solid/liquidinterface plane
casting frame
Si foil
pulling speed speed ofsolid/liquidinterface plane
casting speed
Si foil
Vk
VZ
casting frame
Substrateliquid silicon solid/liquidInterface plane
Pulling of Single Crystals(Czochralski)
Casting of Silicon Blocks Bridgman Solidification
Heat Exchange Method Edge defined Film fed Growth Ribbon Growth on Substrate
heating
crucible liquid silicon
single crystal
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Wafer technologies
• Multicrystalline Siingot growth
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Wafer technologies
• From ingot tomc-Si wafer
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Wafer technologies
• High quality monocrystalline Si material- Low impurity concentration- Low defect concentration- Higher efficiency (15-17% in industry, 20% pilot)- Higher costs per cell
• Lower quality multicrystalline Si material (mc-Si)- Higher impurity concentration- More defects- Lower efficiency (13-15% in industry, >16% pilot)- Lower costs per cell
• For both technologies: high sawing losses (about 50%!)
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Wafer technologies
Edge defined Film-fed Growth(SCHOTT Solar)
String Ribbon
• Ribbon technologies(multicrystalline Si)
• Substrate growing andcrystallization in the samedirection
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Wafer technologies
• ECN’s ribbon technologyRibbon Growth on SubstrateRGS
• Substrate growingperpendicular tocrystallization
Finished foils
AnnealingGassingCasting frame (cut)
Continuous substrate Preheating
Direction
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Wafer technologies
Ribbons:• Better use of Si material (about factor 2)But• Lower initial material quality• Lower efficiencies
• EFG/SR: about 14% (industry)• RGS: about 13% (lab)- Very high throughput
Material PullSpeed
[cm/min]
Through-put
[cm2/min]
Furnacesper 100
MWEFG 1.7 165 100SR 1-2 5-16 1175RGS 600 7500 2-3
*[J. Kalejs, E-MRS 2001 Strasbourg]
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Wafer Technology
RGS cell efficiencies using industrial process• Average efficiency 12.5%.• Current top efficiency 13%confirmed
• High efficiency lab processing 14.4%confirmed
• ~100 µm thin RGS wafer made• Efficiency around 11%• 2.9 g Si/Wp (nowadays ~10 g Si/Wp)
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Cell processing
• Saw damage removal- Texturing for enhanced light coupling
(better efficiencies)• Emitter diffusion- Material improvement by gettering
• SiNx deposition as antireflection layer- Material improvement by passivation- Reduced surface recombination
(surface passivation)• Metallization- Ag front side- Al rear side (so-called Back Surface Field)
• Sintering for contact formation
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Cell processingBatch processing• Wafers in carriers• Each process step well controlled• Used for high efficiency processing
etching junction ARC contacts
unloadload
transport
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Cell processing
ECN’s inline processingHorizontal wafer transport on belts (wafer in; cell out)
• No wafer carriers• Large and thin wafers easier to handle (cost reduction)
etching junction ARC contacts
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Cell processing
Examples from industryBatch processing BP Solar
In-line processing SCHOTT Solar
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Cell processing
ECN Baseline process• Multicrystalline p-type Si• Acidic texturing / saw damage removal• P diffusion using belt furnace• Deposition of SiNx• Metallization (Ag front, full Al rear)• Simultaneous sintering both contacts
ResultsProcessing complete columns of wafersduring two years
• Average 16%• In industry about 15%
Wet chemical etching
Sintering contacts
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TexturingAcidic texturing of mc-Si
Alkaline and acidic etch
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TexturingAcidic texturing of mc-Si
cooler
inlet
etch bath
rinse
rinsedestaining
drying
outlet
exhaustsexhaustsHNO3 dripHNO3 drip
controllerbelt speedcontrollerbelt speed
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TexturingAcidic texturing of mc-Si
• Lower reflection, higher efficiency- About 0.5% absolute
• Better appearance
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TexturingSurface structure texturing Si
• Monocrystalline Si- Alkaline etching (NaOH or KOH)- Anisotropic etching
- (111) planes slowest etching rate- Pyramids on (100) substrates
• Multicrystalline Si- HF/HNO3 etching- Isotropic etching
- Random structure
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Texturing Micro structureAlkaline etching of Si
Si + OH– + H2O SiO32– + H2 gas
• Higher concentrations and higher T- Almost isotropic etching- High etching rate- Used to remove saw damage (5-10 µm)- High reflectance (~30%)
Full size wafer
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TexturingAlkaline etching of Si
• Lower concentrations and lower T- Anisotropic etching
- (111) planes slowest etching rate- Pyramids as texture on (100) substrates- Low reflectance (~10%)
- But, low etching rate
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TexturingAcidic etching of Si
Mixture HF/HNO3
Oxidation3 Si + 4 HNO3 3 SiO2 + 4 NO gas + 2 H2O
Oxide removalSiO2 + 4 HF SiF4 gas + 2 H2O
• Obtained surface morphology depends oncomposition- Polishing- Defect etching- Texturing
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Emitter processingNeeded to form p-n junction• Apply P source• Diffusion at ~900 C for about 10 minutes
• Depth about 0.5 µm• P concentration at surface: > 2×1020 cm-3
- Higher concentration neededfor good contacting
- However, it will result in additionalrecombination losses
Improved emitter/front side processing can give an efficiency gain of more than 0.5% absolute
15.0
15.5
16.0
16.5
1.00E+02 1.00E+03 1.00E+04 1.00E+05 1.00E+06 1.00E+07
emitter losses
effic
ienc
y (%
)
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Emitter processingEffect dopant concentration on IQE• Improved blue response (up to 550 nm) for lower dopant
concentration• Higher Voc and higher Jsc: higher efficiency!
1E+18
1E+19
1E+20
1E+21
0 0.1 0.2 0.3 0.4depth in silicon [um]
atom
ic d
ensi
ty [c
m-3
]
barrierno barrier
0.4
0.6
0.8
1.0
350 400 450 500 550wavelength [nm]
IQE
20%15%10%5%0%
no barrier
Thicker diffusion barrier
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Emitter processingAdditional effect of emitter processing
• So-called gettering- Diffusion of impurities to P rich layers (P-gettering)- Impurities will not affect efficiency in those P rich layers
• Improved bulk quality and, thus, higher efficiency
impurity
diffusion
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SiNx depositionApplied using chemical vapour deposition• Low pressure chemical vapour deposition (only surface
passivation, ~700 C)• Plasma enhanced chemical vapour deposition
(different systems, ~400 C, 0.5-10 nm/s)• Sputtering (several nm/s)
Functions SiNx:H layer• Antireflection coating (70-80 nm)• Surface passivation (reduced recombination at the surface)• Bulk passivation (improved material quality)
- During anneal H diffuses into bulk and makes defects/impurities electrically inactive
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SiNx depositionPlasma Enhanced Chemical Vapour Deposition (PECVD)• Parallel plate system
Direct plasma- Wafers as electrodes- Ion bombardment dependent
on plasma frequency- Damaged layer
• Remote PECVD- No ion bombardment
Aberle et al.
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substrates
SiH4
NH3 or N2
MW plasma
SiNx depositionECN MicroWave Remote PECVD• Deposition rate about 1 nm/s
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SiNx depositionExpanding Thermal Plasma (ETP)• Developed by TU/e• Deposition rate 5-10 nm/s• TU Delft: for thin film Si depositions
} cascade plates (4x)
anode plate
nozzle with NH3 injection
electrode
argon gas inlet
isolating plates
SiH4 injection ring
Ar/NH3 plasma expansion
Plasmabron
Expansie plasma
Substraat
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SiNx depositionOptical specifications SiNx:H layer• Refractive index: n=2.1
higher n causes absorption at lower wavelength
• Ideal for air-Si: n=1.9; d=~80 nm• Ideal for air-glass-Si: n=2.3; d=~65 nm
(absorption SiNx too high)
• n can be tuned with gas composition• Higher n: more Si (SiH4)• Lower n: more N (NH3)
201 nnn =1
01 4 n
dλ
=
Air: n0
Si: n2
SiNx: n1; d1
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SiNx depositionOptical specifications SiNx:H layer• Different layer thickness: different colour
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Gettering and bulk passivation (emitter and SiNx:H)Improved bulk quality using gettering and passivation• Lifetime>100 µs will hardly affect cell efficiency (diffusion length 2
times cell thickness)• Besides higher efficiency, gettering and passivation will result in a
narrower efficiency distribution.
0
20
40
60
80
100
120
0 20 40 60 80 100position ingot (%)
lifet
ime
( µs)
initial
emitter and H passivation (SiNx:H)
emitter and double sided H passivation
12
13
14
15
16
17
18
1 10 100lifetime (µs)
effic
ienc
y (%
)1000
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MetallizationScreen-printing process and sintering in belt furnace
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MetallizationPrinciple screen-printing process• Metallization paste is ‘pressed’ through pattern in screen• Paste contains metal particles and oxides (etches Si at higher T)
Metallization line
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MetallizationAg front side metallization• Fine line metallization printed through patterned screen
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MetallizationFine line printing• Reduced shading losses• Contact resistance might be critical
emulsion line opening (∼100µm) fine line slumpingwire gauze
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Metallization• Other techniques:
• Plating (electroless)
• Dispensing
• Pad printing
• Roller printing
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MetallizationAl rear side (Back Surface Field to reduce recombination at surface)• After sintering step (around 800 C, few seconds) highly doped layer• Better BSF when thicker and higher doped
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Efficiency ECN process
Results ECN Baseline processProcessing two complete columns (different ingots) of wafers during 2 years
• Average 16.0%• In industry about 15%
14.0
14.5
15.0
15.5
16.0
16.5
17.0
0 100 200 300 400position in ingot
effic
ienc
y (%
)
column 2004/5column 2005/6 Wafer size: 125x125 mm2
Thickness: ~300 µm
Material: p-type mc-Si
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Efficiency ECN process• High-efficiency (17%) in-line process (300 µm thick; 156 cm2 mc-Si)
- 50 cells processed (best efficiency 17.1%; average 16.8%)- Module made using cover glass with ARC
Full area efficiency 14.8%; encapsulated cell eff: 16.8%
0
2
4
6
8
10
12
=<16
.5
16.5
16.6
16.7
16.8
16.9
17.0
>17.0
efficiency class
coun
t
VOC=22.2 V; ISC=5.76A; FF=0.738; P=94.3 Wp
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Efficiency ECN process• From 2000 up to now
12.5
13.7
14.9
16
17
12
14
16
18
initi
al (<
2000
)
lifet
ime
BS
F
front
sid
epa
ssiv
atio
nan
d em
itter
light
man
agem
ent
Effic
ienc
y (%
) ECN 2005
0
20
40
60
80
100
300 500 700 900 1100wavelength (nm)
IQE
(%)
front side and emitter
bulk and rear side
rear side reflection
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Future improvementsThin wafers• Rear side critical
Minority carrierdensity
• Combination ofgeneration andrecombination
17.0%: good bulk and rear15.9%: good bulk, low rear15.7%: low bulk, good rear15.3%: low bulk and rear14.3%: as 15.9%, but thin 0.0E+00
2.0E+13
4.0E+13
6.0E+13
8.0E+13
1.0E+14
1.2E+14
0 50 100 150 200 250 300Distance from front (µm)
dens
ity (c
m-3
)
15.7%15.3%15.9%17.0%14.3%Good bulk quality
Low bulk qualityGood rear side
li
Low rear side Thin cell
Front Rear
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Future improvementAl rear side (Back Surface Field to reduce recombination at surface)• 17% reached on 300 µm thick wafersHowever:• Bowing for thinner wafers• Recombination losses too high for high efficiencies (>18%)• Internal reflection too low (~70%) for high efficiencies
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Future improvements rear sideThin wafers• Rear side critical (bowing, reflection, BSF)• New rear side processing using for example SiNx
- Higher efficiencies for thinner wafers
SiNx for rear side passivationLocal rear contacts / BSF
15.0
15.5
16.0
16.5
17.0
0 100 200 300cell thickness (µm)
effic
ency
(%)
current rear sidefuture rear side
modelling
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Future improvements rear sideThin wafers• New rear side processing using SiNx
- 16.4% obtained by ECN with baseline-like processing- About 1% absolute higher than reference with Al BSF
(obtained efficiency depends on Si material quality)
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Future improvementsThin wafers (less dependent on material quality)• Improved light management
- Texturing- Light trapping
• Improved emitter (reduce losses)• Perfect surface passivation
- Both surfaces• Less metallization losses
- Series resistance (contact and line resistance)- Reduced shading losses
20% mc-Si cell efficiency should be possible! (long term)
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Other industrial cell conceptsLaser Grooved Buried ContactsBP Solar• Monocrystalline
Rear side contacted cellSunPower• ~20%!• High quality
and expensivematerial
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Other industrial cell conceptsSunPower• Cell 21.8%• n-type material• Module: full area 18.1%
Sanyo• HIT cell: 21.8%• n-type material• Emitter deposited
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Record efficienciesMonocrystalline (4 cm2): 24.7%Monocrystalline (149 cm2): 21.5%Multicrystalline (1 cm2): 20.3%Multicrystalline (137 cm2): 18.1%
ECN multi (156 cm2): 17.0%Single layer ARC; homogeneous emitter; inline processing
Highest efficiency with completely inline processing
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Module technologyConventional module technology (soldering)
Glass
EVA
Solar cells
EVA
Tedlar foil
Series connection
Interconnection strips (tabs)
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Module technologyConventional module technology
interconnection lamination
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Module technology
Pilot-line tabber-stringer for interconnection
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Module technologyPilot line to be built at ECN
Fully automated and realibility-tested interconnection process for back-contact cells and suitable for thin and fragile cells
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Module technologyNew module technology:• New cell designs needed
- Back contacted- Simple interconnection- Can be used for thin cells
MWT
MWA
EWT
PUM
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Module technologyEmitter Wrap Through:• No metallization on the front• Thousands of holes
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Module technologyECN’s PUM concept:• More energy from attractive cells• 2-3% less shading• Resistance losses independent
on cell size (only on size unit cell)• Standard cell processing except:
- Laser drilling holes- Junction isolation around holes
Mother Nature’s water lily
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Module technologyECN’s PUM concept:• Single shot interconnection
and encapsulation
Single step module assembly
Glass plate
PUM cell
Rear side foil
Adhesive
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Module technologyECN’s PUM process:• Foil preparation• Apply conductive adhesive
instead of soldering(lower stress)
• Pick and place cells• One step curing
and encapsulation
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Module technologyECN’s PUM result:• Full size module (71×147 cm2)• 128 Wp (15.8% encapsulated
cell efficiency)• 0.6-0.8% absolute efficiency gain
Best PUM cell result up to now:• 16.7% (225 cm2)
At this moment PUM is the only integrated concept forcell and module
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PV marketAnnual market growth more than 40%
Photon International, 2006
Growth rate 2004: 67%
2005: 1720 MWp (+44%)
Japan: ~50% market share
1992
1994
1996
1998
2000
2002
2004
ROWJapan
0200400600800
100012001400160018002000
MWp
PV Cell/Module Production
ROWEuropeUSAJapanTotal
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PV marketMore than 90% crystalline Si technology
Photon International, 2006
40.8 37.4 34.6 36.4 32.2 36.2 38.3
46.2 52.5 55.8 56.2 61.5 58 55.2
13 10.1 9.6 7.3 6.2 5.9 6.5
0%10%20%30%40%50%60%70%80%90%
100%
1999 2000 2001 2002 2003 2004 2005Year
Tech
nolo
gy m
arke
t sha
re
thin filmmulti and ribbon Simono Si
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PV marketExpected market: solar the most important primary energy source
PV and solar thermal power
Wissenschaftliche Beirat 2003
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Costs PVContributes wafer is about 45%!Thinner wafers, or better ribbons, important!
Price solar electricity:0.20-0.50 €/kWh
(depending on location)
NL: ~0.50 €/kWh
9%
36%
30%
25%
sg-Siwafercellsmodule
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Cost reduction PV• Less material use
• Thin ribbons• Less module materials
• High efficiencies for the same process costs• Advanced processing• New cell design
• Easy manufacturing• Automation• Easy module manufacturing
• High lifetime• Improved yearly system output
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Cost reduction PV• Expected costs
012345
typischeturn-keysysteem-
prijs(€/Wp)
2004 2010 2020 2030 2050
jaar
BOSmodulesTypical
turn-key system price (€/Wp)
1000 GWp worldwide200 GWp in EU (200,000 jobs)
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Cost reduction PV• Expected costs based on learning curves (EU project Photex)
- Combined effect of technology development, experience, ….- Progress ratio PR should be around 80%
Power Modules (1976-2001)
1987
1981
2001
1983
1990
1976
1
10
100
0 1 10 100 1000 10000
Cumulative Shipments [MW p] power modules (SU, 2003)
[2001 $]
Price of Power Modules (2001 $)
Estimate 1976 - 2001: PR = 80.0±0.4%
Estimate 1987 - 2001: PR = 77.0±1.5%
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Cost reduction PV• Expected costs
• Solar competitivebetween 2010-2020
Source: RWE Energie AG and RSS GmbH
Photovoltaics
Utility peak power
Bulk power
0.0
0.2
0.4
0.6
0.8
1.0
1990 2000 2010 2020 2030 2040
€/kWh
900 h/a: 0,60 €/kWh
1800 h/a: 0,30 €/kWh
0.0
0.2
0.4
0.6
0.8
1.0
1990 2000 2010 2020 2030 2040
€/kWh
900 h/a: 0,60 €/kWh
1800 h/a: 0,30 €/kWh
Towards an Effective European Industrial Policy for PV.ppt / 05.06.2004 / Rapp @ RWE SCHOTT Solar GmbH
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Environmental aspects• Energy Pay Back Time 2005
Energy Pay-Back Time (grid-connected, roof-top PV system;
irradiation 1700 resp. 1000 kWh/m2/yr)
0
1
2
3
4
5
ribbonS-Eur.
ribbonM-Eur.
multiS-Eur.
multiM-Eur.
monoS-Eur.
monoM-Eur.
Ener
gy P
ay-B
ack
Tim
e (y
r)
BOS
frame
laminate
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Environmental aspectsEnergy Pay Back Time 2005 and 2010+
• Low energy consumption especially for Solar Grade Si• Low material use
(abundance)• High efficiency• High lifetime modules• Environmental friendly
processes• Recycling
0.00
0.50
1.00
1.50
2.00
2.50
3.00
ribbon11.5%
multi13.2%
mono14%
future ribbon15%
future multi16%
Ener
gy P
ay-B
ack
Tim
e (y
r)
BOSframelaminate
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Conclusions• Solar Grade Silicon needed for growing market
- Effect of impurities on cell efficiency should be known• Less Si use with ribbons• Improved processing has led to 17% mc-Si efficiency using in-line
processing• New processes for thin wafers/ribbons under development• Integrated cell and module design like PUM needed• High module lifetimeThen• Cost reduction possible
- Will be competitive with bulk electricity price• Energy Pay Back Time can be reduced to <1 year• Solar energy will be the most important primary energy source in
2100
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Applications at ECN
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Applications
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Thank you for your kind attentionThank you for your kind attention
FloriadeFloriade (2.3 (2.3 MWpMWp PV)PV)
Information / internshipInformation / [email protected]@ecn.nl