Crossing-FreeBoundary LabelingUsing Hyperleaders

Chun-Cheng Lin

Taipei Municipal University of Education

2

OutlineIntroduction

Motivations

Our resultsOne-side case O(n log n) time solvable

Two-side case O(n2) time solvable

Four-side case simulated annealing

Conclusion & Future work

3

Map LabelingPoint features

e.g., city

Line features

e.g., river

Area features

e.g., mountain

4

Boundary Labeling [Bekos et al., GD 2004]

(Bekos & Symvonis, GD 2005)

Type-opo leaders Type-po leders Type-s leaders

Min (total leader length)s.t. #(leader crossing) = 0

1-side, 2-side, 4-side

sitelabel

leader

5

VariantsPolygons labeling Multi-stack boundary labeling

Type-od leader Type-pd leader Type-do leader

5

6

Brown booby

Taiwan hill partridge

Masked palm civet

Hawk

Melogale moschata

Bamboo partridge

Chinese pangolin

Mallard

Distribution of someanimals in Taiwan:

Many-Site-to-One-Label Boundary Labeling(a.k.a., Many-to-One Boundary Labeling)

(Lin, Kao Yen, 2008)

Legend:

Brown booby

Taiwan hill partridge

Masked palm civet

Hawk

Melogale moschata

Bamboo partridge

Chinese pangolin

Mallard

7

Brown booby

Masked palm civet

Hawk

Chinese pangolin

Taiwan hill partridge

Melogale moschata

Bamboo partridge

Mallard

Two-Side Many-to-One Boundary Labeling

8

One More Example– Server Motherboard –

8 DIMMs

ATX Power Supply

2 LAN Ports

Battery

BIOS

2 Chipsets

6 SATA ConnectorsIDE Slot

PS2 Port

USB Port

COM Port

VGA Port

4 CPUs

6 Expansion Slots

9

Many-to-One Boundary LabelingUsing Hyperleaders & Dummy Labels

Type-opo hyperleaders & dummy labels

Main featuresNo confusion and crossings between leadersSuitable for labeling the sites with clustersOne-side and two-side cases are suitable for the maps with vertical-strip shapes

R

Track Routing Area

l1’

l1

l2

No leader crossings

addingdummylabels

R

l1

Track Routing Area

l2

hyper-leader

dummylabel

10

Our Concerned Problem

Minimizing the number of dummy labels

s.t. there are no leader crossings.

Furthermore, after determining # & pos of dummy labels,

the number of bends is minimized;

the total leader length is minimized.

R

11

Our Theoretical Results for Many-to-One Boundary Labeling

objective # of sidesleader type

complexity solution

Min #(crossing)

1-side opo NP-complete 3-approx.

2-side opo NP-complete3(1+.301/c)-

approx.

1-side po NP-complete heuristic

2-side po NP-complete heuristic

Min

Total leader length

any any polynomial time

Min

#(dummy labels)

1-side opo O(n log n)

2-side opo O(n2)

Note that c is a number depending on the sum of edge weights.

12

R RR

g1

g2

g3 g4

g5g6 g7

g8

R

g1

g2

g3 g4

g5g6 g7

g8

l1l2l3l4l5l6l7l8

One-Side Case

Input Step 1. Step 2.

Observation. Only the order of y-coordinates of sites matters.

Step 3.

13

How to Route Hyperleaders?

R

gi

li-1li

R

gi

li-1liyp(li)

1i

Bgy

1(v) when ( )

i

Bp i gy l y

R

gi

lili+1

1(i) when ( )

i

Tp i gy l y

1i

Tgy yp(li)

R

gi li

R

gi li

1i

Bgy

(iii) when ( )i i

B Tg p i gy y l y

1i

Tgy

yp(li)

Push i to stack S.(the routing of gi is determined after the routing of gi+1 is determined)

1i

Bgy

1i

Bgy

R

gilili+1

1i

Tgy

yp(li)

1i

Bgy

R

gi

1i

Bgy

lili+1

1i

Tgy

R

gi

li-1li

R

gi

li-1liyp(li)

1i

Bgy 1i

Bgy

1i

Tgy 1i

Tgy

1(ii) when ( )

i i

T Bg p i gy y l y

1(iv) when ( )

i i

T Bg p i gy y l y

R

gi

lili+1

1i

Tgy

1i

Bgy

L

Two-Side CaseStep 1. Step 2.

R

Scan from the top to the bottom.Each label is placed on the rightor the left line.

If moving labels in L to R does not result in any dummy label, the concerned label is placed on the same line as its guy; o.w. ...

its recentlyshown guy.

the concerned labelR

g1

g2

g3 g4g5g6

g7

g8

14

15

An Example

R

Move to the same side of its recentlyshown guy, if no crossing.

Make the numbers of componentson both sides as equal as possible

16

An Example (cont.)

R

17

Many-to-One Boundary LabelingThe original

New

8 DIMMsATX Power Supply

2 LAN Ports

Battery

BIOS

2 Chipsets

6 SATAIDE Slot

PS2 Port

USB Port

COM Port

VGA Port

4 CPUs

6 Expansion

6 SATA

2 CPUs

2 DIMMs

ATX Power Supply

Battery

BIOS

2 Chipsets

6 DIMMs

IDE Slot

PS2 Port

6 DIMMs

COM Port

VGA Port

2 LAN Ports

6 Expansion

2 CPUs

18

Our Results

objective # of sidesleader type

Complexity*

Minimize

#(dummy nodes)

1-side opo O(n log n)

2-side opo O(n2)

* Note that n is the number of sites.

19

Four-side case

[Bekos et al., 2007]Determining which sites are connected to one of the four sides so that the objective is achieved leads to the NP-hard Partition problem

Use the simulated annealing (SA) to solve the four-side case

20

Simulated Annealing for 4-side caseConfiguration

Corresponded to a site pSite p divides the map into four regions A1-A4

Initial configurationA configuration where the sites in each region are as equal as possible

NeighborRandomly select a corner c of the mapRotate the line connected to c around c in counterclockwise directionThe configuration corresponding to the first scanned site is selected as the neighbor

Energy cost function =

The cooling schedule is based on the previous work

pA1

A2

A3

A4

p

(normalized # of dummy labels) + (1-)(normalized total leader length)

c

21

Statistics

Experimental Results (I)

22

Experimental Results (II)

23

24

A Practical Example

25

Conclusion

Crossing-free many-to-one boundary labeling using hyperleaders (and dummy labels)

1-side case O(n log n) time for dummy label min. problem

2-side case O(n2) time for dummy label min. problem

4-side case simulated annealing

6 SATA

2 CPUs

2 DIMMs

ATX Power Supply

Battery

BIOS

2 Chipsets

6 DIMMs

IDE Slot

PS2 Port

6 DIMMs

COM Port

VGA Port

2 LAN Ports

6 Expansion

2 CPUs

26

Future work

Considering other kinds of leaders

R

l1l2l3l4l5

R

l1l2l3l4l5

R

l1l2l3l4l5

MST Steiner Tree

Steinerpoints

Thank you for your attention!