Critical Power Slope: Understanding the Runtime Effects of Frequency Scaling
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Transcript of Critical Power Slope: Understanding the Runtime Effects of Frequency Scaling
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Critical Power Slope: Understanding the Runtime Effects of
Frequency Scaling
Akihiko Miyoshi†,Charles Lefurgy‡,
Eric Van Hensbergen ‡, Ram Rajamony ‡,
Raj Rajkumar †
† Real-Time and Multimedia Systems LabDept. of Electrical and Computer Engineering
Carnegie Mellon University
‡Austin Research LaboratoryIBM
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The Question
• Operating Points – [600MHz,6V], [525MHz,4.2V],[450MHz,2.8V],[375MHz,2V],
[300MHz, 1.7V], [225MHz,1.5V],[150MHz,1.45V]
• Where should I operate (for energy efficiency)?– Dynamic Voltage Scaling (DVS) algorithms– Lowest performance without sacrificing user/application
requirement
• Why lowest performance is not always the best– Even for voltage scaling systems
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Energy Efficiency
...
power
time
activeE
t
Watts
activeE
idleE
t
Watts
Low frequency High frequency
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• Majority of OS policies assume
• Not always the case!– When it is not the case?
– How do we determine this?
Assumption
<activeE
t
Watts
activeE
idleE
t
Watts
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• Motivation– < : not always true– How do we choose which operating points to use?
• Measurement results• Analytical model: Critical Power Slope• Analysis on voltage scaling systems• Conclusion
Outline
lowfE highfE
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Power Management Techniques
• Provides multiple operating points– [600MHz,6V],[450MHz,2.8V],[300MHz, 1.7V]…etc
• Three empirical data points– Frequency Scaling
• PowerPC 405GP
– Clock Throttling• Pentium with ACPI
– Voltage Scaling• Strong ARM SA-1100
• Note: We are not making any statement on the benefits of these techniques! – These are merely samples which real systems use to manage power.
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Basic Results• Runtime and frequency
– CPU intensive workload: inverse relationship
• Power and frequency– Frequency scaling, clock throttling processors
• CPU active: linear relationship• CPU idle: constant
m: slope
CPU active
CPU idle
Power
Frequency
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Energy Consumption
• Compare energy consumption at different operating points– Same workload W – Same amount of time t
activeE
idleE
tpower
time
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0
500
1000
1500
2000
2500
3000
12 25 37 50 62 75 87 100
CPU performance (%)
J oules
Extra IdleSystem Active
Energy consumption (Pentium L1 cache read hit)
2490J
2591J174.3sec
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Energy consumption (PPC L1 cache read hit)
0
50
100
150
200
66 133 200 266MHz
J oules
Extra IdleOthersSDRAMCPU
136J66.4sec
162J
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Measurement Results
• Results consistent with different workloads– Register, L1 cache, memory, disk accesses– Web server (Pentium)
• Pentium– Highest frequency always energy efficient
• PowerPC– Lowest frequency always energy efficient
• Why?– What happens on voltage scaling systems?
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• Motivation– Which operating points should we consider?
• Measurement results– Pentium: highest performance better– PowerPC: lowest performance better
• Analytical model: Critical Power Slope• Analysis on voltage scaling systems• Conclusion
Outline
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• CPU intensive workload W• Frequency
– Assume utilization of system = 1– units of time to complete W– Energy consumed
• At frequency– Time to compute W:– Remaining extra idle time:
Characterization
minf
minfT
minminmin fff PTE )( minff
ff
fT minmin
)min
1min( ff
fT
idleff
ffff
ff PTPTE )1()( minmin
minmin
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– Power increases linearly with frequency– m: slope
• Is energy efficient??– True if – Depends on m
Critical Power Slope
)( minmin ffmPP ff
idleff
ffff
ff PTffmPTE )1()]()[( minminminmin
minmin
minfminff EE
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• Use slope m to characterize system– Find hypothetical m for and call it
Critical Power Slope (CPS)
Critical Power Slope cont’d
minff EE
min
min
fPP
criticalidlefm
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What does it mean?
Freq
Power
criticalm
minf
idleP
min
min
fPP
criticalidlefm
minfPidleP
criticalmm
criticalmm
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• If– Energy efficient to run at higher freq.– Pentium
• If– Energy efficient to run at lower freq.– PowerPC
Implications of CPScriticalmm
criticalmm
028.%5.128481215
MHzWWcriticalm020.%5.12848
1530 MHzWWm
0038.6602.227.2 MHzWWcriticalm0043.66266
27.213.3 MHzMHz
WWm
minff EE
minff EE <
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J.Pouwelse, K.Langendoen, and H. Sips, “Dynamic Voltage Scaling on a Low-Power Microprocessor”, MOBICOM2001
Voltage Scaling Processors (Strong Arm SA-1100)
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• Look at every operating point at frequency
• If– Energy efficient at higher frequency than
• If– Energy efficient at lower frequency than
CPS for voltage scaling system
xf
fxPP fx
idlefxfx
criticalm
fx
critical
fx mm
fx
critical
fx mm xf
xf
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Analysis on SA-1100
• Above 74MHz
• At 74MHz
• Below 74MHz
• Energy Inefficient below 74MHz!
001.0744612174
MHzmWmWMHz
criticalm
001.0597410612174
MHzMHz
mWmWMHzm
fx
critical
fx mm
fx
critical
fx mm
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SummaryPower
Frequency
Power
Frequency
Power
Frequency
Pentium PowerPC
SA-1100 CPS: Characterizes the runtime trade-off of power management techniques
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Conclusion
• Which operating points should we consider?– Traditional DVS algorithms attempt to go to lowest
frequency– Not always the best choice
• Critical Power Slope • Identifies energy inefficient operating points• Can be used to inform OS (DVS algorithms) of operating
points it should not consider