CPS110: Intro to memory Landon Cox. Course administration Exam Two weeks from today Mostly...

39
CPS110: Intro to memory Landon Cox

Transcript of CPS110: Intro to memory Landon Cox. Course administration Exam Two weeks from today Mostly...

Page 1: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

CPS110: Intro to memory

Landon Cox

Page 2: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Course administration

Exam Two weeks from today Mostly concurrency 4-5 questions (will say more on

Wed.)

Page 3: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Operating systems

HardwareHardware

OSOS

ApplicationsApplications

Page 4: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Remember what a process is

Thread Stream of execution (unit of

concurrency) Project 1, first month of class

Address space Memory space that threads use (unit of

data) Project 2, next two weeks of class

Page 5: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Address space abstraction

Address space All memory data process uses to run Program code, stack, data segment

Hardware software All processes share single small memory

OS applications Each process has its own large memory

Page 6: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Hardware, OS interfaces

HardwareHardware

OSOS

ApplicationsApplications

MemoryMemory CPUCPU

CPU, MemCPU, Mem

Job 1Job 1CPU, MemCPU, Mem

Job 2Job 2CPU, MemCPU, Mem

Job 3Job 3

Page 7: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Illusions of the address space

1. Address independence Can use same numeric address in 2 processes Each process has its own version of “address 4” Each “address 4” refers to different data items

2. Protection One process cannot touch another’s data

3. Virtual memory Address space can be larger than physical

memory

Page 8: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Uni-programming

1 process occupies memory at a time Always load process into same spot Must reserve space for the OS

fffff (high memory).. Operating system.800007ffff.. User process 1.00000 (low memory)

Page 9: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Uni-programming

Virtual address Address programmer thinks she’s accessing

Physical address Address from the view of the machine (actual physical memory location)

What is the V-to-P mapping in uni-progamming? Identity map (virtual A physical A)

Page 10: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Uni-programming

How to run another process? Swap user process 1 to disk Bring user process 2 to memory Kernel scheduler swaps address spaces (when doing a context switch)

This is how early PCs worked (badly)

Page 11: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Uni-programming

What features does this provide? Address independence Protection No virtual memory

Note sum of address spaces > phys mem.

Page 12: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Uni-programming

Problems with uni-programming? Swapping to/from disk is slow Moves more data than might be needed

What does this imply about RR slice? High overhead for swapping large

slice Large slice interactivity suffers

Page 13: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Multi-programming

More than 1 process in phys memory Processes can have same virtual addrs Cannot share physical addrs

Addresses must be translated Statically: occurs before execution Dynamically: occurs during execution

Protection is harder

Page 14: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Static address translation

Want two processes in memory With address independence Without translating on-the-fly Must use static translation

Could you do this?

Page 15: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Static address translation

Adjust loads/stores when put in memory This is called a linker-loader

Programming Assume memory starts at 0

Linker-loader Adds 0x20000 to offsets for P2

Similar to linking phase of compile

fffff (high memory). Operating system80000.3ffff.. User process 2.200001ffff.. User process 1.00000 (low memory)

load $1, $base + offset

Page 16: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Linking your programs

Compiler generates .o files + libraries .o files all assume they start at

address 0 Linker puts everything together

Resolves cross-module references (e.g. “how do I jump to thread_create?”)

Spits out single executable file

Page 17: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Multi-programming abstractions

Address independence? Yes. (my address 4 is different from

yours) Protection?

No. Why not?

Page 18: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Multi-programming protection

Static translation changes the offset Process could still issue odd register value Problem

Buggy/malicious code can corrupt other processes

User (not system) gets last move Why do we need dynamic addresses?

To make pointers and arrays work

load $1, $base + offset

Page 19: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Multi-programming features

Address independence? Yes. (my address 4 is different from

yours) Protection?

No. Virtual memory?

No.

Page 20: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Multi-programming virtual memory

Virtual address space ≤ phys mem Proof: static translation cannot provide

VM Each VA maps to a fixed PA (one-to-one mapping) Thus, # of VAs must equal # of PAs (but we want more VAs than PAs)

Our goals require dynamic translation

Page 21: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Dynamic address translation

User processUser process Translator(MMU)

Translator(MMU)

PhysicalmemoryPhysicalmemoryVirtual

addressPhysicaladdress

Will this allow us to provide protection?Sure, as long as the translation is correct

Page 22: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Dynamic address translation

User processUser process Translator(MMU)

Translator(MMU)

PhysicalmemoryPhysicalmemoryVirtual

addressPhysicaladdress

This is an example of a systems service called “naming”.Can you think of other examples, that you use everyday? Internet DNS (Domain Name Service) File System (human-readable names to blocks on disk)

Page 23: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Dynamic address translation

User processUser process Translator(MMU)

Translator(MMU)

PhysicalmemoryPhysicalmemoryVirtual

addressPhysicaladdress

How does Java use naming to provide protection?What exactly is Java trying to protect (and from what)?Has programming in C++ changed your opinion of Java?Does learning Java or C++ make you a better programmer?

Page 24: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Dynamic address translation

Does this enable virtual memory? Yes

VA only needs to be in phys mem when accessed

Provides flexibility Translations can change on-the-fly Different VAs can occupy different PAs

Common technique Add level of indirection to gain flexibility

Page 25: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Hardware support

Traditional view Dynamic translation needs hardware

support Agree or disagree?

Basic requirement Must translate each load/store

Could do this via software simulation JVM does a lot of the work of the MMU

Page 26: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Translator: just a data structure Tradeoffs

Flexibility (sharing, growth, virtual memory) Size of translation data Speed of translation

Dynamic address translation

User processUser process Translator(MMU)

Translator(MMU)

PhysicalmemoryPhysicalmemoryVirtual

addressPhysicaladdress

Page 27: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

1. Base and bounds

For each process Single contiguous region of phys

mem Not allowed to access outside of

region Illusion own physical mem [0,

bound)

Page 28: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

1. Base and bounds

Virtual memory Physical memory

0

Bound Base

Base + Bound

0

Size of phys memLooks a lot like the linker-loader.What is different?No rewriting.Every access goes through translator.(system gets the last move)

Page 29: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

1. Base and bounds

Translator algorithm

Only kernel can change base, bound

if (virtual address > bound) { trap to kernel kernel can kill process with segmentation fault} else { physical address = virtual address + base}

Page 30: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

1. Base and bounds

What happens on a context switch? Must translate addresses

differently Load translation data for new

process Set base and bounds registers

Page 31: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

1. Base and bounds

How can address spaces grow? If memory above base+bound is free

Increase the bound

If memory above base+bound isn’t free Stop program Copy data Change base and bounds Restart process

Does being moved affect the program? No, it still only knows about virtual addresses

Base

Base + Bound

0

Page 32: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds pros and cons

Pros Low hardware costs (2 registers, adder,

comparator) Fast (only inserting addition and comparison)

Cons Single address space can’t easily exceed size of

phys mem Growing virtual address space might be slow Sharing is difficult (must share all or

nothing)

Page 33: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds sharing

Virtual memory(IE 1)

Physical memory

0

Bound

Base

Base + Bound

0

Size of phys mem

Virtual memory(IE 2)

0

Bound

Why can’t IE 1 and IE 2 share the same code segment?

Page 34: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds pros and cons

Pros Low hardware costs (2 registers, adder,

comparator) Fast (only inserting addition and comparison)

Cons Single address space can’t easily exceed size of

phys mem Growing virtual address space might be slow Sharing is difficult (must share all or nothing) Waste memory due to external fragmentation

Page 35: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds fragmentation

Physical memory

0P1P1

P2P2

P3P3

P4P4

100KB

300KB

600KB

1MB

P5P5400KB

P6P6300KB

External fragmentationHeuristics to minimize• Best fit (Allocate in smallest free region)• First fit (Use first region that fits)

Page 36: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds pros and cons

Pros Low hardware costs (2 registers, adder, comparator) Fast (only inserting addition and comparison)

Cons Single address space can’t easily exceed size of

phys mem Sharing is difficult (must share all or nothing) Growing virtual address space might be slow Waste memory due to external fragmentation Hard to grow multiple regions of memory

Page 37: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds growth

What grows in a process? The stack and heap

P1P1P1

stack

frameframeframeframeframeframeframeframe

New bound

Page 38: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Base and bounds growth

What grows in a process? The stack and heap

How do you do this with both? If heap grows, extend P1’s bound If stack grows, must shift heap up

What about pointers into heap?

P1

heap

stack

heap

stack

heap

New data on heap at VA 100(translated to PA 100+base)

Store this address in a variableHow can you shift VAs up?

VA100

Problem: must fit two growing data structures in one contiguous region

Page 39: CPS110: Intro to memory Landon Cox. Course administration  Exam  Two weeks from today  Mostly concurrency  4-5 questions (will say more on Wed.)

Next class

Segmentation instead of base and bounds Where “segmentation fault” comes

from Good luck wrapping up Project 1