CPLD (Complex Programmable Logic Device) Need of CPLD : Due to limitations of SPLDs(PLA and PAL). It...
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Transcript of CPLD (Complex Programmable Logic Device) Need of CPLD : Due to limitations of SPLDs(PLA and PAL). It...
CPLD (Complex Programmable Logic Device)• Need of CPLD :
Due to limitations of SPLDs(PLA and PAL).
It is Collection of PLDs and interconnection on same die.
Logic gates upto 10000 gates.Vendors: Altera, Atmel, Cypress, Philips etc.
Structural Block Diagram of CPLD Programmablen I/O blocks
PLD
PLDPLDPLD
PLDPLD
Programmable Interconnect
Macrocell:Consists: AND-OR configuration(5-20 AND gates, OR
gates with 5-20 inputs).Ex-OR gate(provides inverted or noninverted
output of ORgate).D-Flip-Flop.Multiplexer.Buffer.
Advantages of CPLD?• Ease of Design: With use of HDL & CPLD development tools
• Reduced Board Area: As uses VLSI & available in tiny sizes.
• Cost of Ownership: Due to less maintenance.
• Lower Development Costs
• More product revenue: Development cycles are very short & get into market quicker, generates revenue sooner.
• Reliability
Field-Programmable Gate Arrays Introduced in 1985 by XILINX Company.Since then many different companies developed it: Actel, Altera,
Algotronix, Quick Logic, AMD, Cross Point Solutions etc.PLAs: 100s of gate equivalentsFPGAs: 1000-few hundred 1000s gatesLogic blocks(CLB)
Implement combinationaland sequential logic
Interconnect Wires to connect inputs and
outputs to logic blocks I/O blocks
Special logic blocks at periphery of device forexternal connections
CLB(Configurable Logic Blocks)Number of ways defining CLB that it varies from
simple AND gate to very complex structure consisting MUX or LUT & so many PLA kind structure.
4-input look up table (LUT) Implements
combinational logic functions
RegisterOptionally stores
output of LUT
FPGA LOGIC BLOCK
I/O pads configured as inputsSelectable 2.5 V or
3.3 V threshold levels
Optional pull-up resistor
I/O pads configured as outputsAbility to drive
LVTTL and LVCMOS levels
□Prototyping
-Ensemble of gate arrays used to emulate a circuit to be manufactured -Get more/better/faster debugging done than with simulation
□ Reconfigurable hardware
-One hardware block used to implement more than one function
□ Special-purpose computation engines
-Hardware dedicated to solving one problem (or class of problems)
-Accelerators attached to general-purpose computers (e.g., in a cell phone!)
APPLICATIONS OF FPGA
16
SEQUENTIAL PLDOutput Logic Macrocell (OLM)
combinational config registered config
product term invert output? D F/F
Difference between CPLD & FPGA
Sr. No.
CPLD FPGA
1. Complex Programmable Logic Device
Field Programmable Gate Array
2. It is collection PLDs. It is collection of CLBs.
2. Gate density up to 10000 gates
1000-few hundred 1000s gates
4. Interconnection wise it is complex so called as CPLD.
Programmable at field or site so called as FPGA.
5. PAL like blocks used as PLDs.
CLBs used as building blocks.
6. AND-OR arrays are there in PAL like blocks.
LUTs are there in CLBs.
7. Configuration context is stored in ROM.
Configuration context is stored in RAM.
8. Configuration context is Non-volatile.
Configuration context is volatile.